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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id w19sm4682531ooj.39.2021.07.21.09.32.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 09:32:11 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Kishon Vijay Abraham I , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, kernel test robot Subject: [PATCH] phy: qcom-qmp: Fix sc8180x PCIe definition Date: Wed, 21 Jul 2021 09:30:29 -0700 Message-Id: <20210721163029.2813497-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org A copy paste error was snuck into the patch going upstream that made the SC8180x PCIe PHY use the SM8250 serdes table, but while this works there's some differences in the tables (and the SC8180x was left dangling). So correct the SC8180x definition to use the SC8180x serdes table. Fixes: f839f14e24f2 ("phy: qcom-qmp: Add sc8180x PCIe support") Reported-by: kernel test robot Signed-off-by: Bjorn Andersson --- drivers/phy/qualcomm/phy-qcom-qmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.29.2 diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index b2ab20cd8ef5..cb2bf0590991 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -3519,7 +3519,7 @@ static const struct qmp_phy_cfg sc8180x_pciephy_cfg = { .type = PHY_TYPE_PCIE, .nlanes = 1, - .serdes_tbl = sm8250_qmp_pcie_serdes_tbl, + .serdes_tbl = sc8180x_qmp_pcie_serdes_tbl, .serdes_tbl_num = ARRAY_SIZE(sm8250_qmp_pcie_serdes_tbl), .tx_tbl = sc8180x_qmp_pcie_tx_tbl, .tx_tbl_num = ARRAY_SIZE(sc8180x_qmp_pcie_tx_tbl),