From patchwork Tue Jul 20 09:57:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King \(Oracle\)" X-Patchwork-Id: 482020 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62711C07E95 for ; Tue, 20 Jul 2021 09:57:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3F19660FE9 for ; Tue, 20 Jul 2021 09:57:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234672AbhGTJRI (ORCPT ); Tue, 20 Jul 2021 05:17:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231560AbhGTJRI (ORCPT ); Tue, 20 Jul 2021 05:17:08 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F260C061574 for ; Tue, 20 Jul 2021 02:57:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:Reply-To:Content-ID :Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To: Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=saBdbQhCv4PYpSofz2Ge/dluX7RsHKzWvdua1d2owT4=; b=0Iec1pzfrkLuWVvWvwY62DLs46 Tzbm6eTAhYnDl45ahbjG6C33/pCtyDH4S5RhOq+1LhkWqGJ6e1NeHIJ61rxTeT13MWHhje0F84wfO YFEeJdtApD+gRuX4W1tEUp9dDIMapuhzLlzONeEvZkyCpSSOC1TVJGLEzvihX90vIOcVk9Ur3nHBn nOxrRW8BeSsKnHNgJeHvsavjiI03UltGmvekioT7JDY5lfzCloK6gqd+ZajODLJsnOo98vQXsHZbO rAJbnC4RmMMQL2Hxx/Xofy4fE6kwvCcKhG3h1LZ3aeqPmAzC8NwmtXbDVOPirEOtxwBy0dQJD0NUv G4jXbTgg==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:53326 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1m5mVT-00068u-Rh; Tue, 20 Jul 2021 10:57:43 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1m5mVT-00032g-Km; Tue, 20 Jul 2021 10:57:43 +0100 From: Russell King To: Andrew Lunn , Heiner Kallweit Cc: "David S. Miller" , netdev@vger.kernel.org, Ioana Ciornei , Jakub Kicinski Subject: [PATCH net-next] net: dpaa2-mac: add support for more ethtool 10G link modes MIME-Version: 1.0 MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Tue, 20 Jul 2021 10:57:43 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Phylink documentation says: Note that the PHY may be able to transform from one connection technology to another, so, eg, don't clear 1000BaseX just because the MAC is unable to BaseX mode. This is more about clearing unsupported speeds and duplex settings. The port modes should not be cleared; phylink_set_port_modes() will help with this. So add the missing 10G modes. Signed-off-by: Russell King Acked-by: Marek Behún Acked-by: Ioana Ciornei --- drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c index ae6d382d8735..543c1f202420 100644 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c @@ -140,6 +140,11 @@ static void dpaa2_mac_validate(struct phylink_config *config, case PHY_INTERFACE_MODE_10GBASER: case PHY_INTERFACE_MODE_USXGMII: phylink_set(mask, 10000baseT_Full); + phylink_set(mask, 10000baseCR_Full); + phylink_set(mask, 10000baseSR_Full); + phylink_set(mask, 10000baseLR_Full); + phylink_set(mask, 10000baseLRM_Full); + phylink_set(mask, 10000baseER_Full); if (state->interface == PHY_INTERFACE_MODE_10GBASER) break; phylink_set(mask, 5000baseT_Full);