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For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.30.2 diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml index 6667261dc665..6b3380cf1a10 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -56,6 +56,11 @@ properties: reg: maxItems: 1 + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + required: - compatible - reg @@ -70,6 +75,7 @@ additionalProperties: false examples: - | #include + #include clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; reg = <0x0af00000 0x10000>; @@ -90,5 +96,6 @@ examples: #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + power-domains = <&rpmhpd SM8250_MMCX>; }; ... From patchwork Sun Jul 18 10:48:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD110C6377E for ; Sun, 18 Jul 2021 10:49:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C1E6761245 for ; Sun, 18 Jul 2021 10:49:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232972AbhGRKwK (ORCPT ); Sun, 18 Jul 2021 06:52:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232845AbhGRKwJ (ORCPT ); Sun, 18 Jul 2021 06:52:09 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D38EEC061767 for ; Sun, 18 Jul 2021 03:49:10 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id h9so21213025ljm.5 for ; Sun, 18 Jul 2021 03:49:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EIpScdiCXHtz5HFKS+jehHcY8/9fE5GMmH0c5uPACAU=; b=AGXbjUn/f3tkWKTzx4g2vWUI5rxD3aacaiAgepT1wJ8AKNjwnPE5WAK2X84qlhjCwy RffR+Zr0Eu0JY1AyUZqurpCwnbWzFpsN0pBSLtD2Q9p10oDl6qo8guwUYrtq24voA0SU AaIxvQJ6vxPo0JjrEiPW+Nve9JDFOBUPKfHBuA0Ev+j01idNpH47tue4U4M9usRkv2WV vxG73R8vqG8GEPZ6LQXRpvDnOvB8a42enrn67mqn5ZN46rPOhH19ezQ6fM4SW0ocKKON cO5yCGPcs69TvgvuSo5vftylRTkvc8sOQr5BDJOmPtRheY1xKPsgDD3UIwMBECPtWMO4 XqXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EIpScdiCXHtz5HFKS+jehHcY8/9fE5GMmH0c5uPACAU=; b=Gu04VtVA3Kp7WTRfbg3LakRWdxBWU4d0/+jM9yfThluV25xhEuiiBzAm/oz4BY7InW woZaIgKhIDGT6wJogNIZ1DLAu+fcZXY5WDyGAoGj5BgoW3zQBcDtu3OtJTtfA9sgAoXW 2G/crdtZ1GgzyIJ1SLiAAisKNwU6kArpq1O0R5CJQSEk0MPu9XjeZRtB7AG+hfQpY7uc y/lhS60HXnDzRXr8UOLqUYgS1JrE7P875K3jBOolC9w1AgXt579bfVTLyKXuuWWnnfy0 5/ZRbd2yM8MA04IKK/0rWSDUpQ4BCe6+JitPORCzUTPlT3i4H1c/CEc8JAAXW/eI5r3X +Uqw== X-Gm-Message-State: AOAM5308chrIROUTLg4euD/QbvBBq/57FLcscx7ZpHmbciptAdZoT6MS zXE2+7PbGHJ17YvvcdaySrriCA== X-Google-Smtp-Source: ABdhPJzOptY7RHE6Ww4LdDbyp0j9IiGHw27LBAjoow5E5fHJnPAUgsG68vtXCYXp/sQC8rHd10KVoA== X-Received: by 2002:a2e:7f1e:: with SMTP id a30mr18322867ljd.2.1626605349117; Sun, 18 Jul 2021 03:49:09 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:08 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v5 2/9] dt-bindings: clock: qcom, videocc: add mmcx power domain Date: Sun, 18 Jul 2021 13:48:54 +0300 Message-Id: <20210718104901.454843-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On sm8250 videocc requires MMCX power domain to be powered up before clock controller's registers become available. For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 567202942b88..db4ada6acf27 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -47,6 +47,11 @@ properties: reg: maxItems: 1 + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + required: - compatible - reg @@ -61,6 +66,7 @@ additionalProperties: false examples: - | #include + #include clock-controller@ab00000 { compatible = "qcom,sdm845-videocc"; reg = <0x0ab00000 0x10000>; @@ -69,5 +75,6 @@ examples: #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + power-domains = <&rpmhpd SM8250_MMCX>; }; ... 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Signed-off-by: Dmitry Baryshkov --- drivers/base/power/runtime.c | 17 +++++++++++++++++ include/linux/pm_runtime.h | 4 ++++ 2 files changed, 21 insertions(+) -- 2.30.2 diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c index 8a66eaf731e4..ec94049442b9 100644 --- a/drivers/base/power/runtime.c +++ b/drivers/base/power/runtime.c @@ -1447,6 +1447,23 @@ void pm_runtime_enable(struct device *dev) } EXPORT_SYMBOL_GPL(pm_runtime_enable); +static void pm_runtime_disable_action(void *data) +{ + pm_runtime_disable(data); +} + +/** + * devm_pm_runtime_enable - devres-enabled version of pm_runtime_enable. + * @dev: Device to handle. + */ +int devm_pm_runtime_enable(struct device *dev) +{ + pm_runtime_enable(dev); + + return devm_add_action_or_reset(dev, pm_runtime_disable_action, dev); +} +EXPORT_SYMBOL_GPL(devm_pm_runtime_enable); + /** * pm_runtime_forbid - Block runtime PM of a device. * @dev: Device to handle. diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h index aab8b35e9f8a..222da43b7096 100644 --- a/include/linux/pm_runtime.h +++ b/include/linux/pm_runtime.h @@ -59,6 +59,8 @@ extern void pm_runtime_put_suppliers(struct device *dev); extern void pm_runtime_new_link(struct device *dev); extern void pm_runtime_drop_link(struct device_link *link); +extern int devm_pm_runtime_enable(struct device *dev); + /** * pm_runtime_get_if_in_use - Conditionally bump up runtime PM usage counter. * @dev: Target device. @@ -253,6 +255,8 @@ static inline void __pm_runtime_disable(struct device *dev, bool c) {} static inline void pm_runtime_allow(struct device *dev) {} static inline void pm_runtime_forbid(struct device *dev) {} +static inline int devm_pm_runtime_enable(struct device *dev) { return 0; } + static inline void pm_suspend_ignore_children(struct device *dev, bool enable) {} static inline void pm_runtime_get_noresume(struct device *dev) {} static inline void pm_runtime_put_noidle(struct device *dev) {} From patchwork Sun Jul 18 10:48:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479606 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3167749jao; Sun, 18 Jul 2021 03:49:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzpk4ri1bGf0GE188I1lrzRcPOqrUMsxFeavfMBf/Kl3kNladTVPzGaVIsoY8lbwg5xfTG5 X-Received: by 2002:a05:6638:58e:: with SMTP id a14mr11966074jar.81.1626605358301; Sun, 18 Jul 2021 03:49:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626605358; cv=none; d=google.com; s=arc-20160816; b=AMNT0uS0kMxogjAcYKiE3LEnO8QUNXD5wTEsAZuNzMoYw2Nwat+uVwwkNXlhkk3mn0 xtFChyN2azD/R77qRsMbRIm1BwjUYhRolTzPTr8HCOMtpG8k9rDwTmjteBkHZzuAjzit 9Yxme5uZjdI3ha6l/jMJT2xTtIVYMOhK3jE+kibghl1l8UbCSClDSZRTGU8VwM92lc6Q 47/Dqh3r6neqwxlammaWrSkPOLmj+ouxvOjK2r7Mklr88KMI1lbT+9XSgl4ZN+n73+MU 89grl7F9dBwVLMN92fSETqFUJHM4u8RsQdx2VjBQGGghGhTm525oFpo1Vy+peYYiLFwV Ythg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iaKylTHK8D5EzB/xiSIklLRQLkt7yfSNwyCfbc/j47o=; b=H1vzM6ro/f5YR9ayXfpmYZhyPrWpWFvEbiTu1UrdXIvSx1WZWFrlpvH1oAGr/vqVAd l4zQjxL8QFDDookTWjh6TK5vkL8KGAbwpbCxDdLPGcQ86z4z6BrzF04zECvqX0kG63Tk qdAWo9OOsyecGW2KRkmauitKci0yuhL2iOrSD6wAkHLmhz2uwwcpy5UlTAvp9h9ZN7OF TtUGeY/VLPzQYsZjnfUIyTkKStBa+RuQwyLOy8F8qRQ4Y5k9Xre+hULgKK3QthKNeXGc JWpbwuNp1CJcS+NTyXBenrNqJNP7qdz2x5BmU7TRMHITOieoQJY0pLkM4xa+JmiChd/u kaxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CumnnenM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u15si18586418iot.89.2021.07.18.03.49.18; Sun, 18 Jul 2021 03:49:18 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CumnnenM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233071AbhGRKwN (ORCPT + 7 others); Sun, 18 Jul 2021 06:52:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233018AbhGRKwL (ORCPT ); Sun, 18 Jul 2021 06:52:11 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6569BC061766 for ; Sun, 18 Jul 2021 03:49:12 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id 8so24243419lfp.9 for ; Sun, 18 Jul 2021 03:49:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iaKylTHK8D5EzB/xiSIklLRQLkt7yfSNwyCfbc/j47o=; b=CumnnenME8Jyt67j9cGkgxVdCUPijZ3W406ZSjfKl+O2mNfMofR/47JrDLfV3KXUOE SzvReEkCSbbMj0r2eMR7Ddw/QFIoMRIamBtsMxGDLikqCmWRKs4QwMo6uvopIW92pcSg C0bLwqobwmgNWduQlpWgZWv7oxb7s3ll6UsjFf4nny6CfNdrZakatnGd5Z7Lee6+mdKq 8RQNDtLJCb42v7dlSX35lSy2gEcCvcxcFtLL9oLzcQVdo+KC3gDf7pvCu86YOcO32tIq +D7XvmCae4PZNaxpwjhcEekYitsFQUUHvxwiopdIEf/qTCjOlARY1WNKR2No+6bLskbt t7zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iaKylTHK8D5EzB/xiSIklLRQLkt7yfSNwyCfbc/j47o=; b=SvfGls7Fb/Dggxvr1X1Wt2LtPkISsfji/U4UuAIpptMO/8fPjKW5rokoBgLeA/Qwx4 KiSWLKnPvLTmPOoFIo8vkFGS2rkgTD6XaJm+x0QJ3Cf/uJzZOWrzY3rdz957LKKnNUTh QT1IfZwvxNrXcEyoHJTop+EDMG8knnYNbS+VcOPXVS53sxKcWli81oV9YUZ+d1JonP7p iaSVEZ8eVLUTCgAzW8MwtwJr2r0WX+SD4JxLJqF+TFiZCqryVMfcaPAqzPwypkMCheu5 prAF0gulFNYo5u/5u469ts1yznCU9Uxtq+8umXzahScn6CZJ0wCpIbLy/rZXxdcHAPt5 pMbQ== X-Gm-Message-State: AOAM532+UikbULCBJGi5iFKSVnz5O88jA0fx7xw5EU3XKMZi7vJwpMhc aB/TOfRmnwVb5GTQG8HtgPuVvA== X-Received: by 2002:a05:6512:322a:: with SMTP id f10mr3855591lfe.625.1626605350779; Sun, 18 Jul 2021 03:49:10 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:10 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v5 4/9] clk: qcom: dispcc-sm8250: use runtime PM for the clock controller Date: Sun, 18 Jul 2021 13:48:56 +0300 Message-Id: <20210718104901.454843-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Use runtime PM calls to make sure that required power domain is powered on while we access clock controller's registers. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 601c7c0ba483..0625fea6d7ba 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -1229,10 +1230,21 @@ MODULE_DEVICE_TABLE(of, disp_cc_sm8250_match_table); static int disp_cc_sm8250_probe(struct platform_device *pdev) { struct regmap *regmap; + int ret; + + ret = devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; + + ret = pm_runtime_resume_and_get(&pdev->dev); + if (ret) + return ret; regmap = qcom_cc_map(pdev, &disp_cc_sm8250_desc); - if (IS_ERR(regmap)) + if (IS_ERR(regmap)) { + pm_runtime_put(&pdev->dev); return PTR_ERR(regmap); + } /* note: trion == lucid, except for the prepare() op */ BUILD_BUG_ON(CLK_ALPHA_PLL_TYPE_TRION != CLK_ALPHA_PLL_TYPE_LUCID); @@ -1257,7 +1269,11 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev) /* DISP_CC_XO_CLK always-on */ regmap_update_bits(regmap, 0x605c, BIT(0), BIT(0)); - return qcom_cc_really_probe(pdev, &disp_cc_sm8250_desc, regmap); + ret = qcom_cc_really_probe(pdev, &disp_cc_sm8250_desc, regmap); + + pm_runtime_put(&pdev->dev); + + return ret; } static struct platform_driver disp_cc_sm8250_driver = { From patchwork Sun Jul 18 10:48:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479607 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3167761jao; Sun, 18 Jul 2021 03:49:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxc75v3apZSs3/pJZ8xNb4xWmiPZYMe7VyrQF0cNbuOOi+fsYHfYRAla7wIp2/SAZI+mCxy X-Received: by 2002:a5d:9585:: with SMTP id a5mr15133943ioo.28.1626605359083; Sun, 18 Jul 2021 03:49:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626605359; cv=none; d=google.com; s=arc-20160816; b=soVzCOXZDaAIOEEhWxAR4HyCf62Rvugc5sebo+9OXyd2aZzXVUedWGAFChjKkLr0Q2 sV9zNpqyXWHlETpNqi5kktBWYle1DtQD3Yl0jrg82oAVjwC9KA0RgpyzMmlNcZITHQ/S Fge9t/Kwj2lNexydsyaMny65YlTaBlnHG6gbNR2ERxgq5IEIhAsB5FiBhfkk5lQVK1YB UvB8Ey5MtUhMAO/JzOJTNELGmHsXHGthE1Kzg3pQgA4FqvLcKguGunXnTrT42ZTnxQy4 DDTR+pe2nAX0HdvuJy0DQBehKKM2H2Levi9Y/xYbPeC9/K3aE71mK7H/B8v60CJzFP1+ NUIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JPnE4vurU9PkRVowEC7li0cxdIi4nYwl+uw77ku/+po=; b=SnusIx38Pmhu4GQZo2M8dlgcRlvEkQWJ7sxl5DQaK5NuUOeHUMbN3N6DP3snuiFoJz TTcSXt8KuWNSTcLAOX9TGdbtmN08euyerdTlY5QXiSW6Z69bhANu/DgK4YOBxDkjmSxA gw2KG2rbZScEGiMfP8K9wtT7U2Rn6Fvr3b4Ogf2yvCKwFAWxvoYNT9DMwc8KGabqsxwd ajvvL3IJaAnBTzhOwttpeY+NA9+TiMLGyu1vnRplJVAXCXr4dnKF4jAOQWE35uNYJRZ0 Ihdayu8wdHt9m8pX0AaD8jhOopOD4724XmVbOAc01WsN+i09OfJob8Qs9WoZdO2+rjPL h9VA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=djJXp5zR; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u15si18586418iot.89.2021.07.18.03.49.18; Sun, 18 Jul 2021 03:49:19 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=djJXp5zR; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233122AbhGRKwN (ORCPT + 7 others); Sun, 18 Jul 2021 06:52:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232898AbhGRKwL (ORCPT ); Sun, 18 Jul 2021 06:52:11 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BD8CC061768 for ; Sun, 18 Jul 2021 03:49:13 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id t20so5446010ljd.2 for ; Sun, 18 Jul 2021 03:49:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JPnE4vurU9PkRVowEC7li0cxdIi4nYwl+uw77ku/+po=; b=djJXp5zRLDPGCdVtBXwbxLa9g+CRF8URjpJzVuHrCeN0dDkCiZoSerJVx6FFNQciyW VAMeVfkWR7+Yo5N5gu+go18RQAVzfzmfT1/RZDRTO2rr/BPrisQxjP8BXE/bHahdfdC0 jfwy7LpLRmKF1NyPv7iGM5LyQ9d2BCwF0rtcpi2/SVkx60BAkLC//MHal2yPNSouAr4C 02G5O1X+JBtxvwhE8aKYS/SvqVU/d9yP6gSm9klJtugOItiYZP106lGSKFcUW1mMMn3c Yt2dxCfEUQPTr08ofETmLVwAP+98wsSBJOAFbb4Js/JsSoa/U6r4Z5y3FgNneGsZQ25f dLvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JPnE4vurU9PkRVowEC7li0cxdIi4nYwl+uw77ku/+po=; b=Hrn11tUMboFFF2m4xWPa//GDIv+m2f/mXDVtVqQKQJxZoi7jQ+zUXucPRxu3Z/tn5X UkQnJQZOUI9XCfbGgodmdCnkSw31PsIQi9PXGqxo8mYyT6LG0xwp0OIJc2qc6K3VL1wW BmrL17Qne0g01ERVCBe2FuvcRNZ0ylwtWq8XDPaqHlWmqTgmtGFZRTH28VIiVx7zAbL6 hiCybMeb1siEc2AicKmx19qA1l04Yhwde167ZBy53lusgrBu1wLKuOfO99sqg6VBr5nR eHjMHrhMyZK84N4F06gTTiAely6DTX2SPB5SC+iyezvOBzZqYqbrVAXS8uFvmLxQ5TDm ps2g== X-Gm-Message-State: AOAM531jVp3noEnZdXIMHz51w4DiIPH7/TMN39tB7de5Jsfd31/rxh2v BC1CMsUN8sTFH57seF71Gn3kEA== X-Received: by 2002:a05:651c:3d0:: with SMTP id f16mr18057204ljp.169.1626605351527; Sun, 18 Jul 2021 03:49:11 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:11 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v5 5/9] clk: qcom: videocc-sm8250: use runtime PM for the clock controller Date: Sun, 18 Jul 2021 13:48:57 +0300 Message-Id: <20210718104901.454843-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Use runtime PM calls to make sure that required power domain is powered on while we access clock controller's registers. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 7b435a1c2c4b..d996b76f4e30 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -367,10 +368,21 @@ MODULE_DEVICE_TABLE(of, video_cc_sm8250_match_table); static int video_cc_sm8250_probe(struct platform_device *pdev) { struct regmap *regmap; + int ret; + + ret = devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; + + ret = pm_runtime_resume_and_get(&pdev->dev); + if (ret) + return ret; regmap = qcom_cc_map(pdev, &video_cc_sm8250_desc); - if (IS_ERR(regmap)) + if (IS_ERR(regmap)) { + pm_runtime_put(&pdev->dev); return PTR_ERR(regmap); + } clk_lucid_pll_configure(&video_pll0, regmap, &video_pll0_config); clk_lucid_pll_configure(&video_pll1, regmap, &video_pll1_config); @@ -379,7 +391,11 @@ static int video_cc_sm8250_probe(struct platform_device *pdev) regmap_update_bits(regmap, 0xe58, BIT(0), BIT(0)); regmap_update_bits(regmap, 0xeec, BIT(0), BIT(0)); - return qcom_cc_really_probe(pdev, &video_cc_sm8250_desc, regmap); + ret = qcom_cc_really_probe(pdev, &video_cc_sm8250_desc, regmap); + + pm_runtime_put(&pdev->dev); + + return ret; } static struct platform_driver video_cc_sm8250_driver = { From patchwork Sun Jul 18 10:48:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479608 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3167778jao; Sun, 18 Jul 2021 03:49:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyxz6KoMeO6o2q+nB/jvAebM4ZNs3Lmb1Ovg/06U8J+1M7WiVM8E+BpUV7DOuPU5lAzay17 X-Received: by 2002:a5d:9ccb:: with SMTP id w11mr9440598iow.174.1626605360793; Sun, 18 Jul 2021 03:49:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626605360; cv=none; d=google.com; s=arc-20160816; b=Y0KecEr6wagT7FWhO4RKY7Js0wvpZJN3g8/aJSj9EngVEIEFoOLvuG3RkLdlFEomju der+bMt022UxYZo/Cx+a3njqy0edSHUpi8pxRefeTnBdlpa/QZsjukoEtds40JYOte+a IW4QNk6VbfTW4m+Z9L+P5WLGsmmZZd6vE/enH91WPUEMRnT5Xt/K9pvCJ2JoDWftBSX4 5aDGZAEerce7oBYH1cHfQP3rmje5UHKinm23+SG3UcjLmHr1PmhWfuLuEynLwlCigkIW Ete3Jpmn20pbe2mQW0ngIOJQKaRhhUWbVyq0EaDJIdlPqvDbS//FXsjt7lnbazWdpZME EWNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lYWJNz4RjhdOK3xgOEToM1HEgwLI9uBrUK4vDt0ZL48=; b=bsIv/EpcTTYh8oUFjMEW2PBPJEY4+wJWZgL6yzIPDD4fepPBSCRjJZMd2L9jFoOLKt xvnW3na5MtUf+gbvn6fex8pn8a3qwcETP5odcIYyncO8VPNqJHd7kt+LZO63f0Au156l CuHq12f9AQo9aEkGJNQtEet/gnYfoa5pH1pKUVk9KvgxCeXendG4RVdxowBhB1UdbtDB Jrx8mpahQRwbZUtebh0yb6UZHLdK2HPFt8YNXHfgvMIKgMWm/kZPh8+kAjhKj50fCpd+ LerNQh0AOwk0w3YCgSGfgv0dc9WBs8uLVJee32mWBt7cBDOI6gYmQm7Lm+nBrqJjE+IM gzFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zpvRKC8F; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u15si18586418iot.89.2021.07.18.03.49.20; Sun, 18 Jul 2021 03:49:20 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zpvRKC8F; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233082AbhGRKwO (ORCPT + 7 others); Sun, 18 Jul 2021 06:52:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232851AbhGRKwM (ORCPT ); Sun, 18 Jul 2021 06:52:12 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E735BC0613DD for ; Sun, 18 Jul 2021 03:49:13 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id l11so5958843ljq.4 for ; Sun, 18 Jul 2021 03:49:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lYWJNz4RjhdOK3xgOEToM1HEgwLI9uBrUK4vDt0ZL48=; b=zpvRKC8FyYNchdzHLterZZRcnXOibDPnmrNJbeuyo3fw3zuEhDgQCJ0dpuJpARUqyT NtVCUUvQTSPYP6yecupgZVu4E/yvMyP4jnDJs5OpT/Cq3CZ8pb5E0v+wVVyrvTqPopSr MRifeAA1c5W7vyNaIlPiz1Z1uSbyNF4BhY+DaVJpiRCeLALGPCRzjCpywOL82F+hjzD6 QDeh1Gs1ePASoscEhcv5Y8RXy2uJTQudBra0sJbsxOFsRsP7SaoQGaqYOYre+Y2LADpS JI+oRXfwQAj4X3bMB/izS8Z3VF39Qbusf79Ar5fy/7736ptLRmEIG99vfX3KVyymnjI9 +fvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lYWJNz4RjhdOK3xgOEToM1HEgwLI9uBrUK4vDt0ZL48=; b=DUJyju+qeC50NOpWVilqpav5mXEtP/2+/oZpicc5wjPU4iwLmQbBf+4NAGZrLurHL/ e9NyJ4G0QNqdpYkNl8Ifv7ctR90Zv2UGJSLof9tAnHB9oZru+gt/khXt3ROYp8fWlCJ9 jXbUeV+83wCYhbLjk+hpg0Abl73zDtqfIGEPilBsS12bBwIss/fzRyEZghoEybjGvNDU hKa/ILOfLkGp11CwgrecM8XyslqlefUsWmG6oL5vwsrwG4gHe5j8X4HsFetq4qw8rXK/ ACqM5xKqrFTzSSKwd/RujMdDZT/v9L8jLXFneNC2RmSJpPqVTTL4ohFl4axLBbV78Hn3 PPjw== X-Gm-Message-State: AOAM531X4kkI3qxlfEQj3MHrIh2GyWj4na3pZQ0txtE9xjsS0p1brMgq hNPm/KUPrfT2EfxxrzDuNGOpd0C+V8j2+A== X-Received: by 2002:a05:651c:1253:: with SMTP id h19mr17404671ljh.303.1626605352314; Sun, 18 Jul 2021 03:49:12 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:11 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v5 6/9] clk: qcom: gdsc: enable optional power domain support Date: Sun, 18 Jul 2021 13:48:58 +0300 Message-Id: <20210718104901.454843-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Currently we use a regulator to enable this domain on demand, however this has some consequences, as genpd code is not reentrant. Make gdsc code also use pm_runtime calls to ensure that registers are accessible during the gdsc_enable/gdsc_disable operations. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gdsc.c | 59 ++++++++++++++++++++++++++++++++++++++--- drivers/clk/qcom/gdsc.h | 2 ++ 2 files changed, 58 insertions(+), 3 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 51ed640e527b..a0781d7284cc 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -50,6 +51,22 @@ enum gdsc_status { GDSC_ON }; +static int gdsc_pm_runtime_get(struct gdsc *sc) +{ + if (!sc->dev) + return 0; + + return pm_runtime_resume_and_get(sc->dev); +} + +static int gdsc_pm_runtime_put(struct gdsc *sc) +{ + if (!sc->dev) + return 0; + + return pm_runtime_put_sync(sc->dev); +} + /* Returns 1 if GDSC status is status, 0 if not, and < 0 on error */ static int gdsc_check_status(struct gdsc *sc, enum gdsc_status status) { @@ -232,9 +249,8 @@ static void gdsc_retain_ff_on(struct gdsc *sc) regmap_update_bits(sc->regmap, sc->gdscr, mask, mask); } -static int gdsc_enable(struct generic_pm_domain *domain) +static int _gdsc_enable(struct gdsc *sc) { - struct gdsc *sc = domain_to_gdsc(domain); int ret; if (sc->pwrsts == PWRSTS_ON) @@ -290,11 +306,26 @@ static int gdsc_enable(struct generic_pm_domain *domain) return 0; } -static int gdsc_disable(struct generic_pm_domain *domain) +static int gdsc_enable(struct generic_pm_domain *domain) { struct gdsc *sc = domain_to_gdsc(domain); int ret; + ret = gdsc_pm_runtime_get(sc); + if (ret) + return ret; + + ret = _gdsc_enable(sc); + + gdsc_pm_runtime_put(sc); + + return ret; +} + +static int _gdsc_disable(struct gdsc *sc) +{ + int ret; + if (sc->pwrsts == PWRSTS_ON) return gdsc_assert_reset(sc); @@ -329,6 +360,22 @@ static int gdsc_disable(struct generic_pm_domain *domain) return 0; } +static int gdsc_disable(struct generic_pm_domain *domain) +{ + struct gdsc *sc = domain_to_gdsc(domain); + int ret; + + ret = gdsc_pm_runtime_get(sc); + if (ret) + return ret; + + ret = _gdsc_disable(sc); + + gdsc_pm_runtime_put(sc); + + return ret; +} + static int gdsc_init(struct gdsc *sc) { u32 mask, val; @@ -425,6 +472,8 @@ int gdsc_register(struct gdsc_desc *desc, for (i = 0; i < num; i++) { if (!scs[i]) continue; + if (pm_runtime_enabled(dev)) + scs[i]->dev = dev; scs[i]->regmap = regmap; scs[i]->rcdev = rcdev; ret = gdsc_init(scs[i]); @@ -439,6 +488,8 @@ int gdsc_register(struct gdsc_desc *desc, continue; if (scs[i]->parent) pm_genpd_add_subdomain(scs[i]->parent, &scs[i]->pd); + else if (!IS_ERR_OR_NULL(dev->pm_domain)) + pm_genpd_add_subdomain(pd_to_genpd(dev->pm_domain), &scs[i]->pd); } return of_genpd_add_provider_onecell(dev->of_node, data); @@ -457,6 +508,8 @@ void gdsc_unregister(struct gdsc_desc *desc) continue; if (scs[i]->parent) pm_genpd_remove_subdomain(scs[i]->parent, &scs[i]->pd); + else if (!IS_ERR_OR_NULL(dev->pm_domain)) + pm_genpd_remove_subdomain(pd_to_genpd(dev->pm_domain), &scs[i]->pd); } of_genpd_del_provider(dev->of_node); } diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 5bb396b344d1..702d47a87af6 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -25,6 +25,7 @@ struct reset_controller_dev; * @resets: ids of resets associated with this gdsc * @reset_count: number of @resets * @rcdev: reset controller + * @dev: the device holding the GDSC, used for pm_runtime calls */ struct gdsc { struct generic_pm_domain pd; @@ -58,6 +59,7 @@ struct gdsc { const char *supply; struct regulator *rsupply; + struct device *dev; }; struct gdsc_desc { From patchwork Sun Jul 18 10:48:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479609 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3167798jao; Sun, 18 Jul 2021 03:49:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzDfPVUYNZFvRmAhBMomQ4ADkX+a2U1tBqZAh+SNhEcO4IyQ1qo7l1j7JxsDZ8+Jvlp8L9F X-Received: by 2002:a92:c7d0:: with SMTP id g16mr12825273ilk.278.1626605362342; Sun, 18 Jul 2021 03:49:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626605362; cv=none; d=google.com; s=arc-20160816; b=f/mDKaFXU98SAmu+1c3vtbm++SI7unZzK6z4D6gpWjVZc05DNKpECInLs3fE05t6ZL kqeUoENd5VJmRssbE4oei23vTz9P9UqQsNilOldZZr8+E0EzqPpqypzjqguU5f49rLhp Z9WI8sMXtSyvliQe7q4WeZn5VZhv0G65K4CSZlXhF1PNNF+i3Pyd3MzkuSsnSfH6uGoK UHH/0MmuF+qGCpv1xoYX7+ZtMd/Zni6VQELXaaSwDWyPHY9lQZIfoUSMAtnLf6Py52A4 viRMUiC1XjkUikTXoxFc0KKQXVYoF0VYeX1wzCgYkxSjOHD1yJA/3UhDRfikSldZR8hM YBHA== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id u15si18586418iot.89.2021.07.18.03.49.22; Sun, 18 Jul 2021 03:49:22 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RRsoxHGB; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233281AbhGRKwR (ORCPT + 7 others); Sun, 18 Jul 2021 06:52:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233084AbhGRKwN (ORCPT ); Sun, 18 Jul 2021 06:52:13 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1BF9C061767 for ; Sun, 18 Jul 2021 03:49:14 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id y42so24293567lfa.3 for ; Sun, 18 Jul 2021 03:49:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2Qkf7InvNZ2y8KQubxZPlzmD4hgwtxBXZ9UnPUjB8P4=; b=RRsoxHGBvjH2xV4InZKCB8jOFlbCa/XTumOyjqOHXt7VQ1Po5CC60loafdYxQocVrM BS/MM4jEmbn2JKMz9vOnMgvUzGBx/2QBpHfvXY5jvK8oowuE4GYyJfpMv7DVQMkL2bxe 5wwA294Mx7y4FfC1H40ZFvG8SrKhNIQOGAwyEFFo1Bnga+1vml0qs3y/2dxiMoinfT2Y Y1AuFD2tV1jIQMnif3r0JuetkWWKnlaO8bRJVJRFcdI5AtOKVSdLu/FEP7TDnOLVy/1V dowS+s74qQDatxb1q2RvDvefoI+OiWcT7XMO4m6+rfkUOLrNJMgjGcmp+ddk1nwmVjCD fG/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2Qkf7InvNZ2y8KQubxZPlzmD4hgwtxBXZ9UnPUjB8P4=; b=SeyDEhHejRiUgJY73TSbDC1HMLgKMXaHZcrG6S+22PMCSmrZKS0iHPQY4Hxm0L7c79 Yzs5BTRRiCHBuXG9+FfgUs50k38MUAD+J2aTvL8Q5wfcEWSjJwlkvgbEMQ1TdGM7Zvb8 OSve0BgT8rt2/SrSugl+xrFlx2nRbok5S/3ZZwc7vWHIgV80ThIcd+2jirmVGv28mmjr vazdOl3yVE6Sedrt7MA8ck+lrRqF46JFdXMqq2mGeTeShJ5zFYbH2DunpIq80guzY2yt 3aDPvVLIX1hx3OHqNpgnpEYqcheVrR7bm1+nipxyhThqsQYhWw2pnbTA6tfoBaFrcSuy PTxA== X-Gm-Message-State: AOAM5313D0mAgAvmLpRVHuXTfypDUgOMLe43HOZKk9F2XDgQ/o6BV+P9 wvN7KXphJuB7dsdBRgrfv+jlZA== X-Received: by 2002:a05:6512:2347:: with SMTP id p7mr14932342lfu.253.1626605353126; Sun, 18 Jul 2021 03:49:13 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:12 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v5 7/9] arm64: dts: qcom: sm8250: remove mmcx regulator Date: Sun, 18 Jul 2021 13:48:59 +0300 Message-Id: <20210718104901.454843-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Switch dispcc and videocc into using MMCX domain directly. Drop the now unused mmcx regulator. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) -- 2.30.2 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4798368b02ef..bce5e9a9dd84 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -273,13 +273,6 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; - mmcx_reg: mmcx-reg { - compatible = "regulator-fixed-domain"; - power-domains = <&rpmhpd SM8250_MMCX>; - required-opps = <&rpmhpd_opp_low_svs>; - regulator-name = "MMCX"; - }; - pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; @@ -2451,7 +2444,7 @@ videocc: clock-controller@abf0000 { clocks = <&gcc GCC_VIDEO_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; #clock-cells = <1>; #reset-cells = <1>; @@ -2720,7 +2713,7 @@ opp-358000000 { dispcc: clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; reg = <0 0x0af00000 0 0x10000>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&dsi0_phy 0>, <&dsi0_phy 1>, From patchwork Sun Jul 18 10:49:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479610 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3167810jao; Sun, 18 Jul 2021 03:49:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwT58056xaXY3hPFPPXaeB05+PD2JN4Zqd0J+nN3D55lOx94FERvS9XaaxZNMc7OIkU3Pj8 X-Received: by 2002:a92:3207:: with SMTP id z7mr13140694ile.288.1626605363161; Sun, 18 Jul 2021 03:49:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626605363; cv=none; d=google.com; s=arc-20160816; b=CFR+ZrT1NFEESOIwr/Xci5P+Zye82ZXmHyIwJmBzHoDLAGDjXEeYbuj7yMGhcyhPim 2ZdRSy9DPCgy+HA6C+mN0x4zE5cUPnpAv06FrEpVNHjUhLMz+0kdxdfpXVxSR1erMVho M+8EuqWZbQlLNbB3hYFjqwwcs7l493P/Hh4k+Py1CXpWCU/bEhoW6JQ8UEcO/CKmlRdX luLVq7Yt4+UfdIxD6NjeYnv9a0rMcLiVrBAoILCAeTpNGHKtCMrEgjbYYIAQ2DSaeA+1 X1saDiTnou4Fl8Wzr41xrzd2rg8zs3NKZsfnmwkzBuMko+Y7zv5NOPUqc1nfmUYFvWb2 vHdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ClSRhnm8pHzVjF/xtq0qJLqRvgNXebRM90lbbmZW9cA=; b=tIumZ5IoI/q7jixc0gXSdl1Pkfxgij6wwVBoHsddI7/uA92avRFMQt5OtKTkNX8a+l xxerl5BXU5d9De/lU7MiTeUeNXfP6LhuuIn6YwnYaIdUk3pV7BVTKHbZYBc5zmkDOD8z 6mt4AIxLmXA+SRW/tLN4eW4J1+AspWS0ZcMRG4c+xCMs7h/Es4vFA7/cphY6NRwosV0R Jhwl62IcVmXMH+0eLCjLvOA+eBEuxK05XP1R9RX+7w3MEl4B4MpphPfWSIUZl76CYGKO ssYaMVqzYeS4LBKZ9TJ9aKka+Ia5KyVc4GtKzpY5ym233VIdJwQh34KblB2knAGQTV6h U0WA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KX9NZ39P; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u15si18586418iot.89.2021.07.18.03.49.23; Sun, 18 Jul 2021 03:49:23 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KX9NZ39P; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233287AbhGRKwS (ORCPT + 7 others); Sun, 18 Jul 2021 06:52:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233085AbhGRKwO (ORCPT ); Sun, 18 Jul 2021 06:52:14 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7585BC0613DD for ; Sun, 18 Jul 2021 03:49:15 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id a12so24257929lfb.7 for ; Sun, 18 Jul 2021 03:49:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ClSRhnm8pHzVjF/xtq0qJLqRvgNXebRM90lbbmZW9cA=; b=KX9NZ39PZr3mzqRFuQGX6fZfO1ugSx3NK9JYFRfGFK98HMgMqbTUuKXR335d3B6sJ1 WOjzSr19/6d1pEGtkD+RyumWSLsucsSlIJAPGpJAZ8h53nxpmSN3/whvfgwOGAHuxWYV drOPB9gQn84VbCYN26r68X4u5UyvD57BIfaiWwLnQ4qdOblhRG/fhiLbwAUFW6kWGcEu pYELuXRI0WU5VeoylywgD7t8k90s5fDvxEUXnXdITyv+eipNpalYvlnV8BBS1UCZzqKo UZExonrhn405UU/00a2bygJI3xRtUDEjxo+LIW40vZJY3nOjTuy7Mk11CsV5OmVZAHZ/ 1E9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ClSRhnm8pHzVjF/xtq0qJLqRvgNXebRM90lbbmZW9cA=; b=GwPhVL790PcgIbCT9m1qaHPywoPTf2IafBYPCu3cb4De5dlRmeDMORNrugtdenYTzN 0L+vXRsgm6QnR37iPt13dURfS8Mkv2muafC4KcLtHdgzUhukl8Ihx2C8ycekM+ZnH1na nwqSt5T2h0kcpmIQBDEID3millQNUThst71s4IfWpp74L3wmJVh9+MWXsIYLMmPbHCWJ c1hEENOh4wV+7G8fR1FrLRF1/wrIb5s1eKojZrsNOuO6W+Y0atpGh6PawtU6loUuBJv1 gMDYmXUGCBi1f2l4Aia47Jsifp4At79hdExCgGoauwaMYPSuKlEGmkKkCd4MyZa1uR+e o0NA== X-Gm-Message-State: AOAM533N+0YrKAxNd0l7tRvCkfSuJsPrig+KqmoFMt3iZ+J3cTszfHvl zE3RDEDqYvb2O7dWBykQEb98ng== X-Received: by 2002:a19:6f4b:: with SMTP id n11mr14536042lfk.337.1626605353889; Sun, 18 Jul 2021 03:49:13 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:13 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v5 8/9] clk: qcom: dispcc-sm8250: stop using mmcx regulator Date: Sun, 18 Jul 2021 13:49:00 +0300 Message-Id: <20210718104901.454843-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now as the common qcom clock controller code has been taught about power domains, stop mentioning mmcx supply as a way to power up the clock controller's gdsc. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- drivers/clk/qcom/dispcc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 0625fea6d7ba..372d3a8f38cf 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -1129,7 +1129,6 @@ static struct gdsc mdss_gdsc = { }, .pwrsts = PWRSTS_OFF_ON, .flags = HW_CTRL, - .supply = "mmcx", }; static struct clk_regmap *disp_cc_sm8250_clocks[] = { From patchwork Sun Jul 18 10:49:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 479652 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28A64C636CE for ; Sun, 18 Jul 2021 10:49:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 101F2611AC for ; Sun, 18 Jul 2021 10:49:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233227AbhGRKwY (ORCPT ); Sun, 18 Jul 2021 06:52:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233049AbhGRKwR (ORCPT ); Sun, 18 Jul 2021 06:52:17 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F63DC0613E5 for ; Sun, 18 Jul 2021 03:49:16 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id a12so24257966lfb.7 for ; Sun, 18 Jul 2021 03:49:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Dd9ei2GjQiFjh9R1NgRmYWUwg7rsPR4hERBwm4wpjv0=; b=m7dK3rl7blk+8UA/hKxKhQOYMPdH3NxlSmNnG/o1aJEhXEUlncPQuZKivbsbSFsd6D 3i21AAMkCywCkVBzFWjOAv/d6Z+UDg82Z67QAhvpgJtzh0LcxglFAY9ZrBRrQ8Al6d8l lMQf+xWLEFiq96qDgAQPKVXhvqYLYe3nkO04nG49x/8iNM8x9LOo0LdZgU7iW9o/PdXg 3ucl5q2Sryk4BpUbVP99WB8wcvbyb9Bx+L+AF/axWZZXqEQtAavjhflpKRkmLUluLJjB oqrA7G4uMYhngaGUONxfgVAVFnMRQ2sZnRSjZ7o3VcXH2T90XIyy28jrmDw769Z+hdgK NvoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Dd9ei2GjQiFjh9R1NgRmYWUwg7rsPR4hERBwm4wpjv0=; b=Mqa3e7nEqsIv3IlS7mLXltezVN1JVeInFjZhe+XLkCHbWse9dRioAS6m2iCAij9rdU fjAU+RUCatOyTt9yI6Lnbz1LVO+G5hNg9zl00Xc1hDt4QCqBG7q1CY61yGHgcjCuGcDg y3b5E3nv2TclzwHBSP/yx61GbYlVnyplAM4VLWCtfEKxsO31KRyPCmccxdQ6TD5mVBY2 rj5W3/H2a/8zVIsrl6D2JQ25zHyzZAewh8jRcRrgyR0lFwRqtfHc2gpeJjyi7/F8RRRI VNwk6EsRwxplKeVpSOHzDdtjXT0O22rlJbVdtHRKEWR2CdKHdI+ZiNCfq4eXJQ3xzlyZ 0ETg== X-Gm-Message-State: AOAM530j9vUktLGCC5YYZYP85n/CPQ3E5UZY5GesDBZCTuIkI+lI2g5S cK5sx5Tk4EnoAavVDTNDnBH3yw== X-Google-Smtp-Source: ABdhPJw9tTR2amz089wkuVxYZzBd42218zETpGO9Z5ykKpcbYkr4c1GBjVvi8xaDTDShfKRsEqLNwg== X-Received: by 2002:a19:c1d2:: with SMTP id r201mr14921339lff.148.1626605354671; Sun, 18 Jul 2021 03:49:14 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y22sm1039528lfh.154.2021.07.18.03.49.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jul 2021 03:49:14 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v5 9/9] clk: qcom: videocc-sm8250: stop using mmcx regulator Date: Sun, 18 Jul 2021 13:49:01 +0300 Message-Id: <20210718104901.454843-10-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> References: <20210718104901.454843-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now as the common qcom clock controller code has been taught about power domains, stop mentioning mmcx supply as a way to power up the clock controller's gdscs. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- drivers/clk/qcom/videocc-sm8250.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index d996b76f4e30..ad46c4014a40 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -277,7 +277,6 @@ static struct gdsc mvs0c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct gdsc mvs1c_gdsc = { @@ -287,7 +286,6 @@ static struct gdsc mvs1c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct gdsc mvs0_gdsc = { @@ -297,7 +295,6 @@ static struct gdsc mvs0_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct gdsc mvs1_gdsc = { @@ -307,7 +304,6 @@ static struct gdsc mvs1_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct clk_regmap *video_cc_sm8250_clocks[] = {