From patchwork Mon Aug 27 09:33:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 145166 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp3975661ljw; Mon, 27 Aug 2018 02:33:49 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZOV9AFnbt4N1LWfOigQ18hT+D0qgPdsXCWrdsep6ov4g7LPqG3i7h+Eh9LdOuF7TP3491K X-Received: by 2002:a17:902:3081:: with SMTP id v1-v6mr12543997plb.58.1535362429208; Mon, 27 Aug 2018 02:33:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535362429; cv=none; d=google.com; s=arc-20160816; b=BfFOin/ImPyj/EXIHcGh/pF3zNk+LifiQ5UuXF/sZjrC52oRTsqhd/PZ6VybbsiFB7 QePVDRkfRnTIQsbCtTIhWu2ckaI/5QO3LBVI4SUOVlnPom3Tqc2EmbYTOp4IDqKEE315 VABis2qMIyFLS7UV2+rhg127ausPkJn7zFbUVv3KkldiypbsqqerWLyIuN9Zdr2ge+xT aS7+ChcjYBv5FCPRpE4vPC/qaxwk8wUYw6QBfleI9pU1ticcJAOnJgdJIWFXivLxIqV5 Hf2GUSxHx7NHkiQsNCvmlBAAirCQsqQkB1YpztbTa7OhBIjGUru5gGb3zUe+jXeEr+XT wOMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=KMRezuJX1BEb4nHpMgT72/6xOEnl//0HUPcftOfNpT4=; b=VowfaI1U98VZ1qHUqqdd5EgOMk3tQfmwLeQDPg5IMY8Yu6ElDcPz0tJTczCFif4cO3 sgLxzpOtfutq0qmFq6gjbNOmOswIUQycLojRF1x3pZcLjPIhU2NTkNTroug5+ZtThJMx smarnaDDpCtPIQedZboVPBUaX6IoOiC9glJnPMGiGeGdt9JbWSJ/IlXUYayyHQ2fqqPT BnpSH6m59qjTv2BesIanJBHAjuLJodzGTMa47+ZW5+jorJcLXc+PgQXktL85ApzEIw55 xcRroYHJobbdheK15sT2kQlCFJu/wS122aTo/I06uhJec8RjAezQ+g26r4O6add5cfmj /08w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VO4gYZbF; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.220.142.165]) by smtp.gmail.com with ESMTPSA id y203-v6sm8022828wmd.1.2018.08.27.02.33.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Aug 2018 02:33:43 -0700 (PDT) From: Loic Poulain To: Peter.Chen@nxp.com Cc: linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, david.brown@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, andy.shevchenko@gmail.com, Loic Poulain Subject: [PATCH v2 5/7] usb: chipidea: Fix otg event handler Date: Mon, 27 Aug 2018 11:33:33 +0200 Message-Id: <1535362415-16559-5-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535362415-16559-1-git-send-email-loic.poulain@linaro.org> References: <1535362415-16559-1-git-send-email-loic.poulain@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org At OTG work running time, it's possible that several events need to be addressed (e.g. ID and VBUS events). The current implementation handles only one event at a time which leads to ignoring the other one. Fix it. Signed-off-by: Loic Poulain --- v2: no change drivers/usb/chipidea/otg.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c index 10236fe..8bf4032 100644 --- a/drivers/usb/chipidea/otg.c +++ b/drivers/usb/chipidea/otg.c @@ -206,14 +206,17 @@ static void ci_otg_work(struct work_struct *work) } pm_runtime_get_sync(ci->dev); + if (ci->id_event) { ci->id_event = false; ci_handle_id_switch(ci); - } else if (ci->b_sess_valid_event) { + } + + if (ci->b_sess_valid_event) { ci->b_sess_valid_event = false; ci_handle_vbus_change(ci); - } else - dev_err(ci->dev, "unexpected event occurs at %s\n", __func__); + } + pm_runtime_put_sync(ci->dev); enable_irq(ci->irq); From patchwork Mon Aug 27 09:33:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 145168 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp3975694ljw; Mon, 27 Aug 2018 02:33:51 -0700 (PDT) X-Google-Smtp-Source: ANB0VdY8zYPzidougFoBn6SRl+M5yNWJUOEIVIZM5RZ3on38vIpftBSWVu7krscOa14hAXpxZcUT X-Received: by 2002:a62:954:: with SMTP id e81-v6mr13509110pfd.231.1535362431548; Mon, 27 Aug 2018 02:33:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535362431; cv=none; d=google.com; s=arc-20160816; b=fe1PhEP1Zf4fFLMTZRfqJnaSwdVWfym3RoPd9c+8VDgsoKLI2B0Yn4xf6AmaW2g6Uk iX6UAbbut3RZAkoCCISzWAYIc2DurjDzwurOAZ1QoZbJVnHyZxsI1NlRCr9UPp/y6cU5 5tLOQJyu+6SLGURbaBweuQ5GVrf/pm/eWncYrTfmq+i2bkYpOjRA9ISvSmpyM1kNbH19 UyK2qVuVutPs6YC5ecBzTLfEfXBejLyaQr1i/KzmLXcEh/v8L0nR4QnOQzToTF/7AkkG b3pOD3XQ28sKWl59YbX+SG/8ti5Tohhc9g1KdLH8/AZORj/cIyY2cVe6VBqasX8xUHYx Eb7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=JeJb7DryKO3XusEPSjpyjqH1xykE5CUKjBZfRbD7nh4=; b=FANgmxHo70jbXC+P0oLV/cJsPFYKmgf6eWmd3fpgBHlJHoPloIoYx4e+8FmhVZuOqo bwApfpXHY/dgRpM5NEQ+rUDp6GI3PDgmGGSupw00qtTTp3sAGvZ7ZwZESqL4+XRt9EP+ 1BZ///IthnrXEjmYDqPsov6pGBJuiaUN4eKjr4H+hJkXc8t4/K4Ezs86dfnjpH9B2TVw UYPuYgNGNI91abBDAHr3g/7OybfviR54OxOUcQZYXLqF3DoTRuPw0wvhejFR12TDQvIl XT2A83Cwg42IU87bZGyPS8eH0A31vcUZzCpHU9o+ruw+n/jimgu/CuvYoChMO4NDH0Z/ AxWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ITEaBBjf; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.220.142.165]) by smtp.gmail.com with ESMTPSA id y203-v6sm8022828wmd.1.2018.08.27.02.33.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Aug 2018 02:33:46 -0700 (PDT) From: Loic Poulain To: Peter.Chen@nxp.com Cc: linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, david.brown@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, andy.shevchenko@gmail.com, Loic Poulain Subject: [PATCH v2 7/7] arm: dts: qcom: db410c: Enable USB OTG support Date: Mon, 27 Aug 2018 11:33:35 +0200 Message-Id: <1535362415-16559-7-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535362415-16559-1-git-send-email-loic.poulain@linaro.org> References: <1535362415-16559-1-git-send-email-loic.poulain@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Dragonboard-410c is able to act either as USB Host or Device. The role can be determined at runtime via the USB_HS_ID pin which is derived from the micro-usb port VBUS pin. In Host role, SoC USB D+/D- are routed to the onboard USB 2.0 HUB. In Device role, SoC USB D+/D- are routed to the USB 2.0 micro B port. Routing is selected via USB_SW_SEL_PM gpio. In device role USB HUB can be held in reset. Signed-off-by: Loic Poulain --- v2: no change arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 20 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 9 +++++---- 2 files changed, 25 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi index 16c1f1b..7229ad9 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi @@ -8,6 +8,16 @@ pinconf { pins = "gpio3"; function = PMIC_GPIO_FUNC_NORMAL; + input-disable; + output-high; + }; + }; + + usb_hub_reset_pm_device: usb_hub_reset_pm_device { + pinconf { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + input-disable; output-low; }; }; @@ -22,6 +32,16 @@ }; }; + usb_sw_sel_pm_device: usb_sw_sel_pm_device { + pinconf { + pins = "gpio4"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = ; + input-disable; + output-low; + }; + }; + pm8916_gpios_leds: pm8916_gpios_leds { pinconf { pins = "gpio1", "gpio2"; diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 4c3dda5..c619dea 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -221,9 +221,10 @@ adp-disable; hnp-disable; srp-disable; - dr_mode = "host"; - pinctrl-names = "default"; - pinctrl-0 = <&usb_sw_sel_pm>; + dr_mode = "otg"; + pinctrl-names = "default", "device"; + pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>; + pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>; ulpi { phy { v1p8-supply = <&pm8916_l7>; @@ -464,7 +465,7 @@ usb_id: usb-id { compatible = "linux,extcon-usb-gpio"; - vbus-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>; + id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&usb_id_default>; };