From patchwork Tue Aug 21 13:55:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 144727 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5306598ljj; Tue, 21 Aug 2018 06:56:01 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwNaWIkq49ELFLh8XQjix4qsIX2wCWHCCFtE3Iz1KHhXQOEAR5ARVQyeW01hqwVfbyOyuR5 X-Received: by 2002:a63:447:: with SMTP id 68-v6mr13728922pge.409.1534859761451; Tue, 21 Aug 2018 06:56:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534859761; cv=none; d=google.com; s=arc-20160816; b=jmnVj2RC5gnnyeOmVn9/8kl8Q85Skoc3RevITZV496PwtK/PieRmUjc7MetuLdzE6y 2IxFXNMscoaLxR5mpNFKPDV2wqhziw39m5KPWl24PO9ToZrs3g8qtR9c0rbMYx43AQ1I ezQljyfn52o7nXkraDJ5XD+8EvrCvdheKdSJpLyEHLjJRzmkYGil7GlOXIqY6QF/Coo+ cwqmIP88PK5q3zAiEaPb96LDuz+uPpOXwfyfABpWTzuqqeJGomLthOGjCf5LFwIgPZVV sLwCShq7LfwJ06bEJT6ly05MwarcDr9aNd/3tkjGx5u2qZFR6Krfmhp1XGcTCOW+GnMe dUuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=Aliud5qkHWFHnlXE71yeRM0s4uv6gb9kNd4H2LghQsg=; b=TF+i1K/rXsH426fSVoM6UuE6QOz2lmYpwEbZIrUT+41H6pUJO/kJrzZkcIedMq3Acy VaRg+WXSKRCsBFfWW45sx1Klvlm3ftkQjhtc9KLIGazQdG0rYPJhI0zcyUt3avmmnQhB 7ZOW1F1JYeNdNYZO65aSyufCKTQs5K2/jUukI6CgGWhekXHvNqy0rQjOXAm0Y2sn1bxJ u9py8gPiIqcfUbJK02+0ckSU6dWdCYjNS04zwgIFs3STzKbkQ48g88OvKKHqNMhAIg2y UGc9zb4BH8T5ynXZ8m0ffUZh2IKtgeGRiV01l7hyL1CWEajtQH/EAEHxALeM0FnugVr5 uD2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=K3NxjPX4; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.220.142.165]) by smtp.gmail.com with ESMTPSA id l24-v6sm16728523wrb.65.2018.08.21.06.55.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Aug 2018 06:55:57 -0700 (PDT) From: Loic Poulain To: Peter.Chen@nxp.com Cc: linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, david.brown@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, Loic Poulain Subject: [PATCH 1/6] usb: chipidea: Add dynamic pinctrl selection Date: Tue, 21 Aug 2018 15:55:51 +0200 Message-Id: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some hardware implementations require to configure pins differently according to the USB role (host/device), this can be an update of the pins routing or a simple GPIO value change. This patch introduces new optional "host" and "device" pinctrls. If these pinctrls are defined by the device, they are respectively selected on host/device role start. If a default pinctrl exist, it is restored on host/device role stop. Signed-off-by: Loic Poulain --- drivers/usb/chipidea/core.c | 19 +++++++++++++++++++ drivers/usb/chipidea/host.c | 9 +++++++++ drivers/usb/chipidea/udc.c | 9 +++++++++ include/linux/usb/chipidea.h | 6 ++++++ 4 files changed, 43 insertions(+) -- 2.7.4 diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 85fc6db..03e52fc 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -46,6 +46,7 @@ #include #include #include +#include #include #include #include @@ -723,6 +724,24 @@ static int ci_get_platdata(struct device *dev, else cable->connected = false; } + + platdata->pctl = devm_pinctrl_get(dev); + if (!IS_ERR(platdata->pctl)) { + struct pinctrl_state *p; + + p = pinctrl_lookup_state(platdata->pctl, "default"); + if (!IS_ERR(p)) + platdata->pins_default = p; + + p = pinctrl_lookup_state(platdata->pctl, "host"); + if (!IS_ERR(p)) + platdata->pins_host = p; + + p = pinctrl_lookup_state(platdata->pctl, "device"); + if (!IS_ERR(p)) + platdata->pins_device = p; + } + return 0; } diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c index af45aa32..55dbd49 100644 --- a/drivers/usb/chipidea/host.c +++ b/drivers/usb/chipidea/host.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "../host/ehci.h" @@ -150,6 +151,10 @@ static int host_start(struct ci_hdrc *ci) } } + if (ci->platdata->pins_host) + pinctrl_select_state(ci->platdata->pctl, + ci->platdata->pins_host); + ret = usb_add_hcd(hcd, 0, 0); if (ret) { goto disable_reg; @@ -194,6 +199,10 @@ static void host_stop(struct ci_hdrc *ci) } ci->hcd = NULL; ci->otg.host = NULL; + + if (ci->platdata->pins_host && ci->platdata->pins_default) + pinctrl_select_state(ci->platdata->pctl, + ci->platdata->pins_default); } diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 9852ec5..c04384e 100644 --- a/drivers/usb/chipidea/udc.c +++ b/drivers/usb/chipidea/udc.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "ci.h" #include "udc.h" @@ -1965,6 +1966,10 @@ void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) static int udc_id_switch_for_device(struct ci_hdrc *ci) { + if (ci->platdata->pins_device) + pinctrl_select_state(ci->platdata->pctl, + ci->platdata->pins_device); + if (ci->is_otg) /* Clear and enable BSV irq */ hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, @@ -1983,6 +1988,10 @@ static void udc_id_switch_for_host(struct ci_hdrc *ci) hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); ci->vbus_active = 0; + + if (ci->platdata->pins_device && ci->platdata->pins_default) + pinctrl_select_state(ci->platdata->pctl, + ci->platdata->pins_default); } /** diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h index 07f9936..63758c3 100644 --- a/include/linux/usb/chipidea.h +++ b/include/linux/usb/chipidea.h @@ -77,6 +77,12 @@ struct ci_hdrc_platform_data { struct ci_hdrc_cable vbus_extcon; struct ci_hdrc_cable id_extcon; u32 phy_clkgate_delay_us; + + /* pins */ + struct pinctrl *pctl; + struct pinctrl_state *pins_default; + struct pinctrl_state *pins_host; + struct pinctrl_state *pins_device; }; /* Default offset of capability registers */ From patchwork Tue Aug 21 13:55:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 144730 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5306681ljj; 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[109.220.142.165]) by smtp.gmail.com with ESMTPSA id l24-v6sm16728523wrb.65.2018.08.21.06.56.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Aug 2018 06:56:03 -0700 (PDT) From: Loic Poulain To: Peter.Chen@nxp.com Cc: linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, david.brown@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, Loic Poulain Subject: [PATCH 4/6] usb: chipidea: Fix otg event handler Date: Tue, 21 Aug 2018 15:55:54 +0200 Message-Id: <1534859756-6955-4-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> References: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org At OTG work running time, it's possible that several events need to be addressed (e.g. ID and VBUS events). The current implementation handles only one event at a time which leads to ignoring the other one. Fix it. Signed-off-by: Loic Poulain --- drivers/usb/chipidea/otg.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c index db4ceff..f25d482 100644 --- a/drivers/usb/chipidea/otg.c +++ b/drivers/usb/chipidea/otg.c @@ -203,14 +203,17 @@ static void ci_otg_work(struct work_struct *work) } pm_runtime_get_sync(ci->dev); + if (ci->id_event) { ci->id_event = false; ci_handle_id_switch(ci); - } else if (ci->b_sess_valid_event) { + } + + if (ci->b_sess_valid_event) { ci->b_sess_valid_event = false; ci_handle_vbus_change(ci); - } else - dev_err(ci->dev, "unexpected event occurs at %s\n", __func__); + } + pm_runtime_put_sync(ci->dev); enable_irq(ci->irq); From patchwork Tue Aug 21 13:55:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 144731 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5306715ljj; Tue, 21 Aug 2018 06:56:08 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxlXfVS1xQfdYuQR2aYnNm4TBO8fbeYYVeEKrnhHtSYJ+V0Bc9Y4tm3QLB8/5V9//9Gtku3 X-Received: by 2002:a63:334f:: with SMTP id z76-v6mr6496003pgz.104.1534859768322; Tue, 21 Aug 2018 06:56:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534859768; cv=none; d=google.com; s=arc-20160816; b=wAu8WGuFP4wgxJU/YT4glNsMk/bu3uGwPe85rv8VhW1bDfXB0fD8M9yMimd24LrLIT ar3qQK96ZGQrTMZ+Ki0dmm2S8DDs8VYiLUC8TISmfHtRCdlcuPEyKNlqhJkjzeuF1PoT wdgWGJy6PLRmiwG+4gvI8eMR4S57dqxwELmMRe7FrUZCIvI/T2llfByg74ENZURcriqA dcy/JeOC3XPCH5RpIuuTKRGx+7QjNAjwJlVPtn/77jlsvrDmF+hX38flOdHvQRIW+TLJ YftOQ99Ai7PUPcaogsDKtGEAU7/3HAy/yj9qo8B+ZcGXu6tPdih2TZUxUt7uV/6Y2XmB j8mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Rud9e58rlzxkEYqPSUxDiFrZuB739LO+zK7RVW9bYas=; b=wrsv0/wZrviX9CcTDfF6cwcXLpkKLBFQUXC50IGhvesoREucStn03Ffb0Gp5VRnSXl 9Oe93JCthSaaoIATYUUMncOGYwzTGYdzwddMfBbcnPV+6q01TiJnm1wIcV//0NZI8wgo UFNmLJ9kxyAZwmGWQ9AvfIQpKZlsevNL01dcUqRLX09RriltpiPcuImcAM804bZcsMym dk5BIim2H2enymPFr0TL77t9CAJZgURLbakfUzgYr/UbRf+TShaoJlp1pA0MsQbx9wi9 Je9hCb5UbrqDb+FgAR6/kU2LOkjF+Hw92bQRUMDosaHhhSq5KKn0zbYvPPktFEkn6YzF lA9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iYx2VMAA; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.220.142.165]) by smtp.gmail.com with ESMTPSA id l24-v6sm16728523wrb.65.2018.08.21.06.56.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Aug 2018 06:56:05 -0700 (PDT) From: Loic Poulain To: Peter.Chen@nxp.com Cc: linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, david.brown@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, Loic Poulain Subject: [PATCH 5/6] phy: qcom-usb-hs: Fix unbalanced notifier registration Date: Tue, 21 Aug 2018 15:55:55 +0200 Message-Id: <1534859756-6955-5-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> References: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Phy power on/off cycle can happen several times during device life. We then need to balance the extcon notifier registration accordingly. Fixes: f0b5c2c96370 ("phy: qcom-usb-hs: Replace the extcon API") Signed-off-by: Loic Poulain --- drivers/phy/qualcomm/phy-qcom-usb-hs.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.7.4 diff --git a/drivers/phy/qualcomm/phy-qcom-usb-hs.c b/drivers/phy/qualcomm/phy-qcom-usb-hs.c index 2d0c70b..92e9d94 100644 --- a/drivers/phy/qualcomm/phy-qcom-usb-hs.c +++ b/drivers/phy/qualcomm/phy-qcom-usb-hs.c @@ -181,6 +181,12 @@ static int qcom_usb_hs_phy_power_off(struct phy *phy) { struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy); + if (uphy->vbus_edev) { + devm_extcon_unregister_notifier(&uphy->ulpi->dev, + uphy->vbus_edev, EXTCON_USB, + &uphy->vbus_notify); + } + regulator_disable(uphy->v3p3); regulator_disable(uphy->v1p8); clk_disable_unprepare(uphy->sleep_clk); From patchwork Tue Aug 21 13:55:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 144732 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5306747ljj; Tue, 21 Aug 2018 06:56:10 -0700 (PDT) X-Google-Smtp-Source: AA+uWPywzU8xL/x/qPpTriE9p4SXhnq3gi74l0l4asYM15kJBcq1qix3sx4Du5B/BwbNPEEchEIR X-Received: by 2002:a62:5f82:: with SMTP id t124-v6mr53265221pfb.223.1534859770488; Tue, 21 Aug 2018 06:56:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534859770; cv=none; d=google.com; s=arc-20160816; b=JCA5dvNyUXNF/0aLCky4y0QpsRLkKEDHAtXncU7qGNN784aKqHB1NEzbxt2VMxFPy/ 6JWSBiut/wd3Celo3oW6zkM0NCVmZuWkOT3952MVtfv8Vd2s5xCwUgQjL0qrcPCnAiRI M5GLk5VR6Zi+GmZEpo+FugZC+yfuBHaQ937DXXeSnmCI2zXR2VTpsBeo9aCg8zFM9ied Q6pvkdfaA18+NMO/C4w4M3bfVvvpDfA7ic1aIvMldmyE9banVMsFrHtlrgO8zm3ne1By 0rxTBMm++Drcc5xsY1fDCaZTDwX9jspTMK898lBqH7oB0diw9vy2T6A0ohGUgmPxqKuF 0iPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=e4SKYjlE3u47S6xKDWQmkCnhWECoXQ3uJDRZ9YU4/5g=; b=GOGxHt83LwZ2TVSObVoz6h8VB1QAyV7qYU5sj5qvZ97LeKQhx0BN1iXLTavMt8MInr F1ect8DtS6iYRJOiXV7Ya/Dq39pPbv17CL2zgYYv1dXsKJVOZPEo9nYWYCd+XicjO9ZU ABe6yxXcE8hI/9+nEj/gHgC7Xr9N43kJp1xxUTENret5HtI0rogBo0QBU+J7srRWiu1M jpQsS9UJEPs27CuwXT8SK2mw4PDKIccdLcD9JF++Vrv+ujLizVb2POdLot17yVBtQHxb W+hupBoTzpEZg6V3Kc9GYLnrUDaJGNPWL5PCz3pmHYomM8AJ4BxQ31NRfO4yQgiJk5sW UKnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HoFqJPPp; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.220.142.165]) by smtp.gmail.com with ESMTPSA id l24-v6sm16728523wrb.65.2018.08.21.06.56.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Aug 2018 06:56:06 -0700 (PDT) From: Loic Poulain To: Peter.Chen@nxp.com Cc: linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, david.brown@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, andy.gross@linaro.org, Loic Poulain Subject: [PATCH 6/6] arm: dts: qcom: db410c: Enable USB OTG support Date: Tue, 21 Aug 2018 15:55:56 +0200 Message-Id: <1534859756-6955-6-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> References: <1534859756-6955-1-git-send-email-loic.poulain@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Dragonboard-410c is able to act either as USB Host or Device. The role can be determined at runtime via the USB_HS_ID pin which is derived from the micro-usb port VBUS pin. In Host role, SoC USB D+/D- are routed to the onboard USB 2.0 HUB. In Device role, SoC USB D+/D- are routed to the USB 2.0 micro B port. Routing is selected via USB_SW_SEL_PM gpio. In device role USB HUB can be held in reset. Signed-off-by: Loic Poulain --- arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 20 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 9 +++++---- 2 files changed, 25 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi index ec2f0de..99787cc 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi @@ -8,6 +8,16 @@ pinconf { pins = "gpio3"; function = PMIC_GPIO_FUNC_NORMAL; + input-disable; + output-high; + }; + }; + + usb_hub_reset_pm_device: usb_hub_reset_pm_device { + pinconf { + pins = "gpio3"; + function = PMIC_GPIO_FUNC_NORMAL; + input-disable; output-low; }; }; @@ -22,6 +32,16 @@ }; }; + usb_sw_sel_pm_device: usb_sw_sel_pm_device { + pinconf { + pins = "gpio4"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = ; + input-disable; + output-low; + }; + }; + pm8916_gpios_leds: pm8916_gpios_leds { pinconf { pins = "gpio1", "gpio2"; diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 9ff8487..661a7fd 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -371,9 +371,10 @@ adp-disable; hnp-disable; srp-disable; - dr_mode = "host"; - pinctrl-names = "default"; - pinctrl-0 = <&usb_sw_sel_pm>; + dr_mode = "otg"; + pinctrl-names = "default", "device"; + pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>; + pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>; ulpi { phy { v1p8-supply = <&pm8916_l7>; @@ -512,7 +513,7 @@ usb_id: usb-id { compatible = "linux,extcon-usb-gpio"; - vbus-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>; + id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&usb_id_default>; };