From patchwork Thu Jul 1 02:23:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78113C11F6F for ; Thu, 1 Jul 2021 02:24:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5E98E61476 for ; Thu, 1 Jul 2021 02:24:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238653AbhGAC1V (ORCPT ); Wed, 30 Jun 2021 22:27:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238622AbhGAC1S (ORCPT ); Wed, 30 Jun 2021 22:27:18 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED76DC0617A8; Wed, 30 Jun 2021 19:24:46 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id u20so6115268ljo.12; Wed, 30 Jun 2021 19:24:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/GPfDEmQQJhXgHdxr1BFSN2ruNpULfNm16Js3A20DV4=; b=exPLlRY7apIduPssx2oV0GRyar9FZh5mQ7CaFJyqM3ZCyZm6W2yiUNBWMJ9LgV7KHZ X3lD0cE0DeZb/c64No9cxX55Px43hVl2Sy/j7WNMJ5r9/x+I1ytuSCPj+Mw23F4P5VT1 PTMOk3rphvXydOPQHhvkLgI8Cb1F72t9e+WpdD2jVTE0kW2O/n5fmI5+whoDcW7A7Zpn B3t93AjvQ3H6712IcwpztOEgiJMI8QFhyDHwiLWzzL726p7LrsNIcNVWi7ik3wRSsm/g 2KqHWd/sHw78de+V1uJfGExDlOz6Ec2nU4275bPQhEJnckYGYnuCwCZcV+zwcDUwj6nT 105Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/GPfDEmQQJhXgHdxr1BFSN2ruNpULfNm16Js3A20DV4=; b=ph5eRa+VbY35y9GrlRIPjDuLY3lvYX6umZKhVdfSLkl6WO2VtH5CoXPnTs3XPZu4T0 YU43KtTR2zq8B3lftDl0WOrMxyzO7CryItb74EFEDHhU3khpdQeAncRKVjsUVTBM3AuW ABqtiKTObH300o9v9mCsHBhQ+K5DjGt1uogdNoIRqgNZjvB6VTbD/kX0dShyR/uGv6nI oJWFcepyvxzPfo9vcUSboENr7L5YqIKsSEyEfb/LTYirwyOaG2D3Wd/XHh5/Qvn7CViY ZnKFV7wYdbO/pLyy1q0wUaqOBiEZjQFiy4JgcQL3s5GVJVoBt69t2+9H6GVRCiI003HN plSw== X-Gm-Message-State: AOAM532fau1Z/urz6zxUscfBOxShf9hNgZX0gVqAx1aEMBEQ0sb9m5Pq cjE629dSNe8b+Mf01AlOy9Y= X-Google-Smtp-Source: ABdhPJzYG2taHzAc+cA1TJi84OVUleyTES7FKx9J8UuHr1xOmknHrpPbhit2WwhPeY4BZ6EoF+cLCw== X-Received: by 2002:a2e:a486:: with SMTP id h6mr10103538lji.321.1625106285184; Wed, 30 Jun 2021 19:24:45 -0700 (PDT) Received: from localhost.localdomain (94-29-37-113.dynamic.spd-mgts.ru. [94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:44 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 01/12] dt-bindings: phy: tegra20-usb-phy: Convert to schema Date: Thu, 1 Jul 2021 05:23:54 +0300 Message-Id: <20210701022405.10817-2-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert NVIDIA Tegra20 USB PHY binding to schema. Signed-off-by: Dmitry Osipenko --- .../bindings/phy/nvidia,tegra20-usb-phy.txt | 74 ---- .../bindings/phy/nvidia,tegra20-usb-phy.yaml | 357 ++++++++++++++++++ 2 files changed, 357 insertions(+), 74 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt create mode 100644 Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt deleted file mode 100644 index 1aa6f2674af5..000000000000 --- a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt +++ /dev/null @@ -1,74 +0,0 @@ -Tegra SOC USB PHY - -The device node for Tegra SOC USB PHY: - -Required properties : - - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy". - For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain - "nvidia,-usb-phy" plus at least one of the above, where is - tegra114, tegra124, tegra132, or tegra210. - - reg : Defines the following set of registers, in the order listed: - - The PHY's own register set. - Always present. - - The register set of the PHY containing the UTMI pad control registers. - Present if-and-only-if phy_type == utmi. - - phy_type : Should be one of "utmi", "ulpi" or "hsic". - - clocks : Defines the clocks listed in the clock-names property. - - clock-names : The following clock names must be present: - - reg: The clock needed to access the PHY's own registers. This is the - associated EHCI controller's clock. Always present. - - pll_u: PLL_U. Always present. - - timer: The timeout clock (clk_m). Present if phy_type == utmi. - - utmi-pads: The clock needed to access the UTMI pad control registers. - Present if phy_type == utmi. - - ulpi-link: The clock Tegra provides to the ULPI PHY (usually pad DAP_MCLK2 - with pad group aka "nvidia,pins" cdev2 and pin mux option config aka - "nvidia,function" pllp_out4). - Present if phy_type == ulpi, and ULPI link mode is in use. - - resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. - - reset-names : Must include the following entries: - - usb: The PHY's own reset signal. - - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control - registers. Required even if phy_type == ulpi. - -Required properties for phy_type == ulpi: - - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. - -Required PHY timing params for utmi phy, for all chips: - - nvidia,hssync-start-delay : Number of 480 Mhz clock cycles to wait before - start of sync launches RxActive - - nvidia,elastic-limit : Variable FIFO Depth of elastic input store - - nvidia,idle-wait-delay : Number of 480 Mhz clock cycles of idle to wait - before declare IDLE. - - nvidia,term-range-adj : Range adjusment on terminations - - Either one of the following for HS driver output control: - - nvidia,xcvr-setup : integer, uses the provided value. - - nvidia,xcvr-setup-use-fuses : boolean, indicates that the value is read - from the on-chip fuses - If both are provided, nvidia,xcvr-setup-use-fuses takes precedence. - - nvidia,xcvr-lsfslew : LS falling slew rate control. - - nvidia,xcvr-lsrslew : LS rising slew rate control. - -Required PHY timing params for utmi phy, only on Tegra30 and above: - - nvidia,xcvr-hsslew : HS slew rate control. - - nvidia,hssquelch-level : HS squelch detector level. - - nvidia,hsdiscon-level : HS disconnect detector level. - -Optional properties: - - nvidia,has-legacy-mode : boolean indicates whether this controller can - operate in legacy mode (as APX 2500 / 2600). In legacy mode some - registers are accessed through the APB_MISC base address instead of - the USB controller. - - nvidia,is-wired : boolean. Indicates whether we can do certain kind of power - optimizations for the devices that are always connected. e.g. modem. - - dr_mode : dual role mode. Indicates the working mode for the PHY. Can be - "host", "peripheral", or "otg". Defaults to "host" if not defined. - host means this is a host controller - peripheral means it is device controller - otg means it can operate as either ("on the go") - - nvidia,has-utmi-pad-registers : boolean indicates whether this controller - contains the UTMI pad control registers common to all USB controllers. - -VBUS control (required for dr_mode == otg, optional for dr_mode == host): - - vbus-supply: regulator for VBUS diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml new file mode 100644 index 000000000000..593187234e6a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml @@ -0,0 +1,357 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra USB PHY + +maintainers: + - Dmitry Osipenko + - Jon Hunter + - Thierry Reding + +properties: + compatible: + oneOf: + - items: + - enum: + - nvidia,tegra124-usb-phy + - nvidia,tegra114-usb-phy + - enum: + - nvidia,tegra30-usb-phy + - items: + - enum: + - nvidia,tegra30-usb-phy + - nvidia,tegra20-usb-phy + + reg: + minItems: 1 + maxItems: 2 + description: | + PHY0 and PHY2 share power and ground, PHY0 contains shared registers. + PHY0 and PHY2 must specify two register sets, where the first set is + PHY own registers and the second set is the PHY0 registers. + + clocks: + anyOf: + - items: + - description: Registers clock + - description: Main PHY clock + + - items: + - description: Registers clock + - description: Main PHY clock + - description: ULPI PHY clock + + - items: + - description: Registers clock + - description: Main PHY clock + - description: UTMI pads control registers clock + + - items: + - description: Registers clock + - description: Main PHY clock + - description: UTMI timeout clock + - description: UTMI pads control registers clock + + clock-names: + oneOf: + - items: + - const: reg + - const: pll_u + + - items: + - const: reg + - const: pll_u + - const: ulpi-link + + - items: + - const: reg + - const: pll_u + - const: utmi-pads + + - items: + - const: reg + - const: pll_u + - const: timer + - const: utmi-pads + + resets: + oneOf: + - maxItems: 1 + description: PHY reset + + - items: + - description: PHY reset + - description: UTMI pads reset + + reset-names: + oneOf: + - const: usb + + - items: + - const: usb + - const: utmi-pads + + "#phy-cells": + const: 0 + + phy_type: + $ref: /schemas/types.yaml#/definitions/string + enum: [utmi, ulpi, hsic] + + dr_mode: + $ref: /schemas/types.yaml#/definitions/string + enum: [host, peripheral, otg] + default: host + + vbus-supply: + description: Regulator controlling USB VBUS. + + nvidia,has-legacy-mode: + description: | + Indicates whether this controller can operate in legacy mode + (as APX 2500 / 2600). In legacy mode some registers are accessed + through the APB_MISC base address instead of the USB controller. + type: boolean + + nvidia,is-wired: + description: | + Indicates whether we can do certain kind of power optimizations for + the devices that are always connected. e.g. modem. + type: boolean + + nvidia,has-utmi-pad-registers: + description: | + Indicates whether this controller contains the UTMI pad control + registers common to all USB controllers. + type: boolean + + nvidia,hssync-start-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 31 + description: | + Number of 480 MHz clock cycles to wait before start of sync launches + RxActive. + + nvidia,elastic-limit: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 31 + description: Variable FIFO Depth of elastic input store. + + nvidia,idle-wait-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 31 + description: | + Number of 480 MHz clock cycles of idle to wait before declare IDLE. + + nvidia,term-range-adj: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + description: Range adjustment on terminations. + + nvidia,xcvr-setup: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 127 + description: Input of XCVR cell, HS driver output control. + + nvidia,xcvr-setup-use-fuses: + description: Indicates that the value is read from the on-chip fuses. + type: boolean + + nvidia,xcvr-lsfslew: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + description: LS falling slew rate control. + + nvidia,xcvr-lsrslew: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + description: LS rising slew rate control. + + nvidia,xcvr-hsslew: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 511 + description: HS slew rate control. + + nvidia,hssquelch-level: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + description: HS squelch detector level. + + nvidia,hsdiscon-level: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + description: HS disconnect detector level. + + nvidia,phy-reset-gpio: + maxItems: 1 + description: GPIO used to reset the PHY. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + - phy_type + +additionalProperties: false + +allOf: + - if: + properties: + phy_type: + const: utmi + + then: + properties: + reg: + minItems: 2 + maxItems: 2 + + resets: + maxItems: 2 + + reset-names: + maxItems: 2 + + required: + - nvidia,hssync-start-delay + - nvidia,elastic-limit + - nvidia,idle-wait-delay + - nvidia,term-range-adj + - nvidia,xcvr-lsfslew + - nvidia,xcvr-lsrslew + + anyOf: + - required: ["nvidia,xcvr-setup"] + - required: ["nvidia,xcvr-setup-use-fuses"] + + if: + properties: + compatible: + contains: + const: nvidia,tegra30-usb-phy + + then: + properties: + clocks: + maxItems: 3 + + clock-names: + items: + - const: reg + - const: pll_u + - const: utmi-pads + + required: + - nvidia,xcvr-hsslew + - nvidia,hssquelch-level + - nvidia,hsdiscon-level + + else: + properties: + clocks: + maxItems: 4 + + clock-names: + items: + - const: reg + - const: pll_u + - const: timer + - const: utmi-pads + + - if: + properties: + phy_type: + const: ulpi + + then: + properties: + reg: + minItems: 1 + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 3 + + clock-names: + minItems: 2 + maxItems: 3 + + oneOf: + - items: + - const: reg + - const: pll_u + + - items: + - const: reg + - const: pll_u + - const: ulpi-link + + resets: + minItems: 1 + maxItems: 2 + + reset-names: + minItems: 1 + maxItems: 2 + +examples: + - | + #include + + usb-phy@7d008000 { + compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; + reg = <0x7d008000 0x4000>, + <0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA124_CLK_USB3>, + <&tegra_car TEGRA124_CLK_PLL_U>, + <&tegra_car TEGRA124_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + resets = <&tegra_car 59>, <&tegra_car 22>; + reset-names = "usb", "utmi-pads"; + #phy-cells = <0>; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + }; + + - | + #include + + usb-phy@c5004000 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5004000 0x4000>; + phy_type = "ulpi"; + clocks = <&tegra_car TEGRA20_CLK_USB2>, + <&tegra_car TEGRA20_CLK_PLL_U>, + <&tegra_car TEGRA20_CLK_CDEV2>; + clock-names = "reg", "pll_u", "ulpi-link"; + resets = <&tegra_car 58>, <&tegra_car 22>; + reset-names = "usb", "utmi-pads"; + #phy-cells = <0>; + }; From patchwork Thu Jul 1 02:23:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEF86C11F68 for ; Thu, 1 Jul 2021 02:24:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B5CD361584 for ; Thu, 1 Jul 2021 02:24:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234257AbhGAC1T (ORCPT ); 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:45 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 02/12] dt-bindings: phy: tegra20-usb-phy: Document properties needed for OTG mode Date: Thu, 1 Jul 2021 05:23:55 +0300 Message-Id: <20210701022405.10817-3-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In order to support OTG mode we need these new properties: - interrupt - nvidia,pmc - nvidia,phy-instance The nvidia,phy-instance isn't strictly needed for the OTG mode since we know that only first controller supports it in practice, but it will be needed in general for supporting more complex hardware features that require knowledge of the PHY offset within common registers of the Power Management controller (PMC). Add the new properties to the bindings. Signed-off-by: Dmitry Osipenko --- .../bindings/phy/nvidia,tegra20-usb-phy.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml index 593187234e6a..a108f1552042 100644 --- a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml @@ -77,6 +77,9 @@ properties: - const: timer - const: utmi-pads + interrupts: + maxItems: 1 + resets: oneOf: - maxItems: 1 @@ -199,6 +202,17 @@ properties: maxItems: 1 description: GPIO used to reset the PHY. + nvidia,pmc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to Power Management controller. + + nvidia,phy-instance: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 2 + description: Unique hardware ID. + required: - compatible - reg @@ -320,6 +334,7 @@ examples: compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x7d008000 0x4000>, <0x7d000000 0x4000>; + interrupts = <0 97 4>; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB3>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -338,6 +353,8 @@ examples: nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance= <2>; }; - | @@ -346,6 +363,7 @@ examples: usb-phy@c5004000 { compatible = "nvidia,tegra20-usb-phy"; reg = <0xc5004000 0x4000>; + interrupts = <0 21 4>; phy_type = "ulpi"; clocks = <&tegra_car TEGRA20_CLK_USB2>, <&tegra_car TEGRA20_CLK_PLL_U>, @@ -354,4 +372,6 @@ examples: resets = <&tegra_car 58>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; #phy-cells = <0>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance= <1>; }; From patchwork Thu Jul 1 02:23:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469189 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74ADDC11F6D for ; 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:46 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 03/12] soc/tegra: pmc: Expose USB regmap to all SoCs Date: Thu, 1 Jul 2021 05:23:56 +0300 Message-Id: <20210701022405.10817-4-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All Tegra SoCs prior to Tegra186 have USB power controls within the Power Management controller. These controls need to be configured by USB driver. Expose the regmap to these SoCs. Signed-off-by: Dmitry Osipenko --- drivers/soc/tegra/pmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index b5a924baef4e..f8fcfc9750f9 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -3212,7 +3212,7 @@ static const struct tegra_pmc_soc tegra20_pmc_soc = { .pmc_clks_data = NULL, .num_pmc_clks = 0, .has_blink_output = true, - .has_usb_sleepwalk = false, + .has_usb_sleepwalk = true, }; static const char * const tegra30_powergates[] = { @@ -3273,7 +3273,7 @@ static const struct tegra_pmc_soc tegra30_pmc_soc = { .pmc_clks_data = tegra_pmc_clks_data, .num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data), .has_blink_output = true, - .has_usb_sleepwalk = false, + .has_usb_sleepwalk = true, }; static const char * const tegra114_powergates[] = { @@ -3330,7 +3330,7 @@ static const struct tegra_pmc_soc tegra114_pmc_soc = { .pmc_clks_data = tegra_pmc_clks_data, .num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data), .has_blink_output = true, - .has_usb_sleepwalk = false, + .has_usb_sleepwalk = true, }; static const char * const tegra124_powergates[] = { From patchwork Thu Jul 1 02:23:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E07BC11F72 for ; Thu, 1 Jul 2021 02:24:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3C54B6157F for ; Thu, 1 Jul 2021 02:24:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238658AbhGAC1V (ORCPT ); Wed, 30 Jun 2021 22:27:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238633AbhGAC1T (ORCPT ); Wed, 30 Jun 2021 22:27:19 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C182C0617AE; Wed, 30 Jun 2021 19:24:49 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id k21so6191601ljh.2; Wed, 30 Jun 2021 19:24:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2cruuUsOAPQVLtszR01ej2dNa4b85BlFaFd+gq/wwh4=; b=sxA3+eMqkFNJZHIKU6U0A4Kz+/A3/V/cMXcOHnTNWngxNBGjnes4KKRwyrPq2tzcIT KpKGKLk4/N6lbEVRaLiH+RiSeC2OmDoXGtu2z023ae4JptSQJYc8GWjJz8O4+xItGJOB ynRib5XOOm9abC1dDaOb7bglwv7GwLGkuW5C3GBPc51TAPbnVPExgC8vHL7qm4/V409a 0jIJF8gRJ3EbSIWQ9Iwkrm+l0xo6km0YBqIIvOhSgxAdLuMbcm7XSWsXvz1LnUIvKcaH +YqJQ64WPCnwttShpnWuTNa91WkfmEgAqPvqpx6UTuUapaFDu1KkgFH/IndWUrvzxGZX yqyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2cruuUsOAPQVLtszR01ej2dNa4b85BlFaFd+gq/wwh4=; b=lFZkPngBjgFklfZe7ngjlK6Wq3ElmB8jCeLd2o0tqaCBN6eOKNkkctVy7b4NfPaSoc xl9v549Bt6Rq1/z9NxFoRSLDWw6Q5UdD3bsGK7FZavw9I1c0vYq0YlW4WuQj8GwpdOLw 7S9bQIvdq46LO8sHTJaG8Lt9ebXVlWuAFyb5Wy6Ip8w7/SEe6cA5jVNL8KlWwml4Y8Xq cLGL19gfFKOb+P/HZwl2RaNYcDYq3O6Hs1FXGcDnOcOfjMdTBYGw0gShWwDrE6IeZ2ok TxexlXVj+hSEE/W3ZRwh1V/j0Is5asJ7zjyeiLZvJqWJjSq08yBPiy3SN7Uf/gmsBaLG MPPg== X-Gm-Message-State: AOAM531O65gNrduCtl6uWJuOTLAYnHKrvNK+ugDVExFFwow93YLROcXd s3mDkEEgmbKFuXijDnTYxUs= X-Google-Smtp-Source: ABdhPJwb2LvXguv2N+ndnCaVlt9ZONVVy6UEcXkOrVJtQXX1TjJBQb2gQVNIe86sk0Srgh6d5a6Nbw== X-Received: by 2002:a2e:8e29:: with SMTP id r9mr9913017ljk.370.1625106287433; Wed, 30 Jun 2021 19:24:47 -0700 (PDT) Received: from localhost.localdomain (94-29-37-113.dynamic.spd-mgts.ru. [94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:47 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 04/12] usb: phy: tegra: Support OTG mode programming Date: Thu, 1 Jul 2021 05:23:57 +0300 Message-Id: <20210701022405.10817-5-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Support programming USB PHY into OTG mode. Signed-off-by: Dmitry Osipenko --- drivers/usb/phy/phy-tegra-usb.c | 166 +++++++++++++++++++++++++++++- include/linux/usb/tegra_usb_phy.h | 5 + 2 files changed, 167 insertions(+), 4 deletions(-) diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c index c0f432d509aa..621f527baa8a 100644 --- a/drivers/usb/phy/phy-tegra-usb.c +++ b/drivers/usb/phy/phy-tegra-usb.c @@ -63,6 +63,10 @@ #define A_VBUS_VLD_WAKEUP_EN BIT(30) #define USB_PHY_VBUS_WAKEUP_ID 0x408 +#define ID_INT_EN BIT(0) +#define ID_CHG_DET BIT(1) +#define VBUS_WAKEUP_INT_EN BIT(8) +#define VBUS_WAKEUP_CHG_DET BIT(9) #define VBUS_WAKEUP_STS BIT(10) #define VBUS_WAKEUP_WAKEUP_EN BIT(30) @@ -158,6 +162,10 @@ #define USB_USBMODE_HOST (3 << 0) #define USB_USBMODE_DEVICE (2 << 0) +#define PMC_USB_AO 0xf0 +#define VBUS_WAKEUP_PD_P0 BIT(2) +#define ID_PD_P0 BIT(3) + static DEFINE_SPINLOCK(utmip_pad_lock); static unsigned int utmip_pad_count; @@ -533,13 +541,14 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy) val &= ~USB_WAKE_ON_RESUME_EN; writel_relaxed(val, base + USB_SUSP_CTRL); - if (phy->mode == USB_DR_MODE_PERIPHERAL) { + if (phy->mode != USB_DR_MODE_HOST) { val = readl_relaxed(base + USB_SUSP_CTRL); val &= ~(USB_WAKE_ON_CNNT_EN_DEV | USB_WAKE_ON_DISCON_EN_DEV); writel_relaxed(val, base + USB_SUSP_CTRL); val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID); val &= ~VBUS_WAKEUP_WAKEUP_EN; + val &= ~(ID_INT_EN | VBUS_WAKEUP_INT_EN); writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID); val = readl_relaxed(base + USB_PHY_VBUS_SENSORS); @@ -687,9 +696,11 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy) * Ask VBUS sensor to generate wake event once cable is * connected. */ - if (phy->mode == USB_DR_MODE_PERIPHERAL) { + if (phy->mode != USB_DR_MODE_HOST) { val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID); val |= VBUS_WAKEUP_WAKEUP_EN; + val |= ID_INT_EN | VBUS_WAKEUP_INT_EN; + val &= ~(ID_CHG_DET | VBUS_WAKEUP_CHG_DET); writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID); val = readl_relaxed(base + USB_PHY_VBUS_SENSORS); @@ -893,6 +904,9 @@ static void tegra_usb_phy_shutdown(struct usb_phy *u_phy) if (WARN_ON(!phy->freq)) return; + if (phy->irq > 0) + free_irq(phy->irq, phy); + tegra_usb_phy_power_off(phy); if (!phy->is_ulpi_phy) @@ -916,14 +930,90 @@ static int tegra_usb_phy_set_wakeup(struct usb_phy *u_phy, bool enable) static int tegra_usb_phy_set_suspend(struct usb_phy *u_phy, int suspend) { struct tegra_usb_phy *phy = to_tegra_usb_phy(u_phy); + int ret; if (WARN_ON(!phy->freq)) return -EINVAL; + if (phy->irq > 0) + disable_irq(phy->irq); + if (suspend) - return tegra_usb_phy_power_off(phy); + ret = tegra_usb_phy_power_off(phy); else - return tegra_usb_phy_power_on(phy); + ret = tegra_usb_phy_power_on(phy); + + if (phy->irq > 0) + enable_irq(phy->irq); + + return ret; +} + +static irqreturn_t tegra_usb_phy_isr(int irq, void *data) +{ + u32 val, int_mask = ID_CHG_DET | VBUS_WAKEUP_CHG_DET; + struct tegra_usb_phy *phy = data; + void __iomem *base = phy->regs; + + /* + * The PHY interrupt also wakes the USB controller driver since + * interrupt is shared. We don't do anything in the PHY driver, + * so just clear the interrupt. + */ + val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID); + writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID); + + return val & int_mask ? IRQ_HANDLED : IRQ_NONE; +} + +static int tegra_usb_phy_configure_pmc(struct tegra_usb_phy *phy) +{ + int err, val = 0; + + /* older device-trees don't have PMC regmap */ + if (!phy->pmc_regmap) + return 0; + + /* should be initialized if regmap presents */ + if (WARN_ON_ONCE(phy->instance < 0)) + return 0; + + /* + * Tegra20 has a different layout of PMC USB register bits and AO is + * enabled by default after system reset on Tegra20, so assume nothing + * to do on Tegra20. + */ + if (!phy->soc_config->requires_pmc_ao_power_up) + return 0; + + /* enable VBUS wake-up detector */ + if (phy->mode != USB_DR_MODE_HOST) + val |= VBUS_WAKEUP_PD_P0 << phy->instance * 4; + + /* enable ID-pin ACC detector for OTG mode switching */ + if (phy->mode == USB_DR_MODE_OTG) + val |= ID_PD_P0 << phy->instance * 4; + + /* disable detectors to reset them */ + err = regmap_set_bits(phy->pmc_regmap, PMC_USB_AO, val); + if (err) { + dev_err(phy->u_phy.dev, "Failed to disable PMC AO: %d\n", err); + return err; + } + + usleep_range(10, 100); + + /* enable detectors */ + err = regmap_clear_bits(phy->pmc_regmap, PMC_USB_AO, val); + if (err) { + dev_err(phy->u_phy.dev, "Failed to enable PMC AO: %d\n", err); + return err; + } + + /* detectors starts to work after 10ms */ + usleep_range(10000, 15000); + + return 0; } static int tegra_usb_phy_init(struct usb_phy *u_phy) @@ -967,12 +1057,26 @@ static int tegra_usb_phy_init(struct usb_phy *u_phy) goto disable_vbus; } + err = tegra_usb_phy_configure_pmc(phy); + if (err) + goto close_phy; + err = tegra_usb_phy_power_on(phy); if (err) goto close_phy; + if (phy->irq > 0) { + err = request_irq(phy->irq, tegra_usb_phy_isr, IRQF_SHARED, + dev_name(phy->u_phy.dev), phy); + if (err) + goto pwr_off_phy; + } + return 0; +pwr_off_phy: + tegra_usb_phy_power_off(phy); + close_phy: if (!phy->is_ulpi_phy) utmip_pad_close(phy); @@ -1135,11 +1239,50 @@ static int utmi_phy_probe(struct tegra_usb_phy *tegra_phy, return 0; } +static void tegra_usb_phy_put_pmc_device(void *dev) +{ + put_device(dev); +} + +static struct regmap *tegra_usb_phy_get_pmc_regmap(struct device *dev) +{ + struct platform_device *pmc_pdev; + struct device_node *np; + struct regmap *regmap; + int err; + + np = of_parse_phandle(dev->of_node, "nvidia,pmc", 0); + if (!np) { + dev_warn_once(dev, "nvidia,pmc is missing, please update your device-tree\n"); + return NULL; + } + + pmc_pdev = of_find_device_by_node(np); + of_node_put(np); + if (!pmc_pdev) + return ERR_PTR(-ENODEV); + + err = devm_add_action_or_reset(dev, tegra_usb_phy_put_pmc_device, + &pmc_pdev->dev); + if (err) + return ERR_PTR(err); + + if (!platform_get_drvdata(pmc_pdev)) + return ERR_PTR(-EPROBE_DEFER); + + regmap = dev_get_regmap(&pmc_pdev->dev, "usb_sleepwalk"); + if (!regmap) + return ERR_PTR(-EINVAL); + + return regmap; +} + static const struct tegra_phy_soc_config tegra20_soc_config = { .utmi_pll_config_in_car_module = false, .has_hostpc = false, .requires_usbmode_setup = false, .requires_extra_tuning_parameters = false, + .requires_pmc_ao_power_up = false, }; static const struct tegra_phy_soc_config tegra30_soc_config = { @@ -1147,6 +1290,7 @@ static const struct tegra_phy_soc_config tegra30_soc_config = { .has_hostpc = true, .requires_usbmode_setup = true, .requires_extra_tuning_parameters = true, + .requires_pmc_ao_power_up = true, }; static const struct of_device_id tegra_usb_phy_id_table[] = { @@ -1172,6 +1316,7 @@ static int tegra_usb_phy_probe(struct platform_device *pdev) return -ENOMEM; tegra_phy->soc_config = of_device_get_match_data(&pdev->dev); + tegra_phy->irq = platform_get_irq_optional(pdev, 0); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { @@ -1215,6 +1360,19 @@ static int tegra_usb_phy_probe(struct platform_device *pdev) return err; } + tegra_phy->pmc_regmap = tegra_usb_phy_get_pmc_regmap(&pdev->dev); + err = PTR_ERR_OR_ZERO(tegra_phy->pmc_regmap); + if (err) { + dev_err_probe(&pdev->dev, err, "Failed to get PMC regmap\n"); + return err; + } + + /* older device-trees don't specify instance ID */ + err = of_property_read_u32(np, "nvidia,phy-instance", + &tegra_phy->instance); + if (err) + tegra_phy->instance = -1; + phy_type = of_usb_get_phy_mode(np); switch (phy_type) { case USBPHY_INTERFACE_MODE_UTMI: diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h index fd1c9f6a4e37..d3e65eb9e16f 100644 --- a/include/linux/usb/tegra_usb_phy.h +++ b/include/linux/usb/tegra_usb_phy.h @@ -18,6 +18,7 @@ #include #include +#include #include #include @@ -30,6 +31,7 @@ * enter host mode * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level * and hsdiscon_level should be set for adequate signal quality + * requires_pmc_ao_power_up: true if USB AO is powered down by default */ struct tegra_phy_soc_config { @@ -37,6 +39,7 @@ struct tegra_phy_soc_config { bool has_hostpc; bool requires_usbmode_setup; bool requires_extra_tuning_parameters; + bool requires_pmc_ao_power_up; }; struct tegra_utmip_config { @@ -62,6 +65,7 @@ enum tegra_usb_phy_port_speed { struct tegra_xtal_freq; struct tegra_usb_phy { + int irq; int instance; const struct tegra_xtal_freq *freq; void __iomem *regs; @@ -70,6 +74,7 @@ struct tegra_usb_phy { struct clk *pll_u; struct clk *pad_clk; struct regulator *vbus; + struct regmap *pmc_regmap; enum usb_dr_mode mode; void *config; const struct tegra_phy_soc_config *soc_config; From patchwork Thu Jul 1 02:23:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469187 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14423C11F77 for ; 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:47 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 05/12] usb: otg-fsm: Fix hrtimer list corruption Date: Thu, 1 Jul 2021 05:23:58 +0300 Message-Id: <20210701022405.10817-6-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The HNP work can be re-scheduled while it's still in-fly. This results in re-initialization of the busy work, resetting the hrtimer's list node of the work and crashing kernel with null dereference within kernel/timer once work's timer is expired. It's very easy to trigger this problem by re-plugging USB cable quickly. Initialize HNP work only once to fix this trouble. Cc: stable@vger.kernel.org Signed-off-by: Dmitry Osipenko --- drivers/usb/common/usb-otg-fsm.c | 6 +++++- include/linux/usb/otg-fsm.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/usb/common/usb-otg-fsm.c b/drivers/usb/common/usb-otg-fsm.c index 3740cf95560e..0697fde51d00 100644 --- a/drivers/usb/common/usb-otg-fsm.c +++ b/drivers/usb/common/usb-otg-fsm.c @@ -193,7 +193,11 @@ static void otg_start_hnp_polling(struct otg_fsm *fsm) if (!fsm->host_req_flag) return; - INIT_DELAYED_WORK(&fsm->hnp_polling_work, otg_hnp_polling_work); + if (!fsm->hnp_work_inited) { + INIT_DELAYED_WORK(&fsm->hnp_polling_work, otg_hnp_polling_work); + fsm->hnp_work_inited = true; + } + schedule_delayed_work(&fsm->hnp_polling_work, msecs_to_jiffies(T_HOST_REQ_POLL)); } diff --git a/include/linux/usb/otg-fsm.h b/include/linux/usb/otg-fsm.h index 3aee78dda16d..784659d4dc99 100644 --- a/include/linux/usb/otg-fsm.h +++ b/include/linux/usb/otg-fsm.h @@ -196,6 +196,7 @@ struct otg_fsm { struct mutex lock; u8 *host_req_flag; struct delayed_work hnp_polling_work; + bool hnp_work_inited; bool state_changed; }; From patchwork Thu Jul 1 02:23:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469186 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65D88C11F70 for ; Thu, 1 Jul 2021 02:25:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4D7506147E for ; Thu, 1 Jul 2021 02:25:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238623AbhGAC1W (ORCPT ); Wed, 30 Jun 2021 22:27:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238639AbhGAC1U (ORCPT ); Wed, 30 Jun 2021 22:27:20 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76256C0617A8; Wed, 30 Jun 2021 19:24:50 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id u25so6132690ljj.11; Wed, 30 Jun 2021 19:24:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IwL3qryTNfgwkU5i7nwmV+nzWjMAB8DcHs6NfVFo2aw=; b=tIusmnHfpa7QldsC+QYuL0IiSy5lUtLgTU2ip2anCvjeciwgULJeDsonrJ+yE7Xk6l tXLc10VR93uc2MwE5oVK0C+bXZmKMJvoll+Rj4AmzqJuQzUqCW1M0L0eWMWSxh9Iu639 3KahBcBhl8XapWawTh3V18wJmhZaaYOzYVEsyf89hLwbVa/88wTEggdv5HeA0gginkZ2 +SPq5XqFyvKOYLUDRA3tLGlkR94ffAxn6FoTPGSvcTUD13aQajiSkTWkrBw4oUgevK3c NAIyLzZOwBkTFdiQHvDRoBdFKz6nLpu5V6/Lf62iaz5JVJzGuV4tcLru5TVJri5ZtrVu tXhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IwL3qryTNfgwkU5i7nwmV+nzWjMAB8DcHs6NfVFo2aw=; b=UVHqQaq1Sx+pgyLZZLEHYv4kGN+28tiHUHsYqYXDXDg3gpawWW6nAC9MhEg6aMJaUZ jgUr0Xh3zBqtAM2XRiTRgQz1m6rqAyZf4l8dDo8vVDcl9b7U3I0TP32F6J6zRNyrtm1B cDfFsYJrh8fB/v7SuxAd1QDK4ZQ1IQtRK6rmqgl3Fv5pHi75OPY42vXWRLSCmv0S098a a1or6PTUSTjRjo+rbcgF4C8oVew3vPINQmInXXf+IeSOvBkUBxtlfbo8cLDnBHOwC2PH NjHQ15zsO+R2U/U4ouARggN5A+WplWsLctoOinpQ2qSFKo0koOl+Q4QWpHV+MQ+y4WxE 9Iog== X-Gm-Message-State: AOAM533uc1U4ndVxcL7TbY27/E+88nmDKWdbdKvHjqr7/hMA3YD7UMJP YL7KvEwe+LsyLrHBrpC8JKM= X-Google-Smtp-Source: ABdhPJz3UUBzoGKmaBnOPlxMEk6Za+dxEHeTazeZhoLEMO5I1u8ovsFD22Y1hTttln9f0lqnfwyINQ== X-Received: by 2002:a2e:9cd:: with SMTP id 196mr10135948ljj.98.1625106288905; Wed, 30 Jun 2021 19:24:48 -0700 (PDT) Received: from localhost.localdomain (94-29-37-113.dynamic.spd-mgts.ru. [94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:48 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 06/12] dt-bindings: power: supply: smb347-charger: Document USB VBUS regulator Date: Thu, 1 Jul 2021 05:23:59 +0300 Message-Id: <20210701022405.10817-7-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SMB347 can supply power to USB VBUS, which is required by OTG-cable devices that want to switch USB port into the host mode. Add USB VBUS regulator properties. Signed-off-by: Dmitry Osipenko --- .../power/supply/summit,smb347-charger.yaml | 28 +++++++++++++++++++ .../dt-bindings/power/summit,smb347-charger.h | 4 +++ 2 files changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml index 983fc215c1e5..cd3d834f734d 100644 --- a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml @@ -73,6 +73,24 @@ properties: - 1 # SMB3XX_SOFT_TEMP_COMPENSATE_CURRENT Current compensation - 2 # SMB3XX_SOFT_TEMP_COMPENSATE_VOLTAGE Voltage compensation + summit,inok-polarity: + description: | + Polarity of INOK signal indicating presence of external power supply. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_SYSOK_INOK_ACTIVE_LOW + - 1 # SMB3XX_SYSOK_INOK_ACTIVE_HIGH + + usb-vbus: + $ref: "../../regulator/regulator.yaml#" + type: object + + properties: + summit,needs-inok-toggle: + type: boolean + description: INOK signal is fixed and polarity needs to be toggled + in order to enable/disable output mode. + allOf: - if: properties: @@ -134,6 +152,7 @@ examples: reg = <0x7f>; summit,enable-charge-control = ; + summit,inok-polarity = ; summit,chip-temperature-threshold-celsius = <110>; summit,mains-current-limit-microamp = <2000000>; summit,usb-current-limit-microamp = <500000>; @@ -141,6 +160,15 @@ examples: summit,enable-mains-charging; monitored-battery = <&battery>; + + usb-vbus { + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-min-microamp = <750000>; + regulator-max-microamp = <750000>; + summit,needs-inok-toggle; + }; }; }; diff --git a/include/dt-bindings/power/summit,smb347-charger.h b/include/dt-bindings/power/summit,smb347-charger.h index d918bf321a71..3205699b5e41 100644 --- a/include/dt-bindings/power/summit,smb347-charger.h +++ b/include/dt-bindings/power/summit,smb347-charger.h @@ -16,4 +16,8 @@ #define SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW 1 #define SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH 2 +/* Polarity of INOK signal */ +#define SMB3XX_SYSOK_INOK_ACTIVE_LOW 0 +#define SMB3XX_SYSOK_INOK_ACTIVE_HIGH 1 + #endif From patchwork Thu Jul 1 02:24:00 2021 Content-Type: text/plain; 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:49 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 07/12] power: supply: smb347-charger: Make smb347_set_writable() IRQ-safe Date: Thu, 1 Jul 2021 05:24:00 +0300 Message-Id: <20210701022405.10817-8-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The smb347_set_writable() is used by interrupt handler and outside of it. The interrupt should be disabled when the function is used outside of interrupt handler in order to prevent racing with the interrupt context. Add new parameter to smb347_set_writable() that allows to disable IRQ. Signed-off-by: Dmitry Osipenko --- drivers/power/supply/smb347-charger.c | 30 +++++++++++++++++++-------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/power/supply/smb347-charger.c b/drivers/power/supply/smb347-charger.c index df240420f2de..db1378b41f80 100644 --- a/drivers/power/supply/smb347-charger.c +++ b/drivers/power/supply/smb347-charger.c @@ -671,10 +671,22 @@ static int smb347_set_temp_limits(struct smb347_charger *smb) * * Returns %0 on success and negative errno in case of failure. */ -static int smb347_set_writable(struct smb347_charger *smb, bool writable) +static int smb347_set_writable(struct smb347_charger *smb, bool writable, + bool irq_toggle) { - return regmap_update_bits(smb->regmap, CMD_A, CMD_A_ALLOW_WRITE, - writable ? CMD_A_ALLOW_WRITE : 0); + struct i2c_client *client = to_i2c_client(smb->dev); + int ret; + + if (writable && irq_toggle && !smb->irq_unsupported) + disable_irq(client->irq); + + ret = regmap_update_bits(smb->regmap, CMD_A, CMD_A_ALLOW_WRITE, + writable ? CMD_A_ALLOW_WRITE : 0); + + if ((!writable || ret) && irq_toggle && !smb->irq_unsupported) + enable_irq(client->irq); + + return ret; } static int smb347_hw_init(struct smb347_charger *smb) @@ -682,7 +694,7 @@ static int smb347_hw_init(struct smb347_charger *smb) unsigned int val; int ret; - ret = smb347_set_writable(smb, true); + ret = smb347_set_writable(smb, true, false); if (ret < 0) return ret; @@ -758,7 +770,7 @@ static int smb347_hw_init(struct smb347_charger *smb) ret = smb347_start_stop_charging(smb); fail: - smb347_set_writable(smb, false); + smb347_set_writable(smb, false, false); return ret; } @@ -866,7 +878,7 @@ static int smb347_irq_set(struct smb347_charger *smb, bool enable) if (smb->irq_unsupported) return 0; - ret = smb347_set_writable(smb, true); + ret = smb347_set_writable(smb, true, true); if (ret < 0) return ret; @@ -891,7 +903,7 @@ static int smb347_irq_set(struct smb347_charger *smb, bool enable) ret = regmap_update_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_CHARGER_ERROR, enable ? CFG_PIN_EN_CHARGER_ERROR : 0); fail: - smb347_set_writable(smb, false); + smb347_set_writable(smb, false, true); return ret; } @@ -919,7 +931,7 @@ static int smb347_irq_init(struct smb347_charger *smb, if (!client->irq) return 0; - ret = smb347_set_writable(smb, true); + ret = smb347_set_writable(smb, true, false); if (ret < 0) return ret; @@ -931,7 +943,7 @@ static int smb347_irq_init(struct smb347_charger *smb, CFG_STAT_ACTIVE_HIGH | CFG_STAT_DISABLED, CFG_STAT_DISABLED); - smb347_set_writable(smb, false); + smb347_set_writable(smb, false, false); if (ret < 0) { dev_warn(smb->dev, "failed to initialize IRQ: %d\n", ret); From patchwork Thu Jul 1 02:24:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469188 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3557FC11F79 for ; Thu, 1 Jul 2021 02:24:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 19453613D9 for ; Thu, 1 Jul 2021 02:24:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238683AbhGAC1Y (ORCPT ); Wed, 30 Jun 2021 22:27:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238673AbhGAC1X (ORCPT ); Wed, 30 Jun 2021 22:27:23 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E7EB0C0617A8; Wed, 30 Jun 2021 19:24:51 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id q4so6118507ljp.13; Wed, 30 Jun 2021 19:24:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BFXR8UJAJfYBsWt7j+dPhOe713FxNJqHeaZ6mJiooJo=; b=PK62oc2eMNNQ6fbAE/rLJKzZ2fEctzHg/zwUBO/9i6KwADR2bcleLT9ktF9W4q2UaB bwJZBnbGvOG5PKx1j5lwHivo8dbjBqaljlzOaON4KQw/WGkREIkHk2kxcOKORCFMmlMW rEsPtJHBL5AbQMW7Ywzxtdlx1UgqbD7K8uFNWQLc6aYBxYvnHwuiCcwp3oN2F+jDlJIK Cvjhgjy5uQt2sjZF9c5+bXypA6IqxBg6KNnr1pJINDleJrUx1xgqLMzg2b0tmv/PhZ8Q AGbhfYK6bOKuMhL+VqgpkOWZaZNVKq38fYZucm2dWNV+VCk/oUmdCRnUmE+KkSNu3IrI kYfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BFXR8UJAJfYBsWt7j+dPhOe713FxNJqHeaZ6mJiooJo=; b=Kvu/YkFlLTKHVJaAwqT4a5Lb3zvJfBWPq4CONe0dbkCm28Hmjnmo0fQUrPMzMaPEH1 zD5CLOasHO9TuDKkKWIbs7dh+L68hOPTJWgfirkXfR+xmDuuB8DwlTxucKWiMikSjLFc tX8+nd3Oq/FHLBm+Mq0Lw9VfPwo9NZVzphSyayZKNkP1OnDZ4QYWF7GZBm/EOM7Edvlc jOfLFZ3qwcSd5bMBoKShLELsN0SZsCNh9mi3bRXCuTDVq40rwfVAod126M4cRJtFjFGY 8RagDbJq/r1MyCHpd3lGQFKICcH3TdspG3pkpa3eXhmi6JN59Ff1OCJPvsatSO71H3As IV3w== X-Gm-Message-State: AOAM532HObtiTNdPrWh+qv+uyshxPHPIBkIvAWRHzjGNhWibOvp2gvxS 4IKGsBIOYLFtUTF9dKjJenU= X-Google-Smtp-Source: ABdhPJw/Rj4deuEH5QIk2/cuYLMxw+SwxZOEK2ukcEiuy3kFs6NDJMl8Hiicl+LCn1mE0MWIkKkyXw== X-Received: by 2002:a2e:974f:: with SMTP id f15mr10061298ljj.434.1625106290320; Wed, 30 Jun 2021 19:24:50 -0700 (PDT) Received: from localhost.localdomain (94-29-37-113.dynamic.spd-mgts.ru. [94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:50 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 08/12] power: supply: smb347-charger: Remove caching of charger state Date: Thu, 1 Jul 2021 05:24:01 +0300 Message-Id: <20210701022405.10817-9-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Regmap already provides us with the caching, so remove caching of charger state to make code cleaner. Signed-off-by: Dmitry Osipenko --- drivers/power/supply/smb347-charger.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/power/supply/smb347-charger.c b/drivers/power/supply/smb347-charger.c index db1378b41f80..f81c60c679a0 100644 --- a/drivers/power/supply/smb347-charger.c +++ b/drivers/power/supply/smb347-charger.c @@ -135,7 +135,6 @@ * @id: SMB charger ID * @mains_online: is AC/DC input connected * @usb_online: is USB input connected - * @charging_enabled: is charging enabled * @irq_unsupported: is interrupt unsupported by SMB hardware * @max_charge_current: maximum current (in uA) the battery can be charged * @max_charge_voltage: maximum voltage (in uV) the battery can be charged @@ -192,7 +191,6 @@ struct smb347_charger { unsigned int id; bool mains_online; bool usb_online; - bool charging_enabled; bool irq_unsupported; unsigned int max_charge_current; @@ -358,21 +356,13 @@ static int smb347_charging_status(struct smb347_charger *smb) static int smb347_charging_set(struct smb347_charger *smb, bool enable) { - int ret = 0; - if (smb->enable_control != SMB3XX_CHG_ENABLE_SW) { dev_dbg(smb->dev, "charging enable/disable in SW disabled\n"); return 0; } - if (smb->charging_enabled != enable) { - ret = regmap_update_bits(smb->regmap, CMD_A, CMD_A_CHG_ENABLED, - enable ? CMD_A_CHG_ENABLED : 0); - if (!ret) - smb->charging_enabled = enable; - } - - return ret; + return regmap_update_bits(smb->regmap, CMD_A, CMD_A_CHG_ENABLED, + enable ? CMD_A_CHG_ENABLED : 0); } static inline int smb347_charging_enable(struct smb347_charger *smb) From patchwork Thu Jul 1 02:24:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469184 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBF64C11F69 for ; Thu, 1 Jul 2021 02:25:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D1F346147E for ; Thu, 1 Jul 2021 02:25:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238773AbhGAC1g (ORCPT ); Wed, 30 Jun 2021 22:27:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238667AbhGAC1W (ORCPT ); Wed, 30 Jun 2021 22:27:22 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2FB9C061756; Wed, 30 Jun 2021 19:24:52 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id k10so8813543lfv.13; Wed, 30 Jun 2021 19:24:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HzuKCRqNO0IImBaPn7HGCe0cRJrtqW+j2JuwM2fyqNs=; b=g6ijPdl8/dgvPWFiEgaz6rYBTXtPtSig57Zs6lMdMQ20N23dhlbtEeEbWh66SmB4dr iLhlm8ka5+dB69j5ofqigv6fcq6f4V2Q8SKlGxYWENmwrVW7BilzhgjN4KDvv0Y43tIY mP2z7I+iwwmbkJV08FEW+X4yj9OWCCEnfxZ8cvM1aHc9R7S+A9QW6A4nEGq7JIq1x+xv lTCf+Xt2qp5qe02MJDSHJih+p3EqexLUKOA2NA/rjS/dSd+o0rtooC430uIACrEKdNZM atDLBkslwDM8B7P3n9tzyirUyQ1MhBVGjidRnJNvk6Usvggy4QuFEEhdvwfnJqOV/mQH rqPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HzuKCRqNO0IImBaPn7HGCe0cRJrtqW+j2JuwM2fyqNs=; b=i70SP14QaRQrBqEDsxmCmc4KamEo3NZ+INtwTMxELtpNxZqhdNCp4Fc/vLdmUKbTzG ZhOzXdd6GlUJoqUoXOc/TXCOkqBv0hB1rn8gu+fSORHVTwtviOjOr7MfUoqAEhAlwiTa aQemN+052ln9epNtx8UQFIEBFqDpCI7Wta9aLh1GltUeRkSkvbCX+/odY9rRHNqtmVC7 MHdRTEF0DhngpBRz4Vc6T4NlMhQtzPpUuGJi/36M0EhtUgDDu/7Mb1apU7NrbrsOTumk +HLajPmS+FKZ/5CHkEcr5B0aMO61JdDlSdRK4XnKHO1JwAlHDzh6fkyLZYFsVQs7VWiz fXvA== X-Gm-Message-State: AOAM531TYpdnvHjnu38SdrjkDhOhqvJfz/Jn8c4o4xKpRWBc33g4M9WN 0/R5VVn02YRQbcEuACVUR0U= X-Google-Smtp-Source: ABdhPJxBTT9EFrrspxEbeYweZ7ELB4NZ5TkQVNrNDuJXFkXL7mdACkW8eNFeP+5KRQIMGVzDMagfjQ== X-Received: by 2002:ac2:5f59:: with SMTP id 25mr31040335lfz.454.1625106291000; Wed, 30 Jun 2021 19:24:51 -0700 (PDT) Received: from localhost.localdomain (94-29-37-113.dynamic.spd-mgts.ru. [94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:50 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 09/12] power: supply: smb347-charger: Implement USB VBUS regulator Date: Thu, 1 Jul 2021 05:24:02 +0300 Message-Id: <20210701022405.10817-10-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SMB347 can supply power to USB VBUS, implement the USB VBUS regulator. USB VBUS needs to be powered for switching OTG-cable USB port into host mode. Signed-off-by: Dmitry Osipenko --- drivers/power/supply/Kconfig | 1 + drivers/power/supply/smb347-charger.c | 219 ++++++++++++++++++++++++++ 2 files changed, 220 insertions(+) diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index 832190743e00..5a4f82ba9375 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -688,6 +688,7 @@ config CHARGER_BQ256XX config CHARGER_SMB347 tristate "Summit Microelectronics SMB3XX Battery Charger" depends on I2C + depends on REGULATOR select REGMAP_I2C help Say Y to include support for Summit Microelectronics SMB345, diff --git a/drivers/power/supply/smb347-charger.c b/drivers/power/supply/smb347-charger.c index f81c60c679a0..330f1cd40e5e 100644 --- a/drivers/power/supply/smb347-charger.c +++ b/drivers/power/supply/smb347-charger.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -62,12 +63,15 @@ #define CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT 2 #define CFG_THERM_MONITOR_DISABLED BIT(4) #define CFG_SYSOK 0x08 +#define CFG_SYSOK_INOK_ACTIVE_HIGH BIT(0) #define CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED BIT(2) #define CFG_OTHER 0x09 #define CFG_OTHER_RID_MASK 0xc0 #define CFG_OTHER_RID_ENABLED_AUTO_OTG 0xc0 #define CFG_OTG 0x0a #define CFG_OTG_TEMP_THRESHOLD_MASK 0x30 +#define CFG_OTG_CURRENT_LIMIT_250mA BIT(2) +#define CFG_OTG_CURRENT_LIMIT_750mA BIT(3) #define CFG_OTG_TEMP_THRESHOLD_SHIFT 4 #define CFG_OTG_CC_COMPENSATION_MASK 0xc0 #define CFG_OTG_CC_COMPENSATION_SHIFT 6 @@ -91,6 +95,7 @@ #define CMD_A 0x30 #define CMD_A_CHG_ENABLED BIT(1) #define CMD_A_SUSPEND_ENABLED BIT(2) +#define CMD_A_OTG_ENABLED BIT(4) #define CMD_A_ALLOW_WRITE BIT(7) #define CMD_B 0x31 #define CMD_C 0x33 @@ -132,10 +137,12 @@ * @regmap: pointer to driver regmap * @mains: power_supply instance for AC/DC power * @usb: power_supply instance for USB power + * @usb_rdev: USB VBUS regulator device * @id: SMB charger ID * @mains_online: is AC/DC input connected * @usb_online: is USB input connected * @irq_unsupported: is interrupt unsupported by SMB hardware + * @usb_vbus_enabled: is USB VBUS powered by SMB charger * @max_charge_current: maximum current (in uA) the battery can be charged * @max_charge_voltage: maximum voltage (in uV) the battery can be charged * @pre_charge_current: current (in uA) to use in pre-charging phase @@ -166,6 +173,8 @@ * @use_usb_otg: USB OTG output can be used (not implemented yet) * @enable_control: how charging enable/disable is controlled * (driver/pin controls) + * @inok_polarity: polarity of INOK signal which denotes presence of external + * power supply * * @use_main, @use_usb, and @use_usb_otg are means to enable/disable * hardware support for these. This is useful when we want to have for @@ -188,10 +197,12 @@ struct smb347_charger { struct regmap *regmap; struct power_supply *mains; struct power_supply *usb; + struct regulator_dev *usb_rdev; unsigned int id; bool mains_online; bool usb_online; bool irq_unsupported; + bool usb_vbus_enabled; unsigned int max_charge_current; unsigned int max_charge_voltage; @@ -212,6 +223,7 @@ struct smb347_charger { bool use_usb; bool use_usb_otg; unsigned int enable_control; + unsigned int inok_polarity; }; enum smb_charger_chipid { @@ -361,6 +373,11 @@ static int smb347_charging_set(struct smb347_charger *smb, bool enable) return 0; } + if (enable && smb->usb_vbus_enabled) { + dev_dbg(smb->dev, "charging not enabled because USB is in host mode\n"); + return 0; + } + return regmap_update_bits(smb->regmap, CMD_A, CMD_A_CHG_ENABLED, enable ? CMD_A_CHG_ENABLED : 0); } @@ -1243,6 +1260,13 @@ static void smb347_dt_parse_dev_info(struct smb347_charger *smb) /* Select charging control */ device_property_read_u32(dev, "summit,enable-charge-control", &smb->enable_control); + + /* + * Polarity of INOK signal indicating presence of external power + * supply connected to the charger. + */ + device_property_read_u32(dev, "summit,inok-polarity", + &smb->inok_polarity); } static int smb347_get_battery_info(struct smb347_charger *smb) @@ -1294,6 +1318,160 @@ static int smb347_get_battery_info(struct smb347_charger *smb) return 0; } +static int smb347_usb_vbus_get_current_limit(struct regulator_dev *rdev) +{ + struct smb347_charger *smb = rdev_get_drvdata(rdev); + unsigned int val; + int ret; + + ret = regmap_read(smb->regmap, CFG_OTG, &val); + if (ret < 0) + return ret; + + /* + * It's unknown what happens if this bit is unset due to lack of + * access to the datasheet, assume it's limit-enable. + */ + if (!(val & CFG_OTG_CURRENT_LIMIT_250mA)) + return 0; + + return val & CFG_OTG_CURRENT_LIMIT_750mA ? 750000 : 250000; +} + +static int smb347_usb_vbus_set_new_current_limit(struct smb347_charger *smb, + int max_uA) +{ + const unsigned int mask = CFG_OTG_CURRENT_LIMIT_750mA | + CFG_OTG_CURRENT_LIMIT_250mA; + unsigned int val = CFG_OTG_CURRENT_LIMIT_250mA; + int ret; + + if (max_uA >= 750000) + val |= CFG_OTG_CURRENT_LIMIT_750mA; + + ret = regmap_update_bits(smb->regmap, CFG_OTG, mask, val); + if (ret < 0) + dev_err(smb->dev, "failed to change USB current limit\n"); + + return ret; +} + +static int smb347_usb_vbus_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +{ + struct smb347_charger *smb = rdev_get_drvdata(rdev); + int ret; + + ret = smb347_set_writable(smb, true, true); + if (ret < 0) + return ret; + + ret = smb347_usb_vbus_set_new_current_limit(smb, max_uA); + smb347_set_writable(smb, false, true); + + return ret; +} + +static int smb347_usb_vbus_regulator_enable(struct regulator_dev *rdev) +{ + struct smb347_charger *smb = rdev_get_drvdata(rdev); + int ret, max_uA; + + ret = smb347_set_writable(smb, true, true); + if (ret < 0) + return ret; + + smb347_charging_disable(smb); + + if (device_property_read_bool(&rdev->dev, "summit,needs-inok-toggle")) { + unsigned int sysok = 0; + + if (smb->inok_polarity == SMB3XX_SYSOK_INOK_ACTIVE_LOW) + sysok = CFG_SYSOK_INOK_ACTIVE_HIGH; + + /* + * VBUS won't be powered if INOK is active, so we need to + * manually disable INOK on some platforms. + */ + ret = regmap_update_bits(smb->regmap, CFG_SYSOK, + CFG_SYSOK_INOK_ACTIVE_HIGH, sysok); + if (ret < 0) { + dev_err(smb->dev, "failed to disable INOK\n"); + goto done; + } + } + + ret = smb347_usb_vbus_get_current_limit(rdev); + if (ret < 0) { + dev_err(smb->dev, "failed to get USB VBUS current limit\n"); + goto done; + } + + max_uA = ret; + + ret = smb347_usb_vbus_set_new_current_limit(smb, 250000); + if (ret < 0) { + dev_err(smb->dev, "failed to preset USB VBUS current limit\n"); + goto done; + } + + ret = regmap_set_bits(smb->regmap, CMD_A, CMD_A_OTG_ENABLED); + if (ret < 0) { + dev_err(smb->dev, "failed to enable USB VBUS\n"); + goto done; + } + + smb->usb_vbus_enabled = true; + + ret = smb347_usb_vbus_set_new_current_limit(smb, max_uA); + if (ret < 0) { + dev_err(smb->dev, "failed to restore USB VBUS current limit\n"); + goto done; + } +done: + smb347_set_writable(smb, false, true); + + return ret; +} + +static int smb347_usb_vbus_regulator_disable(struct regulator_dev *rdev) +{ + struct smb347_charger *smb = rdev_get_drvdata(rdev); + int ret; + + ret = smb347_set_writable(smb, true, true); + if (ret < 0) + return ret; + + ret = regmap_clear_bits(smb->regmap, CMD_A, CMD_A_OTG_ENABLED); + if (ret < 0) { + dev_err(smb->dev, "failed to disable USB VBUS\n"); + goto done; + } + + smb->usb_vbus_enabled = false; + + if (device_property_read_bool(&rdev->dev, "summit,needs-inok-toggle")) { + unsigned int sysok = 0; + + if (smb->inok_polarity == SMB3XX_SYSOK_INOK_ACTIVE_HIGH) + sysok = CFG_SYSOK_INOK_ACTIVE_HIGH; + + ret = regmap_update_bits(smb->regmap, CFG_SYSOK, + CFG_SYSOK_INOK_ACTIVE_HIGH, sysok); + if (ret < 0) { + dev_err(smb->dev, "failed to enable INOK\n"); + goto done; + } + } + + smb347_start_stop_charging(smb); +done: + smb347_set_writable(smb, false, true); + + return ret; +} + static const struct regmap_config smb347_regmap = { .reg_bits = 8, .val_bits = 8, @@ -1302,6 +1480,14 @@ static const struct regmap_config smb347_regmap = { .readable_reg = smb347_readable_reg, }; +static const struct regulator_ops smb347_usb_vbus_regulator_ops = { + .is_enabled = regulator_is_enabled_regmap, + .enable = smb347_usb_vbus_regulator_enable, + .disable = smb347_usb_vbus_regulator_disable, + .get_current_limit = smb347_usb_vbus_get_current_limit, + .set_current_limit = smb347_usb_vbus_set_current_limit, +}; + static const struct power_supply_desc smb347_mains_desc = { .name = "smb347-mains", .type = POWER_SUPPLY_TYPE_MAINS, @@ -1318,10 +1504,24 @@ static const struct power_supply_desc smb347_usb_desc = { .num_properties = ARRAY_SIZE(smb347_properties), }; +static const struct regulator_desc smb347_usb_vbus_regulator_desc = { + .name = "smb347-usb-vbus", + .of_match = of_match_ptr("usb-vbus"), + .ops = &smb347_usb_vbus_regulator_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, + .enable_reg = CMD_A, + .enable_mask = CMD_A_OTG_ENABLED, + .enable_val = CMD_A_OTG_ENABLED, + .fixed_uV = 5000000, + .n_voltages = 1, +}; + static int smb347_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct power_supply_config mains_usb_cfg = {}; + struct regulator_config usb_rdev_cfg = {}; struct device *dev = &client->dev; struct smb347_charger *smb; int ret; @@ -1369,6 +1569,18 @@ static int smb347_probe(struct i2c_client *client, if (ret) return ret; + usb_rdev_cfg.dev = dev; + usb_rdev_cfg.driver_data = smb; + usb_rdev_cfg.regmap = smb->regmap; + + smb->usb_rdev = devm_regulator_register(dev, + &smb347_usb_vbus_regulator_desc, + &usb_rdev_cfg); + if (IS_ERR(smb->usb_rdev)) { + smb347_irq_disable(smb); + return PTR_ERR(smb->usb_rdev); + } + return 0; } @@ -1376,11 +1588,17 @@ static int smb347_remove(struct i2c_client *client) { struct smb347_charger *smb = i2c_get_clientdata(client); + smb347_usb_vbus_regulator_disable(smb->usb_rdev); smb347_irq_disable(smb); return 0; } +static void smb347_shutdown(struct i2c_client *client) +{ + smb347_remove(client); +} + static const struct i2c_device_id smb347_id[] = { { "smb345", SMB345 }, { "smb347", SMB347 }, @@ -1404,6 +1622,7 @@ static struct i2c_driver smb347_driver = { }, .probe = smb347_probe, .remove = smb347_remove, + .shutdown = smb347_shutdown, .id_table = smb347_id, }; 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:51 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 10/12] arm64: tegra132: Add new properties to USB PHY device-tree node Date: Thu, 1 Jul 2021 05:24:03 +0300 Message-Id: <20210701022405.10817-11-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new properties to USB PHYs needed for enabling USB OTG mode. Signed-off-by: Dmitry Osipenko --- arch/arm64/boot/dts/nvidia/tegra132.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 9928a87f593a..fa3bab8138f5 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -1123,6 +1123,7 @@ phy1: usb-phy@7d000000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d000000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USBD>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -1142,6 +1143,8 @@ phy1: usb-phy@7d000000 { nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; nvidia,has-utmi-pad-registers; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <0>; status = "disabled"; }; @@ -1162,6 +1165,7 @@ phy2: usb-phy@7d004000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d004000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB2>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -1180,6 +1184,8 @@ phy2: usb-phy@7d004000 { nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <1>; status = "disabled"; }; @@ -1200,6 +1206,7 @@ phy3: usb-phy@7d008000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d008000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB3>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -1218,6 +1225,8 @@ phy3: usb-phy@7d008000 { nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <2>; status = "disabled"; }; From patchwork Thu Jul 1 02:24:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 469185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3BCAC11F69 for ; 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:52 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 11/12] ARM: tegra: Add new properties to USB PHY device-tree nodes Date: Thu, 1 Jul 2021 05:24:04 +0300 Message-Id: <20210701022405.10817-12-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new properties to USB PHYs needed for enabling USB OTG mode. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra114.dtsi | 6 ++++++ arch/arm/boot/dts/tegra124.dtsi | 9 +++++++++ arch/arm/boot/dts/tegra20.dtsi | 9 +++++++++ arch/arm/boot/dts/tegra30.dtsi | 9 +++++++++ 4 files changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index fb99b3e971c3..c04817851bce 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -706,6 +706,7 @@ phy1: usb-phy@7d000000 { compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x7d000000 0x4000>, <0x7d000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA114_CLK_USBD>, <&tegra_car TEGRA114_CLK_PLL_U>, @@ -725,6 +726,8 @@ phy1: usb-phy@7d000000 { nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; nvidia,has-utmi-pad-registers; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <0>; status = "disabled"; }; @@ -744,6 +747,7 @@ phy3: usb-phy@7d008000 { compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x7d008000 0x4000>, <0x7d000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA114_CLK_USB3>, <&tegra_car TEGRA114_CLK_PLL_U>, @@ -762,6 +766,8 @@ phy3: usb-phy@7d008000 { nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 8b38f123f554..0daa1e97c1f6 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -1094,6 +1094,7 @@ phy1: usb-phy@7d000000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d000000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USBD>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -1113,6 +1114,8 @@ phy1: usb-phy@7d000000 { nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; nvidia,has-utmi-pad-registers; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <0>; status = "disabled"; }; @@ -1132,6 +1135,7 @@ phy2: usb-phy@7d004000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d004000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB2>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -1150,6 +1154,8 @@ phy2: usb-phy@7d004000 { nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <1>; status = "disabled"; }; @@ -1169,6 +1175,7 @@ phy3: usb-phy@7d008000 { compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; reg = <0x0 0x7d008000 0x0 0x4000>, <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB3>, <&tegra_car TEGRA124_CLK_PLL_U>, @@ -1187,6 +1194,8 @@ phy3: usb-phy@7d008000 { nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 70d81a6cbc61..d4c068415bfd 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -875,6 +875,7 @@ phy1: usb-phy@c5000000 { compatible = "nvidia,tegra20-usb-phy"; reg = <0xc5000000 0x4000>, <0xc5000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA20_CLK_USBD>, <&tegra_car TEGRA20_CLK_PLL_U>, @@ -893,6 +894,8 @@ phy1: usb-phy@c5000000 { nvidia,xcvr-lsfslew = <1>; nvidia,xcvr-lsrslew = <1>; nvidia,has-utmi-pad-registers; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance= <0>; status = "disabled"; }; @@ -913,6 +916,7 @@ usb@c5004000 { phy2: usb-phy@c5004000 { compatible = "nvidia,tegra20-usb-phy"; reg = <0xc5004000 0x4000>; + interrupts = ; phy_type = "ulpi"; clocks = <&tegra_car TEGRA20_CLK_USB2>, <&tegra_car TEGRA20_CLK_PLL_U>, @@ -921,6 +925,8 @@ phy2: usb-phy@c5004000 { resets = <&tegra_car 58>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; #phy-cells = <0>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance= <1>; status = "disabled"; }; @@ -942,6 +948,7 @@ phy3: usb-phy@c5008000 { compatible = "nvidia,tegra20-usb-phy"; reg = <0xc5008000 0x4000>, <0xc5000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA20_CLK_USB3>, <&tegra_car TEGRA20_CLK_PLL_U>, @@ -958,6 +965,8 @@ phy3: usb-phy@c5008000 { nvidia,xcvr-setup = <9>; nvidia,xcvr-lsfslew = <2>; nvidia,xcvr-lsrslew = <2>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance= <2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 69f344aaf871..4decf5f00d09 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -1143,6 +1143,7 @@ phy1: usb-phy@7d000000 { compatible = "nvidia,tegra30-usb-phy"; reg = <0x7d000000 0x4000>, <0x7d000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA30_CLK_USBD>, <&tegra_car TEGRA30_CLK_PLL_U>, @@ -1163,6 +1164,8 @@ phy1: usb-phy@7d000000 { nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,has-utmi-pad-registers; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <0>; status = "disabled"; }; @@ -1184,6 +1187,7 @@ phy2: usb-phy@7d004000 { compatible = "nvidia,tegra30-usb-phy"; reg = <0x7d004000 0x4000>, <0x7d000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA30_CLK_USB2>, <&tegra_car TEGRA30_CLK_PLL_U>, @@ -1203,6 +1207,8 @@ phy2: usb-phy@7d004000 { nvidia,xcvr-hsslew = <32>; nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; + nvidia,pmc = <&tegra_pmc>; + nvidia,phy-instance = <1>; status = "disabled"; }; @@ -1224,6 +1230,7 @@ phy3: usb-phy@7d008000 { compatible = "nvidia,tegra30-usb-phy"; reg = <0x7d008000 0x4000>, <0x7d000000 0x4000>; + interrupts = ; phy_type = "utmi"; clocks = <&tegra_car TEGRA30_CLK_USB3>, <&tegra_car TEGRA30_CLK_PLL_U>, @@ -1243,6 +1250,8 @@ phy3: usb-phy@7d008000 { nvidia,xcvr-hsslew = <32>; nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; + nvidia,pmc = <&tegra_pmc>; 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[94.29.37.113]) by smtp.gmail.com with ESMTPSA id v7sm2407262ljn.14.2021.06.30.19.24.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 19:24:52 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Rob Herring , Sebastian Reichel , Peter Chen , Greg Kroah-Hartman , Felipe Balbi , David Heidelberg Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 12/12] ARM: tegra: nexus7: Enable USB OTG mode Date: Thu, 1 Jul 2021 05:24:05 +0300 Message-Id: <20210701022405.10817-13-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210701022405.10817-1-digetx@gmail.com> References: <20210701022405.10817-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Nexus 7 has OTG-cable microUSB port, enable OTG mode. USB peripheral devices now can be connected to Nexus 7 using OTG adapter, switching USB port into host mode. Signed-off-by: Dmitry Osipenko --- .../tegra30-asus-nexus7-grouper-common.dtsi | 25 +++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi index 8bc552b09672..c341e8971b2f 100644 --- a/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi @@ -941,9 +941,29 @@ power_supply: charger@6a { interrupts = ; summit,enable-charge-control = ; + summit,inok-polarity = ; summit,enable-usb-charging; monitored-battery = <&battery_cell>; + + usb_vbus: usb-vbus { + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-min-microamp = <750000>; + regulator-max-microamp = <750000>; + + /* + * SMB347 INOK input pin is connected to PMIC's + * ACOK output, which is fixed to ACTIVE_LOW as + * long as battery voltage is in a good range. + * + * Active INOK disables SMB347 output, so polarity + * needs to be toggled when we want to get the + * output. + */ + summit,needs-inok-toggle; + }; }; }; @@ -1017,12 +1037,13 @@ sdmmc4: mmc@78000600 { usb@7d000000 { compatible = "nvidia,tegra30-udc"; status = "okay"; - dr_mode = "peripheral"; + dr_mode = "otg"; + vbus-supply = <&usb_vbus>; }; usb-phy@7d000000 { status = "okay"; - dr_mode = "peripheral"; + dr_mode = "otg"; nvidia,hssync-start-delay = <0>; nvidia,xcvr-lsfslew = <2>; nvidia,xcvr-lsrslew = <2>;