From patchwork Sat Jun 26 06:18:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 467892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0B27C49EA7 for ; Sat, 26 Jun 2021 06:18:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9040961942 for ; Sat, 26 Jun 2021 06:18:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229929AbhFZGVO (ORCPT ); Sat, 26 Jun 2021 02:21:14 -0400 Received: from out28-123.mail.aliyun.com ([115.124.28.123]:38643 "EHLO out28-123.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229629AbhFZGVN (ORCPT ); Sat, 26 Jun 2021 02:21:13 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.2150873|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_regular_dialog|0.0085278-0.000800631-0.990672; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047192; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=15; RT=15; SR=0; TI=SMTPD_---.KYGAXY7_1624688322; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KYGAXY7_1624688322) by smtp.aliyun-inc.com(10.147.41.143); Sat, 26 Jun 2021 14:18:48 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v4 1/5] MIPS: X1830: Respect cell count of common properties. Date: Sat, 26 Jun 2021 14:18:37 +0800 Message-Id: <1624688321-69131-2-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil --- Notes: v1->v2: No change. v2->v3: No change. v3->v4: No change. arch/mips/boot/dts/ingenic/x1830.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index b21c930..59ca3a8 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -97,9 +97,9 @@ #clock-cells = <1>; - clocks = <&cgu X1830_CLK_RTCLK - &cgu X1830_CLK_EXCLK - &cgu X1830_CLK_PCLK>; + clocks = <&cgu X1830_CLK_RTCLK>, + <&cgu X1830_CLK_EXCLK>, + <&cgu X1830_CLK_PCLK>; clock-names = "rtc", "ext", "pclk"; interrupt-controller; @@ -274,8 +274,7 @@ pdma: dma-controller@13420000 { compatible = "ingenic,x1830-dma"; - reg = <0x13420000 0x400 - 0x13421000 0x40>; + reg = <0x13420000 0x400>, <0x13421000 0x40>; #dma-cells = <2>; interrupt-parent = <&intc>; From patchwork Sat Jun 26 06:18:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 467522 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D179EC49EAB for ; Sat, 26 Jun 2021 06:18:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B3B736191E for ; Sat, 26 Jun 2021 06:18:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229954AbhFZGVP (ORCPT ); Sat, 26 Jun 2021 02:21:15 -0400 Received: from out28-220.mail.aliyun.com ([115.124.28.220]:51869 "EHLO out28-220.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229907AbhFZGVO (ORCPT ); Sat, 26 Jun 2021 02:21:14 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.3751867|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0185906-0.00257291-0.978837; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047213; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=15; RT=15; SR=0; TI=SMTPD_---.KYGAXY7_1624688322; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KYGAXY7_1624688322) by smtp.aliyun-inc.com(10.147.41.143); Sat, 26 Jun 2021 14:18:49 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v4 2/5] dt-bindings: clock: Add documentation for MAC PHY control bindings. Date: Sat, 26 Jun 2021 14:18:38 +0800 Message-Id: <1624688321-69131-3-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update the CGU binding documentation, add mac-phy-ctrl as a pattern property. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil Acked-by: Stephen Boyd --- Notes: v3: New patch. v3->v4: No change. Documentation/devicetree/bindings/clock/ingenic,cgu.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml index c65b945..ee9b5fb 100644 --- a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml +++ b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml @@ -93,6 +93,8 @@ required: patternProperties: "^usb-phy@[a-f0-9]+$": allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ] + "^mac-phy-ctrl@[a-f0-9]+$": + allOf: [ $ref: "../net/ingenic,mac.yaml#" ] additionalProperties: false From patchwork Sat Jun 26 06:18:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 467891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9932C49EA6 for ; Sat, 26 Jun 2021 06:18:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D12726191E for ; Sat, 26 Jun 2021 06:18:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229629AbhFZGVR (ORCPT ); Sat, 26 Jun 2021 02:21:17 -0400 Received: from out28-148.mail.aliyun.com ([115.124.28.148]:52807 "EHLO out28-148.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229944AbhFZGVP (ORCPT ); Sat, 26 Jun 2021 02:21:15 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1503672|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_regular_dialog|0.0113689-0.000133307-0.988498; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047208; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=15; RT=15; SR=0; TI=SMTPD_---.KYGAXY7_1624688322; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KYGAXY7_1624688322) by smtp.aliyun-inc.com(10.147.41.143); Sat, 26 Jun 2021 14:18:50 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v4 3/5] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs. Date: Sat, 26 Jun 2021 14:18:39 +0800 Message-Id: <1624688321-69131-4-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil --- Notes: v1->v2: No change. v2->v3: No change. v3->v4: No change. arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++ arch/mips/boot/dts/ingenic/x1830.dtsi | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index aac9ded..dec7909 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -80,6 +80,11 @@ status = "disabled"; }; + + mac_phy_ctrl: mac-phy-ctrl@e8 { + compatible = "syscon"; + reg = <0xe8 0x4>; + }; }; ost: timer@12000000 { @@ -347,6 +352,8 @@ clocks = <&cgu X1000_CLK_MAC>; clock-names = "stmmaceth"; + mode-reg = <&mac_phy_ctrl>; + status = "disabled"; mdio: mdio { diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index 59ca3a8..215257f 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -73,6 +73,11 @@ status = "disabled"; }; + + mac_phy_ctrl: mac-phy-ctrl@e8 { + compatible = "syscon"; + reg = <0xe8 0x4>; + }; }; ost: timer@12000000 { @@ -336,6 +341,8 @@ clocks = <&cgu X1830_CLK_MAC>; clock-names = "stmmaceth"; + mode-reg = <&mac_phy_ctrl>; + status = "disabled"; mdio: mdio { From patchwork Sat Jun 26 06:18:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 467521 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CD5FC49EA7 for ; Sat, 26 Jun 2021 06:19:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 06E156191E for ; Sat, 26 Jun 2021 06:19:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230008AbhFZGVS (ORCPT ); Sat, 26 Jun 2021 02:21:18 -0400 Received: from out28-77.mail.aliyun.com ([115.124.28.77]:59176 "EHLO out28-77.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229975AbhFZGVR (ORCPT ); Sat, 26 Jun 2021 02:21:17 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1080104|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.142968-0.0102375-0.846795; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047211; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=15; RT=15; SR=0; TI=SMTPD_---.KYGAXY7_1624688322; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KYGAXY7_1624688322) by smtp.aliyun-inc.com(10.147.41.143); Sat, 26 Jun 2021 14:18:51 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v4 4/5] MIPS: CI20: Reduce clocksource to 750 kHz. Date: Sat, 26 Jun 2021 14:18:40 +0800 Message-Id: <1624688321-69131-5-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The original clock (3 MHz) is too fast for the clocksource, there will be a chance that the system may get stuck. Reported-by: Nikolaus Schaller Tested-by: Nikolaus Schaller # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil --- Notes: v4: New patch. arch/mips/boot/dts/ingenic/ci20.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 8877c62..3a4eaf1 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -525,10 +525,10 @@ &tcu { /* - * 750 kHz for the system timer and 3 MHz for the clocksource, + * 750 kHz for the system timer and clocksource, * use channel #0 for the system timer, #1 for the clocksource. */ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, <&tcu TCU_CLK_OST>; - assigned-clock-rates = <750000>, <3000000>, <3000000>; + assigned-clock-rates = <750000>, <750000>, <3000000>; }; From patchwork Sat Jun 26 06:18:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 467890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2C64C49EA6 for ; Sat, 26 Jun 2021 06:19:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BED9A6191E for ; Sat, 26 Jun 2021 06:19:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230048AbhFZGVV (ORCPT ); Sat, 26 Jun 2021 02:21:21 -0400 Received: from out28-97.mail.aliyun.com ([115.124.28.97]:45760 "EHLO out28-97.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229987AbhFZGVS (ORCPT ); Sat, 26 Jun 2021 02:21:18 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07512549|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.191992-0.0014541-0.806554; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047188; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=15; RT=15; SR=0; TI=SMTPD_---.KYGAXY7_1624688322; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KYGAXY7_1624688322) by smtp.aliyun-inc.com(10.147.41.143); Sat, 26 Jun 2021 14:18:53 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v4 5/5] MIPS: CI20: Add second percpu timer for SMP. Date: Sat, 26 Jun 2021 14:18:41 +0800 Message-Id: <1624688321-69131-6-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1.Add a new TCU channel as the percpu timer of core1, this is to prepare for the subsequent SMP support. The newly added channel will not adversely affect the current single-core state. 2.Adjust the position of TCU node to make it consistent with the order in jz4780.dtsi file. Tested-by: Nikolaus Schaller # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil --- Notes: v2: New patch. v2->v3: No change. v3->v4: Improve TCU related notes. arch/mips/boot/dts/ingenic/ci20.dts | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 3a4eaf1..61c153b 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -118,6 +118,20 @@ assigned-clock-rates = <48000000>; }; +&tcu { + /* + * 750 kHz for the system timers and clocksource, + * use channel #0 and #1 for the per cpu system timers, + * and use channel #2 for the clocksource. + * + * 3000 kHz for the OST timer to provide a higher + * precision clocksource. + */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, + <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>; + assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>; +}; + &mmc0 { status = "okay"; @@ -522,13 +536,3 @@ bias-disable; }; }; - -&tcu { - /* - * 750 kHz for the system timer and clocksource, - * use channel #0 for the system timer, #1 for the clocksource. - */ - assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, - <&tcu TCU_CLK_OST>; - assigned-clock-rates = <750000>, <750000>, <3000000>; -};