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[209.51.188.17]) by mx.google.com with ESMTPS id t15si720562jai.117.2021.06.20.15.14.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 20 Jun 2021 15:14:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="pcLYdX/e"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60534 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lv5iB-00076I-A5 for patch@linaro.org; Sun, 20 Jun 2021 18:14:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46200) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lv5eW-0001WK-5s for qemu-devel@nongnu.org; Sun, 20 Jun 2021 18:10:52 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]:46638) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lv5eT-0007qt-EM for qemu-devel@nongnu.org; Sun, 20 Jun 2021 18:10:51 -0400 Received: by mail-pj1-x1030.google.com with SMTP id o10-20020a17090aac0ab029016e92770073so9075837pjq.5 for ; Sun, 20 Jun 2021 15:10:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pGPuQ96khA6BN7ttYpkCEpnz8SyOo+2mAqDfZ6XIx6k=; b=pcLYdX/eEh+q/wLgYfmqmbah0sM0kSiMTXDGMKjG6OOFylRxpmPPukMNs9A36LoLJ0 5U28Y1U6/UUhp7wn02dRTPTFILdW0g58MLsZwiucwk8yS7As75Wssw+Pwrtpu18k5G9F WxkuzPEeEQXf+eZSxZy1HuLBNcvu9TGNy1AcHE07RaWHRCeyb7PloSOsScZWS5lCiN6V nsSHA943bNdz4qW7ibZZIvXONYI6LjjCmTAxIftfIvMcKi9Hy7RBaShMZWGxyFCpCsCm MXvTz0gWrXcw3Pead5JQWR7w9e4bJIBBpWNmyUxZ1wS7iOagiamHF1m1tJbA1o5dGmWK r96A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pGPuQ96khA6BN7ttYpkCEpnz8SyOo+2mAqDfZ6XIx6k=; b=FLz1q3HsWQQEpGLy914C+S5u6xHWBGTf6ursOLlVKk5dzcf9o1GViwxWtExGAfT8M2 CdDlof4qaYZ7QcDVJA2gRduEPCDv6Nq0SiUB29ELb+NDLh8ZxbgHr0RZo23r7OvrTe/7 ZVuzXlw+lU0CweYS8UndF1K43FjC0e/Ar64d8bcibHaaPdwatElFw6i+bO4488iWTycJ QbAEflMxOx5ELIMe2/+SEmLnosyvSCZTEsNAqc6UE8NdE5bWT/P0lRe+0VkoOG953C0O 22ZCuEQE19NFE9WFAgDst2+u9s8R5EkO0f9LG0XblKPrMslBErCXn/VwlmyNqvG8DJer 1hOA== X-Gm-Message-State: AOAM533HUtFsgHcCq+Cx7cxJvhTaSGJDtdRTCY/cLQ0kgIuWofOkmcnv IIcxxMfZa7nI2UJ0NVl6B6ZQ5WvNRc2CQA== X-Received: by 2002:a17:90b:3b92:: with SMTP id pc18mr23188832pjb.100.1624227048142; Sun, 20 Jun 2021 15:10:48 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id 135sm11122961pgf.20.2021.06.20.15.10.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Jun 2021 15:10:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 1/7] target/nios2: Replace DISAS_TB_JUMP with DISAS_NORETURN Date: Sun, 20 Jun 2021 15:10:40 -0700 Message-Id: <20210620221046.1526418-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210620221046.1526418-1-richard.henderson@linaro.org> References: <20210620221046.1526418-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, crwulff@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The only semantic of DISAS_TB_JUMP is that we've done goto_tb, which is the same as DISAS_NORETURN -- we've exited the tb. Signed-off-by: Richard Henderson --- target/nios2/translate.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 399f22d938..388fae93a2 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -37,7 +37,6 @@ /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ #define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */ -#define DISAS_TB_JUMP DISAS_TARGET_2 /* only pc was modified statically */ #define INSTRUCTION_FLG(func, flags) { (func), (flags) } #define INSTRUCTION(func) \ @@ -209,7 +208,7 @@ static void jmpi(DisasContext *dc, uint32_t code, uint32_t flags) { J_TYPE(instr, code); gen_goto_tb(dc, 0, (dc->pc & 0xF0000000) | (instr.imm26 << 2)); - dc->is_jmp = DISAS_TB_JUMP; + dc->is_jmp = DISAS_NORETURN; } static void call(DisasContext *dc, uint32_t code, uint32_t flags) @@ -269,7 +268,7 @@ static void br(DisasContext *dc, uint32_t code, uint32_t flags) I_TYPE(instr, code); gen_goto_tb(dc, 0, dc->pc + 4 + (instr.imm16.s & -4)); - dc->is_jmp = DISAS_TB_JUMP; + dc->is_jmp = DISAS_NORETURN; } static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) @@ -281,7 +280,7 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) gen_goto_tb(dc, 0, dc->pc + 4); gen_set_label(l1); gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16.s & -4)); - dc->is_jmp = DISAS_TB_JUMP; + dc->is_jmp = DISAS_NORETURN; } /* Comparison instructions */ @@ -883,7 +882,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) break; case DISAS_NORETURN: - case DISAS_TB_JUMP: /* nothing more to generate */ break; } From patchwork Sun Jun 20 22:10:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 464359 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp2003688jao; Sun, 20 Jun 2021 15:16:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzXFJ3G+R2iK8FavprpEyoVg1C/G/vSR4CAZkzTmCdZBi8vIPfks3nDG39g0rfd4CJdY+wy X-Received: by 2002:a67:e990:: with SMTP id b16mr5583049vso.10.1624227368434; Sun, 20 Jun 2021 15:16:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624227368; cv=none; d=google.com; s=arc-20160816; b=AE30nfJi70ursfAHizD3Fh3x5VxXANY+LhycfhkjN7qNutZV0cTS+HMQ2+pjjIaW9+ bAvsLxXntJo9e/vVjlppDNNNKBFiPe+5C3/Earj0G2zySAQz2Y0e23hOHHoHOISaj7vj 95MYiFqcVJe/A0JakI5sPURt7pYxAK2MV77LdPaCcqI4/i7WLITHTNvsFV3Dl7F7Pno/ uCY9AvjuN9lUiC53EJAnsIqzLFamB0ypH1SB1kVJNJo2ZflmCFAHG53NjjC416YaHgxR ZuzCPk2aEbueQ3dcffmsBFEfJquXNR1b3jJ2nBOqFmFTPPogliOg7M1jCE5pIXwux0OR g8Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=vOSYcR5bhsrCjJ6PbKl43sOwPlBS+THlM2yD0LGuQ1A=; b=KWJWIWCtGs+QrfFr7/04PpoaQmWpxgqzB/V6TZtFNTlW+z6yqemqI8WdaCqS31xxmU DkzD7r0SNlttuiu5mQHMBlkPRGvrliqKHXgMKTjTgItKBHv8TWkNklIoGFxbkFkdcIy1 J0sNh2hP46XnGc79eOy0OcVqQU/VCJYtnKnDnLyh65Utkm6NS7BR6fjUEzeTsPFSPaFQ F+g0SYsokDhaHZQAvlq1kOSEzp8bo6ilGSpaDN5XCcCWOu3ZWzMLYt4wHjqRl/SwOp91 QxtHncM+x3kuh4LoDMMtlwq2Nsj6MSZyFr84Amm/F1hSZ9bm/h97lv23ivTrcOutAELT z+Tg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ksDyy6L1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- target/nios2/translate.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 388fae93a2..39538e1870 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -97,7 +97,6 @@ } typedef struct DisasContext { - TCGv_ptr cpu_env; TCGv *cpu_R; TCGv_i32 zero; int is_jmp; @@ -147,7 +146,7 @@ static void t_gen_helper_raise_exception(DisasContext *dc, TCGv_i32 tmp = tcg_const_i32(index); tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc); - gen_helper_raise_exception(dc->cpu_env, tmp); + gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); dc->is_jmp = DISAS_NORETURN; } @@ -474,7 +473,7 @@ static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_mov_tl(dc->cpu_R[instr.c], dc->cpu_R[instr.imm5 + CR_BASE]); #ifdef DEBUG_MMU TCGv_i32 tmp = tcg_const_i32(instr.imm5 + CR_BASE); - gen_helper_mmu_read_debug(dc->cpu_R[instr.c], dc->cpu_env, tmp); + gen_helper_mmu_read_debug(dc->cpu_R[instr.c], cpu_env, tmp); tcg_temp_free_i32(tmp); #endif } @@ -504,7 +503,7 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags) { #if !defined(CONFIG_USER_ONLY) TCGv_i32 tmp = tcg_const_i32(instr.imm5 + CR_BASE); - gen_helper_mmu_write(dc->cpu_env, tmp, load_gpr(dc, instr.a)); + gen_helper_mmu_write(cpu_env, tmp, load_gpr(dc, instr.a)); tcg_temp_free_i32(tmp); #endif break; @@ -521,7 +520,7 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags) if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { gen_io_start(); } - gen_helper_check_interrupts(dc->cpu_env); + gen_helper_check_interrupts(cpu_env); dc->is_jmp = DISAS_UPDATE; } #endif @@ -817,7 +816,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) int num_insns; /* Initialize DC */ - dc->cpu_env = cpu_env; dc->cpu_R = cpu_R; dc->is_jmp = DISAS_NEXT; dc->pc = tb->pc; From patchwork Sun Jun 20 22:10:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 464353 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp2001013jao; Sun, 20 Jun 2021 15:11:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJydChrnfJgUzRpBqnv+/xEO/l1gs/3n7NlKwUlxr+FiQYUXf/ahp5JYh9lMEerFcpkQV2GJ X-Received: by 2002:a05:6102:1148:: with SMTP id j8mr15051094vsg.21.1624227067458; Sun, 20 Jun 2021 15:11:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624227067; cv=none; d=google.com; s=arc-20160816; b=lonpeGYjYfUhsKrEgPnQq2DHtdICInvLxc8MuGQSBcnnCr4rmYuC3sQnUEImHSYbRZ CJA9VkWQAXKAH03Ul2oBHWEEfRB8uKuvIRDQix1ESoVM9Ez/WQP0VB9Zcc4Otj1urmTZ eWNpQvRKAM5tqwnpbJ0sAglMDTYW9Pypz4F8qEG5M/F4oKvnumC4DFQuPzK+Ub7QHlgA S0/Qp2kzu2gkvQXnVd05+vUmYFt5xOkOzKTjN2Yq98eZPYV/9pdrXAJX4DZDU1rZCVYV iaPgAcFi/ssLCkYR1YwNhAED0ZpJQVGgoqOTIykUv2OKtBng6U4opLyIzp5B0vuKawDj nOvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=iHT9l/kJSWfvrH1GZXwE0W4sJmdZTH+C0ob8jvO252s=; b=EeK4cZmsabIABx01NS9E1aCBwoQ2fJORlBVSaTKzXAkvMtyYkA6Ib0/9KTZzM1lnCf j1klPMsM1UhzKfqeT4bGg9/GJAcrcrtfAyPq5yVnsVeYBJuOOWUEmzD6W9ISwYwY6tXj 9NSzYi4vean5gaN8uh/67mmjl1sgCJ8/N//pt9zzS9gv+r9fKo0zJx2aN0vIYUakNIyT KlShWZS5GaHpVePrzJ17/16NQY42pYv4BnAFFsQSwReK/G2ywKIe28y+YGrJgE5+dxhb bJStpgKHm06LxaWZfCrbqO/FmPfJU+w1aXKjcWB2FVxpDRrkOmrI+4NqIBIXf9gNpkXp barw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="UI11c/jt"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- target/nios2/translate.c | 73 +++++++++++++++++++--------------------- 1 file changed, 34 insertions(+), 39 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 39538e1870..6bdd388bd8 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -97,7 +97,6 @@ } typedef struct DisasContext { - TCGv *cpu_R; TCGv_i32 zero; int is_jmp; target_ulong pc; @@ -106,6 +105,8 @@ typedef struct DisasContext { bool singlestep_enabled; } DisasContext; +static TCGv cpu_R[NUM_CORE_REGS]; + typedef struct Nios2Instruction { void (*handler)(DisasContext *dc, uint32_t code, uint32_t flags); uint32_t flags; @@ -134,7 +135,7 @@ static TCGv load_zero(DisasContext *dc) static TCGv load_gpr(DisasContext *dc, uint8_t reg) { if (likely(reg != R_ZERO)) { - return dc->cpu_R[reg]; + return cpu_R[reg]; } else { return load_zero(dc); } @@ -145,7 +146,7 @@ static void t_gen_helper_raise_exception(DisasContext *dc, { TCGv_i32 tmp = tcg_const_i32(index); - tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc); + tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); dc->is_jmp = DISAS_NORETURN; @@ -170,10 +171,10 @@ static void gen_goto_tb(DisasContext *dc, int n, uint32_t dest) if (use_goto_tb(dc, dest)) { tcg_gen_goto_tb(n); - tcg_gen_movi_tl(dc->cpu_R[R_PC], dest); + tcg_gen_movi_tl(cpu_R[R_PC], dest); tcg_gen_exit_tb(tb, n); } else { - tcg_gen_movi_tl(dc->cpu_R[R_PC], dest); + tcg_gen_movi_tl(cpu_R[R_PC], dest); tcg_gen_exit_tb(NULL, 0); } } @@ -212,7 +213,7 @@ static void jmpi(DisasContext *dc, uint32_t code, uint32_t flags) static void call(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_movi_tl(dc->cpu_R[R_RA], dc->pc + 4); + tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4); jmpi(dc, code, flags); } @@ -234,7 +235,7 @@ static void gen_ldx(DisasContext *dc, uint32_t code, uint32_t flags) * the Nios2 CPU. */ if (likely(instr.b != R_ZERO)) { - data = dc->cpu_R[instr.b]; + data = cpu_R[instr.b]; } else { data = tcg_temp_new(); } @@ -275,7 +276,7 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) I_TYPE(instr, code); TCGLabel *l1 = gen_new_label(); - tcg_gen_brcond_tl(flags, dc->cpu_R[instr.a], dc->cpu_R[instr.b], l1); + tcg_gen_brcond_tl(flags, cpu_R[instr.a], cpu_R[instr.b], l1); gen_goto_tb(dc, 0, dc->pc + 4); gen_set_label(l1); gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16.s & -4)); @@ -287,8 +288,7 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ { \ I_TYPE(instr, (code)); \ - tcg_gen_setcondi_tl(flags, (dc)->cpu_R[instr.b], (dc)->cpu_R[instr.a], \ - (op3)); \ + tcg_gen_setcondi_tl(flags, cpu_R[instr.b], cpu_R[instr.a], (op3)); \ } gen_i_cmpxx(gen_cmpxxsi, instr.imm16.s) @@ -302,10 +302,9 @@ static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ if (unlikely(instr.b == R_ZERO)) { /* Store to R_ZERO is ignored */ \ return; \ } else if (instr.a == R_ZERO) { /* MOVxI optimizations */ \ - tcg_gen_movi_tl(dc->cpu_R[instr.b], (resimm) ? (op3) : 0); \ + tcg_gen_movi_tl(cpu_R[instr.b], (resimm) ? (op3) : 0); \ } else { \ - tcg_gen_##insn##_tl((dc)->cpu_R[instr.b], (dc)->cpu_R[instr.a], \ - (op3)); \ + tcg_gen_##insn##_tl(cpu_R[instr.b], cpu_R[instr.a], (op3)); \ } \ } @@ -400,8 +399,8 @@ static const Nios2Instruction i_type_instructions[] = { */ static void eret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(dc->cpu_R[CR_STATUS], dc->cpu_R[CR_ESTATUS]); - tcg_gen_mov_tl(dc->cpu_R[R_PC], dc->cpu_R[R_EA]); + tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); + tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_EA]); dc->is_jmp = DISAS_JUMP; } @@ -409,7 +408,7 @@ static void eret(DisasContext *dc, uint32_t code, uint32_t flags) /* PC <- ra */ static void ret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(dc->cpu_R[R_PC], dc->cpu_R[R_RA]); + tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_RA]); dc->is_jmp = DISAS_JUMP; } @@ -417,7 +416,7 @@ static void ret(DisasContext *dc, uint32_t code, uint32_t flags) /* PC <- ba */ static void bret(DisasContext *dc, uint32_t code, uint32_t flags) { - tcg_gen_mov_tl(dc->cpu_R[R_PC], dc->cpu_R[R_BA]); + tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_BA]); dc->is_jmp = DISAS_JUMP; } @@ -427,7 +426,7 @@ static void jmp(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, code); - tcg_gen_mov_tl(dc->cpu_R[R_PC], load_gpr(dc, instr.a)); + tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a)); dc->is_jmp = DISAS_JUMP; } @@ -438,7 +437,7 @@ static void nextpc(DisasContext *dc, uint32_t code, uint32_t flags) R_TYPE(instr, code); if (likely(instr.c != R_ZERO)) { - tcg_gen_movi_tl(dc->cpu_R[instr.c], dc->pc + 4); + tcg_gen_movi_tl(cpu_R[instr.c], dc->pc + 4); } } @@ -450,8 +449,8 @@ static void callr(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, code); - tcg_gen_mov_tl(dc->cpu_R[R_PC], load_gpr(dc, instr.a)); - tcg_gen_movi_tl(dc->cpu_R[R_RA], dc->pc + 4); + tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a)); + tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4); dc->is_jmp = DISAS_JUMP; } @@ -470,10 +469,10 @@ static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags) { #if !defined(CONFIG_USER_ONLY) if (likely(instr.c != R_ZERO)) { - tcg_gen_mov_tl(dc->cpu_R[instr.c], dc->cpu_R[instr.imm5 + CR_BASE]); + tcg_gen_mov_tl(cpu_R[instr.c], cpu_R[instr.imm5 + CR_BASE]); #ifdef DEBUG_MMU TCGv_i32 tmp = tcg_const_i32(instr.imm5 + CR_BASE); - gen_helper_mmu_read_debug(dc->cpu_R[instr.c], cpu_env, tmp); + gen_helper_mmu_read_debug(cpu_R[instr.c], cpu_env, tmp); tcg_temp_free_i32(tmp); #endif } @@ -483,7 +482,7 @@ static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags) default: if (likely(instr.c != R_ZERO)) { - tcg_gen_mov_tl(dc->cpu_R[instr.c], dc->cpu_R[instr.imm5 + CR_BASE]); + tcg_gen_mov_tl(cpu_R[instr.c], cpu_R[instr.imm5 + CR_BASE]); } break; } @@ -510,7 +509,7 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags) } default: - tcg_gen_mov_tl(dc->cpu_R[instr.imm5 + CR_BASE], load_gpr(dc, instr.a)); + tcg_gen_mov_tl(cpu_R[instr.imm5 + CR_BASE], load_gpr(dc, instr.a)); break; } @@ -531,8 +530,8 @@ static void gen_cmpxx(DisasContext *dc, uint32_t code, uint32_t flags) { R_TYPE(instr, code); if (likely(instr.c != R_ZERO)) { - tcg_gen_setcond_tl(flags, dc->cpu_R[instr.c], dc->cpu_R[instr.a], - dc->cpu_R[instr.b]); + tcg_gen_setcond_tl(flags, cpu_R[instr.c], cpu_R[instr.a], + cpu_R[instr.b]); } } @@ -542,8 +541,7 @@ static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ { \ R_TYPE(instr, (code)); \ if (likely(instr.c != R_ZERO)) { \ - tcg_gen_##insn((dc)->cpu_R[instr.c], load_gpr((dc), instr.a), \ - (op3)); \ + tcg_gen_##insn(cpu_R[instr.c], load_gpr((dc), instr.a), (op3)); \ } \ } @@ -567,8 +565,8 @@ static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ R_TYPE(instr, (code)); \ if (likely(instr.c != R_ZERO)) { \ TCGv t0 = tcg_temp_new(); \ - tcg_gen_##insn(t0, dc->cpu_R[instr.c], \ - load_gpr(dc, instr.a), load_gpr(dc, instr.b)); \ + tcg_gen_##insn(t0, cpu_R[instr.c], \ + load_gpr(dc, instr.a), load_gpr(dc, instr.b)); \ tcg_temp_free(t0); \ } \ } @@ -584,7 +582,7 @@ static void (fname)(DisasContext *dc, uint32_t code, uint32_t flags) \ if (likely(instr.c != R_ZERO)) { \ TCGv t0 = tcg_temp_new(); \ tcg_gen_andi_tl(t0, load_gpr((dc), instr.b), 31); \ - tcg_gen_##insn((dc)->cpu_R[instr.c], load_gpr((dc), instr.a), t0); \ + tcg_gen_##insn(cpu_R[instr.c], load_gpr((dc), instr.a), t0); \ tcg_temp_free(t0); \ } \ } @@ -618,8 +616,8 @@ static void divs(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_or_tl(t2, t2, t3); tcg_gen_movi_tl(t3, 0); tcg_gen_movcond_tl(TCG_COND_NE, t1, t2, t3, t2, t1); - tcg_gen_div_tl(dc->cpu_R[instr.c], t0, t1); - tcg_gen_ext32s_tl(dc->cpu_R[instr.c], dc->cpu_R[instr.c]); + tcg_gen_div_tl(cpu_R[instr.c], t0, t1); + tcg_gen_ext32s_tl(cpu_R[instr.c], cpu_R[instr.c]); tcg_temp_free(t3); tcg_temp_free(t2); @@ -644,8 +642,8 @@ static void divu(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_ext32u_tl(t0, load_gpr(dc, instr.a)); tcg_gen_ext32u_tl(t1, load_gpr(dc, instr.b)); tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); - tcg_gen_divu_tl(dc->cpu_R[instr.c], t0, t1); - tcg_gen_ext32s_tl(dc->cpu_R[instr.c], dc->cpu_R[instr.c]); + tcg_gen_divu_tl(cpu_R[instr.c], t0, t1); + tcg_gen_ext32s_tl(cpu_R[instr.c], cpu_R[instr.c]); tcg_temp_free(t3); tcg_temp_free(t2); @@ -794,8 +792,6 @@ static const char * const regnames[] = { "rpc" }; -static TCGv cpu_R[NUM_CORE_REGS]; - #include "exec/gen-icount.h" static void gen_exception(DisasContext *dc, uint32_t excp) @@ -816,7 +812,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) int num_insns; /* Initialize DC */ - dc->cpu_R = cpu_R; dc->is_jmp = DISAS_NEXT; dc->pc = tb->pc; dc->tb = tb; From patchwork Sun Jun 20 22:10:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 464355 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp2001344jao; Sun, 20 Jun 2021 15:11:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwRH9TuafPFr1vBb5r8auJGcvQXbmJbugwXIrjCILrkkcEBFcIgdTf2Rdrc2Ee257JGOd/Q X-Received: by 2002:a67:cb0a:: with SMTP id b10mr15768814vsl.9.1624227106165; Sun, 20 Jun 2021 15:11:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624227106; cv=none; d=google.com; s=arc-20160816; b=Ne0F/ILTA27TEqwzYASQi92PSxK9EtRVFfeyzTYCYSwhbJJpMMqV5EFygH/nZUj3Tm zcs4si9lM0uAAqBgRD5RsR9ZwbaZgdb/JaNQab1nwlTdMM/FRPQGjSia4bbKwwJv/EgH PW48/vwRh/sFfcy4gAdlKSqU1pwUcmmKO63BwNU8IJ29OnByMb3nCk/xG3aZaxfZAX8O hwBvNeHSSesq62Vk7/YS7BDaMqvnVD0LXfSZOMrDyc7DLM9XnYQPDL1wyhRhBc5RUuF6 O8YvcSv2gZj6yte9Lf3f0TmXW/FwODqWJnwyT0vGcatkZKOuA8oOYhNSEcRkfNnDb3d7 0W4w== ARC-Message-Signature: i=1; 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Signed-off-by: Richard Henderson --- target/nios2/translate.c | 51 +++++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 24 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 6bdd388bd8..31653b7912 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -97,12 +97,10 @@ } typedef struct DisasContext { + DisasContextBase base; TCGv_i32 zero; - int is_jmp; target_ulong pc; - TranslationBlock *tb; int mem_idx; - bool singlestep_enabled; } DisasContext; static TCGv cpu_R[NUM_CORE_REGS]; @@ -149,17 +147,17 @@ static void t_gen_helper_raise_exception(DisasContext *dc, tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); - dc->is_jmp = DISAS_NORETURN; + dc->base.is_jmp = DISAS_NORETURN; } static bool use_goto_tb(DisasContext *dc, uint32_t dest) { - if (unlikely(dc->singlestep_enabled)) { + if (unlikely(dc->base.singlestep_enabled)) { return false; } #ifndef CONFIG_USER_ONLY - return (dc->tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK); + return (dc->base.pc_first & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK); #else return true; #endif @@ -167,7 +165,7 @@ static bool use_goto_tb(DisasContext *dc, uint32_t dest) static void gen_goto_tb(DisasContext *dc, int n, uint32_t dest) { - TranslationBlock *tb = dc->tb; + const TranslationBlock *tb = dc->base.tb; if (use_goto_tb(dc, dest)) { tcg_gen_goto_tb(n); @@ -186,7 +184,7 @@ static void gen_excp(DisasContext *dc, uint32_t code, uint32_t flags) static void gen_check_supervisor(DisasContext *dc) { - if (dc->tb->flags & CR_STATUS_U) { + if (dc->base.tb->flags & CR_STATUS_U) { /* CPU in user mode, privileged instruction called, stop. */ t_gen_helper_raise_exception(dc, EXCP_SUPERI); } @@ -208,7 +206,7 @@ static void jmpi(DisasContext *dc, uint32_t code, uint32_t flags) { J_TYPE(instr, code); gen_goto_tb(dc, 0, (dc->pc & 0xF0000000) | (instr.imm26 << 2)); - dc->is_jmp = DISAS_NORETURN; + dc->base.is_jmp = DISAS_NORETURN; } static void call(DisasContext *dc, uint32_t code, uint32_t flags) @@ -268,7 +266,7 @@ static void br(DisasContext *dc, uint32_t code, uint32_t flags) I_TYPE(instr, code); gen_goto_tb(dc, 0, dc->pc + 4 + (instr.imm16.s & -4)); - dc->is_jmp = DISAS_NORETURN; + dc->base.is_jmp = DISAS_NORETURN; } static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) @@ -280,7 +278,7 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags) gen_goto_tb(dc, 0, dc->pc + 4); gen_set_label(l1); gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16.s & -4)); - dc->is_jmp = DISAS_NORETURN; + dc->base.is_jmp = DISAS_NORETURN; } /* Comparison instructions */ @@ -402,7 +400,7 @@ static void eret(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_EA]); - dc->is_jmp = DISAS_JUMP; + dc->base.is_jmp = DISAS_JUMP; } /* PC <- ra */ @@ -410,7 +408,7 @@ static void ret(DisasContext *dc, uint32_t code, uint32_t flags) { tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_RA]); - dc->is_jmp = DISAS_JUMP; + dc->base.is_jmp = DISAS_JUMP; } /* PC <- ba */ @@ -418,7 +416,7 @@ static void bret(DisasContext *dc, uint32_t code, uint32_t flags) { tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_BA]); - dc->is_jmp = DISAS_JUMP; + dc->base.is_jmp = DISAS_JUMP; } /* PC <- rA */ @@ -428,7 +426,7 @@ static void jmp(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a)); - dc->is_jmp = DISAS_JUMP; + dc->base.is_jmp = DISAS_JUMP; } /* rC <- PC + 4 */ @@ -452,7 +450,7 @@ static void callr(DisasContext *dc, uint32_t code, uint32_t flags) tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a)); tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4); - dc->is_jmp = DISAS_JUMP; + dc->base.is_jmp = DISAS_JUMP; } /* rC <- ctlN */ @@ -516,11 +514,11 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags) /* If interrupts were enabled using WRCTL, trigger them. */ #if !defined(CONFIG_USER_ONLY) if ((instr.imm5 + CR_BASE) == CR_STATUS) { - if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { + if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_check_interrupts(cpu_env); - dc->is_jmp = DISAS_UPDATE; + dc->base.is_jmp = DISAS_UPDATE; } #endif } @@ -801,7 +799,7 @@ static void gen_exception(DisasContext *dc, uint32_t excp) tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); - dc->is_jmp = DISAS_NORETURN; + dc->base.is_jmp = DISAS_NORETURN; } /* generate intermediate code for basic block 'tb'. */ @@ -812,11 +810,16 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) int num_insns; /* Initialize DC */ - dc->is_jmp = DISAS_NEXT; + + dc->base.tb = tb; + dc->base.singlestep_enabled = cs->singlestep_enabled; + dc->base.is_jmp = DISAS_NEXT; + dc->base.pc_first = tb->pc; + dc->base.pc_next = tb->pc; + + dc->zero = NULL; dc->pc = tb->pc; - dc->tb = tb; dc->mem_idx = cpu_mmu_index(env, false); - dc->singlestep_enabled = cs->singlestep_enabled; /* Set up instruction counts */ num_insns = 0; @@ -855,12 +858,12 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) * Otherwise the subsequent code could get translated several times. * Also stop translation when a page boundary is reached. This * ensures prefetch aborts occur at the right place. */ - } while (!dc->is_jmp && + } while (!dc->base.is_jmp && !tcg_op_buf_full() && num_insns < max_insns); /* Indicate where the next block should start */ - switch (dc->is_jmp) { + switch (dc->base.is_jmp) { case DISAS_NEXT: case DISAS_UPDATE: /* Save the current PC back into the CPU register */ From patchwork Sun Jun 20 22:10:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 464360 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp2004549jao; Sun, 20 Jun 2021 15:17:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzeEQlew7+c02GUFAoho7c876UGn5KZBtqeVasovIxgBWIySmfs6VW05ucWbTl9o64KQeXo X-Received: by 2002:ae9:e407:: with SMTP id q7mr20485794qkc.410.1624227467029; Sun, 20 Jun 2021 15:17:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624227467; cv=none; d=google.com; s=arc-20160816; b=zdm+9idwehab8gTc+Zylr3e5n7zuI+LvJQXr1YajrTRhAEtumQh2Jk3MBtUq/nDI0/ AFobJcGhLOjqiGXRig0ra5mrGizaN1CNL+jvRHk3J2zdfrDxxw6tfJBQ6McA+Y5uUNfF x8qIA7U7zPQSS+CHSnRc2kDgu1J4AllMU7fl5/DimSJIyxXmWMRNBU3cZgL2YvvoXdcP xGGxVCOI4PUTyiTsouyfiiDxgg3HDZqtg+nkG70ppUIBZ8YVOCdlSUXF+5fWyI1a89jd gukUPX1+Jg91/69OfW43ev4ME0vvVdSerAEplfSQMUFiDO5RKiuTkDkFdQUgCehWQYHo JIVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=aWsoskdLoq0f3x6JrKNF8jFSujiQhbxxitbbJIW/v2k=; b=pJvn3M4Iz3ZcX1sMYhJdyCQgo8IznrUrum12YOEUhN3RKq29EliPzjK1E5ZI2YxXJ6 6hh7Pwuh1+az1+PTmxgaM8fq/sVCLQ3GlZTuLnUrIVAeUJWcwJ2Qr8qfVMN633v22fZo ZmD2bbm2jfp49pJiUvq+/Hwh7lEup3lBkPy8mK4zSYNfN1N7UcSLynHb05XnpTKT3Y2j MM29Qqc7UvjYFPY1UD3tOTWhJQTzEi1Zaa0u0sfSChrujXJy4e/QRG9+ZAnAgI4GTqyA OgJtqXPooyDEbceqKjzejmrt7n3Esflv6ERW6Tj1w1I+66g4oVqW8ekdi/STz8F+Ircl rfyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=WtUoWDOJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Sun, 20 Jun 2021 15:10:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 5/7] target/nios2: Convert to TranslatorOps Date: Sun, 20 Jun 2021 15:10:44 -0700 Message-Id: <20210620221046.1526418-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210620221046.1526418-1-richard.henderson@linaro.org> References: <20210620221046.1526418-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, crwulff@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/nios2/translate.c | 130 ++++++++++++++++++++------------------- 1 file changed, 67 insertions(+), 63 deletions(-) -- 2.25.1 diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 31653b7912..06705c894d 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -803,75 +803,72 @@ static void gen_exception(DisasContext *dc, uint32_t excp) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) +static void nios2_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { + DisasContext *dc = container_of(dcbase, DisasContext, base); CPUNios2State *env = cs->env_ptr; - DisasContext dc1, *dc = &dc1; - int num_insns; - - /* Initialize DC */ - - dc->base.tb = tb; - dc->base.singlestep_enabled = cs->singlestep_enabled; - dc->base.is_jmp = DISAS_NEXT; - dc->base.pc_first = tb->pc; - dc->base.pc_next = tb->pc; + target_ulong pc = dc->base.pc_first; + int page_insns; dc->zero = NULL; - dc->pc = tb->pc; + dc->pc = pc; dc->mem_idx = cpu_mmu_index(env, false); - /* Set up instruction counts */ - num_insns = 0; - if (max_insns > 1) { - int page_insns = (TARGET_PAGE_SIZE - (tb->pc & ~TARGET_PAGE_MASK)) / 4; - if (max_insns > page_insns) { - max_insns = page_insns; - } - } + /* Bound the number of insns to execute to those left on the page. */ + page_insns = -(pc | TARGET_PAGE_MASK) / 4; + dc->base.max_insns = MIN(page_insns, dc->base.max_insns); +} - gen_tb_start(tb); - do { - tcg_gen_insn_start(dc->pc); - num_insns++; +static void nios2_tr_tb_start(DisasContextBase *db, CPUState *cs) +{ +} - if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { - gen_exception(dc, EXCP_DEBUG); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->pc += 4; - break; - } +static void nios2_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) +{ + tcg_gen_insn_start(dcbase->pc_next); +} - if (num_insns == max_insns && (tb_cflags(tb) & CF_LAST_IO)) { - gen_io_start(); - } +static bool nios2_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, + const CPUBreakpoint *bp) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); - /* Decode an instruction */ - handle_instruction(dc, env); + gen_exception(dc, EXCP_DEBUG); + /* + * The address covered by the breakpoint must be included in + * [tb->pc, tb->pc + tb->size) in order to for it to be + * properly cleared -- thus we increment the PC here so that + * the logic setting tb->size below does the right thing. + */ + dc->pc += 4; + return true; +} - dc->pc += 4; +static void nios2_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + CPUNios2State *env = cs->env_ptr; - /* Translation stops when a conditional branch is encountered. - * Otherwise the subsequent code could get translated several times. - * Also stop translation when a page boundary is reached. This - * ensures prefetch aborts occur at the right place. */ - } while (!dc->base.is_jmp && - !tcg_op_buf_full() && - num_insns < max_insns); + /* Decode an instruction */ + handle_instruction(dc, env); + + dc->base.pc_next += 4; + dc->pc += 4; +} + +static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); /* Indicate where the next block should start */ switch (dc->base.is_jmp) { - case DISAS_NEXT: + case DISAS_TOO_MANY: case DISAS_UPDATE: /* Save the current PC back into the CPU register */ tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); tcg_gen_exit_tb(NULL, 0); break; - default: case DISAS_JUMP: /* The jump will already have updated the PC register */ tcg_gen_exit_tb(NULL, 0); @@ -880,25 +877,32 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) case DISAS_NORETURN: /* nothing more to generate */ break; + + default: + g_assert_not_reached(); } +} - /* End off the block */ - gen_tb_end(tb, num_insns); +static void nios2_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu) +{ + qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first)); + log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size); +} - /* Mark instruction starts for the final generated instruction */ - tb->size = dc->pc - tb->pc; - tb->icount = num_insns; +static const TranslatorOps nios2_tr_ops = { + .init_disas_context = nios2_tr_init_disas_context, + .tb_start = nios2_tr_tb_start, + .insn_start = nios2_tr_insn_start, + .breakpoint_check = nios2_tr_breakpoint_check, + .translate_insn = nios2_tr_translate_insn, + .tb_stop = nios2_tr_tb_stop, + .disas_log = nios2_tr_disas_log, +}; -#ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) - && qemu_log_in_addr_range(tb->pc)) { - FILE *logfile = qemu_log_lock(); - qemu_log("IN: %s\n", lookup_symbol(tb->pc)); - log_target_disas(cs, tb->pc, dc->pc - tb->pc); - qemu_log("\n"); - qemu_log_unlock(logfile); - } -#endif +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) +{ + DisasContext dc; + translator_loop(&nios2_tr_ops, &dc.base, cs, tb, max_insns); } void nios2_cpu_dump_state(CPUState *cs, FILE *f, int flags) From patchwork Sun Jun 20 22:10:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 464358 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp2002904jao; Sun, 20 Jun 2021 15:14:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJze7+jA3dj+wB2ct2GRisTy8ULbOujtSnDkYZZtkDuxpLkiaVtMnvUHnESvRyyyqyJG2sDe X-Received: by 2002:a92:dc48:: with SMTP id x8mr2471361ilq.213.1624227282447; Sun, 20 Jun 2021 15:14:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624227282; cv=none; d=google.com; s=arc-20160816; b=B5nGuz8WgX4GI4tbla/8f8lEekD4yfUsHVGPoKagpqX7/ozdZLNzL1Q2EmR0+KC4i0 1o4RKjoZRTxvbwOaERG4S+whaU+RWef13CfUuF3gz9cwShLNZkK2FllAwGCbLdOuc62z WK24VelTrfTYAKl8K0sAwDdHjePp3GLDEuzWBVrwOPTIrT2DMbArqgnqKx9ta2bRU1r8 7HD9Zh98CX345H5MgoL/MCwsVSEbHVcEV/y3/Meb+TL6c4xdSCUNON6/fc/1+OcJtn86 1HwwORqmOpzXEY9ab36rsrJxlha/W7y90szq7jb+WvmINJ4oN8YVheYvCLRaWbNgiRcq OJhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=yw4nXpsUXP/IcY+QkLFOYlqRS4uebEjEIFpOqCI8OKc=; b=O/JmV7uSWCM9jzDN/iQhm89ou380NIz+6wX+U7hO3F1Rwa6lpa5DMWNV8GTiFA3rxv 8Q6eSHLpaBSWunbxNAWzjTYakPtB6tpAff3PgSrfZ29grjovfPLJZ7W7ZooFJkwaie8p hUlAN0xqfh3u2UcW+iR+UuiQicNB46jqrEQVQsHwuZCijhFjgj4lKiTin1IuP3CZkQV3 13Tm3lHWbDrzxBow6C0BHzOMSgQeBdDIszAZGrq+Uu7Mt0YRnW7vBtiJ6VToL4QCI6oM hed1tjM7HqrHmnQGjiPV233Egj1PG+HPMTeaCuIMPfix/0mJxpyu5yizG2p0WfcNTUuT /bVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=gkZzBwRE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s11si5518402ioo.1.2021.06.20.15.14.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 20 Jun 2021 15:14:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=gkZzBwRE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60950 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lv5iD-0007MY-TV for patch@linaro.org; Sun, 20 Jun 2021 18:14:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46258) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lv5eY-0001co-Uk for qemu-devel@nongnu.org; Sun, 20 Jun 2021 18:10:54 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]:40708) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lv5eW-0007sw-9E for qemu-devel@nongnu.org; Sun, 20 Jun 2021 18:10:54 -0400 Received: by mail-pg1-x52e.google.com with SMTP id m2so12557001pgk.7 for ; Sun, 20 Jun 2021 15:10:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yw4nXpsUXP/IcY+QkLFOYlqRS4uebEjEIFpOqCI8OKc=; b=gkZzBwREd7t0VrFYbEpVxo0bfctP2rWz6YAzFS7EMwEQqrQvdGW81MXcqG9t9bV9Dg tnObhQWonDsKXk+ioNcaGDT8bJGQgneiXRJOkXynqix07ozOcM+CcEYEf3w4v00kyA/i dsNj2yZEqoLXPyVK4kUlygZd/p1xem+KS9es1ADJMfr8BYjIlH9vKWfKifvir3PTCnbs JZLTNawv2c23UCiX2uYv2a0TyDtsNmS7vemOP+IyMpXdUO/fEg9qShh0G5pwqKCERNib JmSa41CSpjRzI9m4cti3kalWYNCvuAngWGx/giH3/xtx6B261jTI7G7GeSfo/cERZ1Xq 1E5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yw4nXpsUXP/IcY+QkLFOYlqRS4uebEjEIFpOqCI8OKc=; b=qPH8+qlT+WXApE24E+zIhGEhirce2hh9jt22UVDAY5MFr/Jgy5DBUrvo3qMfMOMbjQ /JUEdQTDr+imzDhjxour1+kbxZaLrNectA0ZrP3l4g4FT0g9w4l8fKWFnW0c3Hx4W4gV CxpH1GetwN/jjiO89d+WmJU1vhv/2gR76BX9AQaVjCtaG2B0oXkkaTqoegZemUHZ1KIJ BzutbK4WIq0W2I5a1d0Xy8t3mXjEAWxMtQWeFMtxND531NPVfjzDFmAYNIcHjG4OT7Bt GY5/W6MmrDx4XHGbZqFJ195f0dP99IFiq987Gz8yXfUVAaFbif+H/M03n4s3Dc+GDDmk lcCw== X-Gm-Message-State: AOAM5313n6uWYK9MNy5U6gt4j3RNnCb4jIbUbnHSfs4QpZrKuzMcHiLa F91UtQsAgrudCMnqlUxNg/8VsLQpyTy3xw== X-Received: by 2002:a62:7848:0:b029:2f7:4ecc:f14 with SMTP id t69-20020a6278480000b02902f74ecc0f14mr16081777pfc.77.1624227050998; Sun, 20 Jun 2021 15:10:50 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id 135sm11122961pgf.20.2021.06.20.15.10.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Jun 2021 15:10:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 6/7] target/nios2: Remove assignment to env in handle_instruction Date: Sun, 20 Jun 2021 15:10:45 -0700 Message-Id: <20210620221046.1526418-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210620221046.1526418-1-richard.henderson@linaro.org> References: <20210620221046.1526418-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, crwulff@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Direct assignments to env during translation do not work. As it happens, the only way we can get here is if env->pc is already set to dc->pc. We will trap on the first insn we execute anywhere on the page. Signed-off-by: Richard Henderson --- target/nios2/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 06705c894d..31f63d9faa 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -740,14 +740,15 @@ static void handle_instruction(DisasContext *dc, CPUNios2State *env) uint32_t code; uint8_t op; const Nios2Instruction *instr; + #if defined(CONFIG_USER_ONLY) /* FIXME: Is this needed ? */ if (dc->pc >= 0x1000 && dc->pc < 0x2000) { - env->regs[R_PC] = dc->pc; t_gen_helper_raise_exception(dc, 0xaa); return; } #endif + code = cpu_ldl_code(env, dc->pc); op = get_opcode(code); From patchwork Sun Jun 20 22:10:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 464356 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp2001391jao; Sun, 20 Jun 2021 15:11:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJziW0OoKr6X9KA3dPeU0hTPMg8WoWv+ceIS+RVh366NLwM7fVKJfOL7NELVzwe484vR+Rdq X-Received: by 2002:a67:8c4a:: with SMTP id o71mr15231570vsd.46.1624227109565; Sun, 20 Jun 2021 15:11:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624227109; cv=none; d=google.com; s=arc-20160816; b=Bo5uvzrXh4zPgnqMIz9IU9OdrU71W+18EcFqsvvBaFG6PhE6FmaAoRavxFo67SBdp2 IamI47zBGwQEtjmcPmYIurLYk6KVTQ5SD7AAbnF+gziloDL2xHjkLit6IrT0rmxxCVYG V5/iNPVM8IInWDqbaX08icnaE1ztv18ezqYPFlEFJPTQkF5pfWa2kZt9Bln2mJJcJN+W /41QXK5hreBP9p1mvJVeSY9m3srrBcqSO3/Nj+a8aGT3/ZKIg2XrjfXUQ5V+83V+Rx9x yImK17rwikvL0kwmE9bYlSMeZ+45HwTmuLmCMW1kkq7heLe3cb+hW3+ryhTQ/R1xlhY6 dxyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=FotWsbbqFz4VjRP/kt0GkMjsWufTyPRcDViebjol4/4=; b=V42gC736ck5K75DSZBlGGq4ZAovM7H13OACdSZbyt0mMjUB5/GiiE+ZNIBN3jMfYDh GAq0oayL4QcFtbOkAKtKbl3jIQG9ST+JLuz/O3wuDM8LdZ7htpYUwgRG7Bhn6KoBu7pp 5L1SdYR/iiVqwZ6adxOmLjPq+XyhczQ2gxt8BPr81nzTXerlfpqpqSM6/SUq8AcZ2avE huokRoPnZqZdWP+m4G7i4+hUXqEa1O24MQ8WM/6QlWxXTML3vPER/deF0vc7CucUxjxv po5oHn46VPBXQFAse/L5dWvqfdZtN9oRe61MpzDoRylaJXhz+5rmf5Kkvsq0MwhP0O/X CaYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=laxXVToE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Sun, 20 Jun 2021 15:10:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 7/7] target/nios2: Clean up goto in handle_instruction Date: Sun, 20 Jun 2021 15:10:46 -0700 Message-Id: <20210620221046.1526418-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210620221046.1526418-1-richard.henderson@linaro.org> References: <20210620221046.1526418-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marex@denx.de, crwulff@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/nios2/translate.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 31f63d9faa..276643cee0 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -753,7 +753,8 @@ static void handle_instruction(DisasContext *dc, CPUNios2State *env) op = get_opcode(code); if (unlikely(op >= ARRAY_SIZE(i_type_instructions))) { - goto illegal_op; + t_gen_helper_raise_exception(dc, EXCP_ILLEGAL); + return; } dc->zero = NULL; @@ -764,11 +765,6 @@ static void handle_instruction(DisasContext *dc, CPUNios2State *env) if (dc->zero) { tcg_temp_free(dc->zero); } - - return; - -illegal_op: - t_gen_helper_raise_exception(dc, EXCP_ILLEGAL); } static const char * const regnames[] = {