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[209.51.188.17]) by mx.google.com with ESMTPS id n3si15906460ioh.98.2021.06.19.10.26.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:26:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NiX8dbAw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:33110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luek1-0003OY-Ua for patch@linaro.org; Sat, 19 Jun 2021 13:26:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55278) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejo-0003OF-I1 for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:32 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]:34627) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejm-0003WM-JX for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:32 -0400 Received: by mail-pl1-x62a.google.com with SMTP id h1so6308948plt.1 for ; Sat, 19 Jun 2021 10:26:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wIFh2DuxKQMSyvWLpaRvi15RkQtsLP+YpZiRlKkZFwQ=; b=NiX8dbAwH8tq2wcVUduP67zuH+bL95zEL9DAfvJcKSM1U8Zw/sSJxmQRAplnP8AteG h5h8moSjOwHntkTDQEJwX4H1RpGnlOXBgUQsu4rrAmcwgnrIPdQ337sT01D7af8UG7da LP5YSORDkWtqbN2vsudS4ok+7Qc36u7MGziLhu1+KurGldtJRO8JKADJRpqUw+oIHrkw cLoPY6ZJboHqjHmy22NiFi7D16jXwZ5JeILxogU65/Qcb2vAFe6f94X2YiQDAuQP51am xES/UBQz0NxK/uV+0pbc309vM5yfjzP23P1SBaLzoYWMpDLRQApd2ChcDCtr6vvuk/BU mbAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wIFh2DuxKQMSyvWLpaRvi15RkQtsLP+YpZiRlKkZFwQ=; b=r8Yg0vEHHcFiBUC1/oo+aCOtHri1QnLLqmIFOYiPUXbD9anR0C9mR6EG3GFpYh6Do4 PogUvswgNpWKnGcE4xpaUt8wUq5TwaMp4+741YD1yUstasE5QYsXWxXoZBEwaWzmX/2S c0p6ZgXNFJoD4jVm9WjmPZWvIgKo0O4FCM7GLgvtvL/8+CXRT1SR24NY7/BnUE33VX2c +uzyD8fF3bOmNF3YKTSXqNnLx7D2+t8p6xQtgzoejFHZPvIeSLBNYL4vsBVjTiy8DUtW JdNxSVzHdGGPRcvsgCfGeY1Puz8tOdpJ4xV9oJLqbFAXe52hn9qk4fdvrsuxu5ueMWZk hRSg== X-Gm-Message-State: AOAM531u/HVL8/Dn/cStG2zkUnHM8A6FWb1h9rBZI3CndT4/RtU2WrZS VvV7TGy+mLXkj1/l9ej2xKBjQ2G9JRF1dA== X-Received: by 2002:a17:902:e545:b029:111:6990:4103 with SMTP id n5-20020a170902e545b029011169904103mr10189125plf.63.1624123588748; Sat, 19 Jun 2021 10:26:28 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 01/15] NOTFORMERGE q800: test case for do_unaligned_access issue Date: Sat, 19 Jun 2021 10:26:12 -0700 Message-Id: <20210619172626.875885-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Mark Cave-Ayland A hack so that the built-in rom for -M a800 triggers the problem within the first two instructions. Signed-off-by: Mark Cave-Ayland --- hw/m68k/q800.c | 131 ++++--------------------------------------------- 1 file changed, 9 insertions(+), 122 deletions(-) -- 2.25.1 diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 11376daa85..9795ceb06a 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -174,26 +174,13 @@ static void main_cpu_reset(void *opaque) CPUState *cs = CPU(cpu); cpu_reset(cs); - cpu->env.aregs[7] = ldl_phys(cs->as, 0); - cpu->env.pc = ldl_phys(cs->as, 4); + cpu->env.aregs[7] = 0x1000; + cpu->env.pc = MACROM_ADDR; } static uint8_t fake_mac_rom[] = { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - /* offset: 0xa - mac_reset */ - - /* via2[vDirB] |= VIA2B_vPower */ - 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ - 0x10, 0x10, /* moveb %a0@,%d0 */ - 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ - 0x10, 0x80, /* moveb %d0,%a0@ */ - - /* via2[vBufB] &= ~VIA2B_vPower */ - 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ - 0x10, 0x10, /* moveb %a0@,%d0 */ - 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ - 0x10, 0x80, /* moveb %d0,%a0@ */ + 0x41, 0xf9, 0x50, 0x00, 0x00, 0x00, /* lea 0x50000000,%a0 */ + 0x30, 0x28, 0x11, 0xff, /* movew %a0@(4607),%d0 */ /* while (true) ; */ 0x60, 0xFE /* bras [self] */ @@ -202,24 +189,11 @@ static uint8_t fake_mac_rom[] = { static void q800_init(MachineState *machine) { M68kCPU *cpu = NULL; - int linux_boot; - int32_t kernel_size; - uint64_t elf_entry; - char *filename; - int bios_size; - ram_addr_t initrd_base; - int32_t initrd_size; MemoryRegion *rom; MemoryRegion *io; const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; int i; ram_addr_t ram_size = machine->ram_size; - const char *kernel_filename = machine->kernel_filename; - const char *initrd_filename = machine->initrd_filename; - const char *kernel_cmdline = machine->kernel_cmdline; - const char *bios_name = machine->firmware ?: MACROM_FILENAME; - hwaddr parameters_base; - CPUState *cs; DeviceState *dev; DeviceState *via_dev; DeviceState *escc_orgate; @@ -231,8 +205,6 @@ static void q800_init(MachineState *machine) DeviceState *glue; DriveInfo *dinfo; - linux_boot = (kernel_filename != NULL); - if (ram_size > 1 * GiB) { error_report("Too much memory for this machine: %" PRId64 " MiB, " "maximum 1024 MiB", ram_size / MiB); @@ -392,96 +364,11 @@ static void q800_init(MachineState *machine) qdev_prop_set_uint8(dev, "depth", graphic_depth); qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); - cs = CPU(cpu); - if (linux_boot) { - uint64_t high; - kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, - &elf_entry, NULL, &high, NULL, 1, - EM_68K, 0, 0); - if (kernel_size < 0) { - error_report("could not load kernel '%s'", kernel_filename); - exit(1); - } - stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ - parameters_base = (high + 1) & ~1; - - BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); - BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); - BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); - BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); - BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040); - BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800); - BOOTINFO1(cs->as, parameters_base, - BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ - BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); - BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE); - BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); - BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, - (graphic_height << 16) | graphic_width); - BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, - (graphic_width * graphic_depth + 7) / 8); - BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); - - rom = g_malloc(sizeof(*rom)); - memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", - sizeof(fake_mac_rom), fake_mac_rom); - memory_region_set_readonly(rom, true); - memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); - - if (kernel_cmdline) { - BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, - kernel_cmdline); - } - - /* load initrd */ - if (initrd_filename) { - initrd_size = get_image_size(initrd_filename); - if (initrd_size < 0) { - error_report("could not load initial ram disk '%s'", - initrd_filename); - exit(1); - } - - initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; - load_image_targphys(initrd_filename, initrd_base, - ram_size - initrd_base); - BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, - initrd_size); - } else { - initrd_base = 0; - initrd_size = 0; - } - BOOTINFO0(cs->as, parameters_base, BI_LAST); - } else { - uint8_t *ptr; - /* allocate and load BIOS */ - rom = g_malloc(sizeof(*rom)); - memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, - &error_abort); - filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); - - /* Load MacROM binary */ - if (filename) { - bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); - g_free(filename); - } else { - bios_size = -1; - } - - /* Remove qtest_enabled() check once firmware files are in the tree */ - if (!qtest_enabled()) { - if (bios_size < 0 || bios_size > MACROM_SIZE) { - error_report("could not load MacROM '%s'", bios_name); - exit(1); - } - - ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); - stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ - stl_phys(cs->as, 4, - MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ - } - } + rom = g_malloc(sizeof(*rom)); + memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", + sizeof(fake_mac_rom), fake_mac_rom); + memory_region_set_readonly(rom, true); + memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); } static void q800_machine_class_init(ObjectClass *oc, void *data) From patchwork Sat Jun 19 17:26:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463881 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1020794jao; Sat, 19 Jun 2021 10:32:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyHn37ZKgR7Vl7IJxw8Mq11j2T1sdZqSLinE9mCLCX3ejGsPZ5L8iXN/iCj6wDspjxL/3li X-Received: by 2002:a92:3302:: with SMTP id a2mr11598391ilf.62.1624123968313; Sat, 19 Jun 2021 10:32:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123968; 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No logical change intended. Inspired-by: Mark Cave-Ayland Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210609141010.1066750-2-f4bug@amsat.org> Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 52 ++++++++++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 20 deletions(-) -- 2.25.1 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index f24348e979..a94de90099 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1851,6 +1851,34 @@ load_memop(const void *haddr, MemOp op) } } +static inline uint64_t QEMU_ALWAYS_INLINE +load_helper_unaligned(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, + uintptr_t retaddr, MemOp op, bool code_read, + FullLoadHelper *full_load) +{ + size_t size = memop_size(op); + target_ulong addr1, addr2; + uint64_t res; + uint64_t r1, r2; + unsigned shift; + + addr1 = addr & ~((target_ulong)size - 1); + addr2 = addr1 + size; + r1 = full_load(env, addr1, oi, retaddr); + r2 = full_load(env, addr2, oi, retaddr); + shift = (addr & (size - 1)) * 8; + + if (memop_big_endian(op)) { + /* Big-endian combine. */ + res = (r1 << shift) | (r2 >> ((size * 8) - shift)); + } else { + /* Little-endian combine. */ + res = (r1 >> shift) | (r2 << ((size * 8) - shift)); + } + + return res & MAKE_64BIT_MASK(0, size * 8); +} + static inline uint64_t QEMU_ALWAYS_INLINE load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr, MemOp op, bool code_read, @@ -1866,7 +1894,6 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, code_read ? MMU_INST_FETCH : MMU_DATA_LOAD; unsigned a_bits = get_alignment_bits(get_memop(oi)); void *haddr; - uint64_t res; size_t size = memop_size(op); /* Handle CPU specific unaligned behaviour */ @@ -1895,7 +1922,8 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, /* For anything that is unaligned, recurse through full_load. */ if ((addr & (size - 1)) != 0) { - goto do_unaligned_access; + return load_helper_unaligned(env, addr, oi, retaddr, op, + code_read, full_load); } iotlbentry = &env_tlb(env)->d[mmu_idx].iotlb[index]; @@ -1932,24 +1960,8 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, if (size > 1 && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 >= TARGET_PAGE_SIZE)) { - target_ulong addr1, addr2; - uint64_t r1, r2; - unsigned shift; - do_unaligned_access: - addr1 = addr & ~((target_ulong)size - 1); - addr2 = addr1 + size; - r1 = full_load(env, addr1, oi, retaddr); - r2 = full_load(env, addr2, oi, retaddr); - shift = (addr & (size - 1)) * 8; - - if (memop_big_endian(op)) { - /* Big-endian combine. */ - res = (r1 << shift) | (r2 >> ((size * 8) - shift)); - } else { - /* Little-endian combine. */ - res = (r1 >> shift) | (r2 << ((size * 8) - shift)); - } - return res & MAKE_64BIT_MASK(0, size * 8); + return load_helper_unaligned(env, addr, oi, retaddr, op, + code_read, full_load); } haddr = (void *)((uintptr_t)addr + entry->addend); From patchwork Sat Jun 19 17:26:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463878 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1019224jao; Sat, 19 Jun 2021 10:30:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwDB95Cl6opdb1Rbo7TySYh99vkAa3nRP7caSm7Jcfyc8Q7kFd2IFgHTQXfykSNFS0HN/TD X-Received: by 2002:a05:6e02:1be1:: with SMTP id y1mr12122028ilv.204.1624123812510; Sat, 19 Jun 2021 10:30:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123812; cv=none; d=google.com; s=arc-20160816; b=pWvWLCVd3GRt5NVg63n2Zxk9YPN2dhGJTev0B+ZkvB58UsCBdbNipWozA4Sa8V39Lg Fa2ushmM1X3cV3AJxXsEkGbcUlLnQ/uNerUElsUyzNaxkxvbjW+q18QeobNe60EAhsnS 3Z9dP/uDEJnvqxZe0zLDcc+ueBYb0mIpI87t0B45BX85vDkObuuh4FAJJxR2bvxDda35 1enEmM9EtsoFmvQ90aH3ZPd2XcQU2R/dUyapKLU7aSDig+qnq8r9XjTuLjs4tRTWc2Db HOsrzMd+V4nzaGRmRpzT0KQcVtA92diJ6HMgwJWIGoayJmLHaYR1Mt6cmIoQs3+I4Kcp sRfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=jtFGj96PfP7GWAslaWvOoNrcvv1JjgMLufaP8rpAh9M=; b=Byqj2PB/KWB0X7AqKCW2O3TE4FhM91InESHdLoyGQJLN1Yc+4srh5YwO1NwkgkDUw/ jX6GO7XspZ69/kTwgg0PhbnuAA0/bOUKD0XYL5EPledzCVEOCk0p8usRzrN+1OBmTsrN 7AQhhyi7wmN1GUlZyoF1hR5tkIRoD5701fUnrLmC2ylNp27NY9IR0xyP6fNEHTw1DlFw /Y+qr5zCX/x5xj2C4gYLaCbZX7LmjkGcFUI5j470V4FAbHu98Jlihaen4D5l/QX09+9/ x+LJe5Rc761l6Kpr/Pw2P4oLDEx9j/yzj+a6DQIvKScMsmTiK4ZM0oRjpVObCESzuyJ/ jNWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kVQEz+iR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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This does not work correctly with MMIO accesses because the I/O subsystem may use a different endianness than we are expecting. Use byte loads to obviate I/O endianness. We already use byte stores in store_helper_unaligned, so this solution has precedent. Signed-off-by: Mark Cave-Ayland Resolves: https://gitlab.com/qemu-project/qemu/-/issues/360 Message-Id: <20210609093528.9616-1-mark.cave-ayland@ilande.co.uk> [PMD: Extract load_helper_unaligned() in earlier patch] Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20210609141010.1066750-3-f4bug@amsat.org> [rth: Drop all of the stuff we do for stores not required by loads.] Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 93 ++++++++++++++++++---------------------------- 1 file changed, 36 insertions(+), 57 deletions(-) -- 2.25.1 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index a94de90099..ba21487138 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1854,35 +1854,36 @@ load_memop(const void *haddr, MemOp op) static inline uint64_t QEMU_ALWAYS_INLINE load_helper_unaligned(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr, MemOp op, bool code_read, - FullLoadHelper *full_load) + FullLoadHelper *byte_load) { + uintptr_t mmu_idx = get_mmuidx(oi); size_t size = memop_size(op); - target_ulong addr1, addr2; - uint64_t res; - uint64_t r1, r2; - unsigned shift; - - addr1 = addr & ~((target_ulong)size - 1); - addr2 = addr1 + size; - r1 = full_load(env, addr1, oi, retaddr); - r2 = full_load(env, addr2, oi, retaddr); - shift = (addr & (size - 1)) * 8; + uint64_t val = 0; + int i; + /* XXX: not efficient, but simple. */ + oi = make_memop_idx(MO_UB, mmu_idx); if (memop_big_endian(op)) { - /* Big-endian combine. */ - res = (r1 << shift) | (r2 >> ((size * 8) - shift)); + for (i = 0; i < size; ++i) { + /* Big-endian load. */ + uint64_t val8 = byte_load(env, addr + i, oi, retaddr); + val = (val << 8) | val8; + } } else { - /* Little-endian combine. */ - res = (r1 >> shift) | (r2 << ((size * 8) - shift)); + for (i = 0; i < size; ++i) { + /* Little-endian load. */ + uint64_t val8 = byte_load(env, addr + i, oi, retaddr); + val |= val8 << (i * 8); + } } - return res & MAKE_64BIT_MASK(0, size * 8); + return val; } static inline uint64_t QEMU_ALWAYS_INLINE load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr, MemOp op, bool code_read, - FullLoadHelper *full_load) + FullLoadHelper *byte_load) { uintptr_t mmu_idx = get_mmuidx(oi); uintptr_t index = tlb_index(env, mmu_idx, addr); @@ -1920,10 +1921,10 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, CPUIOTLBEntry *iotlbentry; bool need_swap; - /* For anything that is unaligned, recurse through full_load. */ + /* For anything that is unaligned, recurse through byte_load. */ if ((addr & (size - 1)) != 0) { return load_helper_unaligned(env, addr, oi, retaddr, op, - code_read, full_load); + code_read, byte_load); } iotlbentry = &env_tlb(env)->d[mmu_idx].iotlb[index]; @@ -1961,7 +1962,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 >= TARGET_PAGE_SIZE)) { return load_helper_unaligned(env, addr, oi, retaddr, op, - code_read, full_load); + code_read, byte_load); } haddr = (void *)((uintptr_t)addr + entry->addend); @@ -1978,8 +1979,9 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, * We don't bother with this widened value for SOFTMMU_CODE_ACCESS. */ -static uint64_t full_ldub_mmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t __attribute__((noinline)) +full_ldub_mmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { return load_helper(env, addr, oi, retaddr, MO_UB, false, full_ldub_mmu); } @@ -1993,8 +1995,7 @@ tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr, static uint64_t full_le_lduw_mmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_LEUW, false, - full_le_lduw_mmu); + return load_helper(env, addr, oi, retaddr, MO_LEUW, false, full_ldub_mmu); } tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr, @@ -2006,8 +2007,7 @@ tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr, static uint64_t full_be_lduw_mmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_BEUW, false, - full_be_lduw_mmu); + return load_helper(env, addr, oi, retaddr, MO_BEUW, false, full_ldub_mmu); } tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr, @@ -2019,8 +2019,7 @@ tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr, static uint64_t full_le_ldul_mmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_LEUL, false, - full_le_ldul_mmu); + return load_helper(env, addr, oi, retaddr, MO_LEUL, false, full_ldub_mmu); } tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr, @@ -2032,8 +2031,7 @@ tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr, static uint64_t full_be_ldul_mmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_BEUL, false, - full_be_ldul_mmu); + return load_helper(env, addr, oi, retaddr, MO_BEUL, false, full_ldub_mmu); } tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr, @@ -2045,15 +2043,13 @@ tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr, uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_LEQ, false, - helper_le_ldq_mmu); + return load_helper(env, addr, oi, retaddr, MO_LEQ, false, full_ldub_mmu); } uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_BEQ, false, - helper_be_ldq_mmu); + return load_helper(env, addr, oi, retaddr, MO_BEQ, false, full_ldub_mmu); } /* @@ -2732,8 +2728,9 @@ void cpu_stq_le_data(CPUArchState *env, target_ulong ptr, uint64_t val) /* Code access functions. */ -static uint64_t full_ldub_code(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t __attribute__((noinline)) +full_ldub_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_code); } @@ -2744,38 +2741,20 @@ uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr) return full_ldub_code(env, addr, oi, 0); } -static uint64_t full_lduw_code(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_TEUW, true, full_lduw_code); -} - uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) { TCGMemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(env, true)); - return full_lduw_code(env, addr, oi, 0); -} - -static uint64_t full_ldl_code(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_TEUL, true, full_ldl_code); + return load_helper(env, addr, oi, 0, MO_TEUW, true, full_ldub_code); } uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) { TCGMemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(env, true)); - return full_ldl_code(env, addr, oi, 0); -} - -static uint64_t full_ldq_code(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_TEQ, true, full_ldq_code); + return load_helper(env, addr, oi, 0, MO_TEUL, true, full_ldub_code); } uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) { TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true)); - return full_ldq_code(env, addr, oi, 0); + return load_helper(env, addr, oi, 0, MO_TEQ, true, full_ldub_code); } From patchwork Sat Jun 19 17:26:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463873 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1017450jao; 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Watchpoints for code are called breakpoints, and are handled by the translator. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index ba21487138..23a97849be 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1930,7 +1930,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, iotlbentry = &env_tlb(env)->d[mmu_idx].iotlb[index]; /* Handle watchpoints. */ - if (unlikely(tlb_addr & TLB_WATCHPOINT)) { + if (!code_read && unlikely(tlb_addr & TLB_WATCHPOINT)) { /* On watchpoint hit, this will longjmp out. */ cpu_check_watchpoint(env_cpu(env), addr, size, iotlbentry->attrs, BP_MEM_READ, retaddr); From patchwork Sat Jun 19 17:26:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463877 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1018707jao; Sat, 19 Jun 2021 10:29:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwkbd5DmFkI2I5uQcyxB4E8SDsqEZbrq9zzFf5iT7ztQKxvvV1010U0mQQKAnI+NO1tY5fZ X-Received: by 2002:a5d:914a:: with SMTP id y10mr6879671ioq.140.1624123753508; Sat, 19 Jun 2021 10:29:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123753; cv=none; d=google.com; s=arc-20160816; b=XVAVH8sUNbM4vfvLcYPnn8lkwPilUkVDR6S8NMvrKMwk08dSQqLLA/izfkFzjd2FUe 8MZeYAUwSKvrYRW0EdZGfoI9X9vVxrHwg3thFLPu+ktI8KAsxxgEn0uzligu2oOaVL2d e0dgEDt2zRfspMoSUERHZ0ASQ9V55JfI4SS8WrU7BU0UfU+ASbRC4fELpxbMptc3gaa8 6vcVq3mN8DtAeooYFm8u95R/8VaLuwntozc3imqFLMLNjaR6Iima2jumszY0Ak1JQNib KLIIpnnS6jH7txyJFoNpDlHdHHWkKYUZR1+l1oEmqopJ13HcBM3SNEmh5PwzK32oZVGg 5zog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=T5vMXhrM5rWdv6nO0g8iwcSHNdJ0kMFYBGi03uVNbn8=; b=d+FKHaBUJgChxhGPH/m1dbFionGzgA8UZxDUZ4ZFWDHP18m7Yl/pyi8FRvO1IPgrk6 rWQ6ZL120I8yP74vatbDb0vzDA3bWv6bH1FTbC+0NNSL2CYpRYanRhY5rUBgdvTFgXZo 8vogl20evim7Z2CHutgu21YlHf5CDXs2+KAAS3RdCAwHmmDjGF8iT//9naRZEU/bBbKh Z5gp+EIf9cjcfelGbCGM4XuThYUN3i2ZclPoUJZ7PyBqahN8aNNROPhwgp5PvM4mvr6Q tOjC2NVQhWjZLt0VG6z7ddBDdypKYD0naJsyWhHvwB/vEGZTYcLNl/MbgW4iIMiN2pdn crBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ZzaFGVcw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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But this will enable further improvements. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) -- 2.25.1 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 23a97849be..6209e00c9b 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1916,6 +1916,14 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, tlb_addr &= ~TLB_INVALID_MASK; } + /* Handle access that spans two pages. */ + if (size > 1 + && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 + >= TARGET_PAGE_SIZE)) { + return load_helper_unaligned(env, addr, oi, retaddr, op, + code_read, byte_load); + } + /* Handle anything that isn't just a straight memory access. */ if (unlikely(tlb_addr & ~TARGET_PAGE_MASK)) { CPUIOTLBEntry *iotlbentry; @@ -1957,14 +1965,6 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, return load_memop(haddr, op); } - /* Handle slow unaligned access (it spans two pages or IO). */ - if (size > 1 - && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 - >= TARGET_PAGE_SIZE)) { - return load_helper_unaligned(env, addr, oi, retaddr, op, - code_read, byte_load); - } - haddr = (void *)((uintptr_t)addr + entry->addend); return load_memop(haddr, op); } @@ -2421,6 +2421,16 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val, tlb_addr = tlb_addr_write(entry) & ~TLB_INVALID_MASK; } + /* Handle access that spans two pages. */ + if (size > 1 + && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 + >= TARGET_PAGE_SIZE)) { + do_unaligned_access: + store_helper_unaligned(env, addr, val, retaddr, size, + mmu_idx, memop_big_endian(op)); + return; + } + /* Handle anything that isn't just a straight memory access. */ if (unlikely(tlb_addr & ~TARGET_PAGE_MASK)) { CPUIOTLBEntry *iotlbentry; @@ -2474,16 +2484,6 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val, return; } - /* Handle slow unaligned access (it spans two pages or IO). */ - if (size > 1 - && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 - >= TARGET_PAGE_SIZE)) { - do_unaligned_access: - store_helper_unaligned(env, addr, val, retaddr, size, - mmu_idx, memop_big_endian(op)); - return; - } - haddr = (void *)((uintptr_t)addr + entry->addend); store_memop(haddr, val, op); } From patchwork Sat Jun 19 17:26:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463875 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1017956jao; Sat, 19 Jun 2021 10:27:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyE8sSgM4DypMoQq3EMBWyCZj8FHKZdF5GOthRneylqyNCIdHSYnRR13THB+LozTvaXE4BJ X-Received: by 2002:a02:335c:: with SMTP id k28mr8952824jak.4.1624123666511; Sat, 19 Jun 2021 10:27:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123666; cv=none; d=google.com; s=arc-20160816; b=YHog7WYbSwePd+YLMyh96veH8TlIjRTYe4VlGmGnoJA9pV/psrtSQSKryAKRGbdeGp xppwXm37c2TOJILCfPVwFsWXNlbVOT/UKI4QUcg8yJgBoelaaMIol4A75Cf11dUELb4l WGHft+33leMy1pvsWbsUjss/krn0pwtuS3u6xyKLC+wH1WceJsNwj4BXx76ud2Pg9tlc 8rETbPxbJfCbOkTVf/Win8ILJAqxCcSDENJPVyzOQH1e4iZi0xSPEYyZJqEL1x3p4FKD 9SsMwBScZvPVdOPv07PWzfsNtptjjjQYyp+3ZNv0x6qjfWSXxhliAahbnlpYF3kkqFi7 KEjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=LWmu+dTNMI/txdqEE+yhKRacDvD3OHPjYjOyiCQwuBU=; b=W5CrMV2y5JKC6zARI36naWJsFba1GoXCPfZJqkXIPxpszT8WSJH4sA+Irh1G3rK/8y k3kvpmV2aMwIM/6gbeNkmC/FeVHnsIRG61n2SFC0//VMhYCTuzdGE6EqZLo36bYhsHjO Eeg+Q7ZYIiUt8aAjZ0o2/S+f0D5x42fL2xQ6olU3FR+Kn9nMipe3XA7khzDAJGJafpjO ehEuVPVI8qWfEhWZErryNUvoOZEvduZjUaMfmOMBDATMLRlyl8yfWRJOlzp3U9URepIn 5dj/aLo/0LOIB34vltqcYyqkEly53JfNkiHWyTMVMjut7l+Pkm/GtkUAIDcKlzMO5jXK x09A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Pe1bii0h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r6si6015541ilm.57.2021.06.19.10.27.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:27:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Pe1bii0h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:33356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luekz-0003YS-To for patch@linaro.org; Sat, 19 Jun 2021 13:27:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55352) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejq-0003QR-Oe for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:34 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]:35826) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejo-0003ZX-VC for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:34 -0400 Received: by mail-pl1-x634.google.com with SMTP id x19so6305368pln.2 for ; Sat, 19 Jun 2021 10:26:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LWmu+dTNMI/txdqEE+yhKRacDvD3OHPjYjOyiCQwuBU=; b=Pe1bii0hzAhdzwxZvdgGicTQVdxn9y1NX/fJyGjWNCeWLSkaBeu6NKCw4YLgXxMsCC 35gORmYnhmODWDuEKIFOS4qbR1bnHygtE0FZgTu8AOK/TEgb3zkMo2VQ6NI8TsQQroxV 4v1eNrX1vyZRKbyHg7kY8igTPuzmJmFI+r7s5RjgM4usN0Jx8Ah9GXk8/zU92RtRrlyn d1dYusNiGkzG0+WWnfQpK9oZJgvr10imvlXTnbqZybESLn+eNEZqqksHRhqGSt0kGl+U XhfVUTWa6neaAck1d0jYtJ4uOAC2bWA4WNlae1YXUm1s9F15VJm5XoTN5yickoDDfqAW 63HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LWmu+dTNMI/txdqEE+yhKRacDvD3OHPjYjOyiCQwuBU=; b=q/bUXvtZJ7QtJMlOD2mzXKT0Hojx+xmWsXA+ELvk4CACqV9mWkDwsrXfH6WYwrluMK bsPeue1dMZCWhySOrQ2tWDXfUI5ndwXq4NBzeNfS2DnXwRE68EPLEv75C/zu/ZwWDPir GV11HY5Fc3ZNcFenFZzvmZ2NtWV25UF1UizRsAo8Znq2acRI9EsMhnLWfjscg+jq+VS6 FQHBk3h/YsbbuPAyFphN/tq3V4S//awgXp8AlmXh7FkFVHroSLuUAH2sd4cloJqnVRT4 t4or+NxijQzXMVSIT2u1Mvf+1KiAAASr+FFX9FKsB6dwXqbV1/TbBqvaYP7qcsIDaY0G 6jTA== X-Gm-Message-State: AOAM533TWSQ78og+Ej/h6wOQKa/ibdpchPFBJDDbIQpbH1EHqBw6SznO X+a5J9htxTTd+Gj/Ry4qorR8CwhAs/7zGg== X-Received: by 2002:a17:90b:4c44:: with SMTP id np4mr17625046pjb.121.1624123591786; Sat, 19 Jun 2021 10:26:31 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/15] softmmu/memory: Inline memory_region_dispatch_read1 Date: Sat, 19 Jun 2021 10:26:17 -0700 Message-Id: <20210619172626.875885-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Inline the body into the only caller of this function. Signed-off-by: Richard Henderson --- softmmu/memory.c | 38 ++++++++++++++------------------------ 1 file changed, 14 insertions(+), 24 deletions(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/softmmu/memory.c b/softmmu/memory.c index f0161515e9..744c5a80bd 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -1408,29 +1408,6 @@ bool memory_region_access_valid(MemoryRegion *mr, return true; } -static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, - hwaddr addr, - uint64_t *pval, - unsigned size, - MemTxAttrs attrs) -{ - *pval = 0; - - if (mr->ops->read) { - return access_with_adjusted_size(addr, pval, size, - mr->ops->impl.min_access_size, - mr->ops->impl.max_access_size, - memory_region_read_accessor, - mr, attrs); - } else { - return access_with_adjusted_size(addr, pval, size, - mr->ops->impl.min_access_size, - mr->ops->impl.max_access_size, - memory_region_read_with_attrs_accessor, - mr, attrs); - } -} - MemTxResult memory_region_dispatch_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, @@ -1445,7 +1422,20 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, return MEMTX_DECODE_ERROR; } - r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); + *pval = 0; + if (mr->ops->read) { + r = access_with_adjusted_size(addr, pval, size, + mr->ops->impl.min_access_size, + mr->ops->impl.max_access_size, + memory_region_read_accessor, + mr, attrs); + } else { + r = access_with_adjusted_size(addr, pval, size, + mr->ops->impl.min_access_size, + mr->ops->impl.max_access_size, + memory_region_read_with_attrs_accessor, + mr, attrs); + } adjust_endianness(mr, pval, op); return r; } From patchwork Sat Jun 19 17:26:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463876 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1018660jao; Sat, 19 Jun 2021 10:29:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxl3pCARxyK/sM47vjjKmc/Y51FALz4mbgptUIog6VLwVvsD1sfd2fZtATqsWKMq++Gdkic X-Received: by 2002:a6b:7d05:: with SMTP id c5mr12793179ioq.148.1624123747418; Sat, 19 Jun 2021 10:29:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123747; cv=none; d=google.com; s=arc-20160816; b=kALQf3GyT7X4pIT5ziagOGBU8NarJ+a0F9Fb8GWF7QiTiUXu/ODXHtwsKlB5fCQ4yh WKxt1YQN0JjYEZf5J6nvFj3H+BAHvNQ3RcYYLgUHtrXqeQCzMV9qhGhVp0azGyUWGcJC 0hk328Mw5O0Dzh/tx+orE7DJ9g+UTI2fQLZnoH0vVSXebY6tq/zFeGiZRB3bhR7HVCLa DO9TsXV0LDiKNm/4qnJ/bg295tgfdK/Xqz/GjlqewyTyibZyCyx9PjZjit+uRTTcGi+V tlJCwN/Uem29gZ22QTshXjbkJfiSneX0A96fZ1qGeZbEh3KDWsVVuOksrnrBAmVnzoNb sQhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Yss0fdcq2xuDYayxCjybFaIy9QYHnfPZU6LWnmiOPAM=; b=HAkDKcSz7SEQwc711NtnyfgXkV5Nz2CNGUR4i6Qiy1NMtZU+7gfAVzhDbPouScSNU1 KYZ/VHKtZvZe8FyWdBRd/2WOi6aEWKQVteuEyqYso99M0r3f4V6e31TiRk/oxNvqE7ax R58FFmjQ7h+QUX5co+2/fHEoKt9SRJ1aL5WPX1Bwz8N4Law8NaWfaMxucQpWAGaWYWty DEGgI0tas9Y5sWmFjxuHGhyjFZOX+STofLhxFxHyDU9LFqTphoDK06sljO5HfpVMgCy7 Iy3pshy2IV1afCligm+FP0DfNHl43CwnHtAWynWaVq1QWcnik/AwgFnkQj9hP84hHgPx 9Z3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xG137mOb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w4si14779434iov.14.2021.06.19.10.29.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:29:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xG137mOb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41560 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luemI-0000eg-OL for patch@linaro.org; Sat, 19 Jun 2021 13:29:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55386) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejs-0003UA-2v for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:36 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]:38606) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejp-0003aJ-F1 for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:35 -0400 Received: by mail-pj1-x1031.google.com with SMTP id t19-20020a17090ae513b029016f66a73701so2663570pjy.3 for ; Sat, 19 Jun 2021 10:26:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Yss0fdcq2xuDYayxCjybFaIy9QYHnfPZU6LWnmiOPAM=; b=xG137mObUWZEgmXMM9MtIBFF2Ugri3uCeIz8VcSm/zxeq7kDSejYp2OCzvIbAxrdDj ax4o7gmZqmEnef2P7svkeULztX/71iZ37iG7xnINDCI9o1Pqa5BUtKEmUqSYW4NYKFr9 gMVs9Yt6OYf0lypQLknltXs2T7snMP9364F3zo48DvKKFRkF3CRfEt/t0vXQyY8EvJLM xmmyz09YTJvr4mMYsOsqfuUC1zD1Ee+5redOYndtnt03+xy0Ulas0tPMp37gtIQDIzZ+ n9kuw50ARn1QNRL6/NP8DL54kARx0wE/uzKHr0TY0jUBw1Z769aoJdWkzNNUoKcoz+EA P80Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Yss0fdcq2xuDYayxCjybFaIy9QYHnfPZU6LWnmiOPAM=; b=BgcLSzNaAw560FTYGW7zGOkwj8q7pBd/ii+LmqkbKWsMwIeiVhBvAxz9+4CsxAcaam +aYso1bOQmZiIG8VHWu34ZUgpBdkTIbibq9TjBGqbiQePYxtINmc2k2lvspUVFpvvVKj tmevu/AqIu3xlCaBcD7tUqNKOBsD9IAajs1oYssgTJbYjMiDUq9ExQNNg+HZLte83PVy owuKtProgNNsfF9eTc01LvKAnc1b5/jsQfThjfQHhldVEsT+0RvhkPWg7U5wJEem7bQI YNhnG6JWuVDfZrbpy5aBazav6uiNpNXNFH+9DeaHE1AKzYBF86FImfPvpaguEdDJSljA KXow== X-Gm-Message-State: AOAM530f8eJmeURadQ7zd+Z8FohOzi0I4GqXZIZKNEvbdHkMDqdyj5bK ItKb73UXJE19JOTM/Vh/mNFLjJXjcXmc0w== X-Received: by 2002:a17:90b:1d02:: with SMTP id on2mr28573691pjb.128.1624123592286; Sat, 19 Jun 2021 10:26:32 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 07/15] softmmu/memory: Simplify access_with_adjusted_size interface Date: Sat, 19 Jun 2021 10:26:18 -0700 Message-Id: <20210619172626.875885-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a typedef for the access_fn callback. Remove the access_size_{min,max} and access_fn arguments, and instead derive these from the MemoryRegion argument. Add a write boolean argument. Mark the function inline. Signed-off-by: Richard Henderson --- softmmu/memory.c | 67 +++++++++++++++++++----------------------------- 1 file changed, 26 insertions(+), 41 deletions(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/softmmu/memory.c b/softmmu/memory.c index 744c5a80bd..7373d89600 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -509,22 +509,24 @@ static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); } +typedef MemTxResult MemoryRegionAccessFn(MemoryRegion *mr, + hwaddr addr, + uint64_t *value, + unsigned size, + signed shift, + uint64_t mask, + MemTxAttrs attrs); + static MemTxResult access_with_adjusted_size(hwaddr addr, - uint64_t *value, - unsigned size, - unsigned access_size_min, - unsigned access_size_max, - MemTxResult (*access_fn) - (MemoryRegion *mr, - hwaddr addr, - uint64_t *value, - unsigned size, - signed shift, - uint64_t mask, - MemTxAttrs attrs), - MemoryRegion *mr, - MemTxAttrs attrs) + uint64_t *value, + unsigned size, + MemoryRegion *mr, + MemTxAttrs attrs, + bool write) { + unsigned access_size_min = mr->ops->impl.min_access_size; + unsigned access_size_max = mr->ops->impl.max_access_size; + MemoryRegionAccessFn *access_fn; uint64_t access_mask; unsigned access_size; unsigned i; @@ -537,6 +539,14 @@ static MemTxResult access_with_adjusted_size(hwaddr addr, access_size_max = 4; } + if (write) { + access_fn = (mr->ops->write ? memory_region_write_accessor + : memory_region_write_with_attrs_accessor); + } else { + access_fn = (mr->ops->read ? memory_region_read_accessor + : memory_region_read_with_attrs_accessor); + } + /* FIXME: support unaligned access? */ access_size = MAX(MIN(size, access_size_max), access_size_min); access_mask = MAKE_64BIT_MASK(0, access_size * 8); @@ -1423,19 +1433,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr, } *pval = 0; - if (mr->ops->read) { - r = access_with_adjusted_size(addr, pval, size, - mr->ops->impl.min_access_size, - mr->ops->impl.max_access_size, - memory_region_read_accessor, - mr, attrs); - } else { - r = access_with_adjusted_size(addr, pval, size, - mr->ops->impl.min_access_size, - mr->ops->impl.max_access_size, - memory_region_read_with_attrs_accessor, - mr, attrs); - } + r = access_with_adjusted_size(addr, pval, size, mr, attrs, false); adjust_endianness(mr, pval, op); return r; } @@ -1486,20 +1484,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr, return MEMTX_OK; } - if (mr->ops->write) { - return access_with_adjusted_size(addr, &data, size, - mr->ops->impl.min_access_size, - mr->ops->impl.max_access_size, - memory_region_write_accessor, mr, - attrs); - } else { - return - access_with_adjusted_size(addr, &data, size, - mr->ops->impl.min_access_size, - mr->ops->impl.max_access_size, - memory_region_write_with_attrs_accessor, - mr, attrs); - } + return access_with_adjusted_size(addr, &data, size, mr, attrs, true); } void memory_region_init_io(MemoryRegion *mr, From patchwork Sat Jun 19 17:26:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463879 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1019251jao; Sat, 19 Jun 2021 10:30:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx/JmiK18hHGEYFlOFTE//bOMMiS4E0KIbz0xSN9mMw5tw+MPR1PE0S2YHpf00cb8e4yNU6 X-Received: by 2002:a05:6602:38d:: with SMTP id f13mr12980021iov.109.1624123814437; Sat, 19 Jun 2021 10:30:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123814; cv=none; d=google.com; s=arc-20160816; b=tZGwuNNAsv6eoIA1BNczS8uYIdJi0Aem7qJsTUvk24ZmHL0ClQoDCySSpp5s7RzH6l iWEo/Bj5v/KJ276R31BjC11bOF3WALvSS2pzGDLLdQz4xfM+5kwdtviVlBlZNf/ffN96 RunQbO0bZSdlOLRJ2tkrZuLEKBk2Y3jYxeZVKtOFEWH1uam5L2zjOx/hRSpX35OKf/MG x/E5PVG+gx4giR9Gaa2DpNzhIuo4GKKIw5aq2s4Dwsv0gU4pRQx6ZRxk/m5miL0lhyU6 olxn6FuJ1XXvKx/gMEKeEmeir+0Ulfl1wF2I7s/F1r6zrLzcIbabhj+lx8JJ47QDS/jo tpeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4DqfBYyC7ObKfbG1l0o4eNafS1Tj4TIv+YV4IdJQSPo=; b=z4rYOv9pcfwFERUUgBQyvSN37DQo66J3jWVO5lEUDLtSkQiDwkCVGoZsQ/S8cZhy7i frgBMpzFoDzaPCOfnMvqdSE6Lf4gu40x/DIaa+EA2H+Yg6QCz5HtePra8HggS5e2UGRQ iOMs1dRYTwtobAVt6K788f/5MatXVUOjLvjoq1UbCxx0wipFojhLfdCTN+nAMUFqeUHA ky6e/nzoqD7YsbscgpeDJiT3ue0xX2+ovLboMcCA0xB+pelxlSMoAOO2GFz3fv3/yan7 WYGMChkHNYGXfYnX6yczvrysYvMGdXXhD+XBEJLDkNVSKR/QLJCJ5boJxTH2tWmkF87m +2Cg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="l2vev/ws"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Cc: Jason Wang Cc: Dmitry Fleytman Signed-off-by: Richard Henderson --- hw/net/e1000e.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index a8a77eca95..ea3347fbb4 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -145,7 +145,7 @@ e1000e_io_read(void *opaque, hwaddr addr, unsigned size) return s->ioaddr; case E1000_IODATA: if (e1000e_io_get_reg_index(s, &idx)) { - val = e1000e_core_read(&s->core, idx, sizeof(val)); + val = e1000e_core_read(&s->core, idx, size); trace_e1000e_io_read_data(idx, val); return val; } @@ -171,7 +171,7 @@ e1000e_io_write(void *opaque, hwaddr addr, case E1000_IODATA: if (e1000e_io_get_reg_index(s, &idx)) { trace_e1000e_io_write_data(idx, val); - e1000e_core_write(&s->core, idx, val, sizeof(val)); + e1000e_core_write(&s->core, idx, val, size); } return; default: From patchwork Sat Jun 19 17:26:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463882 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1020855jao; Sat, 19 Jun 2021 10:32:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJypATAUhWywhtPvUFaiaLgWxYrPhxqcQLbMRWfTPx+DkpBBcVrSO/HRCGjb0XF2ZwSoPxyv X-Received: by 2002:a92:c0cc:: with SMTP id t12mr1478561ilf.177.1624123974387; Sat, 19 Jun 2021 10:32:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123974; cv=none; d=google.com; s=arc-20160816; b=J7QoKSZzVtPGVIvVn/474R9fC8cpwpCNHQ+dcjRGUMf9EjFJb/0qJGp5e7t3t3h5D8 lC6ithvQvHlS+HnHqjOu6sa3DT8d5nMVTAOY8V02AOd174WyV0RYbWvW4a78Rz+u/RVl qN36RE/NJ76uNGqNVVb1Uw2hJ7/mYSEFzX125XbH/KNxJMOgD2l12gDpSj0yi38y1P3K 9C3EoGjm7nZpPHXMN2kzi9iEflyc8bpekzUehQ/pRDk56hqZwKhwjzMjqThTmeEvgVug bbFg/Si7WvCzdL1/v7XW+BoOg5txiJULPk1BmBMMXxtUUOOWx8yXOmfu15a/jzwxUzKE h4gw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=zpc1WrheeU5iNPnwpSE6u7zT/0eX+9soFRaS06BemqY=; b=tUjppWL+SflMqWsc3r85wlG+/gaT2T1KdV1+kOfiivQA3OcnVNMXp2fjMBfQ/E+Yuc cF+HwOADbxwMiS28DczpSdRicaYEQDFuU2WwA7IIicXHmr2NCe33utywMw47wYx207/d sgdhe7QEj/kR//2FRFLszHmI7K7/d+vvpiNZGuoe8uFuCpr/XKXRDH0Y52zF6Yz22PPv QdtXTEDQKfa4HoeT8rtWQ1XVRFLJb78DIRNG08X38zSwGmPKubkvrdvZVxAIg8Uwc2oN f7QJ4xydpVk7cN3iuFy4UiNOTb3ye4NbFHcM69l/yoVIjO0Itsmk8k16xW6/vvN4TSaO /NPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=MmZxdG3V; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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I also saw a 1 byte write, though that may have been the fuzzer. Cc: Jason Wang Cc: Dmitry Fleytman Signed-off-by: Richard Henderson --- hw/net/e1000e.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index ea3347fbb4..ad73e39ebc 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -185,7 +185,7 @@ static const MemoryRegionOps mmio_ops = { .write = e1000e_mmio_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { - .min_access_size = 4, + .min_access_size = 1, .max_access_size = 4, }, }; @@ -195,7 +195,7 @@ static const MemoryRegionOps io_ops = { .write = e1000e_io_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { - .min_access_size = 4, + .min_access_size = 1, .max_access_size = 4, }, }; From patchwork Sat Jun 19 17:26:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463884 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1022647jao; Sat, 19 Jun 2021 10:36:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy6OsacGZF0DxczfXZsvVn6NKGk5jUNr6XDUdDZEjdvGNn3uxNZwiiqD5uCY3+ZpZr/XqUG X-Received: by 2002:ab0:2381:: with SMTP id b1mr16704006uan.93.1624124177475; Sat, 19 Jun 2021 10:36:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624124177; cv=none; d=google.com; s=arc-20160816; b=LVnaMR56dU7ZOlnJoIBeTtkVH61e8uFwGmUcR7nxviCM1EaQs/EmVdEhuar9L33H0P 1erfdCjPJ6koqfa/NhXVom/yFKPvrtuBhxLWTR81PeWV94Hc2e4DsXXmGVAwYyPPjIV1 wvTLecE7lkMd1oB0AWb1w8nkm/75u8hgOauYgDnzEU5o6O5eWRavJLRhxLlEV+KAQ48v 41ouElo3Zr5cOO99FArxK3DkyV8pxh21XqvfOBpiXp7CLCAQnz5+JTtvGDfRHhOE1COe Om+YXKJWlV3rgi8+TM0AHHBHi89adjV8hzDUydQN64NodYIkHWbEJ0+806XevadtbLiL 319A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nul6SfodGAZA6iOTrqG5uPKt97OG3sa3GBVpUMgyEwA=; b=NqQF9qEJEyvN1dE04d6+m4wHmK64NKizozwq7hJZaHdRkDHM+nTvCrDx65inmD4KLO rTmT9Un/brH/uGXsKwpkSgMdu3X/2HPWppT9iMuQudHkKzwq7hitMuOsk1KcIUQ1kbOF eCw6OXgWRLtelhtekrC93O3JjFx6kuu74TOMtL1OsEJhW6zXtgUAG0TuKnHTX/u3FQbF JfaNCzP4y6gJNl9tfpl965PWbporQi6BH4lyUqOH5HBEH1Jx4bJUgldaNevcMx6OIN1n oa73wkBBEWU6RHOb3UP+v/B4s3PgHdT5DS8WJcqDENeeVabQCXxjjP1iXMeweTA3Zh8s yIsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=QBqKAfWm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k6si1433799uan.197.2021.06.19.10.36.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:36:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=QBqKAfWm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59190 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luetE-000487-Sk for patch@linaro.org; Sat, 19 Jun 2021 13:36:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55402) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejt-0003Um-30 for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:37 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]:44999) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejr-0003bS-8a for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:36 -0400 Received: by mail-pf1-x42a.google.com with SMTP id u18so4931102pfk.11 for ; Sat, 19 Jun 2021 10:26:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nul6SfodGAZA6iOTrqG5uPKt97OG3sa3GBVpUMgyEwA=; b=QBqKAfWmtq15UTEQsdVlXNWKVu5I3YnyLWFhOSwx7r1lKqcja/2hGoRpcXvBNswWfE OVem8XWpkgcUKVg5mvzCwUZ/11YuKvnZXOJeqcAicKUtGefuccyP3E3Ddtf5yt1WlocG fAUQvbdmZKEwTpk/SrOE5ciLBeIPZl0dFuTirKYI1lgZ3mdxOi42glCtnOyYrmsAsXBz w/PqLATjjKak0Wfsggjlo8if0LuGo2n/v+z1/ePB1Zj0oU+V30eqfdrfEeKzukqPcfRt 8roQvMW4zCDRQqPUoC/AZGKTXhT/wRoDid+stY1D7s883paRauNZnLqr7gWs81Z6WMPE J7KA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nul6SfodGAZA6iOTrqG5uPKt97OG3sa3GBVpUMgyEwA=; b=sdHJm/Et6aYg/zA6Y7DvhUNYZCiQcdjijSLIqh8imPZR4V9VVjWhXk5qBn5xUFrcGq gEpVJYKazB+/6yzIqc/JgRx+xkObmZWJidTY3cEMoFuBeU1eNGkH/2faCXkmwTG/9v1f jBG4P5fer4R0fzJvg0xpYQSaYcrFkHiglRkv9HsyB8bjhqsQbl77ESivxT+YiLoaGpCB F/C5+8wwOuLLbHA3ggwvpGomCcg7f5Vzipywp9Rs8hTUOMzwt49jz3MOXSM041BgBi3M 6d6mSVtEts1bbv+0qmOD2JKmKaR2DllSQUY3NRwaLbRJ6eS9PYQ7MJMESz4GaWd7sY1W 62Gg== X-Gm-Message-State: AOAM531hGMrhWWgDsWcrvJ3eWorHbvCkAZsKxBHjSIe6kqe8BsvVlbq6 M6gjEKmWV9N1030oEoQZdX5fQz2eTLce6g== X-Received: by 2002:a62:5444:0:b029:2e9:c69d:dc64 with SMTP id i65-20020a6254440000b02902e9c69ddc64mr11045534pfb.32.1624123594036; Sat, 19 Jun 2021 10:26:34 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 10/15] hw/pci-host/q35: Improve blackhole_ops Date: Sat, 19 Jun 2021 10:26:21 -0700 Message-Id: <20210619172626.875885-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is nothing about the blackhole that requires 4 byte operations. Decrease the min size to 1, increase the max size to 8. Drop duplicate endianness spec. Signed-off-by: Richard Henderson --- hw/pci-host/q35.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 2eb729dff5..133be67e4f 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -268,7 +268,7 @@ static const TypeInfo q35_host_info = { static uint64_t blackhole_read(void *ptr, hwaddr reg, unsigned size) { - return 0xffffffff; + return UINT64_MAX; } static void blackhole_write(void *opaque, hwaddr addr, uint64_t val, @@ -282,10 +282,9 @@ static const MemoryRegionOps blackhole_ops = { .write = blackhole_write, .endianness = DEVICE_NATIVE_ENDIAN, .valid.min_access_size = 1, - .valid.max_access_size = 4, - .impl.min_access_size = 4, - .impl.max_access_size = 4, - .endianness = DEVICE_LITTLE_ENDIAN, + .valid.max_access_size = 8, + .impl.min_access_size = 1, + .impl.max_access_size = 8, }; /* PCIe MMCFG */ From patchwork Sat Jun 19 17:26:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463880 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1020787jao; Sat, 19 Jun 2021 10:32:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyjMFlWErg05jIhN/I3R1uu5lc7I6l3ctgTBls3pXBCIPgkEVXpBs+371RfwmM6RIBC32sQ X-Received: by 2002:a05:6602:249a:: with SMTP id g26mr12751205ioe.150.1624123967916; Sat, 19 Jun 2021 10:32:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123967; cv=none; d=google.com; s=arc-20160816; b=xMFwMHPbz7ZNXF9eY8MvyiB5H/77Toejr6kI+QvluZrt9I9uCBz64GaWm75bLfg6zD b2A24SzvjdH1t+uNgS1iJh23gIHUYmqx4pwqflYI+jFLeAarHzxB53CVjl7zBM1nvIFW vXRaF7tsbhMrD5JPssIVfOPSJRqxuaH3EPUB9pFez8VCFDHzjWFAp8AJ+VZ+dctYslya cYpiyx1NFq95vwUdDOE3+Y4k4OZiqinsgGTqcnFDK/AY8bIXzuMkxBH9XAVk7woxPKSi 763RX0S04Cd/duMKd/QLw0Kh9+LpQifCCK8IcNSeg5BdTCq5Hu8EgV6ydk4QwtGQd8mk PsPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=05sVd1F+Ix/u+8NKnSPBhFMXamB4skG8gTScN8uxiH8=; b=Am1+jaT9jh7THRLoIP8GUWpjdZNrmg7zcMY+2OBELQXM0GNEPdZHfaXdj5JoXp4V+s Mar/i8TCvAKSN7mJntA4wwqRDgQZjhkDxSW1haSp9/0DwyPev7JngAitsycqDtIIQHt+ 1lr/rhemEM/Aeo6U+kctadpvSbbhyvg37yueH1KoksgmVhdRX+V85DbxG5s8UBnbAEfN 4umjWmo5Frp3lxQ+v2WBvX9dK4petKH7MLnuD/yEWP75vlCYhKHpDZ8WbPDUWG83GVdd 7hc/Ii84lG5zOUbdcQaeUvt6yWFWN5ljaODpv/u+W6D5SE9+PK75vzKF/0ci4olJHe5d qsBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AXBQDc28; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f16si11648800iox.100.2021.06.19.10.32.47 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:32:47 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AXBQDc28; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50392 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luepr-0006fH-C8 for patch@linaro.org; Sat, 19 Jun 2021 13:32:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55440) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lueju-0003ZR-Du for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:38 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:40923) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejs-0003cL-Pw for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:38 -0400 Received: by mail-pj1-x1032.google.com with SMTP id bb10-20020a17090b008ab029016eef083425so9627050pjb.5 for ; Sat, 19 Jun 2021 10:26:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=05sVd1F+Ix/u+8NKnSPBhFMXamB4skG8gTScN8uxiH8=; b=AXBQDc28bNasD4agIVKpc76xFn6tcl4Cr5sHDUQtkBeVzcgrpVLQRKKVzAbb0wGwzq FdHPAHSo0ZeYpflYYiqQDSrPdrcAtGrjVRTKrV3feKK8gnatFIuMbIusIVr2BMt435di v0rE2kbLjETSosM9xmW+kITpoypxR/uZGSaAysUUk5quZwAfhywEsxMFUxySY7B77VKA XtdYqT3pINUOCMdu3wsw2TZJdUw5vsATXrateTINJE6OFq2TyrkywQ9e+aLNhkuFN8+Y Er3ecRILeXIyNSzkvoK4onVQjwjDEU+iEBlri4P/TT1YINnF5tXWeNwEvk0dD5q4GdRZ Ggqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=05sVd1F+Ix/u+8NKnSPBhFMXamB4skG8gTScN8uxiH8=; b=ZdJt+sa1O0sAK5CRyiMSdjAqsHzpqEPkgrBKWCqd9Sy+MNpUAJY9+JHu7WlzhxSZcP UkLFbFym1B7P701oe+CNwpSdUd8sZzlr49KqHPfOrpc7oXvFkS+6tmTfX7ZK1nhtpkh3 58cfmwsd0P7GGhBR169Q7CgpFHZ86d/S/UWdJIBC1lik0VMh9ryHV+jhEOdXqsTitvBf XVGxFvXmUYuogg2BK1yxOm6fqAwpy/SktFXAEOJ5qzooF6WJ1G1UUEiVEAd1cmuUETK+ oQLg2CPyu1maJQ0elY6QQjfCrETFEYBTeH/tWeGbCgi6oYDPgLRCfK+KbW3QHdlitLuE fXew== X-Gm-Message-State: AOAM530Jd5/nRC62H5P7aiIIgImauDfFGUbh9mmOj8sH8/gzI+inuc1w Ak8CExGtu6uc6JYYy/0s+oYY7cjUSgoHXw== X-Received: by 2002:a17:90a:c093:: with SMTP id o19mr17618829pjs.6.1624123595514; Sat, 19 Jun 2021 10:26:35 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 11/15] hw/scsi/megasas: Fix megasas_mmio_ops sizes Date: Sat, 19 Jun 2021 10:26:22 -0700 Message-Id: <20210619172626.875885-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Hannes Reinecke , qemu-block@nongnu.org, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org, pbonzini@redhat.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All of the megasas mmio registers are 32-bit not 64-bit. Cc: qemu-block@nongnu.org Cc: Fam Zheng Cc: Hannes Reinecke Signed-off-by: Richard Henderson --- hw/scsi/megasas.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 8f2389d2c6..c98cb7a499 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2163,8 +2163,8 @@ static const MemoryRegionOps megasas_mmio_ops = { .write = megasas_mmio_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { - .min_access_size = 8, - .max_access_size = 8, + .min_access_size = 4, + .max_access_size = 4, } }; From patchwork Sat Jun 19 17:26:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463883 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1020983jao; Sat, 19 Jun 2021 10:33:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxnGHZaVXFekVsy+tn617c+sIh/z6TPRgbQ3tr3Ze5wh0krOKgeMsrP9pfCKlRfTzgRUiMM X-Received: by 2002:a05:6602:1810:: with SMTP id t16mr12672736ioh.48.1624123986923; Sat, 19 Jun 2021 10:33:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624123986; cv=none; d=google.com; s=arc-20160816; b=ht6E9bAIZpSn6/jTis73GOHoQy4crOd2IusqwNq6ScEeELv4/c9ygbD0EyE0uTAE/4 +7fu3U8PH0brpWA4uPg/xokixJCsnivuTF2RadP/RyrAZwJDG/DSM/08XwXbF5ZPTpKs HvnQBkQq7xLOs0Wm+m394hcKhr41rhROmO3RCrRrnwlOUUTlw369w17mDTx2Ca0DZu2v uUNdhW/82L1yPmPylz+hzsmRGnJ1XGpvkGiyAhv5icvFswcxNKSMAo1vZvW5YtLQkysM or9DBUiaZKR/MW/KviUTeCi/GqoH3Cf2RkUkDOfUDKeemhqV3ReWDeZlubV6MPi61W4g oS+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Yy09HFXA/NASjDT3bmx0qnRV9VbZG6YqFHV8U+MenEU=; b=cnyHSc/l6eLsZ7ELvjpC/wdpabxDPoPAcjsGnXk0MLpTFxDUBr667DGfx7c0ALh9+r MguMoOGNCX8EUoB+PxIny6M90HTiFBb6ZTwWH20Q+J01B08wkQOQS9LMv06LPvEvCni6 CjF2DnGsJLvxToiGlxmy7Vjvc4l9sx5BNLx6g28NGgZiughNGvKqNEG3fg30kNip4fZB nkl5agjGc2ahXxkzDsW5z4ttqfz5xKNYsdBqOTnY+KNXxqQ/QtV40ck7pyr5bzrDv2tl t3aRFJypS7VWyoLf39dELlKeEz87jlE9FRYcyTfpMl/aYw4FePxr2pCxrtvWdgdkPZ26 Rpkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=n0fb8U5H; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j5si12481248ioj.35.2021.06.19.10.33.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:33:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=n0fb8U5H; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50936 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lueqA-00072K-Cm for patch@linaro.org; Sat, 19 Jun 2021 13:33:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55496) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejy-0003pR-2o for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:42 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]:40911) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejt-0003cd-Cr for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:41 -0400 Received: by mail-pg1-x52c.google.com with SMTP id m2so10524336pgk.7 for ; Sat, 19 Jun 2021 10:26:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Yy09HFXA/NASjDT3bmx0qnRV9VbZG6YqFHV8U+MenEU=; b=n0fb8U5HvjzyiL+pQjY0icbU6efCOTvW7FjgBsJr8ge+pVcjvXJYOHErHp0TvB/7fB tQax6iEWHv2A6cGevaa9V42AWcxN5xzhmEZkAgs3ZhdmrQfTz6xtLID/smKvG9BRqN2/ LEiLqaFUDQ++1YM/PFbxxnwbTporZ/j47G0Ga3WArmWjTHGE0mBVjjHXuht0a5KpSVoQ U+GQHPaFhX/sVtLqv6I2t539SDJqjSou05dPR3cM24SvSwwNJ5HYdY+Y3nVf9JC+HmEz nDz50Jx77GadSAs+HYvHb9IbhJGJ5rddLRNI1GzwTASFox91H6nFuv2+UiqHn7jsQHxX KZSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Yy09HFXA/NASjDT3bmx0qnRV9VbZG6YqFHV8U+MenEU=; b=NlA85ITrxRMMfWrX32beKZOCvKq7ao5pSMUfah/JipcDjTNmGRi8otL/HCaby0zAt1 hF1vLodu5TmIoz61Kca/M+RbsRlJbmAuducOk7Rxpk7Zcb2Sv8xZh5eWogvJYUfaD/u+ e0PJnbZYy0cRkTou+PMFMTySgYmrh69km7pIherofezWbjg9haLfLItPG8WTFyalwWYe 6hksQlMg5ZoOnw8syOO5pOcXx9WnZUQpUW2qAMOrXqk/+0tvcimCyddL6SM8WLxmEHtS vA4rUhBlq4S5Mnho5ZzYEo1i/fqG2VavGJ3wrnwoNhiTTkarReVp0qX8G47ny8fkrGdW kxAw== X-Gm-Message-State: AOAM531SG6FmLgHGQ4qx64yfS5rlV5Y8MOz4okmSMDRPTEEsDSFyFFUN 3zZn7qU8jcH14G3gdbwIeViBFnaJUYF3pw== X-Received: by 2002:a63:a805:: with SMTP id o5mr15894498pgf.328.1624123596119; Sat, 19 Jun 2021 10:26:36 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 12/15] hw/scsi/megasas: Improve megasas_queue_ops min_access_size Date: Sat, 19 Jun 2021 10:26:23 -0700 Message-Id: <20210619172626.875885-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Hannes Reinecke , qemu-block@nongnu.org, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org, pbonzini@redhat.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This device is a read-zero-write-ignored device. We can trivially support any size operation. Cc: qemu-block@nongnu.org Cc: Fam Zheng Cc: Hannes Reinecke Signed-off-by: Richard Henderson --- hw/scsi/megasas.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.25.1 diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index c98cb7a499..197b75225f 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2207,7 +2207,7 @@ static const MemoryRegionOps megasas_queue_ops = { .write = megasas_queue_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { - .min_access_size = 8, + .min_access_size = 1, .max_access_size = 8, } }; From patchwork Sat Jun 19 17:26:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463885 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1022708jao; Sat, 19 Jun 2021 10:36:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy1osOjSIh4pCi33zDkOtHEyFkHA7d1u9GtAXwTRQRIXw/N8YaeZyA8RDNmIEvGRdXXsKMt X-Received: by 2002:a92:b50d:: with SMTP id f13mr11618148ile.253.1624124183277; Sat, 19 Jun 2021 10:36:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624124183; cv=none; d=google.com; s=arc-20160816; b=sCwGX5lniRzy+AIRrfMPo+SuzmMTFKyoN2zpyeCIAjfCRgOGCP+jU/eITHeKdeOYc2 ZMJQ/GRxDmNRi61zQgEMCg9N1kcpJmVl6sHWef9LBPo/yu+myH/weQZTVtjFSSXShsAn vqF9DB5GeESRAL0Q8CBLK6G+q/kkyZOKY2qpvZikP1m9nBk55S3VdS73zeeFUkYofpDB bwROZkM/4vG3RJ069gAuwD/c1nfPAD1c3agh7o62GkauDamEysBBckxBbxcBYPqKi7hd HCpHGJ3sVTimtvd7/xmuispsfErYdyLK41I/iQMGTiPgbyasx/sPoB4qjeTR93G9XdI9 Fpmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=v8CiO3nSkXbT0WhEZ00oCKiNO74Wj3K+LBYSZKxDzQk=; b=fU1dUY8Gx+EgDlapAfOpPdmAeHO3b77RGcdu5BcBEbIafC+BNPQJMGWSzxlak825qG LxVf/I2tCAu6NCQ2ECo3ktyKLhG+FzmLzCeWS5hYjTqS3DjLWmt9+pt1CHeSt/pZCk34 fg8yB7jUpAixM9wfdH7cgknVA+Y5brHJKAVZ5PJy2jV9I52CTaZ+TO693Xtekqs/v1rG XaG7tO6Xb8QVy86ifJkIBSwqT7cBliWV0//DhfQfQBBezVr/vKLFlQvRp8eifoZqqpe2 z19yIP8mZHtIpp18+HYo8ZbY0MQac1ADeNDV8YmtwEPyX1rbA19ya2BxglkuFcJupQSb ufCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=a60ao3De; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b19si14411608iow.46.2021.06.19.10.36.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:36:23 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=a60ao3De; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59754 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luetK-0004Ue-NQ for patch@linaro.org; Sat, 19 Jun 2021 13:36:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejw-0003g8-15 for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:40 -0400 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:45948) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejt-0003cq-TT for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:39 -0400 Received: by mail-pf1-x429.google.com with SMTP id k6so10268802pfk.12 for ; Sat, 19 Jun 2021 10:26:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v8CiO3nSkXbT0WhEZ00oCKiNO74Wj3K+LBYSZKxDzQk=; b=a60ao3DebrBOIqT41FxhejwwcY/LtElXJ0RCsU0qFxL77fE8buGmBybmX/sl8WReHM nkofI/nzJpkR7C4lzGfyzUcXHk5kJNC1uqvqgfpLSr2URrkcizSEmzSK6QKwDJh4b8gn Ku3wZ5wcBRYdqIsuOYaw4B7cIdYKL6xxGqw/Xx6S/rTk19CPe8LbtuX4Vxh5ytknGnBX Qp+d7O9uoyLInxOko6tzsy/rFAzmK3KL12IABCVJJvCgdyiUy4FJZh53SBWwtcA1WwLD wpBhE9oHpOeRbzakW+VgBet0cRsun13PH2RLWK9oa4yWePL2seiwSbJBjM063xDW61Go qY9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v8CiO3nSkXbT0WhEZ00oCKiNO74Wj3K+LBYSZKxDzQk=; b=ucvcXZORu+sEN9bQHAMlIe1FDmgiDWlKGtZzRAx7JQuzFraMFuBB3Pvsx1TSqXB4oq 1rHar4YekhfE5U4Ea9JJISn00JhcTRf8CSpK3BpuMbrLYbsee9GVwT46oc6AaINhZQbV kWHZAxng08U08I19KN0whMLo9rCUt41xYFssQfzW8r2gTINXnXbXtCrhBqibB1MTnFRW o2/ejHEMHkL63HjFf9wShLgwmW8XRX12sZdnsZPHXZU7Z4y/jgq+aX3K9P8HL8266jKG qYp5msiMsGZpFnminLY8xyhnXWjlmpqzA81kCnIDfdtpf4CcAiRRdA4xUQxkpSitOzx3 1o4A== X-Gm-Message-State: AOAM530FL+q2OwoKoCxmEsVV8fC0ZVPQdu24R5w7RRPe+y4aQPINlEot S0lmBPlo52et8049hFWjpfcp8QQbLAX69A== X-Received: by 2002:a05:6a00:797:b029:2f9:6ddb:9d5e with SMTP id g23-20020a056a000797b02902f96ddb9d5emr10840439pfu.35.1624123596697; Sat, 19 Jun 2021 10:26:36 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 13/15] softmmu/memory: Disallow short writes Date: Sat, 19 Jun 2021 10:26:24 -0700 Message-Id: <20210619172626.875885-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Writes smaller than impl.min_access_size would require a read-modify-write cycle, which could have side effects. The present behaviour seems to be to extend the current write to min_access_size. While we could continue that, so far all of the instances I have seen have been either device model errors or the fuzzer intentionally doing bad things. Signed-off-by: Richard Henderson --- softmmu/memory.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.25.1 diff --git a/softmmu/memory.c b/softmmu/memory.c index 7373d89600..2fe237327d 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -548,6 +548,26 @@ static MemTxResult access_with_adjusted_size(hwaddr addr, } /* FIXME: support unaligned access? */ + /* + * Check for a small access. + */ + if (unlikely(size < access_size_min)) { + /* + * Logically, we cannot support short writes without a read-modify + * cycle, and many mmio registers have side-effects on read. + * In practice, this appears to be either (1) model error, + * or (2) guest error via the fuzzer. + */ + if (write) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid short write: %s " + "hwaddr: 0x%" HWADDR_PRIx " size: %u " + "min: %u max: %u\n", __func__, + memory_region_name(mr), addr, size, + access_size_min, access_size_max); + return MEMTX_ERROR; + } + } + access_size = MAX(MIN(size, access_size_max), access_size_min); access_mask = MAKE_64BIT_MASK(0, access_size * 8); if (memory_region_big_endian(mr)) { From patchwork Sat Jun 19 17:26:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463887 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1025210jao; Sat, 19 Jun 2021 10:40:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwGXT+hvvDFKM/QYnK49d8WTX0VHMpGJOmWusmYdK/zlZZ2xeVjIzsb2EUNEP6Qmxk8MT37 X-Received: by 2002:a05:6638:248a:: with SMTP id x10mr4001226jat.68.1624124458664; Sat, 19 Jun 2021 10:40:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624124458; cv=none; d=google.com; s=arc-20160816; b=XmrrLzJQKEmf+K1lnU2ie4ISdZrMJ9SDt77qFLG9edugNhuwJ1KR9cDTOggoVHOogn 9/0p4Vc2QRMsKkRAGAoigxY48qvb5Nh8nbVC0z0JFP6oxXPR9FFAwG5R3pZZVhJwj0ah EXPu1FJAjaXyAop4pgfUzByx7FoVJYi7lRngpGsJ00Q143qFDCR/GHguKP5wqMnT+Q8Q R9FFl6b1DUuJ/MOxGpcze9L0fpRMbd2JBZP1NHeD5U9kR1J6DYd9toycT76rQ8EZeqEU WUwgYrQar4s+CfUUz7RYu1LIpIyx62dGtKLbFPy65oxk4OOJ4FXQsoSVS5XE2B5fWg2D +Xkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=HZXg/FINwhlCDx9vLoMBvEcrQqzi0upM0DdxrVdyXzE=; b=EH870rf11gjaSqgGdM7NuK6W0Ck5yBBND9c5w7EOUp80zvO2JCy7OYRhcRMywbtny9 Tb0fJH0cQ0Ft7IEki84ZWSu2sMjuUlaPuirtYg0L0YFRt9znK/f//i9/7NzXG3RE0bbt DIYPa9qu/fUJfMaRDW2hR3XHT4PgPN4e3VmuiqLJapEAWzY1p1SY613AyDrH0KzSUDel WqHHPKjXsTR199gJupnAS8OWY4cKqdunebZiJMQzlvwDX4+NMpSqa6kRwgjfKv4dTUIP IuW1k5ZiMJ5RuXoc9lsx9450Ejf7Kiv8L11g3De87LrX3kgH0qi6b8YPTuSb8Xtv9RLY mY5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FvPMg0qL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w10si4531473jao.68.2021.06.19.10.40.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:40:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FvPMg0qL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42408 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luexm-0003YP-3t for patch@linaro.org; Sat, 19 Jun 2021 13:40:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55508) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejz-0003vj-KJ for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:43 -0400 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]:41579) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lueju-0003dL-KZ for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:43 -0400 Received: by mail-pf1-x42e.google.com with SMTP id x73so10280293pfc.8 for ; Sat, 19 Jun 2021 10:26:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HZXg/FINwhlCDx9vLoMBvEcrQqzi0upM0DdxrVdyXzE=; b=FvPMg0qLTnaTN/dhXUgrZXO+9vOqrW3MsjIx6uPT7l1pUS0OgAmvFD8rxGfZc2KkpZ /MdI2SvHqVNZzDFXohViPnEUmbGErXId5osyY52J5IyRWTLeKbI3CLD1p2d0kQXLthie UgRmodlUGu9A+W5k2jEuk1UTtSCXQWLtt5N6Z7zFHHQZmnmoHBag7dUpbqeyrgE1aQlo 36w0WxwTBwY3HsBoteWEkFh0I+E1yUxIV0tw3CHFYiZI0HFJsjjYrBlzwBD3rZDrJUs+ 2ncZmLAbfSKKtoA/WdTZo1ImSAPHTp2rPirdWbp+L4XV63gSQlBvZbNEYYWmxZaYECUC 66kg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HZXg/FINwhlCDx9vLoMBvEcrQqzi0upM0DdxrVdyXzE=; b=t6EwkIphzSaw907sS2XRgp4JqMTw9Y2GC620eTmdHtQI6TYEr8RvbAY3PYq/CU6So3 amxTzTyEvii0Q3Uqo4AsEGXZhMnYrI1D6ixQtHXI2iIg4Dukw/pHNA49y8J6lXRy/OJX ZjyRlj6lq2Bh8NpBTU38+WnOmdd5hgVtMZ5dfRWx2gk3RB1zOQ+7fJvAF8a6AvnvQwns BByqin9aQLFok62MQFLfAXNNztCW7KdGZC0BNbNTj4fkOL1XVlLDd2yE8DCjTwjSX4Ys KZQ2ayFfzHUERtM6gzj8TEbMrokPScz2ljdySa5WqLVjhfw9d5E+OHBJVEM30AJCo/5b ROWw== X-Gm-Message-State: AOAM533qJ0SmQ/fG3RxJuhOE6fQX+9Cq5/DkXvtBkXobI6wEM1L6oZO2 XA23kBg8zxK+hce/U0ncdNNrSBG1DiRxZA== X-Received: by 2002:a63:f944:: with SMTP id q4mr816513pgk.264.1624123597318; Sat, 19 Jun 2021 10:26:37 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 14/15] softmmu/memory: Support some unaligned access Date: Sat, 19 Jun 2021 10:26:25 -0700 Message-Id: <20210619172626.875885-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Decline to support writes that cannot be covered by access_size_min. Decline to support unaligned reads that require extraction from more than two reads. Do support exact size match when the model supports unaligned. Do support reducing the operation size to match the alignment. Do support loads that extract from 1 or 2 larger loads. Diagnose anything that we do not handle via LOG_GUEST_ERROR, as any of these cases are probably model or guest errors. Signed-off-by: Richard Henderson --- softmmu/memory.c | 127 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 121 insertions(+), 6 deletions(-) -- 2.25.1 diff --git a/softmmu/memory.c b/softmmu/memory.c index 2fe237327d..baf8573f1b 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -529,7 +529,7 @@ static MemTxResult access_with_adjusted_size(hwaddr addr, MemoryRegionAccessFn *access_fn; uint64_t access_mask; unsigned access_size; - unsigned i; + signed access_sh; MemTxResult r = MEMTX_OK; if (!access_size_min) { @@ -547,7 +547,6 @@ static MemTxResult access_with_adjusted_size(hwaddr addr, : memory_region_read_with_attrs_accessor); } - /* FIXME: support unaligned access? */ /* * Check for a small access. */ @@ -557,6 +556,10 @@ static MemTxResult access_with_adjusted_size(hwaddr addr, * cycle, and many mmio registers have side-effects on read. * In practice, this appears to be either (1) model error, * or (2) guest error via the fuzzer. + * + * TODO: Are all short reads also guest or model errors, because + * of said side effects? Or is this valid read-for-effect then + * discard the (complete) result via narrow destination register? */ if (write) { qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid short write: %s " @@ -566,22 +569,134 @@ static MemTxResult access_with_adjusted_size(hwaddr addr, access_size_min, access_size_max); return MEMTX_ERROR; } + + /* + * If the original access is aligned, we can always extract + * from a single larger load. + */ + access_size = access_size_min; + if (likely((addr & (size - 1)) == 0)) { + goto extract; + } + + /* + * TODO: We could search for a larger load that happens to + * cover the unaligned load, but at some point we will always + * require two operations. Extract from two loads. + */ + goto extract2; } + /* + * Check for size in range. + */ + if (likely(size <= access_size_max)) { + /* + * If the access is aligned or if the model supports + * unaligned accesses, use one operation directly. + */ + if (likely((addr & (size - 1)) == 0) || mr->ops->impl.unaligned) { + access_size = size; + access_sh = 0; + goto direct; + } + } + + /* + * It is certain that we require multiple operations. + * If the access is aligned (or the model supports unaligned), + * then we will perform N accesses which exactly cover the + * operation requested. + */ access_size = MAX(MIN(size, access_size_max), access_size_min); + if (unlikely(addr & (access_size - 1))) { + unsigned lsb = addr & -addr; + if (lsb >= access_size_min) { + /* + * The model supports small enough loads that we can + * exactly match the operation requested. For reads, + * this is preferable to touching more than requested. + * For writes, this is mandatory. + */ + access_size = lsb; + } else if (write) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid unaligned write: %s " + "hwaddr: 0x%" HWADDR_PRIx " size: %u " + "min: %u max: %u\n", __func__, + memory_region_name(mr), addr, size, + access_size_min, access_size_max); + return MEMTX_ERROR; + } else if (size <= access_size_max) { + /* As per above, we can use two loads to implement. */ + access_size = size; + goto extract2; + } else { + /* + * TODO: becaseu access_size_max is small, this case requires + * more than 2 loads to assemble and extract. Bail out. + */ + qemu_log_mask(LOG_GUEST_ERROR, "%s: Unhandled unaligned read: %s " + "hwaddr: 0x%" HWADDR_PRIx " size: %u " + "min: %u max: %u\n", __func__, + memory_region_name(mr), addr, size, + access_size_min, access_size_max); + return MEMTX_ERROR; + } + } + access_mask = MAKE_64BIT_MASK(0, access_size * 8); if (memory_region_big_endian(mr)) { - for (i = 0; i < size; i += access_size) { + for (unsigned i = 0; i < size; i += access_size) { r |= access_fn(mr, addr + i, value, access_size, - (size - access_size - i) * 8, access_mask, attrs); + (size - access_size - i) * 8, access_mask, attrs); } } else { - for (i = 0; i < size; i += access_size) { + for (unsigned i = 0; i < size; i += access_size) { r |= access_fn(mr, addr + i, value, access_size, i * 8, - access_mask, attrs); + access_mask, attrs); } } return r; + + extract2: + /* + * Extract from one or two loads to produce the result. + * Validate that we need two loads before performing them. + */ + access_sh = addr & (access_size - 1); + if (access_sh + size > access_size) { + addr &= ~(access_size - 1); + if (memory_region_big_endian(mr)) { + access_sh = (access_size - access_sh) * 8; + r |= access_fn(mr, addr, value, access_size, access_sh, -1, attrs); + access_sh -= access_size * 8; + r |= access_fn(mr, addr, value, access_size, access_sh, -1, attrs); + } else { + access_sh = (access_sh - access_size) * 8; + r |= access_fn(mr, addr, value, access_size, access_sh, -1, attrs); + access_sh += access_size * 8; + r |= access_fn(mr, addr, value, access_size, access_sh, -1, attrs); + } + *value &= MAKE_64BIT_MASK(0, size * 8); + return r; + } + + extract: + /* + * Extract from one larger load to produce the result. + */ + access_sh = addr & (access_size - 1); + addr &= ~(access_size - 1); + if (memory_region_big_endian(mr)) { + access_sh = access_size - size - access_sh; + } + /* Note that with this interface, right shift is negative. */ + access_sh *= -8; + + direct: + access_mask = MAKE_64BIT_MASK(0, size * 8); + return access_fn(mr, addr, value, access_size, access_sh, + access_mask, attrs); } static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) From patchwork Sat Jun 19 17:26:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 463886 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:102:0:0:0:0 with SMTP id x2csp1023968jao; Sat, 19 Jun 2021 10:38:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJykv5SiOJOjCQzTQ2rcLcQzGQ/gPdfMn4u548E/RTx/41L/NrzJtDpzRIxoBQcF8TUhH8LK X-Received: by 2002:a5d:8154:: with SMTP id f20mr7805719ioo.89.1624124319343; Sat, 19 Jun 2021 10:38:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624124319; cv=none; d=google.com; s=arc-20160816; b=ze1GfapqxIE12ogO3UIPkte1Mcy7Yqcbri1QfjZS2V4B1pLP5sbbObJJKeeGEb1HH8 hJDDSvvyJwczKItdJYZvNv+IlmID2cnmUtC/loB3LwohT2yJs1ijWHkC5kzmcXSGIkyp GmmAk36rxYRjnXRfByBxTfJULSXxap4FCvZ/u8wR7HN3ZTVDFBb7G48UiVsvKAF/SICP 2AvshMl1mllaS0astICx4E/vGDjX+mzdiz3cUBVbXNWjqV/AIJvxbdlhRZoa/ztIFVAd bCGByBROvvZAwwT5kFg/V3dCxb3xQhhJ/tL2wPNIg6R5XTr18P91qhNPvoavg+so7sI4 ROYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=CGmZkzk4V2WoIYclr+JhIOxHAFi329cCw8zNPXEAFb4=; b=vxILiP/btbD3lgO4Kig4dDFsflAJv4kRxI9am63N/S/rfwmiGxbvWg3mK3mtwWhA4h Lqqz7cwTXbIisI+YYhPBEpET1xTf7bdN8IRWfs8R+PReEnWDEOagtFFd/aiLvJPFwXX2 LoUOqZA9GrlN4WLi5WWLLReZzjbSOMj7veJ3NNUEToB+FZNqWHiEDBKacLki3tYYBIdW 6iKTgdRawO8ECPAqyo3RWmBgBhOdcDMRVwhzpPdhPre+72LReDiwXJ2maNChKWw7PGO0 xrOJTPQWajAZxScHIVI5Aitr0tGNkmOT54IzMt7qLCShIdVeZetPPiZ1kfxt4ErdhpdI jC9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NkCrZIpO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 8si15804368jao.112.2021.06.19.10.38.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 19 Jun 2021 10:38:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NkCrZIpO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:37898 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1luevW-0000PG-QZ for patch@linaro.org; Sat, 19 Jun 2021 13:38:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55498) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1luejy-0003pe-42 for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:42 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:41580) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1luejv-0003dx-4V for qemu-devel@nongnu.org; Sat, 19 Jun 2021 13:26:41 -0400 Received: by mail-pf1-x42f.google.com with SMTP id x73so10280306pfc.8 for ; Sat, 19 Jun 2021 10:26:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CGmZkzk4V2WoIYclr+JhIOxHAFi329cCw8zNPXEAFb4=; b=NkCrZIpOV1wk+xCetUIKP4ShbHbaafKPhsltVOTu+rH/yahV3U+ZzanyQXNc6jUbDk OePbZLeD0GkmPvPOAE9JJclRAaGXWX84R8nza9DECmRp3JSUREUUi2nKiqoIybl/AxoE 5a+RPYE+Ff6nMlFJZee0bhDtdrJuqxEtviAiEiozNK5INYNiP2Mwm33ZSETDuw455ucb JSk7Y2UgPB0bnvEoeNRETU0NwTclWgf3KE+7sS1LmRX8MuyBYFIjGcLstTDT7WIYUngN h5R/qOm2ScMlgx23pY84gOn4D/W9BWWoWR6G+NLSnDvwRTc3k5hieVYVFCaEvdQhY1r8 o8TA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CGmZkzk4V2WoIYclr+JhIOxHAFi329cCw8zNPXEAFb4=; b=lSnF1MFw3fm8qIoXisyMPQG3X8b6kY8knaBro+4mCrVInucW8OqMt96CkMHVX+864L T5znyV4LUqUkxh2gy7W9hR9DR0K57qS9jFczRw3I/JQ4AiG6lLUYylmsieEe4vL0892O P8APbULpAexYFUrIz2XWZC9PZgoSittSsYG+zrY/v+uMLNKwlTkGolLhCZhGFztZmLTZ HV+8kkGk9dr24NyOn3dWRvOc/3Dlc4ZHsyS7fukcYMOJNoBBZLcv9qefWm47EDouxpax 8y4dp3qIy84dASUs6QNJLg4mI2rWctFMGMGCDZyeOMHVkCdDr0aVIHhzk+pPmvPULd/M O1UA== X-Gm-Message-State: AOAM531PxpQVjoOz7xXchEPQmHvUQxMr44r4bylFX7UFJQxfUXivDFh+ hvd4OKWyZvmigf/kcr1R+r0mecDTpByxSg== X-Received: by 2002:a62:b50b:0:b029:2fc:db53:a56a with SMTP id y11-20020a62b50b0000b02902fcdb53a56amr11417932pfe.30.1624123597835; Sat, 19 Jun 2021 10:26:37 -0700 (PDT) Received: from localhost.localdomain ([71.212.149.176]) by smtp.gmail.com with ESMTPSA id co18sm2084241pjb.37.2021.06.19.10.26.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Jun 2021 10:26:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 15/15] RFC accel/tcg: Defer some unaligned accesses to memory subsystem Date: Sat, 19 Jun 2021 10:26:26 -0700 Message-Id: <20210619172626.875885-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210619172626.875885-1-richard.henderson@linaro.org> References: <20210619172626.875885-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, pbonzini@redhat.com, mark.cave-ayland@ilande.co.uk, f4bug@amsat.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For unaligned i/o accesses that do not cross pages, do not handle the misalignment in cputlb, but let the memory system deal with it. RFC because this, for the first time, exposes many guests to the existing mr->ops->valid.unaligned checks in the memory subsystem. Previously this code was only reachable when guest code explicitly calls memory_region_dispatch_*. This does in fact trip up the original m68k q800 testcase, #360. Since this hasn't really been reachable, I'm willing to bet that every device is wrong wrt mr->ops->valid.unaligned, and possibly that we shouldn't even have it. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 12 ------------ 1 file changed, 12 deletions(-) -- 2.25.1 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6209e00c9b..905edab19b 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1929,12 +1929,6 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, CPUIOTLBEntry *iotlbentry; bool need_swap; - /* For anything that is unaligned, recurse through byte_load. */ - if ((addr & (size - 1)) != 0) { - return load_helper_unaligned(env, addr, oi, retaddr, op, - code_read, byte_load); - } - iotlbentry = &env_tlb(env)->d[mmu_idx].iotlb[index]; /* Handle watchpoints. */ @@ -2425,7 +2419,6 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val, if (size > 1 && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 >= TARGET_PAGE_SIZE)) { - do_unaligned_access: store_helper_unaligned(env, addr, val, retaddr, size, mmu_idx, memop_big_endian(op)); return; @@ -2436,11 +2429,6 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val, CPUIOTLBEntry *iotlbentry; bool need_swap; - /* For anything that is unaligned, recurse through byte stores. */ - if ((addr & (size - 1)) != 0) { - goto do_unaligned_access; - } - iotlbentry = &env_tlb(env)->d[mmu_idx].iotlb[index]; /* Handle watchpoints. */