From patchwork Thu Jun 17 11:47:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Tseng X-Patchwork-Id: 462579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B79DC49361 for ; Thu, 17 Jun 2021 11:47:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 76A2A6140F for ; Thu, 17 Jun 2021 11:47:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232599AbhFQLt0 (ORCPT ); Thu, 17 Jun 2021 07:49:26 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:41400 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232243AbhFQLtX (ORCPT ); Thu, 17 Jun 2021 07:49:23 -0400 X-UUID: 3fff53aa58ed426aaa38c18e7c38739a-20210617 X-UUID: 3fff53aa58ed426aaa38c18e7c38739a-20210617 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2121198993; Thu, 17 Jun 2021 19:47:10 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Jun 2021 19:47:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Jun 2021 19:47:09 +0800 From: Ben Tseng To: Fan Chen , Zhang Rui , Daniel Lezcano , , CC: Eduardo Valentin , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , , Michael Kao , Michael Kao , Ben Tseng Subject: [PATCH v5 1/3] thermal: mediatek: Relocate driver to mediatek folder Date: Thu, 17 Jun 2021 19:47:05 +0800 Message-ID: <20210617114707.10618-2-ben.tseng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210617114707.10618-1-ben.tseng@mediatek.com> References: <20210617114707.10618-1-ben.tseng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Michael Kao Add Mediatek proprietary folder to upstream more thermal zone and cooler drivers. Relocate the original thermal controller driver to it and rename as soc_temp.c to show its purpose more clearly. Signed-off-by: Michael Kao Signed-off-by: Ben Tseng Reviewed-by: Matthias Brugger --- drivers/thermal/Kconfig | 14 ++++------- drivers/thermal/Makefile | 2 +- drivers/thermal/mediatek/Kconfig | 23 +++++++++++++++++++ drivers/thermal/mediatek/Makefile | 1 + .../{mtk_thermal.c => mediatek/soc_temp.c} | 0 5 files changed, 29 insertions(+), 11 deletions(-) create mode 100644 drivers/thermal/mediatek/Kconfig create mode 100644 drivers/thermal/mediatek/Makefile rename drivers/thermal/{mtk_thermal.c => mediatek/soc_temp.c} (100%) diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index d7f44deab5b1..7a4ba50ba97d 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -401,16 +401,10 @@ config DA9062_THERMAL zone. Compatible with the DA9062 and DA9061 PMICs. -config MTK_THERMAL - tristate "Temperature sensor driver for mediatek SoCs" - depends on ARCH_MEDIATEK || COMPILE_TEST - depends on HAS_IOMEM - depends on NVMEM || NVMEM=n - depends on RESET_CONTROLLER - default y - help - Enable this option if you want to have support for thermal management - controller present in Mediatek SoCs +menu "Mediatek thermal drivers" +depends on ARCH_MEDIATEK || COMPILE_TEST +source "drivers/thermal/mediatek/Kconfig" +endmenu config AMLOGIC_THERMAL tristate "Amlogic Thermal Support" diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 82fc3e616e54..9729a2b08991 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -54,7 +54,7 @@ obj-y += st/ obj-$(CONFIG_QCOM_TSENS) += qcom/ obj-y += tegra/ obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o -obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o +obj-$(CONFIG_MTK_THERMAL) += mediatek/ obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o obj-$(CONFIG_UNIPHIER_THERMAL) += uniphier_thermal.o obj-$(CONFIG_AMLOGIC_THERMAL) += amlogic_thermal.o diff --git a/drivers/thermal/mediatek/Kconfig b/drivers/thermal/mediatek/Kconfig new file mode 100644 index 000000000000..0351e73170b7 --- /dev/null +++ b/drivers/thermal/mediatek/Kconfig @@ -0,0 +1,23 @@ +config MTK_THERMAL + tristate "Mediatek thermal drivers" + depends on THERMAL_OF + help + This is the option for Mediatek thermal software + solutions. Please enable corresponding options to + get temperature information from thermal sensors or + turn on throttle mechaisms for thermal mitigation. + +if MTK_THERMAL + +config MTK_SOC_THERMAL + tristate "Temperature sensor driver for mediatek SoCs" + depends on HAS_IOMEM + depends on NVMEM + depends on RESET_CONTROLLER + help + Enable this option if you want to get SoC temperature + information for Mediatek platforms. This driver + configures thermal controllers to collect temperature + via AUXADC interface. + +endif diff --git a/drivers/thermal/mediatek/Makefile b/drivers/thermal/mediatek/Makefile new file mode 100644 index 000000000000..f75313ddce5e --- /dev/null +++ b/drivers/thermal/mediatek/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_MTK_SOC_THERMAL) += soc_temp.o diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mediatek/soc_temp.c similarity index 100% rename from drivers/thermal/mtk_thermal.c rename to drivers/thermal/mediatek/soc_temp.c From patchwork Thu Jun 17 11:47:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Tseng X-Patchwork-Id: 462580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DF54C48BE5 for ; Thu, 17 Jun 2021 11:47:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 67DD061421 for ; Thu, 17 Jun 2021 11:47:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232585AbhFQLtY (ORCPT ); Thu, 17 Jun 2021 07:49:24 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:41388 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231265AbhFQLtW (ORCPT ); Thu, 17 Jun 2021 07:49:22 -0400 X-UUID: a4e7414139a34d869e4829776757210f-20210617 X-UUID: a4e7414139a34d869e4829776757210f-20210617 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 186226689; Thu, 17 Jun 2021 19:47:11 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Jun 2021 19:47:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Jun 2021 19:47:09 +0800 From: Ben Tseng To: Fan Chen , Zhang Rui , Daniel Lezcano , , CC: Eduardo Valentin , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , , Michael Kao , Ben Tseng Subject: [PATCH v5 3/3] dt-bindings: thermal: Add binding document for mt6873 thermal controller Date: Thu, 17 Jun 2021 19:47:07 +0800 Message-ID: <20210617114707.10618-4-ben.tseng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210617114707.10618-1-ben.tseng@mediatek.com> References: <20210617114707.10618-1-ben.tseng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Michael Kao This patch adds binding document for mt6873 thermal controller. Signed-off-by: Michael Kao Signed-off-by: Ben Tseng --- This patch depends on [1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210524122053.17155-7-chun-jie.chen@mediatek.com/ --- Feature: Thermal Management Change-Id: Ibe06c699c6edc870aaee95170c3f182d1889472d --- .../thermal/mediatek-thermal-lvts.yaml | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml b/Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml new file mode 100644 index 000000000000..69ffe7b14c21 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek-thermal-lvts.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SoC LVTS thermal controller (DTS) binding + +maintainers: + - Yu-Chia Chang + - Ben Tseng + +properties: + compatible: + const: mediatek,mt6873-lvts + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: lvts_clk + + "#thermal-sensor-cells": + const: 0 + +required: + - "#thermal-sensor-cells" + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + dts: lvts@1100b000 { + compatible = "mediatek,mt6873-lvts"; + reg = <0x1100b000 0x1000>; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "lvts_clk"; + #thermal-sensor-cells = <0>; + interrupts = ; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&dts>; + trips { + cpu_alert1: cpu-alert1 { + temperature = <85000>; + hysteresis = <0>; + type = "passive"; + }; + + cpu_crit: cpu-crit { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; +...