From patchwork Thu Jun 17 05:45:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 462118 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp118861jae; Wed, 16 Jun 2021 22:46:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxE/a8vAYc6mTLjEGzq918jDuqUK7qfM0bQr4I2w1P8G5zOvQ5pK1ckdhePJZBaTFpSqhvE X-Received: by 2002:a92:c852:: with SMTP id b18mr232698ilq.18.1623908791210; Wed, 16 Jun 2021 22:46:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623908791; cv=none; d=google.com; s=arc-20160816; b=hU6XtgwP87zp3WrgS6hxxJaCC2+91n1ULIqdTYkXtDchkB/50wP8mHlewkxYZucfT4 +MIlf4LOExHp9H8VRlfhLghQ1ujCzG3xiH7o6ilKyG5acnCknRwsxxAvTmREiY3QcMG7 Ky1W/t4khDEipuPqEqnSRq7pC40zZB9XtEnFn9AP8N6NYBLB9CvuMKuPVZWSPpSFmaI7 4gBLmm1/uqb4Obh/AIDtFvVV1n/Jbj2IVsmWRNexlV0foCzTm8aPuLnJnUpJUB+d3ELz Gn0ojMyte3loSf8nygK36zGRCcTxiL+zm8n/2V195uROMQ80Y6xRax0doUyT5QCLxcya EpRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hsJhWYmZBDgj/tFiSi4wj9WE1h/l2+Md9lyjAfn8iR8=; b=DO0KJdUSSuGSgKws5mQS/YKYSyZkmI7Wj8v7IGpJrBidCmcw2MVrI+dHdjs6lgt1FU dqQGUOU7EujY7WG+zDz4tUCGntQl4+cWDcwyw9up8/4LUo0I5E8RFVGBK/yhAdJz2fw3 msiAYKcclStpYv4i9wPIMBlM5ZmF3b98aehiXm5f8R4XiUPYYrkj+NxoFzx5A5+pvmyG k0RFXNzXS3y+tPfwP1PPfD8+KGGsvJyRoIyExH1f3pFyAqRvl5Dg1RY0Xk/CHC5TH1lD gP1ld2CrZnFC0DZ/P51TWbpp5WQnDSUyppQ97xknMJNIMQISiNIQsOUIvjtNRDeAVAtG mbsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wOOS4VAb; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m18si4682482ion.52.2021.06.16.22.46.31; Wed, 16 Jun 2021 22:46:31 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wOOS4VAb; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229887AbhFQFs3 (ORCPT + 7 others); Thu, 17 Jun 2021 01:48:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229845AbhFQFs2 (ORCPT ); Thu, 17 Jun 2021 01:48:28 -0400 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFB04C061760 for ; Wed, 16 Jun 2021 22:46:20 -0700 (PDT) Received: by mail-pj1-x102c.google.com with SMTP id 13-20020a17090a08cdb029016eed209ca4so3190881pjn.1 for ; Wed, 16 Jun 2021 22:46:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hsJhWYmZBDgj/tFiSi4wj9WE1h/l2+Md9lyjAfn8iR8=; b=wOOS4VAbMd2nYdoJCV7egK2DDp1ZSn2v/Mh602YP5TNj1U98qN22pMvHXCHEVEA1Qt FbyLCP/dCif4jQFWf3+IQ80pEwNx1KWoyuxvxDN4xBTRxVAK5KPkQrUMidoUvPsLrV2Y n5CnoG9OS5jzBKxDG0is7darEbEt6H5odeZdifnyx4BiSpS0sml8er8yu8ZxY/q/DdEV KWSXIp+GlJhrNVUPzExysq+4SJxfPgyMraAN80OoymMQy0T+SmOmp/Ly0UDSIBixYa2V tpqC94gmiLEU+4HZiv3obFyR7lGPQb3aBysr9T8Su+88O1hF9nBP8mEv6qUsnh4augaT GDmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hsJhWYmZBDgj/tFiSi4wj9WE1h/l2+Md9lyjAfn8iR8=; b=nZKfxTQaM5BH+7Af09ocBl1PryuYMu+pvmNp8sixCzV5lyX2q/LN2rPXlekD3gH2kv cvONeV7trLnA4t/024Bs+/un0VQzRuJOn588GZYtEEAPd/wUlk3M6tiAxelOfqquu6Zb VSLMYvfyyP/Nkvz8ATCAgNeDyeP1IdK1lsqNcbuNW4cHggbfPFmpf38gtLc1qzb61QHH +IGixaDMqcqKUxtsI0wpdpEnDTymlA3geZM3k6v9H11a9l5b2g8wk1Tq5jOMzRLUNym1 qyPEgf1N3x6hjbNEZUlwMqxxObvIJIpGy46esjUWA+AUMZGR4pZPm1zHMrGoMyNouSX1 Ti+g== X-Gm-Message-State: AOAM530kDhHtyr2eTmFrgAPKQuNnud5a6F38RaHOIGpt46CzXqz7aCCw QMtvlLNMUZtCgkK2963VJePNRA== X-Received: by 2002:a17:90a:d483:: with SMTP id s3mr14661286pju.61.1623908780546; Wed, 16 Jun 2021 22:46:20 -0700 (PDT) Received: from localhost.name ([122.177.46.2]) by smtp.gmail.com with ESMTPSA id y27sm3882700pff.202.2021.06.16.22.46.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Jun 2021 22:46:20 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, agross@kernel.org, Bjorn Andersson Subject: [PATCH v3 1/5] dt-bindings: arm: qcom: Add compatible for sm8150-mtp board Date: Thu, 17 Jun 2021 11:15:44 +0530 Message-Id: <20210617054548.353293-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210617054548.353293-1-bhupesh.sharma@linaro.org> References: <20210617054548.353293-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org sm8150-mtp board is based on Qualcomm Snapdragon sm8150 SoC. Add support for the same in dt-bindings. Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.31.1 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 9b27e991bddc..d7bb90e5082c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -42,6 +42,7 @@ description: | sdm660 sdm845 sdx55 + sm8150 sm8250 sm8350 @@ -198,6 +199,11 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,sm8150-mtp + - const: qcom,sm8150 + - items: - enum: - qcom,qrb5165-rb5 From patchwork Thu Jun 17 05:45:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 462119 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp118886jae; Wed, 16 Jun 2021 22:46:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzaXsAT9VmMDQQR/9gTS8EMNv2Xj/9hEupIHV14WSK2yrZlu0evw2rVr6gYMft6dcmj7Gei X-Received: by 2002:a5d:8184:: with SMTP id u4mr2302214ion.96.1623908793437; Wed, 16 Jun 2021 22:46:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623908793; cv=none; d=google.com; s=arc-20160816; b=yRZELavvOGxdSvJVA4UNydP62eKkwf7vqLTtLEfr1aDkrvkKDlpeekKPA3IS/sLx1m ajACWIw6bzxLKd0LwPwz9OdrzLT+x6eXLyArXrSyN6iyaobFA9GrCLvUFK5yD5AkKLEQ w7t+dACbUiUuhCK+IRM7UE1lbtDh9puNgztHVArBbBLlD0x3JD8wYg4Nq831JAYEYbxN 4jx0JBuuxTq7573OxwViswz/rUFHU6EecPcHbsb8BUputtsU+auWKgJpcuAdOTVIjFY/ Aaig6Ay5biNdOU69uQ9l9u0wG8VwvJzhHukpq1p67H9MYZCJ6tDKDqwiX2TfD24Jh59o a9fg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+V/OkVA5GckH14yamI54FdnjOjcXAFpdGORTCzkXN5Q=; b=RlbyS1TFPG6CyTMZ1g7eK1nfWb+CqcXqt0mno4YusAamnFcV/n+h8YwQDNKX6Gdkr2 DsOpCLlnFJvpnv/n9Orc/exTtoTEzmLbWZI1W42RkYVHoO2/EloCA1JE07sTac6/vCVI CFrX8kGWyBzJly+jzDiEOXW6FxbF3cve4UwDGQ54ecA2VA1tOMne3f96fkM2dO0jK81T M9ZRjWwcSQyjO9bN22SlWAmWH9VgbEKz2ziU5hQAUa+Uk9nHW4ja7cchTHj6DO3ldPsw XujGDL8cbB+R4lMSNXr947X7ZhM61Zzln4wyim/HWN1jWv/eNRdBNAxR/DVNUPuXxflc 9pPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e9xnyhv3; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Add support for the same in dt-bindings. Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.31.1 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index d7bb90e5082c..b6dceca8b11f 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -36,6 +36,7 @@ description: | msm8992 msm8994 msm8996 + sa8155p sc7180 sc7280 sdm630 @@ -48,6 +49,7 @@ description: | The 'board' element must be one of the following strings: + adp cdp cp01-c1 dragonboard @@ -199,6 +201,11 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,sa8155p-adp + - const: qcom,sa8155p + - items: - enum: - qcom,sm8150-mtp From patchwork Thu Jun 17 05:45:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 462383 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B2FAC49EA4 for ; Thu, 17 Jun 2021 05:46:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 153A961408 for ; Thu, 17 Jun 2021 05:46:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230052AbhFQFsn (ORCPT ); Thu, 17 Jun 2021 01:48:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230167AbhFQFsh (ORCPT ); Thu, 17 Jun 2021 01:48:37 -0400 Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B888C061768 for ; Wed, 16 Jun 2021 22:46:29 -0700 (PDT) Received: by mail-pg1-x530.google.com with SMTP id e20so4063692pgg.0 for ; Wed, 16 Jun 2021 22:46:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TTzo1X6mV9W2PxKItj/q6YwMruyeGBnEnmIaedUDegw=; b=dmOWihjEIb+styuVVaPUeGrioleqeiisos1r++nvYs953nJgoC8wUz+lmrbchRgDHr C3VncXUxuIl0teSUshnNh4qNoLtNC8k546EGf8ex5vxe5eSX4v6jwQ407g9dxQLTVbwQ f2KYTy+/r6sAT8eJnY9y/DWximSLDaFyB5ebEtPL+a3oOa5cm08jpIti0hPearI2ET5P EomgxepYXSqdsVnL0FTbGqqmUa8WQzVTdNYzogclAX9GUUzMB1K+VFIagHtv0wvmbpJy bk38MFYwfRc76RP9YSJzASZLuv/4t7D/VNuOHj4dos+7q90Uw1vNHdtqi44oecO4obqC XPxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TTzo1X6mV9W2PxKItj/q6YwMruyeGBnEnmIaedUDegw=; b=QpqeDECAuC+jNFKpw1uX+KHMs7X9r9VB7dNm1vQmSQ1OTYQTtqJpuidUpJLn9gkU19 zcpFFnsDicYraWMHrqsMzEIN0ib+D5MgeePN0FlEdTupNsuEK1qcW1VknQFnS7g8R4DW EyUv8n7TYD7QAdgZn8qBnHie+S9bVF2J0HrnYdrCG46nf82SQQSdBwf4eG/iw7pacFSe oAjYNco664PRqr9q45iNEW1qbSumBVB5qnyV50SF4HJZ8e3Oz6pkOtFRnrr2fY/CfYtx wfZEjOvkKdjRH2c9HPQfyGdURtCFZgem+phssnifOb59ErG9/BFPAUICNHmjxq8hMcik SLaw== X-Gm-Message-State: AOAM533TW+Lryctyr1w84bO2Mm5PBNbVsZurvomVlmjziYm7f+jr9C4S TwGTMSz1yCRazCFGHG3Or/Vvpg== X-Google-Smtp-Source: ABdhPJzjqkH/+emHIXDX18dHKKV3NouPjTTgnfGaa1BcmvB6qbp6amy7YkFUW9idD+coWTM96YkKcQ== X-Received: by 2002:a63:5915:: with SMTP id n21mr3380529pgb.58.1623908788767; Wed, 16 Jun 2021 22:46:28 -0700 (PDT) Received: from localhost.name ([122.177.46.2]) by smtp.gmail.com with ESMTPSA id y27sm3882700pff.202.2021.06.16.22.46.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Jun 2021 22:46:28 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, agross@kernel.org, Mark Brown , Vinod Koul , Bjorn Andersson Subject: [PATCH v3 3/5] arm64: dts: qcom: pmm8155au_1: Add base dts file Date: Thu, 17 Jun 2021 11:15:46 +0530 Message-Id: <20210617054548.353293-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210617054548.353293-1-bhupesh.sharma@linaro.org> References: <20210617054548.353293-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base DTS file for pmm8155au_1 along with GPIOs, power-on, rtc and vadc nodes. Cc: Mark Brown Cc: Vinod Koul Reviewed-by: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 134 ++++++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi new file mode 100644 index 000000000000..b04c28e54470 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include +#include +#include +#include + +/ { + thermal-zones { + pmm8155au-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_1_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@0 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pon: power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + + status = "disabled"; + }; + }; + + pmm8155au_1_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_1_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_1_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_1_adc_tm: adc-tm@3500 { + compatible = "qcom,spmi-adc-tm5"; + reg = <0x3500>; + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pmm8155au_1_rtc: rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + + status = "disabled"; + }; + + pmm8155au_1_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Thu Jun 17 05:45:47 2021 Content-Type: text/plain; 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Wed, 16 Jun 2021 22:46:32 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, agross@kernel.org, Mark Brown , Vinod Koul , Bjorn Andersson Subject: [PATCH v3 4/5] arm64: dts: qcom: pmm8155au_2: Add base dts file Date: Thu, 17 Jun 2021 11:15:47 +0530 Message-Id: <20210617054548.353293-5-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210617054548.353293-1-bhupesh.sharma@linaro.org> References: <20210617054548.353293-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc nodes. Cc: Mark Brown Cc: Vinod Koul Reviewed-by: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi new file mode 100644 index 000000000000..0c7d7a66c0b5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include +#include +#include + +/ { + thermal-zones { + pmm8155au-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_2_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@4 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + + status = "disabled"; + }; + + pmm8155au_2_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_2_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_2_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@5 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Thu Jun 17 05:45:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 462382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E626BC49361 for ; Thu, 17 Jun 2021 05:46:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF44A60C3E for ; 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Wed, 16 Jun 2021 22:46:36 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, agross@kernel.org, Vinod Koul , Bjorn Andersson Subject: [PATCH v3 5/5] arm64: dts: qcom: sa8155p-adp: Add base dts file Date: Thu, 17 Jun 2021 11:15:48 +0530 Message-Id: <20210617054548.353293-6-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210617054548.353293-1-bhupesh.sharma@linaro.org> References: <20210617054548.353293-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base DTS file for SA8155p Automotive Development Platform. It enables boot to console, adds tlmm reserved range and ufs flash. It also includes pmic file. SA8155p-adp board is based on sa8155p Qualcomm Snapdragon SoC. SA8155p platform is similar to the SM8150, so use this as base for now. Cc: Vinod Koul Reviewed-by: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 360 +++++++++++++++++++++++ 2 files changed, 361 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 456502aeee49..666f3528697d 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-oneplus-dumpling.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb +dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts new file mode 100644 index 000000000000..86bfbd29cda0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +/dts-v1/; + +#include +#include +#include "sm8150.dtsi" +#include "pmm8155au_1.dtsi" +#include "pmm8155au_2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA8155P ADP"; + compatible = "qcom,sa8155p-adp", "qcom,sa8155p"; + + aliases { + serial0 = &uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + vreg_3p3: vreg_3p3_regulator { + compatible = "regulator-fixed"; + regulator-name = "vreg_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + /* + * S4A is always on and not controllable through RPMh. + * So model it as a fixed regulator. + */ + vreg_s4a_1p8: smps4 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + regulator-allow-set-load; + + vin-supply = <&vreg_3p3>; + }; +}; + +&apps_rsc { + pmm8155au-1-rpmh-regulators { + compatible = "qcom,pmm8155au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vdd-s1-supply = <&vreg_3p3>; + vdd-s2-supply = <&vreg_3p3>; + vdd-s3-supply = <&vreg_3p3>; + vdd-s4-supply = <&vreg_3p3>; + vdd-s5-supply = <&vreg_3p3>; + vdd-s6-supply = <&vreg_3p3>; + vdd-s7-supply = <&vreg_3p3>; + vdd-s8-supply = <&vreg_3p3>; + vdd-s9-supply = <&vreg_3p3>; + vdd-s10-supply = <&vreg_3p3>; + + vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>; + vdd-l2-l10-supply = <&vreg_3p3>; + vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>; + vdd-l6-l9-supply = <&vreg_s6a_0p92>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; + vdd-l13-l16-l17-supply = <&vreg_3p3>; + + vreg_s5a_2p04: smps5 { + regulator-name = "vreg_s5a_2p04"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6a_0p92: smps6 { + regulator-name = "vreg_s6a_0p92"; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l1a_0p752: ldo1 { + regulator-name = "vreg_l1a_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <752000>; + regulator-initial-mode = ; + }; + + vdda_usb_hs_3p1: + vreg_l2a_3p072: ldo2 { + regulator-name = "vreg_l2a_3p072"; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + }; + + vreg_l3a_0p8: ldo3 { + regulator-name = "vreg_l3a_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdd_usb_hs_core: + vdda_usb_ss_dp_core_1: + vreg_l5a_0p88: ldo5 { + regulator-name = "vreg_l5a_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + regulator-allow-set-load; + }; + + vreg_l7a_1p8: ldo7 { + regulator-name = "vreg_l7a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l10a_2p96: ldo10 { + regulator-name = "vreg_l10a_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + regulator-allow-set-load; + }; + + vreg_l11a_0p8: ldo11 { + regulator-name = "vreg_l11a_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdda_usb_hs_1p8: + vreg_l12a_1p8: ldo12 { + regulator-name = "vreg_l12a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_2p7: ldo13 { + regulator-name = "vreg_l13a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p7: ldo15 { + regulator-name = "vreg_l15a_1p7"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1704000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-name = "vreg_l16a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l17a_2p96: ldo17 { + regulator-name = "vreg_l17a_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + }; + + pmm8155au-2-rpmh-regulators { + compatible = "qcom,pmm8155au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vreg_3p3>; + vdd-s2-supply = <&vreg_3p3>; + vdd-s3-supply = <&vreg_3p3>; + vdd-s4-supply = <&vreg_3p3>; + vdd-s5-supply = <&vreg_3p3>; + vdd-s6-supply = <&vreg_3p3>; + vdd-s7-supply = <&vreg_3p3>; + vdd-s8-supply = <&vreg_3p3>; + vdd-s9-supply = <&vreg_3p3>; + vdd-s10-supply = <&vreg_3p3>; + + vdd-l1-l8-l11-supply = <&vreg_s4c_1p352>; + vdd-l2-l10-supply = <&vreg_3p3>; + vdd-l3-l4-l5-l18-supply = <&vreg_s4c_1p352>; + vdd-l6-l9-supply = <&vreg_s6c_1p128>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5c_2p04>; + vdd-l13-l16-l17-supply = <&vreg_3p3>; + + vreg_s4c_1p352: smps4 { + regulator-name = "vreg_s4c_1p352"; + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_s5c_2p04: smps5 { + regulator-name = "vreg_s5c_2p04"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6c_1p128: smps6 { + regulator-name = "vreg_s6c_1p128"; + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l1c_1p304: ldo1 { + regulator-name = "vreg_l1c_1p304"; + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p808: ldo2 { + regulator-name = "vreg_l2c_1p808"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p2: ldo5 { + regulator-name = "vreg_l5c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + }; + + vreg_l7c_1p8: ldo7 { + regulator-name = "vreg_l7c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p2: ldo8 { + regulator-name = "vreg_l8c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + }; + + vreg_l10c_3p3: ldo10 { + regulator-name = "vreg_l10c_3p3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l11c_0p8: ldo11 { + regulator-name = "vreg_l11c_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l12c_1p808: ldo12 { + regulator-name = "vreg_l12c_1p808"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l13c_2p96: ldo13 { + regulator-name = "vreg_l13c_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l15c_1p9: ldo15 { + regulator-name = "vreg_l15c_1p9"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l16c_3p008: ldo16 { + regulator-name = "vreg_l16c_3p008"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l18c_0p88: ldo18 { + regulator-name = "vreg_l18c_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>; +}; + +&uart2 { + status = "okay"; +}; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l10a_2p96>; + vcc-max-microamp = <750000>; + vccq-supply = <&vreg_l5c_1p2>; + vccq-max-microamp = <700000>; + vccq2-supply = <&vreg_s4a_1p8>; + vccq2-max-microamp = <750000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l8c_1p2>; + vdda-max-microamp = <87100>; + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda-pll-max-microamp = <18300>; +}; + + +&usb_1_hsphy { + status = "okay"; + vdda-pll-supply = <&vdd_usb_hs_core>; + vdda33-supply = <&vdda_usb_hs_3p1>; + vdda18-supply = <&vdda_usb_hs_1p8>; +}; + +&usb_1_qmpphy { + status = "okay"; + vdda-phy-supply = <&vreg_l8c_1p2>; + vdda-pll-supply = <&vdda_usb_ss_dp_core_1>; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&qupv3_id_1 { + status = "okay"; +};