From patchwork Tue Jun 15 07:45:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460626 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E55EEC49361 for ; Tue, 15 Jun 2021 07:49:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C8CC061428 for ; Tue, 15 Jun 2021 07:49:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230414AbhFOHvd (ORCPT ); Tue, 15 Jun 2021 03:51:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230448AbhFOHv1 (ORCPT ); Tue, 15 Jun 2021 03:51:27 -0400 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD250C06121D for ; Tue, 15 Jun 2021 00:49:22 -0700 (PDT) Received: by mail-pj1-x102c.google.com with SMTP id h12-20020a17090aa88cb029016400fd8ad8so1703829pjq.3 for ; Tue, 15 Jun 2021 00:49:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kToQoYGMVDwEP081PrugIKt6rs2IgkM3tpJJ4Oi9CQ8=; b=bdX2tgiSRbG3C/0M+dK3VoZJ9yu82exbbYqn+vqve8pHvA7wz64EudJoOJ4r2JrOHJ piPnOI/Hk30BTFp5shTse4ClOwAfjd5Aubgf8me24vlWIdBTODuki766Fby8N4kF/IJD 88cePNEQSZKHggU52A1/yp52oUpYLM0mEheiqghCniOKl2N6QsjEduf0uBATE6wCmC1r zFLm4WOhGKXfd8bn/KJD5WPQZn4EfZNRenLHFTDfTiDc7yHZa4a3CogTpAIUifXzTa49 ZIdvF8YO1l3YOp8BV7PjfFO0aBCPSrHgqPMy9X80HvdFyX95AxnsEw2dSeK80J4puWEP ipDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kToQoYGMVDwEP081PrugIKt6rs2IgkM3tpJJ4Oi9CQ8=; b=ZCYwoqf5LcxdVLdZRCzXfO0Dr9GkP9yWnLEtaNvwFU9HnJGif0Tm1dRFGpO5h8GZ2s 902FJ09Atu+NnCKzMfsZbQapky/p+NTKZ7z9qdPb7jU7BRE7WqPkoI3+K9nlIg+6AhiI jx0rj7k2uSKFqf7XLGspH866ppU10NrQET6iyGChuH0Ad88yA2ieut7cw5lwKpe/Rl0/ WO5IL5ajRxGHd8brZLHFEGawlziEexzkngjVIgEHMB4isdQk9BHK/yjcEN8Si7dOOKKe kUSKNwjiXiMtml5eOLyGCGKHsioNB01Q2BaXjFR7GXgoRJoB1vAzkMuf8TJY3hpyLYRM 3PHQ== X-Gm-Message-State: AOAM533ITYeF5li1rx5FoZPEDylPfUrEf6bTyTAHehGZ8AdX3Onrzh4o z/Edg2JKIRe1XLouIWdjPethqITwfMsSkw== X-Google-Smtp-Source: ABdhPJyy4wXKXepB9EppesnsK2i+Om3ZzoI46sCTcbwYfC9Qqk+hmdRFDM3HprWQ9pU/nxT7olvFCw== X-Received: by 2002:a17:90a:d102:: with SMTP id l2mr23511799pju.225.1623743362288; Tue, 15 Jun 2021 00:49:22 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:22 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 02/10] dt-bindings: pinctrl: qcom, pmic-gpio: Add compatible for SA8155p-adp Date: Tue, 15 Jun 2021 13:15:35 +0530 Message-Id: <20210615074543.26700-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pmic-gpio compatible string for pmm8155au pmic found on the SA8155p-adp board. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index f6a9760558a6..80b8a66e29d8 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -27,6 +27,7 @@ PMIC's from Qualcomm. "qcom,pm660l-gpio" "qcom,pm8150-gpio" "qcom,pm8150b-gpio" + "qcom,pmm8155au-gpio" "qcom,pm8350-gpio" "qcom,pm8350b-gpio" "qcom,pm8350c-gpio" @@ -116,6 +117,7 @@ to specify in a pin configuration subnode: and gpio8) gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) gpio1-gpio12 for pm8150l (hole on gpio7) + gpio1-gpio10 for pmm8155au gpio1-gpio10 for pm8350 gpio1-gpio8 for pm8350b gpio1-gpio9 for pm8350c From patchwork Tue Jun 15 07:45:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAE45C48BE8 for ; Tue, 15 Jun 2021 07:49:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A6E7961431 for ; Tue, 15 Jun 2021 07:49:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230487AbhFOHvk (ORCPT ); Tue, 15 Jun 2021 03:51:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230459AbhFOHvi (ORCPT ); Tue, 15 Jun 2021 03:51:38 -0400 Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F1C4C061280 for ; Tue, 15 Jun 2021 00:49:34 -0700 (PDT) Received: by mail-pg1-x529.google.com with SMTP id t17so10752265pga.5 for ; Tue, 15 Jun 2021 00:49:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eaKkXhgRq+hiBDUlSLJALn4pH2MiH2Q3FouMp4doJio=; b=pSd6Ecpyd9HPN8WV8GELBVQYSUBDKnoTZQgNadV2nL0eH4zsWgsLmnbTeRFTrYIXg8 rOQztn1fYgf5lRzanVYtfvvYGCbqJn5nlpX1pIhb4xhtM3pFSLr3+PTZVyu9rZIRLQiM F1n6s4ZzY5f2oix1eOoLfA2eop9NuvDtylCQOCYuePxAbRgMjfr37NIZNrGIaRurnTI6 uuerJgJOyeMAngHufeVqDB2zLSY66BvJGdUlme3zI3sgv88i4nuquclwXEEjAEl+++hK f+Fk/3cXCeNzcuy74SWc41GUYJ8jH9Yuo2Cvh0U497F0KGnMAEkWPkpcmiSLpuatvoy4 l75g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eaKkXhgRq+hiBDUlSLJALn4pH2MiH2Q3FouMp4doJio=; b=HxZHaYSrdbNqO5o3eIHq6w9k2z5/9xrpi3TyGuQ5dvHkfuw3rM/gJ4zA1VodkV9sh8 Nil9tXXsbv7/oNFEgYVy5B14KU0ZVLhqdUgFmB2YH+BLLO0cAk97b3VXvNJTdby+iVcQ vRDvhm6MZgEtoQHyJ/6/6zMFO01w0DRDCIKbLFLENOx74nWatLYtYrzDMP/vPoWmXcuq 2Z2SzWLSlrmkhXoL6zE7hGr1XiMfMWWzJznfAQK+2rXhujKfEpFXAvx/yTqvGegDLXUD PGrEGObVH6XmuP06Umq+3MQbvwh/uM1vXgZyWfHhB8tXnCYdtUXKEJ8CQVrb9h29+kh9 YQPw== X-Gm-Message-State: AOAM531ruZ3Rq3g2DbXzAXQz8HMcIOQeciqro6d5oo3NUzGXkfVtnUgV lAAwiEDkwx5DdIURH3xe8II1B6osZdZNQA== X-Google-Smtp-Source: ABdhPJxQW9CPUs3+T8hzaKmL/wLhXYBd5Pxacp0KFmx7ZwvnunAhGmzZoWmBwyf/bCR49m4l9bQqcg== X-Received: by 2002:a05:6a00:a1e:b029:2e2:89d8:5c87 with SMTP id p30-20020a056a000a1eb02902e289d85c87mr3260866pfh.73.1623743373449; Tue, 15 Jun 2021 00:49:33 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:33 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 04/10] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board Date: Tue, 15 Jun 2021 13:15:37 +0530 Message-Id: <20210615074543.26700-5-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SA8155p-adp board is based on Qualcomm Snapdragon sa8155p SoC which is similar to the sm8150 SoC. Add support for the same in dt-bindings. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index d7bb90e5082c..b6dceca8b11f 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -36,6 +36,7 @@ description: | msm8992 msm8994 msm8996 + sa8155p sc7180 sc7280 sdm630 @@ -48,6 +49,7 @@ description: | The 'board' element must be one of the following strings: + adp cdp cp01-c1 dragonboard @@ -199,6 +201,11 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,sa8155p-adp + - const: qcom,sa8155p + - items: - enum: - qcom,sm8150-mtp From patchwork Tue Jun 15 07:45:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2F48C48BDF for ; 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Tue, 15 Jun 2021 00:49:44 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:43 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 06/10] regulator: qcom-rpmh: Add new regulator found on SA8155p adp board Date: Tue, 15 Jun 2021 13:15:39 +0530 Message-Id: <20210615074543.26700-7-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SA8155p-adp board supports a new regulator - pmm8155au. The output power management circuits in this regulator include: - FTS510 smps, - HFS510 smps, and - LDO510 linear regulators Add support for the same. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma Reviewed-by: Bjorn Andersson --- drivers/regulator/qcom-rpmh-regulator.c | 36 +++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index af41a517da99..73623d51929b 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -883,6 +883,38 @@ static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), + RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), + RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + {} +}; + static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), @@ -1145,6 +1177,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { .compatible = "qcom,pm8150l-rpmh-regulators", .data = pm8150l_vreg_data, }, + { + .compatible = "qcom,pmm8155au-rpmh-regulators", + .data = pmm8155au_vreg_data, + }, { .compatible = "qcom,pm8350-rpmh-regulators", .data = pm8350_vreg_data, From patchwork Tue Jun 15 07:45:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 448B4C48BE5 for ; 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Tue, 15 Jun 2021 00:49:54 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:53 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 08/10] arm64: dts: qcom: pmm8155au_1: Add base dts file Date: Tue, 15 Jun 2021 13:15:41 +0530 Message-Id: <20210615074543.26700-9-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add base DTS file for pmm8155au_1 along with GPIOs, power-on, rtc and vadc nodes. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 134 ++++++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi new file mode 100644 index 000000000000..b04c28e54470 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include +#include +#include +#include + +/ { + thermal-zones { + pmm8155au-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_1_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@0 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pon: power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + + status = "disabled"; + }; + }; + + pmm8155au_1_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_1_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_1_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_1_adc_tm: adc-tm@3500 { + compatible = "qcom,spmi-adc-tm5"; + reg = <0x3500>; + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pmm8155au_1_rtc: rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + + status = "disabled"; + }; + + pmm8155au_1_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Tue Jun 15 07:45:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460497 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4035274jae; Tue, 15 Jun 2021 00:50:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwwy/MjpnaoVRR/lGMiEr9rcl/wX48D/Jkjq1e4Gg9d8v7bOBugPJmsHDKLN6XGexXaygiA X-Received: by 2002:a05:6402:3134:: with SMTP id dd20mr21408926edb.59.1623743420248; Tue, 15 Jun 2021 00:50:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743420; cv=none; d=google.com; s=arc-20160816; b=Z6upElS636xq2J+vNtfDXbVKzLv3iClQ1YGN3Gx+wo7L1naAnX7QjP5Y/vIIaAVYvq TTZNI8ZNHA6bOt/IqxYeoq3SXxs63rMqtvD5Aiz6+utFWywK1cSFL0hst02uh3LzjCML P+j0mIFp59AMMyPRIQwEi5q7lU4ODgp/Qxr+3bg0o1Az3IWOCv1yj2Rwy5gu2dJGb60O /Mw/CGWIUmYtvuWeBYzXrC4iXDTqLB9Qz3+RcDpd+NCavu4eEYy/IYylulyJV7xa6bjv 7JL1S6M/yXk+lcaW387KfKe013EzAEUqm87tV4U+GGe0s+4e/xk3CSXh9HaSHge5J0T7 Q7Tw== ARC-Message-Signature: i=1; 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It enables boot to console, adds tlmm reserved range and ufs flash. It also includes pmic file. SA8155p-adp board is based on sa8155p Qualcomm Snapdragon SoC. SA8155p platform is similar to the SM8150, so use this as base for now. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 355 +++++++++++++++++++++++ 2 files changed, 356 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts -- 2.31.1 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 456502aeee49..666f3528697d 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-oneplus-dumpling.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb +dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts new file mode 100644 index 000000000000..95e0a6612e6b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +/dts-v1/; + +#include +#include +#include "sm8150.dtsi" +#include "pmm8155au_1.dtsi" +#include "pmm8155au_2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA8155P ADP"; + compatible = "qcom,sa8155p-adp", "qcom,sa8155p"; + + aliases { + serial0 = &uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + vreg_3p3: vreg_3p3_regulator { + compatible = "regulator-fixed"; + regulator-name = "vreg_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + /* + * S4A is always on and not controllable through RPMh. + * So model it as a fixed regulator. + */ + vreg_s4a_1p8: smps4 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vreg_3p3>; + }; +}; + +&apps_rsc { + pmm8155au-1-rpmh-regulators { + compatible = "qcom,pmm8155au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vdd-s1-supply = <&vreg_3p3>; + vdd-s2-supply = <&vreg_3p3>; + vdd-s3-supply = <&vreg_3p3>; + vdd-s4-supply = <&vreg_3p3>; + vdd-s5-supply = <&vreg_3p3>; + vdd-s6-supply = <&vreg_3p3>; + vdd-s7-supply = <&vreg_3p3>; + vdd-s8-supply = <&vreg_3p3>; + vdd-s9-supply = <&vreg_3p3>; + vdd-s10-supply = <&vreg_3p3>; + + vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>; + vdd-l2-l10-supply = <&vreg_3p3>; + vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>; + vdd-l6-l9-supply = <&vreg_s6a_0p92>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; + vdd-l13-l16-l17-supply = <&vreg_3p3>; + + vreg_s5a_2p04: smps5 { + regulator-name = "vreg_s5a_2p04"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6a_0p92: smps6 { + regulator-name = "vreg_s6a_0p92"; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l1a_0p752: ldo1 { + regulator-name = "vreg_l1a_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <752000>; + regulator-initial-mode = ; + }; + + vdda_usb_hs_3p1: + vreg_l2a_3p072: ldo2 { + regulator-name = "vreg_l2a_3p072"; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + }; + + vreg_l3a_0p8: ldo3 { + regulator-name = "vreg_l3a_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdd_usb_hs_core: + vdda_usb_ss_dp_core_1: + vreg_l5a_0p88: ldo5 { + regulator-name = "vreg_l5a_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + + vreg_l7a_1p8: ldo7 { + regulator-name = "vreg_l7a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l10a_2p96: ldo10 { + regulator-name = "vreg_l10a_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l11a_0p8: ldo11 { + regulator-name = "vreg_l11a_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdda_usb_hs_1p8: + vreg_l12a_1p8: ldo12 { + regulator-name = "vreg_l12a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_2p7: ldo13 { + regulator-name = "vreg_l13a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p7: ldo15 { + regulator-name = "vreg_l15a_1p7"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1704000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-name = "vreg_l16a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l17a_2p96: ldo17 { + regulator-name = "vreg_l17a_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + }; + + pmm8155au-2-rpmh-regulators { + compatible = "qcom,pmm8155au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vreg_3p3>; + vdd-s2-supply = <&vreg_3p3>; + vdd-s3-supply = <&vreg_3p3>; + vdd-s4-supply = <&vreg_3p3>; + vdd-s5-supply = <&vreg_3p3>; + vdd-s6-supply = <&vreg_3p3>; + vdd-s7-supply = <&vreg_3p3>; + vdd-s8-supply = <&vreg_3p3>; + vdd-s9-supply = <&vreg_3p3>; + vdd-s10-supply = <&vreg_3p3>; + + vdd-l1-l8-l11-supply = <&vreg_s4c_1p352>; + vdd-l2-l10-supply = <&vreg_3p3>; + vdd-l3-l4-l5-l18-supply = <&vreg_s4c_1p352>; + vdd-l6-l9-supply = <&vreg_s6c_1p128>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5c_2p04>; + vdd-l13-l16-l17-supply = <&vreg_3p3>; + + vreg_s4c_1p352: smps4 { + regulator-name = "vreg_s4c_1p352"; + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_s5c_2p04: smps5 { + regulator-name = "vreg_s5c_2p04"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6c_1p128: smps6 { + regulator-name = "vreg_s6c_1p128"; + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l1c_1p304: ldo1 { + regulator-name = "vreg_l1c_1p304"; + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p808: ldo2 { + regulator-name = "vreg_l2c_1p808"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p2: ldo5 { + regulator-name = "vreg_l5c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l7c_1p8: ldo7 { + regulator-name = "vreg_l7c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p2: ldo8 { + regulator-name = "vreg_l8c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l10c_3p3: ldo10 { + regulator-name = "vreg_l10c_3p3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l11c_0p8: ldo11 { + regulator-name = "vreg_l11c_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l12c_1p808: ldo12 { + regulator-name = "vreg_l12c_1p808"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l13c_2p96: ldo13 { + regulator-name = "vreg_l13c_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l15c_1p9: ldo15 { + regulator-name = "vreg_l15c_1p9"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l16c_3p008: ldo16 { + regulator-name = "vreg_l16c_3p008"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l18c_0p88: ldo18 { + regulator-name = "vreg_l18c_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>; +}; + +&uart2 { + status = "okay"; +}; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l10a_2p96>; + vcc-max-microamp = <750000>; + vccq-supply = <&vreg_l5c_1p2>; + vccq-max-microamp = <700000>; + vccq2-supply = <&vreg_s4a_1p8>; + vccq2-max-microamp = <750000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l8c_1p2>; + vdda-max-microamp = <87100>; + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda-pll-max-microamp = <18300>; +}; + + +&usb_1_hsphy { + status = "okay"; + vdda-pll-supply = <&vdd_usb_hs_core>; + vdda33-supply = <&vdda_usb_hs_3p1>; + vdda18-supply = <&vdda_usb_hs_1p8>; +}; + +&usb_1_qmpphy { + status = "okay"; + vdda-phy-supply = <&vreg_l8c_1p2>; + vdda-pll-supply = <&vdda_usb_ss_dp_core_1>; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&qupv3_id_1 { + status = "okay"; +};