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[209.85.220.65]) by mx.google.com with SMTPS id h4-v6sor3724482plk.93.2018.07.31.03.57.06 for (Google Transport Security); Tue, 31 Jul 2018 03:57:06 -0700 (PDT) Received-SPF: pass (google.com: domain of sumit.garg@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="baq4w/69"; spf=pass (google.com: domain of sumit.garg@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=sumit.garg@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oZVBcHd82wBPnZuRxaOPywqJW5JovGK2k4CkWaW9Xo8=; b=baq4w/69h+EI+Bq3FBFYKapEAhtasINmKYNB8+n+2B3Zeh/bOFmaDzyhr5qftP7iwf aZddD2tn2NbXW3L7eTzk6Q/npN1fDZHRxWjE2AsCYMEYK0kUkvs8m6rGI/GFmbmgv7rF 9vuQnkzGV7yuqBKqfls0qEaB2cxLVRNt3nkP4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oZVBcHd82wBPnZuRxaOPywqJW5JovGK2k4CkWaW9Xo8=; b=W+oB5n7AUpST/tCfX8tB59SWNYM1GqHZEMtJ44yvnh9Xd1ORN4jmM0z6f9O+XeJ4i8 j73e4/UerjX4crJBB9xcyeYITQiBHBiGKkHMOovFYC9KTuAyAcs2E4RlKKfipi55L14r T6kC8iXaAxqNC4KFAWtqrv7CZiZXf8uSz9KaVdYh1Q3U9ItKKNQcmn8qYrdEW8ka4Eqn vV/iH3Sw//0AD4bBWG6/fRewCDXB/ONqc/HS1T6qtJMed8KFv9H9eAs7KqiV2yTg/HeC jEnpx5L9fLnYDULoZkPm0fH/Z8Oc16yI0HmC1GbXkSXhloEg6hzNwBIHMqmGu0bQkHor EuZA== X-Gm-Message-State: AOUpUlHOg7MR+6LcXVPfIR/Nn93Ecrp5co/VO4mErvTC1bWFgte7bbNH zMtTLw4eaVKuIttsI11ZOCr7Rl2donbINA== X-Google-Smtp-Source: AAOMgpd1akeox0LljM+1vSdo4P5xI1mGr/yUR/Ia8uhxn2gmNe7BfIL18X5S33kChPhEW6eI6yIfew== X-Received: by 2002:a17:902:a40b:: with SMTP id p11-v6mr20118808plq.228.1533034626547; Tue, 31 Jul 2018 03:57:06 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([117.255.223.217]) by smtp.gmail.com with ESMTPSA id p19-v6sm27847659pgh.60.2018.07.31.03.57.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 31 Jul 2018 03:57:06 -0700 (PDT) From: Sumit Garg To: sumit.garg@linaro.org Cc: patches@linaro.org Subject: [edk2][PATCH edk2-platforms 1/1] Silicon/SynQuacer: add optional OP-TEE DT node Date: Tue, 31 Jul 2018 16:26:39 +0530 Message-Id: <1533034599-21418-2-git-send-email-sumit.garg@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533034599-21418-1-git-send-email-sumit.garg@linaro.org> References: <1533034599-21418-1-git-send-email-sumit.garg@linaro.org> OP-TEE is optional on Developerbox controlled via SCP firmware. To check if we need to delete OP-TEE DT node, we use "IsOpteePresent" OpteeLib api. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sumit Garg --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 1 + .../Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 7 ++++++ .../SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c | 28 ++++++++++++++++++++++ .../SynQuacerDtbLoaderLib.inf | 2 ++ 4 files changed, 38 insertions(+) -- 2.7.4 diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc index fc498eb65217..4ff5df978e8e 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -76,6 +76,7 @@ [LibraryClasses.common] ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf + OpteeLib|ArmPkg/Library/OpteeLib/OpteeLib.inf BaseLib|MdePkg/Library/BaseLib/BaseLib.inf BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 37d642e4b237..d109a5742793 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -574,6 +574,13 @@ #address-cells = <1>; #size-cells = <0>; }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; #include "SynQuacerCaches.dtsi" diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c index 897d06743708..b16e384262b0 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c @@ -19,6 +19,7 @@ #include #include #include +#include #include // add enough space for three instances of 'status = "disabled"' @@ -47,6 +48,29 @@ DisableDtNode ( } } +STATIC +VOID +DeleteDtNode ( + IN VOID *Dtb, + IN CONST CHAR8 *NodePath + ) +{ + INT32 Node; + INT32 Rc; + + Node = fdt_path_offset (Dtb, NodePath); + if (Node < 0) { + DEBUG ((DEBUG_ERROR, "%a: failed to locate DT path '%a': %a\n", + __FUNCTION__, NodePath, fdt_strerror (Node))); + return; + } + Rc = fdt_del_node (Dtb, Node); + if (Rc < 0) { + DEBUG ((DEBUG_ERROR, "%a: failed to delete node on '%a': %a\n", + __FUNCTION__, NodePath, fdt_strerror (Rc))); + } +} + /** Return a pool allocated copy of the DTB image that is appropriate for booting the current platform via DT. @@ -107,6 +131,10 @@ DtPlatformLoadDtb ( DisableDtNode (CopyDtb, "/sdhci@52300000"); } + if (!IsOpteePresent()) { + DeleteDtNode (CopyDtb, "/firmware/optee"); + } + *Dtb = CopyDtb; *DtbSize = CopyDtbSize; diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf index 548d62fd5c0a..fd21f7c376ce 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf @@ -24,6 +24,7 @@ [Sources] SynQuacerDtbLoaderLib.c [Packages] + ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec EmbeddedPkg/EmbeddedPkg.dec Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -34,6 +35,7 @@ [LibraryClasses] DxeServicesLib FdtLib MemoryAllocationLib + OpteeLib [Pcd] gSynQuacerTokenSpaceGuid.PcdPcieEnableMask