From patchwork Fri Jul 27 12:17:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 143035 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp750360ljj; Fri, 27 Jul 2018 05:20:33 -0700 (PDT) X-Google-Smtp-Source: AAOMgpflcAPp68xOoKtl7Ghu0MzRC37Z3n/KjbiFwuLwUGJwUXiyt0DYISC0TTdOCNNzH9G9gyat X-Received: by 2002:a17:902:be07:: with SMTP id r7-v6mr6066444pls.124.1532694033850; Fri, 27 Jul 2018 05:20:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532694033; cv=none; d=google.com; s=arc-20160816; b=HoxLgARmR0U2LZKNeR7XctkbnW4YJxqUr8I5NQW+oWbZVEt12nk+XrxqLT39F6W2dn J9gGsftxHlUqAp79sJzHigzB6iEy7aE+TyA7b7mfV7YP1J5wppEswrweRnvxzKsa9bat sHG0zu8RbLH96Z/Z3RMFYsiLZLz6k0psDg88USnGL0gVQzKgEIHjpBUcOq67MPx5EE9x OiSldu41ov3AATTQko0n8w58TsizSafF7xY/gx8yi5yhHz7jJGuRHk2BqbA04jidXf9k cG/e87xvmqXZKYTCVSzQ6Wl1ZMSHmV9P1PVdqTf099a/Thk4/kX54l9aOB4NtI/5CrRU 4gnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=bBKqonOcLNAZ2igBsJewV75MpSXs85r0Sy/UATJW6oQ=; b=jllAMVquztaOKaettSbJjKkIYJ7cJ1xPrhB/iJDBdyJDi+pcNpkvMVLFyutvK9BMsB BegnvBHEvoFy5l+uE2JhreJ8GplhzlFeqkHKWrLGbaZY4qVkvjQQ1Z6AbVxMq7PCbCDY Jc616kuH+z2j0V5NWmwZ9f/Afe2OHsFCSaCycJcaVZX+TrZdNorWJ+/LtKw3vEw8yVOG Zw6CQ4OcRrfyttKBBjtJH0mjRqeGBSMrbhSH2fDqUK1Mmwz/Nged3IxvIwdLr1PmrGUu XZhNFadvOyw+Xm4rH6MZZ8nLoAaoGJmqIavgunUqasWIFPgR7P5GARODdFqxRB2aZTby uKnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="gD0XFJJ/"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 83-v6si3927549pgg.663.2018.07.27.05.20.33; Fri, 27 Jul 2018 05:20:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="gD0XFJJ/"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388533AbeG0NmM (ORCPT + 5 others); Fri, 27 Jul 2018 09:42:12 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:46652 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732122AbeG0NmL (ORCPT ); Fri, 27 Jul 2018 09:42:11 -0400 Received: by mail-wr1-f67.google.com with SMTP id h14-v6so4857128wrw.13 for ; Fri, 27 Jul 2018 05:20:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wEFa4RHPoEn35RJzy2pKjxTnHvozF5v4g1fD/+BUQDQ=; b=gD0XFJJ/WG+Kw1OVt8qz6NsbLdnGN0zx8OExyAQ23GceQUP3E0fKZ70rz5j73cj5lD LaeH1JMvMUSoXrijbZvjAuIDGWRIi/dXGKxeXjaVcCHNtUtzQaVd9zF7FeBGteSC8FPm kM+sQofG0Yra+jQus7h8IZrrFiGeTxHd6svRg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wEFa4RHPoEn35RJzy2pKjxTnHvozF5v4g1fD/+BUQDQ=; b=pr5lV9cisEDWe4yQ9I4rJReba3JOSQlG7y/VmuCTyEWrPWEyWhy04J0wg0hoyrflf8 cVDShH3O/2i5ryjnIpNC9/HdXPS1QMIMwaaiijL01e6O4R7e5KnKZwvfGf26dF6bnl06 X3LlmAxoZMvpe6CMihd9IM1f+Nlaia7/VnwgdrfNe61vwA6XZ449sncf/F6xYIcLkFg3 ozxaqyyeQvO32tmfpXBZ4PEdbcEqOojVPDb5NZpuvZ7883od1HkQA3YiiZHL/GYkNQ2e okLmVAAitg90OAx3cLHBnCNdqh7j5yLehIzbGGZKqShCcUtrMWQJq23DwPtPSbOhUAKP bXhw== X-Gm-Message-State: AOUpUlGFcYD51yR1Aa/+2wdSSFZA05heXVRpvncVBq16M+0Mjta5XWyn SoplsmjPGBeuRhBdDq6sDJkxTg== X-Received: by 2002:adf:adc9:: with SMTP id w67-v6mr4454364wrc.135.1532694027667; Fri, 27 Jul 2018 05:20:27 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id b126-v6sm6178522wmf.41.2018.07.27.05.20.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Jul 2018 05:20:26 -0700 (PDT) From: Srinivas Kandagatla To: lee.jones@linaro.org, robh+dt@kernel.org, broonie@kernel.org Cc: mark.rutland@arm.com, lgirdwood@gmail.com, tiwai@suse.com, bgoswami@codeaurora.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, vkoul@kernel.org, alsa-devel@alsa-project.org, srinivas.kandagatla@linaro.org Subject: [PATCH v2 03/10] mfd: wcd9335: add wcd irq support Date: Fri, 27 Jul 2018 13:17:59 +0100 Message-Id: <20180727121806.18209-4-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180727121806.18209-1-srinivas.kandagatla@linaro.org> References: <20180727121806.18209-1-srinivas.kandagatla@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org WCD9335 supports two lines of irqs INTR1 and INTR2. Multiple interrupts are muxed via these lines. INTR1 consists of all possible interrupt sources like: Ear OCP, HPH OCP, MBHC, MAD, VBAT, and SVA INTR2 is a subset of first interrupt sources like MAD, VBAT, and SVA Signed-off-by: Srinivas Kandagatla --- drivers/mfd/Makefile | 2 +- drivers/mfd/wcd9335-core.c | 9 ++ drivers/mfd/wcd9335-irq.c | 172 ++++++++++++++++++++++++++++++++++++ include/dt-bindings/mfd/wcd9335.h | 43 +++++++++ include/linux/mfd/wcd9335/wcd9335.h | 3 + 5 files changed, 228 insertions(+), 1 deletion(-) create mode 100644 drivers/mfd/wcd9335-irq.c create mode 100644 include/dt-bindings/mfd/wcd9335.h -- 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index a4697370640b..210875afe78a 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -58,7 +58,7 @@ obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o endif obj-$(CONFIG_MFD_WCD9335) += wcd9335.o -wcd9335-objs := wcd9335-core.o +wcd9335-objs := wcd9335-core.o wcd9335-irq.o obj-$(CONFIG_MFD_WM8400) += wm8400-core.o wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o diff --git a/drivers/mfd/wcd9335-core.c b/drivers/mfd/wcd9335-core.c index 8f746901f4e9..6299dfb63aca 100644 --- a/drivers/mfd/wcd9335-core.c +++ b/drivers/mfd/wcd9335-core.c @@ -243,12 +243,20 @@ static int wcd9335_slim_status(struct slim_device *sdev, return ret; } + wcd9335_irq_init(wcd); wcd->slim_ifd = wcd->slim_ifd; return mfd_add_devices(wcd->dev, 0, wcd9335_devices, ARRAY_SIZE(wcd9335_devices), NULL, 0, NULL); } +static void wcd9335_slim_remove(struct slim_device *sdev) +{ + struct wcd9335 *wcd = dev_get_drvdata(&sdev->dev); + + wcd9335_irq_exit(wcd); +} + static const struct slim_device_id wcd9335_slim_id[] = { {0x217, 0x1a0, 0x1, 0x0}, {} @@ -259,6 +267,7 @@ static struct slim_driver wcd9335_slim_driver = { .name = "wcd9335-slim", }, .probe = wcd9335_slim_probe, + .remove = wcd9335_slim_remove, .device_status = wcd9335_slim_status, .id_table = wcd9335_slim_id, }; diff --git a/drivers/mfd/wcd9335-irq.c b/drivers/mfd/wcd9335-irq.c new file mode 100644 index 000000000000..84098c89419b --- /dev/null +++ b/drivers/mfd/wcd9335-irq.c @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018, Linaro Limited +// +#include +#include +#include +#include +#include +#include +#include + +static const struct regmap_irq wcd9335_irqs[] = { + /* INTR_REG 0 */ + [WCD9335_IRQ_SLIMBUS] = { + .reg_offset = 0, + .mask = BIT(0), + }, + [WCD9335_IRQ_FLL_LOCK_LOSS] = { + .reg_offset = 0, + .mask = BIT(1), + }, + [WCD9335_IRQ_HPH_PA_OCPL_FAULT] = { + .reg_offset = 0, + .mask = BIT(2), + }, + [WCD9335_IRQ_HPH_PA_OCPR_FAULT] = { + .reg_offset = 0, + .mask = BIT(3), + }, + [WCD9335_IRQ_EAR_PA_OCP_FAULT] = { + .reg_offset = 0, + .mask = BIT(4), + }, + [WCD9335_IRQ_HPH_PA_CNPL_COMPLETE] = { + .reg_offset = 0, + .mask = BIT(5), + }, + [WCD9335_IRQ_HPH_PA_CNPR_COMPLETE] = { + .reg_offset = 0, + .mask = BIT(6), + }, + [WCD9335_IRQ_EAR_PA_CNP_COMPLETE] = { + .reg_offset = 0, + .mask = BIT(7), + }, + /* INTR_REG 1 */ + [WCD9335_IRQ_MBHC_SW_DET] = { + .reg_offset = 1, + .mask = BIT(0), + }, + [WCD9335_IRQ_MBHC_ELECT_INS_REM_DET] = { + .reg_offset = 1, + .mask = BIT(1), + }, + [WCD9335_IRQ_MBHC_BUTTON_PRESS_DET] = { + .reg_offset = 1, + .mask = BIT(2), + }, + [WCD9335_IRQ_MBHC_BUTTON_RELEASE_DET] = { + .reg_offset = 1, + .mask = BIT(3), + }, + [WCD9335_IRQ_MBHC_ELECT_INS_REM_LEG_DET] = { + .reg_offset = 1, + .mask = BIT(4), + }, + /* INTR_REG 2 */ + [WCD9335_IRQ_LINE_PA1_CNP_COMPLETE] = { + .reg_offset = 2, + .mask = BIT(0), + }, + [WCD9335_IRQ_LINE_PA2_CNP_COMPLETE] = { + .reg_offset = 2, + .mask = BIT(1), + }, + [WCD9335_IRQ_LINE_PA3_CNP_COMPLETE] = { + .reg_offset = 2, + .mask = BIT(2), + }, + [WCD9335_IRQ_LINE_PA4_CNP_COMPLETE] = { + .reg_offset = 2, + .mask = BIT(3), + }, + [WCD9335_IRQ_SOUNDWIRE] = { + .reg_offset = 2, + .mask = BIT(4), + }, + [WCD9335_IRQ_VDD_DIG_RAMP_COMPLETE] = { + .reg_offset = 2, + .mask = BIT(5), + }, + [WCD9335_IRQ_RCO_ERROR] = { + .reg_offset = 2, + .mask = BIT(6), + }, + [WCD9335_IRQ_SVA_ERROR] = { + .reg_offset = 2, + .mask = BIT(7), + }, + /* INTR_REG 3 */ + [WCD9335_IRQ_MAD_AUDIO] = { + .reg_offset = 3, + .mask = BIT(0), + }, + [WCD9335_IRQ_MAD_BEACON] = { + .reg_offset = 3, + .mask = BIT(1), + }, + [WCD9335_IRQ_MAD_ULTRASOUND] = { + .reg_offset = 3, + .mask = BIT(2), + }, + [WCD9335_IRQ_VBAT_ATTACK] = { + .reg_offset = 3, + .mask = BIT(3), + }, + [WCD9335_IRQ_VBAT_RESTORE] = { + .reg_offset = 3, + .mask = BIT(4), + }, + [WCD9335_IRQ_SVA_OUTBOX1] = { + .reg_offset = 3, + .mask = BIT(5), + }, + [WCD9335_IRQ_SVA_OUTBOX2] = { + .reg_offset = 3, + .mask = BIT(6), + }, +}; + +static const struct regmap_irq_chip wcd9335_regmap_irq1_chip = { + .name = "wcd9335_pin1_irq", + .status_base = WCD9335_INTR_PIN1_STATUS0, + .mask_base = WCD9335_INTR_PIN1_MASK0, + .ack_base = WCD9335_INTR_PIN1_CLEAR0, + .type_base = WCD9335_INTR_LEVEL0, + .num_regs = 4, + .irqs = wcd9335_irqs, + .num_irqs = ARRAY_SIZE(wcd9335_irqs), +}; + +int wcd9335_irq_init(struct wcd9335 *wcd) +{ + int ret; + /* + * INTR1 consists of all possible interrupt sources Ear OCP, + * HPH OCP, MBHC, MAD, VBAT, and SVA + * INTR2 is a subset of first interrupt sources MAD, VBAT, and SVA + */ + wcd->intr1 = of_irq_get_byname(wcd->dev->of_node, "intr1"); + if (wcd->intr1 < 0 || wcd->intr1 == -EPROBE_DEFER) { + dev_err(wcd->dev, "Unable to configure irq\n"); + return wcd->intr1; + } + + ret = regmap_add_irq_chip(wcd->regmap, wcd->intr1, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, + 0, &wcd9335_regmap_irq1_chip, + &wcd->irq_data); + if (ret != 0) { + dev_err(wcd->dev, "Failed to register IRQ chip: %d\n", ret); + return ret; + } + + return 0; +} + +int wcd9335_irq_exit(struct wcd9335 *wcd) +{ + regmap_del_irq_chip(wcd->intr1, wcd->irq_data); + return 0; +} diff --git a/include/dt-bindings/mfd/wcd9335.h b/include/dt-bindings/mfd/wcd9335.h new file mode 100644 index 000000000000..61b6a11da00d --- /dev/null +++ b/include/dt-bindings/mfd/wcd9335.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides macros for WCD9335 device bindings. + * + * Copyright (c) 2018, Linaro Limited + */ + +#ifndef _DT_BINDINGS_MFD_WCD9335_H +#define _DT_BINDINGS_MFD_WCD9335_H + +#define WCD9335_IRQ_SLIMBUS 0 +#define WCD9335_IRQ_FLL_LOCK_LOSS 1 +#define WCD9335_IRQ_HPH_PA_OCPL_FAULT 2 +#define WCD9335_IRQ_HPH_PA_OCPR_FAULT 3 +#define WCD9335_IRQ_EAR_PA_OCP_FAULT 4 +#define WCD9335_IRQ_HPH_PA_CNPL_COMPLETE 5 +#define WCD9335_IRQ_HPH_PA_CNPR_COMPLETE 6 +#define WCD9335_IRQ_EAR_PA_CNP_COMPLETE 7 +#define WCD9335_IRQ_MBHC_SW_DET 8 +#define WCD9335_IRQ_MBHC_ELECT_INS_REM_DET 9 +#define WCD9335_IRQ_MBHC_BUTTON_PRESS_DET 10 +#define WCD9335_IRQ_MBHC_BUTTON_RELEASE_DET 11 +#define WCD9335_IRQ_MBHC_ELECT_INS_REM_LEG_DET 12 +#define WCD9335_IRQ_RESERVED_0 13 +#define WCD9335_IRQ_RESERVED_1 14 +#define WCD9335_IRQ_RESERVED_2 15 +#define WCD9335_IRQ_LINE_PA1_CNP_COMPLETE 16 +#define WCD9335_IRQ_LINE_PA2_CNP_COMPLETE 17 +#define WCD9335_IRQ_LINE_PA3_CNP_COMPLETE 18 +#define WCD9335_IRQ_LINE_PA4_CNP_COMPLETE 19 +#define WCD9335_IRQ_SOUNDWIRE 20 +#define WCD9335_IRQ_VDD_DIG_RAMP_COMPLETE 21 +#define WCD9335_IRQ_RCO_ERROR 22 +#define WCD9335_IRQ_SVA_ERROR 23 +#define WCD9335_IRQ_MAD_AUDIO 24 +#define WCD9335_IRQ_MAD_BEACON 25 +#define WCD9335_IRQ_MAD_ULTRASOUND 26 +#define WCD9335_IRQ_VBAT_ATTACK 27 +#define WCD9335_IRQ_VBAT_RESTORE 28 +#define WCD9335_IRQ_SVA_OUTBOX1 29 +#define WCD9335_IRQ_SVA_OUTBOX2 30 + +#endif /* _DT_BINDINGS_MFD_WCD9335_H */ diff --git a/include/linux/mfd/wcd9335/wcd9335.h b/include/linux/mfd/wcd9335/wcd9335.h index b9d2f7af243a..1479bfe75f23 100644 --- a/include/linux/mfd/wcd9335/wcd9335.h +++ b/include/linux/mfd/wcd9335/wcd9335.h @@ -39,4 +39,7 @@ struct wcd9335 { struct regulator_bulk_data supplies[WCD9335_MAX_SUPPLY]; }; +extern int wcd9335_irq_init(struct wcd9335 *wcd); +extern int wcd9335_irq_exit(struct wcd9335 *wcd); + #endif /* __WCD9335_H__ */ From patchwork Fri Jul 27 12:18:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 143038 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp750518ljj; Fri, 27 Jul 2018 05:20:42 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcoc+HJEMlQWwGcT5SoGJtTWqrZeQZBHe1Ih6wnJ0O6E2wQVoj1nMM5VGTkqsRjnoAOItC7 X-Received: by 2002:a62:57dc:: with SMTP id i89-v6mr6454395pfj.65.1532694042125; Fri, 27 Jul 2018 05:20:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532694042; cv=none; d=google.com; s=arc-20160816; b=ADQxA7g7NOPJEIS1SGNpbzOVQDTDJLQJ0eplzAhxVHtWqysV4mJIaupRIfqBBnfpmp APCInYSDNJqCnn5q7DykFyzywGSfDXK4omZNtMBnLH9J+id0jB5Xdiq5EKuL+z2ORQi2 Cvh/+M9sTYoT0+eTLVPc6xaeEuU2NHUjQlNQPfli5VjHqk/75Ze16i5Vodw9QPH6Zh8r lmXj2ahdyU5EqIIOylinMeXUyLGwCPDLyrBxLtlSmURtqttcLzBZcfjAAYPzy3seCtoW Kvy6F7DxIIpTiWF7kucX+VWS4FcE8Fo1RLXWbH1cAnAfwT3+agQspb9Hg2Psc8yKQ5ff 4PBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=cZktb5bn4s/WPjJuqIXGAkYltJGLk37zCwNFYzvpQJ4=; b=HiKRsJo9Wn/rzn/jeUq+CFnS/ieq3B1gv6179xA/5Y6po5BSeigoTcRDT4AMlhgfpG hd+Q2s88hPZOEFZkc0lpEF6SLJf1Q7vjnw8RsHBPv7slkYUY001zuKBfGsu9MhkfVR9g QkChu7hFmt793Gb3/KjJOF6yTVlOcKAQtpTCvRxevTv2gHuPEA310xhDrN6slLIRr244 lNgH0UAWEir9qdRo5FtFzve8rA6vKZGy6n2HNx0IfqE8AgEoHj+4X0ABrtEYXJ1y3zke 93Gey8NhNAfQTxcmWQqq1Da+FUYzsumaiu6fYvbLHggPD6A3MUJ+5myA0RRwXfm81T5e IMNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=W4tqVCqL; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q16-v6si3711643pgg.619.2018.07.27.05.20.41; Fri, 27 Jul 2018 05:20:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=W4tqVCqL; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388909AbeG0NmU (ORCPT + 5 others); Fri, 27 Jul 2018 09:42:20 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:42051 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388870AbeG0NmT (ORCPT ); Fri, 27 Jul 2018 09:42:19 -0400 Received: by mail-wr1-f65.google.com with SMTP id e7-v6so4854319wrs.9 for ; Fri, 27 Jul 2018 05:20:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=h0UL0hL4eaq2ilW7CEGbY3Go4irnNGMSMcSofuJmA9E=; b=W4tqVCqLM7GFt0OW1v5ruIXNmqwmImxGLny7dhyyNcDXV6cMC3JhOwvtjPBEl6lBIC /zVpO+Q5KrXirvZ9POT7w+7wSOH1RJYY73Zvv0MpDLFEJ6VKiWkpsPA9E1By8qCtMkCP kmxWPc34IdSre+53WP1c+Yt9KtjwuXnizxx84= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=h0UL0hL4eaq2ilW7CEGbY3Go4irnNGMSMcSofuJmA9E=; b=heKJNT2XbP1QoDPXLw6CeG93gkmlpeqAi4BTh6MTI5OBTspiSbQKDZWeUjjVj+Cp8R 01hoEEcQwfE74XBk79+ck8j5BKdwB4Dx18GpA2Kjgrc3jYlYHe6FujOV3fxB9Rj5scJs d3Zx4uLlO3O36Ty69/Tpu2L05IuDc/2nCIqC+WPT1EJq8K5pyyccwxdLiiCv65KkJDuH lym0x5j+5GOriNn7K+22XcWB2JIrIvjp5Io2kwyAk1VHiCx58UAxWOJkmJ8LNflCwZ/b R3ubVs4UdiI+OMNME776CEvHiBWF6wKSx3mGkNEGKXcUIihNJWckgzHmb34qAfpOQNdc ISrQ== X-Gm-Message-State: AOUpUlF28pK8sDjE8TaUmWiXJIk19Jd1I3+Wz4fAM3Khw7oDuXMHTpYA kkevx0Cwqhy74Gja4ipPT5Ox2A== X-Received: by 2002:adf:9546:: with SMTP id 64-v6mr4461673wrs.257.1532694037392; Fri, 27 Jul 2018 05:20:37 -0700 (PDT) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id b126-v6sm6178522wmf.41.2018.07.27.05.20.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Jul 2018 05:20:36 -0700 (PDT) From: Srinivas Kandagatla To: lee.jones@linaro.org, robh+dt@kernel.org, broonie@kernel.org Cc: mark.rutland@arm.com, lgirdwood@gmail.com, tiwai@suse.com, bgoswami@codeaurora.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, vkoul@kernel.org, alsa-devel@alsa-project.org, srinivas.kandagatla@linaro.org Subject: [PATCH v2 10/10] ASoC: apq8096: add support to Analog audio via WCD9335 slim Date: Fri, 27 Jul 2018 13:18:06 +0100 Message-Id: <20180727121806.18209-11-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180727121806.18209-1-srinivas.kandagatla@linaro.org> References: <20180727121806.18209-1-srinivas.kandagatla@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds support Analog audio via WCD9335 Codec connected via SLIMBus. Tested it on DB820c. Signed-off-by: Srinivas Kandagatla --- sound/soc/qcom/apq8096.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) -- 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/sound/soc/qcom/apq8096.c b/sound/soc/qcom/apq8096.c index a56156281c8d..b886c18177ef 100644 --- a/sound/soc/qcom/apq8096.c +++ b/sound/soc/qcom/apq8096.c @@ -10,6 +10,72 @@ #include #include +#define SLIM_MAX_TX_PORTS 16 +#define SLIM_MAX_RX_PORTS 16 +#define WCD9335_DEFAULT_MCLK_RATE 9600000 + +static int msm_snd_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS]; + u32 rx_ch_cnt = 0, tx_ch_cnt = 0; + int ret = 0; + + ret = snd_soc_dai_get_channel_map(codec_dai, + &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch); + if (ret != 0 && ret != -ENOTSUPP) { + pr_err("failed to get codec chan map, err:%d\n", ret); + goto end; + } else if (ret == -ENOTSUPP) { + return 0; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL, + rx_ch_cnt, rx_ch); + else + ret = snd_soc_dai_set_channel_map(cpu_dai, tx_ch_cnt, tx_ch, + 0, NULL); + if (ret != 0 && ret != -ENOTSUPP) + pr_err("Failed to set cpu chan map, err:%d\n", ret); + else if (ret == -ENOTSUPP) + ret = 0; +end: + return ret; +} + +static struct snd_soc_ops apq8096_ops = { + .hw_params = msm_snd_hw_params, +}; + +static int apq8096_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_dai *codec_dai = rtd->codec_dai; + + /* + * Codec SLIMBUS configuration + * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13 + * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13 + * TX14, TX15, TX16 + */ + unsigned int rx_ch[SLIM_MAX_RX_PORTS] = {144, 145, 146, 147, 148, 149, + 150, 151, 152, 153, 154, 155, 156}; + unsigned int tx_ch[SLIM_MAX_TX_PORTS] = {128, 129, 130, 131, 132, 133, + 134, 135, 136, 137, 138, 139, + 140, 141, 142, 143}; + + snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch), + tx_ch, ARRAY_SIZE(rx_ch), rx_ch); + + snd_soc_dai_set_sysclk(codec_dai, 0, 9600000, + SNDRV_PCM_STREAM_PLAYBACK); + + return 0; +} + static int apq8096_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_hw_params *params) { @@ -100,6 +166,8 @@ static int apq8096_sbc_parse_of(struct snd_soc_card *card) link->no_pcm = 1; link->ignore_pmdown_time = 1; link->be_hw_params_fixup = apq8096_be_hw_params_fixup; + link->init = apq8096_init; + link->ops = &apq8096_ops; } else { link->platform_of_node = link->cpu_of_node; link->codec_dai_name = "snd-soc-dummy-dai";