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[172.104.47.128]) by smtp.gmail.com with ESMTPSA id 20sm35326370pfq.42.2017.05.08.19.50.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 19:50:31 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , Stephen Boyd , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Mike Leach , Sudeep Holla Cc: Leo Yan Subject: [PATCH v9 1/9] coresight: bindings for CPU debug module Date: Tue, 9 May 2017 10:49:54 +0800 Message-Id: <1494298202-6739-2-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> References: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org According to ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate debug module and it can support self-hosted debug and external debug. Especially for supporting self-hosted debug, this means the program can access the debug module from mmio region; and usually the mmio region is integrated with coresight. So add document for binding debug component, includes binding to APB clock; and also need specify the CPU node which the debug module is dedicated to specific CPU. Suggested-by: Mike Leach Reviewed-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Acked-by: Rob Herring Signed-off-by: Leo Yan --- .../bindings/arm/coresight-cpu-debug.txt | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt new file mode 100644 index 0000000..2982912 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt @@ -0,0 +1,49 @@ +* CoreSight CPU Debug Component: + +CoreSight CPU debug component are compliant with the ARMv8 architecture +reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The +external debug module is mainly used for two modes: self-hosted debug and +external debug, and it can be accessed from mmio region from Coresight +and eventually the debug module connects with CPU for debugging. And the +debug module provides sample-based profiling extension, which can be used +to sample CPU program counter, secure state and exception level, etc; +usually every CPU has one dedicated debug module to be connected. + +Required properties: + +- compatible : should be "arm,coresight-cpu-debug"; supplemented with + "arm,primecell" since this driver is using the AMBA bus + interface. + +- reg : physical base address and length of the register set. + +- clocks : the clock associated to this component. + +- clock-names : the name of the clock referenced by the code. Since we are + using the AMBA framework, the name of the clock providing + the interconnect should be "apb_pclk" and the clock is + mandatory. The interface between the debug logic and the + processor core is clocked by the internal CPU clock, so it + is enabled with CPU clock by default. + +- cpu : the CPU phandle the debug module is affined to. When omitted + the module is considered to belong to CPU0. + +Optional properties: + +- power-domains: a phandle to the debug power domain. We use "power-domains" + binding to turn on the debug logic if it has own dedicated + power domain and if necessary to use "cpuidle.off=1" or + "nohlt" in the kernel command line or sysfs node to + constrain idle states to ensure registers in the CPU power + domain are accessible. + +Example: + + debug@f6590000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6590000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; From patchwork Tue May 9 02:49:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 98861 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1616681qge; Mon, 8 May 2017 19:50:57 -0700 (PDT) X-Received: by 10.98.110.195 with SMTP id j186mr35736073pfc.25.1494298257027; Mon, 08 May 2017 19:50:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494298257; cv=none; d=google.com; s=arc-20160816; b=ySWbbxUgm0K0vhg2YjgcYj1LuRFnTsLPz5tN7kE0RNHju2nWauLZ8yxzrSKzwIkUE9 UufJeGW1LSxHiOqMBLkdxYqOHqNe4LhA1eNuofU157VUZHpdfYK2mNcS/dtwfMfc7fMU 1W3DMn+Alt+UIf6SluFfWLVHwdFCU5+8rnSYbefdMQOHpmRfvcrkM6JTyy4VxvSwxvfw aekBsCFEKZv87uZ4dARWRv1mgICsVsKV9n8zm3A/KHwtutbwtysBx346q7pJqvAf6ERQ 7cR7tl6aK0d0Tn9L+usjMQ+TEFJgYk6RpRkhKTBuvArzrZ2TpMKHmt4TfAw7+C8Pxnzj 1WxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=ZglP///4W9xLsxrMU3467SMeum50WzRxYb8g676WV74=; b=Yobqs58hjdBgghNO7jvu5HL3CIrBYiA/h07uyLPhEx7IFyjWz1H3V/EtBoUK8XCmEG omivcgkwBmVW5P647xfeme7POPves2hPE4wt8qZrY3Y0T0dJapIOx1H9AvM4oTl4Rx7I pSYL0rFQMfy+FjuUuq1kguDuCCNopUc3qUDNxbzFwQWYiAogidpxDmrrqtM9LqGOD1+M 94RNe1sWSz0Ds60lptUpXkeq4mKftZVDm85NqfKqDsRPVjTGuQUx+7lm5R+dl3HTNuQw +ahURpQ4datFFSbLTjvYu/0sTradYm9Q/MbsrqAuJDHsQ57O63TcR6rNrdToOHiHmu03 HR2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[172.104.47.128]) by smtp.gmail.com with ESMTPSA id 20sm35326370pfq.42.2017.05.08.19.50.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 19:50:49 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , Stephen Boyd , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Mike Leach , Sudeep Holla Cc: Leo Yan Subject: [PATCH v9 3/9] doc: Add coresight_cpu_debug.enable to kernel-parameters.txt Date: Tue, 9 May 2017 10:49:56 +0800 Message-Id: <1494298202-6739-4-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> References: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add coresight_cpu_debug.enable to kernel-parameters.txt, this flag is used to enable/disable the CPU sampling based debugging. Signed-off-by: Leo Yan --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Mathieu Poirier diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index e4c9e0e..010ae02 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -649,6 +649,13 @@ /proc//coredump_filter. See also Documentation/filesystems/proc.txt. + coresight_cpu_debug.enable + [ARM,ARM64] + Format: + Enable/disable the CPU sampling based debugging. + 0: default value, disable debugging + 1: enable debugging at boot time + cpuidle.off=1 [CPU_IDLE] disable the cpuidle sub-system From patchwork Tue May 9 02:49:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 98863 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1616790qge; Mon, 8 May 2017 19:51:18 -0700 (PDT) X-Received: by 10.99.101.130 with SMTP id z124mr21708753pgb.8.1494298278798; Mon, 08 May 2017 19:51:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494298278; cv=none; d=google.com; s=arc-20160816; b=mUZ0AXieNfBHMUC8pFXzEvdraDMo5mYOh2yRK6naskADfkFs5NnTnSsjisp98kn5se 5wuJsQjAQ37U3om0dh9mQ78l2iFoWRYHzuEywyTt/4U/JdX21H4UcnyWmt8gQLOpqFmx /K7DSAe6PigYaY9RzvYsEbolqh7gkAkapriZjCdhwRGJ8lm7/uCKpMJ6z7O5R6jA9YxJ 3sfg5oN43osAO5XpsR3ebdDsaUmyMk98Ag/N9tfSG0Hz14CRZqSmwyVOK70T+Jsa9h/x A4dP7ziPRCzZ1N6u9bx9wVJEo30AJDluvD7EWtFVFW9tOHcnlLCdUQMj1rIFpQ1MgXX+ GI9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=PnpN8Va5xDrvbAb6sO2mTuizYThuGNG8c3U1vVTHVw8=; b=I716G9tmE0fiDjew1ZvkYgo7dIH7bel+rI/LWPiH8HMAop524WqHbcqowEi/OMTxhN RmynI1OGHki+/BPTW3ddqYImsgV4O6O5kgJ8si5KQoTa4SY4pKvOxItOtnx4fPN+D8g9 3lVmuk9FW0XoBVPbjm2wM8Syj/2CIvag9oul8GkpHumsPdcTldJdxIYBU00arTyeHFAI IHdGyS6Cz4nqVY9GgR9GFMBo0hUeaJwlSuYaVLEybY6Phs4OoSbgfXdbRLhU4mpsJ1xL oAZXet/WxrbMYYcCi/vk41qji0yDi+KSQwcM3wcmT4PW2N9VmO4gEm1oQRxhxXCcNVHk OCrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[172.104.47.128]) by smtp.gmail.com with ESMTPSA id 20sm35326370pfq.42.2017.05.08.19.50.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 19:51:06 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , Stephen Boyd , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Mike Leach , Sudeep Holla Cc: Leo Yan Subject: [PATCH v9 5/9] coresight: of_get_coresight_platform_data: Add missing of_node_put Date: Tue, 9 May 2017 10:49:58 +0800 Message-Id: <1494298202-6739-6-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> References: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Suzuki K Poulose The of_get_coresight_platform_data iterates over the possible CPU nodes to find a given cpu phandle. However it does not drop the reference to the node pointer returned by the of_get_coresight_platform_data. This patch also introduces another minor fix is to use of_cpu_device_node_get() to replace of_get_cpu_node(). Cc: Mathieu Poirier Reviewed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose [Leo: minor tweaks for of_get_coresight_platform_data] Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/of_coresight.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 2749853..225b2dd 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -109,7 +109,8 @@ of_get_coresight_platform_data(struct device *dev, struct coresight_platform_data *pdata; struct of_endpoint endpoint, rendpoint; struct device *rdev; - struct device_node *dn; + bool found; + struct device_node *dn, *np; struct device_node *ep = NULL; struct device_node *rparent = NULL; struct device_node *rport = NULL; @@ -176,17 +177,19 @@ of_get_coresight_platform_data(struct device *dev, } while (ep); } - /* Affinity defaults to CPU0 */ - pdata->cpu = 0; dn = of_parse_phandle(node, "cpu", 0); - for (cpu = 0; dn && cpu < nr_cpu_ids; cpu++) { - if (dn == of_get_cpu_node(cpu, NULL)) { - pdata->cpu = cpu; + for_each_possible_cpu(cpu) { + np = of_cpu_device_node_get(cpu); + found = (dn == np); + of_node_put(np); + if (found) break; - } } of_node_put(dn); + /* Affinity to CPU0 if no cpu nodes are found */ + pdata->cpu = found ? cpu : 0; + return pdata; } EXPORT_SYMBOL_GPL(of_get_coresight_platform_data); From patchwork Tue May 9 02:49:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 98864 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1616813qge; Mon, 8 May 2017 19:51:22 -0700 (PDT) X-Received: by 10.84.222.129 with SMTP id x1mr41011310pls.144.1494298282339; Mon, 08 May 2017 19:51:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494298282; cv=none; d=google.com; s=arc-20160816; b=Z5+438itPBfalMjZX87ywUO7K+QZmSKh5tiQyD5KChrcVvhZqDfpiEVjFZElMoV02G cVKc4ifIQDJj1u7hOZ0vLPFIbwQ+uuZn1+9iPIBU4FQPx6P+H0z7mmkaZGG6Fedr1WXF 2bRj8fp695atEB3nW1TOaNUJTUN/mMxaRlDFyGY5jZ+njYkf8of5grJ6BwtiuxsxYQbR 5dkZVPYI6V//IuidmkzCBeDSGBzB5gLLJAxPrB+2Up6PfgtXUN+EwML16oLapMXmHe6R Q+fT1D8RKlFAxzuOQds/3yHFxqKrvtS9pFx89gj3zjg8PINB8DfQ+/TSH2snTU6aOvWG jBjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=tKG/BB0MfZvHs6Xy8plsaOYGZwjyw5T9RTPKbQ1rU1M=; b=yawquSNFHDOAvfdhsoHcdw6DB0pQD9McacisOKpWT9WQ1KjO7iE9FZ6w+/FVyP6wE4 7FieZUnXmbX199xyLkE1NZaMgi07Sbl4kzQDcq2tWa2DZ6RY7AvJbw1IrDYWHfCxAxqa Uq2Tqcs8LZ2UWZlBOUfQFUD0sm+oSyodF+kdsZ7ZX7JsZ8msNykP7kIP9nKia1WTMcEd g4Qb0pq3IgJVQRlWGmQVB8Bdy9kycL/QHvCL2jHgMnZAwtxZsm2MlC2eH0/jfaO+h4BE o/BZCBucolsvzGvxjw04pthrrCXIT3Eco6/unwnRYQ7mZPV17gbDlZhtAZ5++GBuN3H/ RaFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[172.104.47.128]) by smtp.gmail.com with ESMTPSA id 20sm35326370pfq.42.2017.05.08.19.51.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 19:51:15 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , Stephen Boyd , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Mike Leach , Sudeep Holla Cc: Leo Yan Subject: [PATCH v9 6/9] coresight: refactor with function of_coresight_get_cpu Date: Tue, 9 May 2017 10:49:59 +0800 Message-Id: <1494298202-6739-7-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> References: <1494298202-6739-1-git-send-email-leo.yan@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This is refactor to add function of_coresight_get_cpu(), so it's used to retrieve CPU id for coresight component. Finally can use it as a common function for multiple places. Suggested-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/of_coresight.c | 43 +++++++++++++++++++----------- include/linux/coresight.h | 3 +++ 2 files changed, 31 insertions(+), 15 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c index 225b2dd..a187941 100644 --- a/drivers/hwtracing/coresight/of_coresight.c +++ b/drivers/hwtracing/coresight/of_coresight.c @@ -101,16 +101,40 @@ static int of_coresight_alloc_memory(struct device *dev, return 0; } +int of_coresight_get_cpu(const struct device_node *node) +{ + int cpu; + bool found; + struct device_node *dn, *np; + + dn = of_parse_phandle(node, "cpu", 0); + + /* Affinity defaults to CPU0 */ + if (!dn) + return 0; + + for_each_possible_cpu(cpu) { + np = of_cpu_device_node_get(cpu); + found = (dn == np); + of_node_put(np); + if (found) + break; + } + of_node_put(dn); + + /* Affinity to CPU0 if no cpu nodes are found */ + return found ? cpu : 0; +} +EXPORT_SYMBOL_GPL(of_coresight_get_cpu); + struct coresight_platform_data * of_get_coresight_platform_data(struct device *dev, const struct device_node *node) { - int i = 0, ret = 0, cpu; + int i = 0, ret = 0; struct coresight_platform_data *pdata; struct of_endpoint endpoint, rendpoint; struct device *rdev; - bool found; - struct device_node *dn, *np; struct device_node *ep = NULL; struct device_node *rparent = NULL; struct device_node *rport = NULL; @@ -177,18 +201,7 @@ of_get_coresight_platform_data(struct device *dev, } while (ep); } - dn = of_parse_phandle(node, "cpu", 0); - for_each_possible_cpu(cpu) { - np = of_cpu_device_node_get(cpu); - found = (dn == np); - of_node_put(np); - if (found) - break; - } - of_node_put(dn); - - /* Affinity to CPU0 if no cpu nodes are found */ - pdata->cpu = found ? cpu : 0; + pdata->cpu = of_coresight_get_cpu(node); return pdata; } diff --git a/include/linux/coresight.h b/include/linux/coresight.h index bf0aa50..d950dad 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -263,10 +263,13 @@ static inline int coresight_timeout(void __iomem *addr, u32 offset, #endif #ifdef CONFIG_OF +extern int of_coresight_get_cpu(const struct device_node *node); extern struct coresight_platform_data * of_get_coresight_platform_data(struct device *dev, const struct device_node *node); #else +static inline int of_coresight_get_cpu(const struct device_node *node) +{ return 0; } static inline struct coresight_platform_data *of_get_coresight_platform_data( struct device *dev, const struct device_node *node) { return NULL; } #endif