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Mon, 7 Jun 2021 15:49:43 +0000 From: Sean Anderson To: linux-clk@vger.kernel.org, Luca Ceresoli Cc: Adam Ford , Stephen Boyd , Michael Turquette , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: clk: vc5: Add property for SD polarity Date: Mon, 7 Jun 2021 11:49:30 -0400 Message-Id: <20210607154931.2491499-1-sean.anderson@seco.com> X-Mailer: git-send-email 2.25.1 X-Originating-IP: [50.195.82.171] X-ClientProxiedBy: MN2PR16CA0060.namprd16.prod.outlook.com (2603:10b6:208:234::29) To DB7PR03MB4523.eurprd03.prod.outlook.com (2603:10a6:10:19::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from plantagenet.inhand.com (50.195.82.171) by MN2PR16CA0060.namprd16.prod.outlook.com (2603:10b6:208:234::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.15 via Frontend Transport; Mon, 7 Jun 2021 15:49:41 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4dd77d1b-6352-436e-449e-08d929cbdde6 X-MS-TrafficTypeDiagnostic: DB8PR03MB5673: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; 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Signed-off-by: Sean Anderson --- Documentation/devicetree/bindings/clock/idt,versaclock5.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml index 28675b0b80f1..e6406c0db624 100644 --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml @@ -64,6 +64,10 @@ properties: maximum: 22760 description: Optional load capacitor for XTAL1 and XTAL2 + idt,sd-active-high: + $ref: /schemas/types.yaml#/definitions/flag + description: SD/OE pin polarity is active-high + patternProperties: "^OUT[1-4]$": type: object