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[2a00:1450:400c:c0c::22f]) by mx.google.com with ESMTPS id 53si15436733wrw.52.2017.05.08.09.21.25 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 May 2017 09:21:25 -0700 (PDT) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c0c::22f as permitted sender) client-ip=2a00:1450:400c:c0c::22f; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c0c::22f as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-wr0-x22f.google.com with SMTP id l50so48844073wrc.3 for ; Mon, 08 May 2017 09:21:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bkYvbkvAgYqMnIvIbZemdQIag0rI0kkQWTBfh8JdM1Q=; b=NEkvRIg4fNsBXARN9+ROpcuCW1kBMLBzVAESlgW+DNY0zkPvT8z8BEQp0PXTUjNOvt +4b5UeJo3SV1Ax7mbq5ZbhVP0G7/AdwsXG9Py7augN24kKMkqlsDYJmPUUj9C+8nCq10 0/cyXz5A7l28bEGViVoQtRL5qoUxNq6Gz5IHI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bkYvbkvAgYqMnIvIbZemdQIag0rI0kkQWTBfh8JdM1Q=; b=WAr1bsriF2B9MEFxKebsaG7RfK6q/O/2Eev6h8scO/BJMuZxtJfcHZcO7f9BzbU8Jj MKQ+6QJGqX0/N6l9BviJ+ya01t2a6bkuUKenT6BlBz3miMz78A1fD6VYSPNJp5AKAChU BfhCf8t4htR24A7ht1zXjqtWiVaV0gcEUA/XqJ6bbTO+1ROBEGoPVbVgqSQcdaEn6FOY D/nltLg7VuDNsF+sqIZ4XQ3Lu9IQ+N8wtAY5TuIDLBnr9TI5f3HgN2KyKUJt0ddibFw2 qBtIHqg/BQv4oJ6nN8jOrzhljifryfO49+h5cFAepMTzGakJEDywSn5jgjtqrDvO9pay 4cbg== X-Gm-Message-State: AODbwcD7ER1R4vloTEo8TuEiMe5YzxZzTAR+xhWUQYmExBWqQIsajqTe IfnsHhQ35jxvW1E/uww= X-Received: by 10.46.82.85 with SMTP id g82mr6616380ljb.68.1494260485257; Mon, 08 May 2017 09:21:25 -0700 (PDT) Return-Path: Received: from localhost.localdomain (h-155-4-221-67.na.cust.bahnhof.se. [155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:24 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano , devicetree@vger.kernel.org, Rob Herring , linux-mmc@vger.kernel.org Subject: [PATCH 1/8] mmc: dt: pwrseq-simple: Invent power-off-delay-us Date: Mon, 8 May 2017 18:21:10 +0200 Message-Id: <1494260477-25163-2-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> During power off, after the GPIO pin has been asserted, some devices like the Wifi chip from TI, Wl18xx, needs a delay before the host continues with clock gating and turning off regulators as to follow a graceful shutdown sequence. Therefore invent an optional power-off-delay-us DT binding for mmc-pwrseq-simple, to allow us to support this constraint. Cc: devicetree@vger.kernel.org Cc: Rob Herring Cc: linux-mmc@vger.kernel.org Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt | 2 ++ 1 file changed, 2 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt index e254368..9029b45 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt @@ -18,6 +18,8 @@ Optional properties: "ext_clock" (External clock provided to the card). - post-power-on-delay-ms : Delay in ms after powering the card and de-asserting the reset-gpios (if any) +- power-off-delay-us : Delay in us after asserting the reset-gpios (if any) + during power off of the card. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:25 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano , linux-mmc@vger.kernel.org Subject: [PATCH 2/8] mmc: pwrseq_simple: Parse DTS for the power-off-delay-us property Date: Mon, 8 May 2017 18:21:11 +0200 Message-Id: <1494260477-25163-3-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> If the optional power-off-delay-us property is found, insert the corresponding delay after asserting the GPIO during power off. This enables a graceful shutdown sequence for some devices. Cc: linux-mmc@vger.kernel.org Signed-off-by: Ulf Hansson --- drivers/mmc/core/pwrseq_simple.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c index 1304160..13ef162 100644 --- a/drivers/mmc/core/pwrseq_simple.c +++ b/drivers/mmc/core/pwrseq_simple.c @@ -27,6 +27,7 @@ struct mmc_pwrseq_simple { struct mmc_pwrseq pwrseq; bool clk_enabled; u32 post_power_on_delay_ms; + u32 power_off_delay_us; struct clk *ext_clk; struct gpio_descs *reset_gpios; }; @@ -78,6 +79,10 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host) mmc_pwrseq_simple_set_gpios_value(pwrseq, 1); + if (pwrseq->power_off_delay_us) + usleep_range(pwrseq->power_off_delay_us, + 2 * pwrseq->power_off_delay_us); + if (!IS_ERR(pwrseq->ext_clk) && pwrseq->clk_enabled) { clk_disable_unprepare(pwrseq->ext_clk); pwrseq->clk_enabled = false; @@ -119,6 +124,8 @@ static int mmc_pwrseq_simple_probe(struct platform_device *pdev) device_property_read_u32(dev, "post-power-on-delay-ms", &pwrseq->post_power_on_delay_ms); + device_property_read_u32(dev, "power-off-delay-us", + &pwrseq->power_off_delay_us); pwrseq->pwrseq.dev = dev; pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops; From patchwork Mon May 8 16:21:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98837 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407396qge; Mon, 8 May 2017 09:21:27 -0700 (PDT) X-Received: by 10.28.182.70 with SMTP id g67mr7252612wmf.139.1494260487547; Mon, 08 May 2017 09:21:27 -0700 (PDT) Return-Path: Received: from mail-wm0-x22d.google.com (mail-wm0-x22d.google.com. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:26 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 3/8] mfd: dts: hi655x: Add clock binding for the pmic Date: Mon, 8 May 2017 18:21:12 +0200 Message-Id: <1494260477-25163-4-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> From: Daniel Lezcano The hi655x PMIC provides the regulators but also a clock. The latter is missing in the definition, so extend the documentation to include this as well. Signed-off-by: Daniel Lezcano Acked-by: Rob Herring Acked-by: Lee Jones [Ulf: Split patch and updated changelog] Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt index 0548569..9630ac0 100644 --- a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -16,6 +16,11 @@ Required properties: - reg: Base address of PMIC on Hi6220 SoC. - interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). - pmic-gpios: The GPIO used by PMIC IRQ. +- #clock-cells: From common clock binding; shall be set to 0 + +Optional properties: +- clock-output-names: From common clock binding to override the + default output clock name Example: pmic: pmic@f8000000 { @@ -24,4 +29,5 @@ Example: interrupt-controller; #interrupt-cells = <2>; pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + #clock-cells = <0>; } From patchwork Mon May 8 16:21:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98838 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407402qge; Mon, 8 May 2017 09:21:28 -0700 (PDT) X-Received: by 10.28.157.14 with SMTP id g14mr12663232wme.114.1494260488494; Mon, 08 May 2017 09:21:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494260488; cv=none; d=google.com; s=arc-20160816; b=nR/mdlDZuHNutbLByVozIYb2hxkfy9mUCpjLymP1gSzUHVtaMsUThonRyPO+bD3ODM ArMT89qXF+TCSdjmjCT2eOlv/cEInNO35EbfOKKUjH5cLKXxwKZgIVdsqTROxDYxDvfu /vLdPcHVEolYgKU7c3cEWA+Ril7k2TfHDVnkIbacR3BezbfHTW3xb+JwzGtv07XCWopD jIUcBBxkx9D9bHVCfODvmLNRYBJUWrRn7SOEoH0CaVt2o6AJ7j3ObsyXmT0QZ6J7C9zl ZYrxpSM3l60XRV18WYm8KsgYD5y0WE3qvFLmxKukEnqXoFOn1oA1mAUeo+K6dbBy/IUR lZ7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=e8ALjf5nQq4ywxF0ua8MpMPOSTt7IfYvweHKItZenCg=; b=BMK1B33koZntT+gcWBtym290s0abZgbm4fPUOez2L2EtexpBijQJVgE/AXIatkIi7E 19/LrwPDKdGFjKWYn3CU6tG6pgmfEl/9dpDo3bZlrA418KbDqlAVVmz77JPy8UUj2DOJ EJBAeK/C/z0QPpW2w8nZrsyX13F593usRz67112oToKbWl/H30ylH0UfaR+ZdA6DTp/o sYkGUx4jNIMJDSn/KL7IxrOVYXIL43mSsr5UZYz50+DKnlrRGSff185K5sfkAvOp/WEp cmyJzRs4RIuK8QtI2xWVvv0+nrSnfLIYSX+AQD6H+XT+67ZAg35vYGgAkhSVv3SN9t2E J5vw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c09::234 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-wm0-x234.google.com (mail-wm0-x234.google.com. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:27 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 4/8] arm64: dts: hikey: Add clock for the pmic mfd Date: Mon, 8 May 2017 18:21:13 +0200 Message-Id: <1494260477-25163-5-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> From: Daniel Lezcano The hi655x PMIC provides the regulators but also a clock. The latter is missing so let's add it. This clock is used by WiFi/Bluetooth chip, but that connection is done in a separate change on top of this one. Signed-off-by: Daniel Lezcano Acked-by: Rob Herring Acked-by: Lee Jones [Ulf: Split patch and updated changelog] Signed-off-by: Ulf Hansson --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index dba3c13..e0496f7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -325,6 +325,7 @@ pmic: pmic@f8000000 { compatible = "hisilicon,hi655x-pmic"; reg = <0x0 0xf8000000 0x0 0x1000>; + #clock-cells = <0>; interrupt-controller; #interrupt-cells = <2>; pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; From patchwork Mon May 8 16:21:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98839 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407409qge; Mon, 8 May 2017 09:21:29 -0700 (PDT) X-Received: by 10.223.135.213 with SMTP id c21mr47615582wrc.10.1494260489446; Mon, 08 May 2017 09:21:29 -0700 (PDT) Return-Path: Received: from mail-wm0-x22c.google.com (mail-wm0-x22c.google.com. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:28 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 5/8] arm64: dts: hi6220: Move the fixed_5v_hub regulator to the hikey dts Date: Mon, 8 May 2017 18:21:14 +0200 Message-Id: <1494260477-25163-6-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> The regulator is a part of the hikey board, therefore let's move it from the hi6220 SoC dtsi file into the hikey dts file . Let's also rename the regulator according to the datasheet (5V_HUB) to better reflect the HW. Signed-off-by: Ulf Hansson Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 10 ++++++++++ arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 12 +----------- 2 files changed, 11 insertions(+), 11 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e0496f7..8070c75 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -81,6 +81,16 @@ }; }; + reg_5v_hub: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "5V_HUB"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + gpio = <&gpio0 7 0>; + regulator-always-on; + }; + soc { spi0: spi@f7106000 { status = "ok"; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 1e5129b..951152d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -725,20 +725,10 @@ status = "disabled"; }; - fixed_5v_hub: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "fixed_5v_hub"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - gpio = <&gpio0 7 0>; - regulator-always-on; - }; - usb_phy: usbphy { compatible = "hisilicon,hi6220-usb-phy"; #phy-cells = <0>; - phy-supply = <&fixed_5v_hub>; + phy-supply = <®_5v_hub>; hisilicon,peripheral-syscon = <&sys_ctrl>; }; From patchwork Mon May 8 16:21:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98840 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407419qge; Mon, 8 May 2017 09:21:30 -0700 (PDT) X-Received: by 10.28.230.197 with SMTP id e66mr6563897wmi.39.1494260490338; Mon, 08 May 2017 09:21:30 -0700 (PDT) Return-Path: Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:29 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 6/8] arm64: dts: hikey: Add the SYS_5V and the VDD_3V3 regulators Date: Mon, 8 May 2017 18:21:15 +0200 Message-Id: <1494260477-25163-7-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> Add these regulators to better describe the HW, but also because those is needed in following changes. Signed-off-by: Ulf Hansson Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 8070c75..6dab03a 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -81,7 +81,26 @@ }; }; - reg_5v_hub: regulator@0 { + reg_sys_5v: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "SYS_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_vdd_3v3: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "VDD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <®_sys_5v>; + }; + + reg_5v_hub: regulator@2 { compatible = "regulator-fixed"; regulator-name = "5V_HUB"; regulator-min-microvolt = <5000000>; @@ -89,6 +108,7 @@ regulator-boot-on; gpio = <&gpio0 7 0>; regulator-always-on; + vin-supply = <®_sys_5v>; }; soc { From patchwork Mon May 8 16:21:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98841 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407428qge; Mon, 8 May 2017 09:21:31 -0700 (PDT) X-Received: by 10.28.173.65 with SMTP id w62mr13834703wme.48.1494260491339; Mon, 08 May 2017 09:21:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494260491; cv=none; d=google.com; s=arc-20160816; b=kveyQV6/CDwIgKTJrTba+I4UYZKRpUIyQnBZ7yw9W9LaabpFvW5jeXOvAteluVU5Ue 3tMoW+hn5kPLBZxqUx1aw56n48mH08ytI3lZXZhsWZCD2nwb8bkAdrvwYYN4V2Zt1Vsn zxfFhxjnstI3UomgndhXk+YmxebvGC/iPj4Dc60CJFZ8VUJB3y/jCBJHN2ZNe+jnqeGG bdxNJB59iKCobMFxZNHzOblzW6GyWYgZl1cfvWmQbnoJu7EgX7aPewZa2E7+sj1ACGrl sEwJeNSV0DJOLGmxcrUSy5+wHq95n773G5toxKnUtVxrQDKwGMxJzy2+G4VxyPjZO+mB 7n4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=G7pR38JJxzCqGgTxeH1/p6ccQR7FDBvDQefUOPhTIHM=; b=PhJpQ3FqdppiU/sXyErhfXl5GJuvtCIh5pwRqnPAydxKT1nzcIwMR+s97jVxXNAIwP DPdcg3TZWBUkZPPF4OE9YdGNM1FvjgEnECvpHQQ00At7Xro8kHPEBzooWcdgBYMfTNhf vsJSWGqjnF9nZ+SrJmdJt1zCsBgviJa5f4gEz6FLq5pz8PPB1v200JjDhzzS4nstNuw9 YreREiSyL6GVXygk7Sr9g1pYWm49kmwyag+Ug+jxZgCCoSRhyC4H8GHNt3IBLm3ISAJh tssfe4YMLZJPrwx14wc/VOoOT7ofL8fk9ONLu4hCZc4UHvqIQVTHf4e/eclz0iV7YE99 bUfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c09::232 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-wm0-x232.google.com (mail-wm0-x232.google.com. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:30 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 7/8] arm64: dts: hi6220: Move board data from the dwmmc nodes to hikey dts Date: Mon, 8 May 2017 18:21:16 +0200 Message-Id: <1494260477-25163-8-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> Move the board specific descriptions for the dwmmc nodes in the hi6220 SoC dtsi, into the hikey dts as it's there these belongs. While changing this, let's take the opportunity to drop the use of the "ti,non-removable" binding for one of the dwmmc device nodes, as it's not a valid binding and not used. Drop also the unnecessary use of "num-slots = <0x1>" for all of the dwmmc nodes, as there is no need to set this since when default number of slots is one. Signed-off-by: Ulf Hansson Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 23 ++++++++++++++++++++++- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 19 ------------------- 2 files changed, 22 insertions(+), 20 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 6dab03a..d4b3879 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -281,8 +281,29 @@ /* GPIO blocks 16 thru 19 do not appear to be routed to pins */ + dwmmc_0: dwmmc0@f723d000 { + cap-mmc-highspeed; + non-removable; + bus-width = <0x8>; + vmmc-supply = <&ldo19>; + }; + + dwmmc_1: dwmmc1@f723e000 { + card-detect-delay = <200>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + vqmmc-supply = <&ldo7>; + vmmc-supply = <&ldo10>; + bus-width = <0x4>; + disable-wp; + cd-gpios = <&gpio1 0 1>; + }; + dwmmc_2: dwmmc2@f723f000 { - ti,non-removable; + broken-cd; + bus-width = <0x4>; non-removable; /* WL_EN */ vmmc-supply = <&wlan_en_reg>; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 951152d..5013e4b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -756,17 +756,12 @@ dwmmc_0: dwmmc0@f723d000 { compatible = "hisilicon,hi6220-dw-mshc"; - num-slots = <0x1>; - cap-mmc-highspeed; - non-removable; reg = <0x0 0xf723d000 0x0 0x1000>; interrupts = <0x0 0x48 0x4>; clocks = <&sys_ctrl 2>, <&sys_ctrl 1>; clock-names = "ciu", "biu"; resets = <&sys_ctrl PERIPH_RSTDIS0_MMC0>; reset-names = "reset"; - bus-width = <0x8>; - vmmc-supply = <&ldo19>; pinctrl-names = "default"; pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func &emmc_cfg_func &emmc_rst_cfg_func>; @@ -774,13 +769,7 @@ dwmmc_1: dwmmc1@f723e000 { compatible = "hisilicon,hi6220-dw-mshc"; - num-slots = <0x1>; - card-detect-delay = <200>; hisilicon,peripheral-syscon = <&ao_ctrl>; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; reg = <0x0 0xf723e000 0x0 0x1000>; interrupts = <0x0 0x49 0x4>; #address-cells = <0x1>; @@ -789,11 +778,6 @@ clock-names = "ciu", "biu"; resets = <&sys_ctrl PERIPH_RSTDIS0_MMC1>; reset-names = "reset"; - vqmmc-supply = <&ldo7>; - vmmc-supply = <&ldo10>; - bus-width = <0x4>; - disable-wp; - cd-gpios = <&gpio1 0 1>; pinctrl-names = "default", "idle"; pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; @@ -801,15 +785,12 @@ dwmmc_2: dwmmc2@f723f000 { compatible = "hisilicon,hi6220-dw-mshc"; - num-slots = <0x1>; reg = <0x0 0xf723f000 0x0 0x1000>; interrupts = <0x0 0x4a 0x4>; clocks = <&sys_ctrl HI6220_MMC2_CIUCLK>, <&sys_ctrl HI6220_MMC2_CLK>; clock-names = "ciu", "biu"; resets = <&sys_ctrl PERIPH_RSTDIS0_MMC2>; reset-names = "reset"; - bus-width = <0x4>; - broken-cd; pinctrl-names = "default", "idle"; pinctrl-0 = <&sdio_pmx_func &sdio_clk_cfg_func &sdio_cfg_func>; pinctrl-1 = <&sdio_pmx_idle &sdio_clk_cfg_idle &sdio_cfg_idle>; From patchwork Mon May 8 16:21:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 98842 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1407437qge; Mon, 8 May 2017 09:21:32 -0700 (PDT) X-Received: by 10.28.133.70 with SMTP id h67mr12553009wmd.136.1494260492518; Mon, 08 May 2017 09:21:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494260492; cv=none; d=google.com; s=arc-20160816; b=rIXoRldeFnkFchO7uwr+9skWmqGS9KIMln6CqBJsNWCzqcCUGPOIH/M3+5Hc4n8kzr PHQ5H2n1LWt86PLJhzb7mFKu4+6TyJ1C3Yhv/6kSmRVxlK9FUigeWyerMSwh+tsa88T4 4wK/syS9MgrRMQiWwSKy2VU3t+em5haLxrGditSt+CJMiXMSge4u8Ykrt8ubVVZLVgfe GeEyfdWQL6rrayyKEibLYyoCbfLgpD6h+481XXrRLWzXW7zhD6Fq88/CJKxK1kFKi1lK eWJtwOR9a1yjztl25UOOjWD3g0MqJFy60cCxrOEneXuNTzqonl3RW63xi3dVhWqzBdXj zq5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=1CPouluMvyZpOA63PEnDlKuHuD+yIsYNqjCsSvgSq+A=; b=VF8q1i9LCyUm/WkS+EtkWK7YZdIZjQmWfNCqeiOVKJMfKVLtTP5fJqBpOge8DJbGNs tKcLGB0yYLDQEd9+ltwmdNAv2taiMY6cPZ1T57FONIECP19UVWV3lYyc+PiHpeIgVOzl yB+R8q9jS1pNTg5LgBpHYKQPFWYUR8hmtLcSjhV6cU6yd4MKpeNo5KaDxc5foauUbS28 y9Kem0bdd4vwqG17Whh96ZXOSPRgYg/aIzYxVrMAReN7eSHLEv7zL1MZv0+ZK7/2RX5C gagNT8+66kRcsLK+ccvppL6g84tG8Zx3Ww/logAtb6Cra7uomogrYMgeXsyD/dHhLE21 DrXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 2a00:1450:400c:c09::231 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-wm0-x231.google.com (mail-wm0-x231.google.com. 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[155.4.221.67]) by smtp.gmail.com with ESMTPSA id 1sm1600724ljn.59.2017.05.08.09.21.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 May 2017 09:21:31 -0700 (PDT) From: Ulf Hansson To: Wei Xu , linux-arm-kernel@lists.infradead.org Cc: Ulf Hansson , Daniel Lezcano Subject: [PATCH 8/8] arm64: dts: hikey: Fix WiFi support Date: Mon, 8 May 2017 18:21:17 +0200 Message-Id: <1494260477-25163-9-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> References: <1494260477-25163-1-git-send-email-ulf.hansson@linaro.org> The description of the connection between the dwmmc (SDIO) controller and the Wifi chip, which is attached to the SDIO bus is wrong. Currently the SDIO card can't be detected and thus the Wifi doesn't work. Let's fix this by assigning the correct vmmc supply, which is the always on regulator VDD_3V3 and remove the WLAN enable regulator altogether. Then to properly deal with the power on/off sequence, add a mmc-pwrseq node to describe the resources needed to detect the SDIO card. Except for the WLAN enable GPIO and its corresponding assert/de-assert delays, the mmc-pwrseq node also contains a handle to a clock provided by the hi655x pmic. This clock is also needed to be able to turn on the WiFi chip. Signed-off-by: Ulf Hansson --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index d4b3879..f72698b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -111,6 +111,15 @@ vin-supply = <®_sys_5v>; }; + wl1835_pwrseq: wl1835-pwrseq { + compatible = "mmc-pwrseq-simple"; + /* WLAN_EN GPIO */ + reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; + clocks = <&pmic>; + clock-names = "ext_clock"; + power-off-delay-us = <10>; + }; + soc { spi0: spi@f7106000 { status = "ok"; @@ -302,11 +311,10 @@ }; dwmmc_2: dwmmc2@f723f000 { - broken-cd; bus-width = <0x4>; non-removable; - /* WL_EN */ - vmmc-supply = <&wlan_en_reg>; + vmmc-supply = <®_vdd_3v3>; + mmc-pwrseq = <&wl1835_pwrseq>; #address-cells = <0x1>; #size-cells = <0x0>; @@ -318,18 +326,6 @@ interrupts = <3 IRQ_TYPE_EDGE_RISING>; }; }; - - wlan_en_reg: regulator@1 { - compatible = "regulator-fixed"; - regulator-name = "wlan-en-regulator"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - /* WLAN_EN GPIO */ - gpio = <&gpio0 5 0>; - /* WLAN card specific delay */ - startup-delay-us = <70000>; - enable-active-high; - }; }; leds {