From patchwork Fri Jul 20 08:50:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 142463 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2699864ljj; Fri, 20 Jul 2018 01:51:59 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdeAtn9GzHWkJPD2p+nDnQyZ1C/zONOpwkK3Ihcc72Rd4xn03uqOUCa5C6tyhKJ8Ya+Udjf X-Received: by 2002:a62:1157:: with SMTP id z84-v6mr1328468pfi.66.1532076719044; Fri, 20 Jul 2018 01:51:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532076719; cv=none; d=google.com; s=arc-20160816; b=dnK9IbaqA3REkyACg26rSnomxdndnm9hrc14r5MBxZtD8bJ5HYurfjImDRM66XdvTM Z6HZXYGCAkSqXOXo5xNdbLlgNiFi8Isj9OZFioTAMX5D0tAr+ylBeYSiw4mUVykUQu64 ePmoZQqMeuK0QqlkjVawhlUCpMxCdhteBomFeT/WLDqxvaftl+aqy4g+NZAVkPbWeqCM mHfdiPeyCACbrWkAwMKJaRYj06rIOYgl+RMlSHNPl97aOZdqRlM4J76TiU0xnVdObiYB r69krhSGD4i/jp7gyHAh9JasCaFJq5IVIjfMBh68mJLxYD7RawVCLMVVEQQN8jdJOAVC U6ZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:dkim-filter:arc-authentication-results; bh=ElVTfAtpF+Li2o7JcJGIcbW42IpderFSv7LmvIkB7V4=; b=VtLSVHoHGxKGlg+lZXjqwTNxCXriy8asWVUt5kLEOd1+CoT67g3G8wOZFpxf2svuRl +DHq8nFWhx+vBFHLFJ2bCqq0PsNz8qaWI5XrHIKR8qu/0cXgKvcFyd/fJY0yOfeMpAJV mti3u2NyGrkqnx3D0KT7IcaLACJKQT/qAdnW55XWhjPZR9K115c+npRo89AKCjfJMQGF 68oXsGqA6KPVm9behog8HqiNO/yA7hAh65pSErbjHsWg8u+nBiBCT5J8BMJf8OzEfPxb IXlzrpaODyC4/LivV52UHgZiPOhpE/8+zO7r685sqSeTX68mDbjckPUXaN/gshLjSCC8 18BA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=U8IBI5Mu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x1-v6si1394036pge.521.2018.07.20.01.51.58; Fri, 20 Jul 2018 01:51:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=U8IBI5Mu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727558AbeGTJjB (ORCPT + 31 others); Fri, 20 Jul 2018 05:39:01 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:40367 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727198AbeGTJjB (ORCPT ); Fri, 20 Jul 2018 05:39:01 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id w6K8ovEH003659; Fri, 20 Jul 2018 17:50:58 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com w6K8ovEH003659 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1532076658; bh=ElVTfAtpF+Li2o7JcJGIcbW42IpderFSv7LmvIkB7V4=; h=From:To:Cc:Subject:Date:From; b=U8IBI5Mums7rZTsD9ar+/0TpL2nFJO6SjeLk4asAFr66B89FjGXmMOx7XUGnhZKLV clc5OT+lv2QpveFFe1hNM/cCKYUjmP+T6IxaUR4KrPpNnm58BplN9Dn7708E76oyUW dE+DOvC3cg/Ql5jphGBAOo8l3sCbB22Nkt5uE25/mStZR+Y0qV3/B+/Os4YNL9Dira gm6muI8714AGZF2Y1pW1JemzI9O8yicHGSoxnCpnKLav366jSnQX9nMffiVGJnb/1V UwAJttCNFo5JAoytdS+m9A7owm7lKIfgjlGUT+D+i0Y8mtnkpU2jrH6INn3MXkernB BVtVZ+nI2sKeg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: Boris Brezillon , Rob Herring , Masami Hiramatsu , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Rutland Subject: [PATCH 1/2] ARM: uniphier: dts: add more clocks to Denali NAND controller node Date: Fri, 20 Jul 2018 17:50:44 +0900 Message-Id: <1532076645-10769-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Catch up with the new binding of the Denali IP where three clocks, "nand", "nand_x", "ecc" are required. For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they are both 200MHz. Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-ld4.dtsi | 3 ++- arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++- arch/arm/boot/dts/uniphier-pro5.dtsi | 3 ++- arch/arm/boot/dts/uniphier-pxs2.dtsi | 3 ++- arch/arm/boot/dts/uniphier-sld8.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index 37950ad..2a17066 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -347,7 +347,8 @@ interrupts = <0 65 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; - clocks = <&sys_clk 2>; + clock-names = "nand", "nand_x", "ecc"; + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; resets = <&sys_rst 2>; }; }; diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index 49539f0..da88ccc 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -394,7 +394,8 @@ interrupts = <0 65 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; - clocks = <&sys_clk 2>; + clock-names = "nand", "nand_x", "ecc"; + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; resets = <&sys_rst 2>; }; }; diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index 06c2cef..40a84f2 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -439,7 +439,8 @@ interrupts = <0 65 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; - clocks = <&sys_clk 2>; + clock-names = "nand", "nand_x", "ecc"; + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; resets = <&sys_rst 2>; }; }; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 641d961..1903752 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -528,7 +528,8 @@ interrupts = <0 65 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; - clocks = <&sys_clk 2>; + clock-names = "nand", "nand_x", "ecc"; + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; resets = <&sys_rst 2>; }; }; diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi index e9b9b4f..dc723bf 100644 --- a/arch/arm/boot/dts/uniphier-sld8.dtsi +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi @@ -351,7 +351,8 @@ interrupts = <0 65 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; - clocks = <&sys_clk 2>; + clock-names = "nand", "nand_x", "ecc"; + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; resets = <&sys_rst 2>; }; };