From patchwork Thu Jun 3 08:22:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453235 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp88348jao; Thu, 3 Jun 2021 01:49:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxdSzpzyPtcHbnG5fyFTYuyOiu0X1u+7LTIQxyWP8gU63niW91m8aVajlG6UuUPttbjhZcB X-Received: by 2002:a25:6894:: with SMTP id d142mr1449096ybc.55.1622710157442; Thu, 03 Jun 2021 01:49:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622710157; cv=none; d=google.com; s=arc-20160816; b=O986QYq3f0OurpMDHtWd5MfEyoAl3aWbd/B1pIUOQfjqxDqWSLbufDG6ykeC3zrC1S UcU1/9j9ryjBZHmikuQQgmwA7sx5ayQaFGoan3wa45JQAWdhuEnS1NQpWXHzB7wTVyk8 F5Z00FLMHeVuVCI9q5gFdGZN97JOhAvV2Xw5HN3WLKQmB9PYzkXWARIzST2xG1bwZYnT 9NybbHf+gBPk2o2+Ug61g13xXS+DmFE0DPcIIzKeY6n2KURsvy6ozREP+4xUu4sO10eN KgdNSxtDmiyU2WxIddKRLvwF9J9N8tLw7S59+kvGl9UhWAlwTttc3Lt0g3iB2bhrBiu2 YpfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=DHC0UYjzDrsCz5WDxtXakTjzHB71SGtj70VE1TXWics=; b=V3PLdYm20cyqNPHNvU3zJ2txn4pQPfIwzmfQozbyB+fLlUreiuQKn1dplcHg6fhNQl yBnaCWBBSIOOq+yVMsW12QGfB5+6jTt0+0nWsi+OuTP1W/I6nQUrhF8uqN2qnIc3s3iV C4Uyq9lXlRVfDqsO7O16lZ2V/z9taQxe1jyem19N9bYe2R9JiEeGolqGfyHKxeEPtVx/ +6skoeCSG108eWg3O+6QHdzCxIxqEGspijrfWyShPpmR/kN934zNWqe/FIKn3s/ytv2H cQHk2W/ZU0CPzNZqiSmaXWv/Mem/jckMhmT+U45eYZE71+ePsoH/Fnor1lQNSjKfSt4f X9Uw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=CoABG7r3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c13si2136173ybn.169.2021.06.03.01.49.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:49:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=CoABG7r3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:53550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loj2S-0003rN-UT for patch@linaro.org; Thu, 03 Jun 2021 04:49:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39804) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loida-0007g1-9J; Thu, 03 Jun 2021 04:23:36 -0400 Received: from ozlabs.org ([203.11.71.1]:39485) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidV-0000Eh-P5; Thu, 03 Jun 2021 04:23:34 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5p2bHqz9t1C; Thu, 3 Jun 2021 18:22:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708558; bh=kDJVqG+bzWC1QonnW5Rpx3+CeFSgdJ1MeAx68uLsmBE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CoABG7r3PM9s6NPMMr2PTA6ZJsqPIJBgCoMslb716IGwQH8VNJMdyv3//wYbZx3AX GaqiPqTGR5Of/2ddz1QRNTxoa+9l0uONfdz1dfRy5FGDf4KJlD3AgGHpXoXJ7QDvns CX0Rj4YT3rqsIB2OV9CYJGj64sS9rIaue3skcc94= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 28/42] target/ppc: Introduce macros to check isa extensions Date: Thu, 3 Jun 2021 18:22:17 +1000 Message-Id: <20210603082231.601214-29-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson These will be used by the decodetree trans_* functions to early-exit when the instruction set is not enabled. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-2-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e16a2721e2..11fd3342a0 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7664,6 +7664,32 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) tcg_gen_st_i64(src, cpu_env, avr64_offset(regno, high)); } +/* + * Helpers for trans_* functions to check for specific insns flags. + * Use token pasting to ensure that we use the proper flag with the + * proper variable. + */ +#define REQUIRE_INSNS_FLAGS(CTX, NAME) \ + do { \ + if (((CTX)->insns_flags & PPC_##NAME) == 0) { \ + return false; \ + } \ + } while (0) + +#define REQUIRE_INSNS_FLAGS2(CTX, NAME) \ + do { \ + if (((CTX)->insns_flags2 & PPC2_##NAME) == 0) { \ + return false; \ + } \ + } while (0) + +/* Then special-case the check for 64-bit so that we elide code for ppc32. */ +#if TARGET_LONG_BITS == 32 +# define REQUIRE_64BIT(CTX) return false +#else +# define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) +#endif + #include "translate/fp-impl.c.inc" #include "translate/vmx-impl.c.inc" From patchwork Thu Jun 3 08:22:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453234 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp86731jao; Thu, 3 Jun 2021 01:46:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwfUc0sfD69tmt4Snzwe4xapqvrSlPuubhhWIcCwMFV6FIqMUNagx9/9Ww3UjcPgpnNvdUo X-Received: by 2002:a92:7b01:: with SMTP id w1mr28764174ilc.100.1622709987927; Thu, 03 Jun 2021 01:46:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709987; cv=none; d=google.com; s=arc-20160816; b=pKoIVMaPCTfDyyIdc3v8GBYUBs7+RITFyFt0lwGJvixzCvDVkG83vDK7ZU8dpdrVO7 IHVj8eBVa/GNkPav2avZEXoUdXOjspBDUnxM6/wD2pCkn2nDaezCGNYFGr/xxYo6nbcP 1Lh76YpgRkcKtlXxZ9Osdu6K3ezDbVIk899yYfyEQQLRf1gpNx11D7Ji2e/gFfKRQqWr XHFzunz12reAMy8Yd43+w+ujU0lnBgJLJsS3jN4GFM1F0TvDDWCyb6EFXJgwoHsp6Ds2 AqsRrTpBe9rarb2D+Avy+Xrmo0xMiqnG0ADT1yOa6gRJoZ+0nGFAoCscJLc3X57b4mMZ JX9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=YPCX6FLFl4uac05AC8k+vLhmbHGB6M8sufjnVWlB+W8=; b=MIPAL3NNdN+e53S1PcMOFpBdOl3ZbONpvE3IRU80R5AMIlPNTPif3SR7YDmOZKRznK rVlKIACL/fU0/LquEUht/gvg1VNFGjNVwvPnMVxSjpZmFFH5tty1FkrcNsrqvskns0cg ZzXVE58lLwl2txQpxvaf+44nq6X2l7iJMwSpF2o53WdEejTWh/iaqhgiB3+W201+og6B fD6JACVbDcckPaJ2LX/gvoKx1MHOaX9UFpORB4rObiDQSjavoJvxbpt/MdsIjyCDlucX xX8Is1N3S7rUlFax0maWRJkvE972cuVpfKc1pnhFCsbxe2OtETHslbFYrQirnWySXkLf 94Iw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YGQn5EEh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k17si2525344ion.39.2021.06.03.01.46.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:46:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YGQn5EEh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:46610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loizj-0007dk-Do for patch@linaro.org; Thu, 03 Jun 2021 04:46:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidb-0007gf-ET; Thu, 03 Jun 2021 04:23:36 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:50687 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidX-0000Gh-SH; Thu, 03 Jun 2021 04:23:35 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5p5xFbz9t1Q; Thu, 3 Jun 2021 18:22:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708558; bh=xI0yU8K+AIE6+Ph7gQtn9MOOEp3goTTC14cj4zuAKiA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YGQn5EEhMcr2EubEFcITB1dWpgiCT/fWjFQ/7pc51DButk7FsBBV//zmfkbP2p/w7 zb9hW2x+tSOoO1EO8Y7YuJ3rFC6bNIWNk1cu1xUERXuF0J7vrhSV+LMc8r7xUnnquc aiHQZ4YcyjPqMZJH6FO8/T3QyxBeKgd1UAzIaRlA= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 29/42] target/ppc: Move page crossing check to ppc_tr_translate_insn Date: Thu, 3 Jun 2021 18:22:18 +1000 Message-Id: <20210603082231.601214-30-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson With prefixed instructions, the number of instructions remaining until the page crossing is no longer constant. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-3-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 11fd3342a0..d2c9fd9dd7 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -8821,9 +8821,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) if (ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP)) { ctx->base.max_insns = 1; - } else { - int bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; - ctx->base.max_insns = MIN(ctx->base.max_insns, bound); } } @@ -8874,6 +8871,12 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) gen_invalid(ctx); } + /* End the TB when crossing a page boundary. */ + if (ctx->base.is_jmp == DISAS_NEXT && + !(ctx->base.pc_next & ~TARGET_PAGE_MASK)) { + ctx->base.is_jmp = DISAS_TOO_MANY; + } + translator_loop_temp_check(&ctx->base); } From patchwork Thu Jun 3 08:22:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453232 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp84263jao; Thu, 3 Jun 2021 01:41:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzMnf3SFOQuIZF9WkKuKkn2LlTHpkZzeKS3eVitf77zBWgOx14HaEk8+iovKeBS42tn4W4E X-Received: by 2002:a5b:ac9:: with SMTP id a9mr872932ybr.475.1622709697498; Thu, 03 Jun 2021 01:41:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709697; cv=none; d=google.com; s=arc-20160816; b=C64UJKsrUAO2Il95BSCqDjDbUZgKqldw4MLcRErdL6/oH+w3073nEHPjAgC8xVg1fl 6huDQ2F9u1QyidQDGIrk56sESfyXQMVC9uJ16epPfDhaWvnSELcDkRQpmS4xRZaXVlw/ L6wRw1nT8U2xWBUVfHb5AU2v/quneduNmKJ8LuHjejUdn4AOKnDMlEHLr1nA/wYN4y1Y piuqczJNtIuMrKE1rSoFY3/9PYaCAyRAmR1yYaWc/ubuHLP7AUE4XhGmUZDYbW5Iy/re EQcGJdcLuzLGggH6Z4hhrWuRFL2Dm3eVEhXCyWgYOU5fMn0Zlgm2PQMgktoVCb3hG08Z lNFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=BVtBVZ/v0ceHTk6uTcwnvJRBEBBkrLGnDd6s/I2JWwU=; b=lnBrxc0/PMaYo/9cqjcig6onitEJcjpVwnfSgxgUIqBWzKPhGILqcwhA6aNLEBvoOt VsRodKoDh70FrSXzXENKIdo9fkDv1tnmMtGqTwtW+Knp1g3/5iuX1wVyUHH4v2/JkLV4 i76UnPF7s93upltqrn7V1QDzJWKDRc8RVHq2AXutlathB4NJTNW4o3VCwpqbapGW0QjN hp/es1T3tIN9Ik8BORJ0PiytCEjLJ92f92jd3yy8npTSg4GvlTmq6fzQdoLK8uKeRg9Y PEW3whU98i0dk2yyVFunFYbBMZaBH3hbOm8z67cVr8VNad5W8rySihfRSWxahPM50EOo ARlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=ktPlR2Hl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e75si2230845ybf.348.2021.06.03.01.41.37 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:41:37 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=ktPlR2Hl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:56424 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loiv2-0003hP-VY for patch@linaro.org; Thu, 03 Jun 2021 04:41:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39936) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidn-0007tW-2A; Thu, 03 Jun 2021 04:23:47 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:48377 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidk-0000Tl-Eg; Thu, 03 Jun 2021 04:23:46 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5p6vbjz9t1s; Thu, 3 Jun 2021 18:22:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708558; bh=j9TUNzCEGVnAmFrOpn95U8c7ggjH9tgYiGBE/L9na0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ktPlR2HlU4CZVOrzXbDTN0G5En/x4gqqu9Hhh37ELw7PH0kJRVSAcNLwW1n5RhYkf i5VN10Bz+uyqMdTiGm3RFFRLVUn1vQ+33kFsi+w4PKF4rSPWNz44PFc/LtrrxatWix I/349Rj7E2A0Je7FF3u04tb1+6TCQghdNorhmHk0= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 30/42] target/ppc: Add infrastructure for prefixed insns Date: Thu, 3 Jun 2021 18:22:19 +1000 Message-Id: <20210603082231.601214-31-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Luis Pires Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/cpu.h | 1 + target/ppc/insn32.decode | 18 +++++++++++ target/ppc/insn64.decode | 18 +++++++++++ target/ppc/meson.build | 9 ++++++ target/ppc/translate.c | 37 ++++++++++++++++++---- target/ppc/translate/fixedpoint-impl.c.inc | 18 +++++++++++ 6 files changed, 95 insertions(+), 6 deletions(-) create mode 100644 target/ppc/insn32.decode create mode 100644 target/ppc/insn64.decode create mode 100644 target/ppc/translate/fixedpoint-impl.c.inc -- 2.31.1 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index b7ae4902e4..b4de0db7ff 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -144,6 +144,7 @@ enum { POWERPC_EXCP_ALIGN_PROT = 0x04, /* Access cross protection boundary */ POWERPC_EXCP_ALIGN_BAT = 0x05, /* Access cross a BAT/seg boundary */ POWERPC_EXCP_ALIGN_CACHE = 0x06, /* Impossible dcbz access */ + POWERPC_EXCP_ALIGN_INSN = 0x07, /* Pref. insn x-ing 64-byte boundary */ /* Exception subtypes for POWERPC_EXCP_PROGRAM */ /* FP exceptions */ POWERPC_EXCP_FP = 0x10, diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode new file mode 100644 index 0000000000..a3a8ae06bf --- /dev/null +++ b/target/ppc/insn32.decode @@ -0,0 +1,18 @@ +# +# Power ISA decode for 32-bit insns (opcode space 0) +# +# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . +# diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode new file mode 100644 index 0000000000..a38b1f84dc --- /dev/null +++ b/target/ppc/insn64.decode @@ -0,0 +1,18 @@ +# +# Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1) +# +# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . +# diff --git a/target/ppc/meson.build b/target/ppc/meson.build index a6a53a8d5c..a4f18ff414 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -20,6 +20,15 @@ ppc_ss.add(when: 'CONFIG_TCG', if_true: files( ppc_ss.add(libdecnumber) +gen = [ + decodetree.process('insn32.decode', + extra_args: '--static-decode=decode_insn32'), + decodetree.process('insn64.decode', + extra_args: ['--static-decode=decode_insn64', + '--insnwidth=64']), +] +ppc_ss.add(gen) + ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c')) ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c')) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d2c9fd9dd7..f3f464c654 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7690,6 +7690,10 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) # define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) #endif +#include "decode-insn32.c.inc" +#include "decode-insn64.c.inc" +#include "translate/fixedpoint-impl.c.inc" + #include "translate/fp-impl.c.inc" #include "translate/vmx-impl.c.inc" @@ -8850,11 +8854,18 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, return true; } +static bool is_prefix_insn(DisasContext *ctx, uint32_t insn) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + return opc1(insn) == 1; +} + static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); PowerPCCPU *cpu = POWERPC_CPU(cs); CPUPPCState *env = cs->env_ptr; + target_ulong pc; uint32_t insn; bool ok; @@ -8862,18 +8873,32 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n", ctx->base.pc_next, ctx->mem_idx, (int)msr_ir); - ctx->cia = ctx->base.pc_next; - insn = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx)); - ctx->base.pc_next += 4; + ctx->cia = pc = ctx->base.pc_next; + insn = translator_ldl_swap(env, pc, need_byteswap(ctx)); + ctx->base.pc_next = pc += 4; - ok = decode_legacy(cpu, ctx, insn); + if (!is_prefix_insn(ctx, insn)) { + ok = (decode_insn32(ctx, insn) || + decode_legacy(cpu, ctx, insn)); + } else if ((pc & 63) == 0) { + /* + * Power v3.1, section 1.9 Exceptions: + * attempt to execute a prefixed instruction that crosses a + * 64-byte address boundary (system alignment error). + */ + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_INSN); + ok = true; + } else { + uint32_t insn2 = translator_ldl_swap(env, pc, need_byteswap(ctx)); + ctx->base.pc_next = pc += 4; + ok = decode_insn64(ctx, deposit64(insn2, 32, 32, insn)); + } if (!ok) { gen_invalid(ctx); } /* End the TB when crossing a page boundary. */ - if (ctx->base.is_jmp == DISAS_NEXT && - !(ctx->base.pc_next & ~TARGET_PAGE_MASK)) { + if (ctx->base.is_jmp == DISAS_NEXT && !(pc & ~TARGET_PAGE_MASK)) { ctx->base.is_jmp = DISAS_TOO_MANY; } diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc new file mode 100644 index 0000000000..be75085cee --- /dev/null +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -0,0 +1,18 @@ +/* + * Power ISA decode for Fixed-Point Facility instructions + * + * Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ From patchwork Thu Jun 3 08:22:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453228 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp79522jao; Thu, 3 Jun 2021 01:32:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz3I44eG6qeObzH6Oxzhl2dAwVa2VfPvYVn/nFqKjrtf7jOLgxKObDf7GTf5FjjixlkO/Mw X-Received: by 2002:a92:d24c:: with SMTP id v12mr17768913ilg.306.1622709171850; Thu, 03 Jun 2021 01:32:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709171; cv=none; d=google.com; s=arc-20160816; b=gQ57NPg63hAzIoKimrTN1myr+a6KVLgmRKdwJ3ADn1WEMnIdb5xfQUPZdKHxvfYIXp DiRIMQTsHuI4psjBNMSKGWG9nB3VrQ4JTZRbZcjEyjSQCTzmaxs+1rOjQJONyfglSlQ3 60GUYpjjbx7rZwlXv26ZygMqBoVPnKNMzQNPt92OmMdNuaHBpSISq4eVp+j0eSqn355x 9A+UDszhSy70oZB7w3hwlz5IFgg8QiOCNRhc7A8YQFmC8aPpQuzb1XJSn4ce/FHfkc4f M3w4RkfUgB5S1vCA3hsGb1aiKcuPDkn8wyOb9Xi7n1Co9dlGheFMrmbfM4ur9dra5iDY ZzjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ZvKWrrSNqhXTzO27twKu8FtD6FvF8ZQgJAlzolDm8vI=; b=rkCJLBAVL7XHnJYtxFc/yw9uDmllBwlbvaAewl94SLV3dNyr+HAVMH1YorNUEt9lOU ChaZBFF41NGNzVxdfnJ4hc8iv7/O5/03qRgFHj6ybJAVdeC9BbccrKVCvdPctlUxmNLc ifzrwhsBMh35IoIVw3hf5taiA3siMO2Vzbg4GszNjoaG2zg7FLUeogvh2fSLi9TkX/50 GPH3vKVuUlNmhP655PQ7h9I8xyjMtXSCeQwXtLg/Nyq0coP+Qa6J9Tqf3lU6U0w5bJHm UcrOkhrnq+py8OIwok1Chq/AGP458daqokMoDnYxZPkuvfeDY+0GGU+Eg/KfIIEINGs/ ADuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=Mq0TOUhK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k14si2529199ilu.10.2021.06.03.01.32.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:32:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=Mq0TOUhK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:50062 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loimZ-0005v8-7Y for patch@linaro.org; Thu, 03 Jun 2021 04:32:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39752) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidS-0007R7-Sn; Thu, 03 Jun 2021 04:23:26 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:60187 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidQ-0000Tn-NE; Thu, 03 Jun 2021 04:23:26 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5q0wX5z9t25; Thu, 3 Jun 2021 18:22:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708559; bh=Qdpo/0Fw/OgL6h5OJJYOXJe6PgFDIYo2CEOoUICq98c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mq0TOUhKmUAUsJDSl/KDkSrDbrtO5EEvLlh7s1/Yl0O240P4bmegMbYidwIBYDp7Y LB8owqH3+Y5DlthQ4NJIrv1PmXDKmeetvlscUl7DWSjRKzab9LlybYCUknsSscNIwO vkeElnM2DQAJEr7A2+1GvJacmuTYqARTLR0K/8k8= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 31/42] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI Date: Thu, 3 Jun 2021 18:22:20 +1000 Message-Id: <20210603082231.601214-32-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-5-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/insn32.decode | 8 ++++ target/ppc/insn64.decode | 12 ++++++ target/ppc/translate.c | 29 -------------- target/ppc/translate/fixedpoint-impl.c.inc | 44 ++++++++++++++++++++++ 4 files changed, 64 insertions(+), 29 deletions(-) -- 2.31.1 diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index a3a8ae06bf..e7c062d8b4 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -16,3 +16,11 @@ # You should have received a copy of the GNU Lesser General Public # License along with this library; if not, see . # + +&D rt ra si:int64_t +@D ...... rt:5 ra:5 si:s16 &D + +### Fixed-Point Arithmetic Instructions + +ADDI 001110 ..... ..... ................ @D +ADDIS 001111 ..... ..... ................ @D diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index a38b1f84dc..1965088915 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -16,3 +16,15 @@ # You should have received a copy of the GNU Lesser General Public # License along with this library; if not, see . # + +# Format MLS:D and 8LS:D +&PLS_D rt ra si:int64_t r:bool +%pls_si 32:s18 0:16 +@PLS_D ...... .. ... r:1 .. .................. \ + ...... rt:5 ra:5 ................ \ + &PLS_D si=%pls_si + +### Fixed-Point Arithmetic Instructions + +PADDI 000001 10 0--.-- .................. \ + 001110 ..... ..... ................ @PLS_D diff --git a/target/ppc/translate.c b/target/ppc/translate.c index f3f464c654..3012c7447a 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -1760,19 +1760,6 @@ GEN_INT_ARITH_ADD(addex, 0x05, cpu_ov, 1, 1, 0); /* addze addze. addzeo addzeo.*/ GEN_INT_ARITH_ADD_CONST(addze, 0x06, 0, cpu_ca, 1, 1, 0) GEN_INT_ARITH_ADD_CONST(addzeo, 0x16, 0, cpu_ca, 1, 1, 1) -/* addi */ -static void gen_addi(DisasContext *ctx) -{ - target_long simm = SIMM(ctx->opcode); - - if (rA(ctx->opcode) == 0) { - /* li case */ - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm); - } else { - tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], - cpu_gpr[rA(ctx->opcode)], simm); - } -} /* addic addic.*/ static inline void gen_op_addic(DisasContext *ctx, bool compute_rc0) { @@ -1792,20 +1779,6 @@ static void gen_addic_(DisasContext *ctx) gen_op_addic(ctx, 1); } -/* addis */ -static void gen_addis(DisasContext *ctx) -{ - target_long simm = SIMM(ctx->opcode); - - if (rA(ctx->opcode) == 0) { - /* lis case */ - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm << 16); - } else { - tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], - cpu_gpr[rA(ctx->opcode)], simm << 16); - } -} - /* addpcis */ static void gen_addpcis(DisasContext *ctx) { @@ -7817,10 +7790,8 @@ GEN_HANDLER_E(cmpeqb, 0x1F, 0x00, 0x07, 0x00600000, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(cmpb, 0x1F, 0x1C, 0x0F, 0x00000001, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(cmprb, 0x1F, 0x00, 0x06, 0x00400001, PPC_NONE, PPC2_ISA300), GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL), -GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), -GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER_E(addpcis, 0x13, 0x2, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA300), GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER), GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER), diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index be75085cee..344a3ed54b 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -16,3 +16,47 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +/* + * Incorporate CIA into the constant when R=1. + * Validate that when R=1, RA=0. + */ +static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) +{ + d->rt = a->rt; + d->ra = a->ra; + d->si = a->si; + if (a->r) { + if (unlikely(a->ra != 0)) { + gen_invalid(ctx); + return false; + } + d->si += ctx->cia; + } + return true; +} + +static bool trans_ADDI(DisasContext *ctx, arg_D *a) +{ + if (a->ra) { + tcg_gen_addi_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si); + } else { + tcg_gen_movi_tl(cpu_gpr[a->rt], a->si); + } + return true; +} + +static bool trans_PADDI(DisasContext *ctx, arg_PLS_D *a) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + return trans_ADDI(ctx, &d); +} + +static bool trans_ADDIS(DisasContext *ctx, arg_D *a) +{ + a->si <<= 16; + return trans_ADDI(ctx, a); +} From patchwork Thu Jun 3 08:22:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453229 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp81100jao; Thu, 3 Jun 2021 01:35:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyCpy8yvdGcZ5b1lQXo26T4mMmGk8ojXpWJOIgnZ6X3IY6xiVbHor+wxUmmoGESK8b2dr4o X-Received: by 2002:a05:6e02:1050:: with SMTP id p16mr19128194ilj.74.1622709339146; Thu, 03 Jun 2021 01:35:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709339; cv=none; d=google.com; s=arc-20160816; b=K0bzqB1tCiD5nsFZx8Pm1OfMP+nQpkqdFFxstoSIzvJAvAp1Kfa3JVgIgvnGc+pR3L AJ2cxiXAa1PjSA3Em3htftv/Q4fjFJsDA3MD23hz+VOLaWLlAl5s73uGTIjHF/uTo1qj iqWNJjL0J8T9rG28tRfrwHM7gvIER+wkNeZVBZyFTdNTX7uKtWqPLxnbH0llmyzVfl85 GvxooRWanT+fEdo3TDOTtmlTy/YvLwgq8dDe7tjmL1ztXhncjFcxeg95i3/e/jZ7Aang p/UBvkafjvgDGbtHNFSfm9DxT2qjWLV/dt0esNYTbmcOOOrV0ezdpvF2Vzxv33nCPo9u KYmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1h1X4hW8dOjyaDLK4XFf5jc8tG0lWz/LgsYeKHJ3RDo=; b=QsT5q1jC5FvZRYdSuzanaefCdH29e4WSRaPchKYW+XyRRjJePdODa9dtqkuUDCO0fy Ua7afyVPexA91zfpnJN/34Qg1OVNqtS/RBLNnq2YhJLo0ydqidpaOn+PSHeq3cyV3QfQ X7Pcyw47yB5PbHKdb4vZYNbF218pj7NZ72ZDsKpNFG4dCzfNsp9s37D/gfH3OjfC1B7Q 3xd/o9D5y8BIq0pCmEeLxkybrAKS/Bn3cyZj5ap4XwP9lyeAFtfsCsKVAPDP7AF6nmqT EH5k7ZR6YWe+IkRKb9U12D8zjlyB7VogQHqO7pitXkaVUAsBN4hq5zF7dgOqrMh+UWdB MZIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=G7etiVRz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y15si889788ill.96.2021.06.03.01.35.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:35:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=G7etiVRz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:58612 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loipG-00038i-JT for patch@linaro.org; Thu, 03 Jun 2021 04:35:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39774) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidU-0007Vw-50; Thu, 03 Jun 2021 04:23:28 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:36091 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidS-0000US-6z; Thu, 03 Jun 2021 04:23:27 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5q2PBRz9t2G; Thu, 3 Jun 2021 18:22:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708559; bh=yxUEq1fZdn59Z6G/VuakesYI2ZUQrETGVDIjPGj2gRY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G7etiVRzeTlNwLB9TldR5Tx8hYXF3VDEJ5ynMGSoX/a/9YpIIGQCMH8+Bqu3LBsRK W9pgaazCgJBu667HQFrCqifKs982UhdXyzl0O8KadibaS5AxkukhMjgv5zdmxFNsDv FFpi8IZQn2GmDN4CECXMrImlMXpFbQCg05tbhEqE= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 32/42] target/ppc: Implement PNOP Date: Thu, 3 Jun 2021 18:22:21 +1000 Message-Id: <20210603082231.601214-33-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The illegal suffix behavior matches what was observed in a POWER10 DD2.0 machine. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-6-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/insn64.decode | 67 ++++++++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 11 ++++ 2 files changed, 78 insertions(+) -- 2.31.1 diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 1965088915..9aa5097a98 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -28,3 +28,70 @@ PADDI 000001 10 0--.-- .................. \ 001110 ..... ..... ................ @PLS_D + +### Prefixed No-operation Instruction + +@PNOP 000001 11 0000-- 000000000000000000 \ + ................................ + +{ + [ + ## Invalid suffixes: Branch instruction + # bc[l][a] + INVALID ................................ \ + 010000-------------------------- @PNOP + # b[l][a] + INVALID ................................ \ + 010010-------------------------- @PNOP + # bclr[l] + INVALID ................................ \ + 010011---------------0000010000- @PNOP + # bcctr[l] + INVALID ................................ \ + 010011---------------1000010000- @PNOP + # bctar[l] + INVALID ................................ \ + 010011---------------1000110000- @PNOP + + ## Invalid suffixes: rfebb + INVALID ................................ \ + 010011---------------0010010010- @PNOP + + ## Invalid suffixes: context synchronizing other than isync + # sc + INVALID ................................ \ + 010001------------------------1- @PNOP + # scv + INVALID ................................ \ + 010001------------------------01 @PNOP + # rfscv + INVALID ................................ \ + 010011---------------0001010010- @PNOP + # rfid + INVALID ................................ \ + 010011---------------0000010010- @PNOP + # hrfid + INVALID ................................ \ + 010011---------------0100010010- @PNOP + # urfid + INVALID ................................ \ + 010011---------------0100110010- @PNOP + # stop + INVALID ................................ \ + 010011---------------0101110010- @PNOP + # mtmsr w/ L=0 + INVALID ................................ \ + 011111---------0-----0010010010- @PNOP + # mtmsrd w/ L=0 + INVALID ................................ \ + 011111---------0-----0010110010- @PNOP + + ## Invalid suffixes: Service Processor Attention + INVALID ................................ \ + 000000----------------100000000- @PNOP + ] + + ## Valid suffixes + PNOP ................................ \ + -------------------------------- @PNOP +} diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 344a3ed54b..ce034a14a7 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -60,3 +60,14 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a) a->si <<= 16; return trans_ADDI(ctx, a); } + +static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a) +{ + gen_invalid(ctx); + return true; +} + +static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a) +{ + return true; +} From patchwork Thu Jun 3 08:22:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453236 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp89375jao; Thu, 3 Jun 2021 01:51:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwil8lmXSc7IOa2hNPBUhTKx70SOuUa1tlJGh4hVeXlpnnyvr9gAgDcuL8TT/eRPZiM5uod X-Received: by 2002:a25:d606:: with SMTP id n6mr32408617ybg.210.1622710289555; Thu, 03 Jun 2021 01:51:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622710289; cv=none; d=google.com; s=arc-20160816; b=VPOHP7JpxhrT+mOLuFthYVgXNHe20049vkICLHUGeVtH7wejDcGJ5N/551ADUaL/Mj DvWlt1V9OQxQfedC/bfrqPrEcfebknZlcCc3jV57ZX5e4xPUuHQtvES3v3NKZefFyTNs z16+peYyiHqsp6OKdS1U8f+5llzuP6BJBzYRZklQJ8+lL6oOQFnwMbgdRAfa2y4835gB y9TFAZlP6flLJgZODT1Mt0OiTVPVdMx+7oqN7mG4MxWS45QGjH8Ce/VLD9euB8xRCtYH bGCw1GSl44FmqNYGz4k2ISZJ0B6PUbycGQ9ADCWgAWUepYtlhaeH+WIa8OVy9TNwWLRN EEng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=kL0Z1i00nb9Z2ycTy6YusYJ85xQ64QkdToEGxVWS2u8=; b=OVZC5GKG+Sdnw2ZvVmQH+DzX8Vph17iLWhlkM9e5FSXfF+mPdZUYZkb/WgahiegRya dWk1hXerNqXNAuIzWmQAeFr4k4sny0/hYRsEQm2Ss7uXwZuSuHfdMFYZFr13oI/wjYnK W8UV1Zd06+3R+5nI3HcZftWfiCV+rs0ys/FGoS4Ty2lJDn7nhfn8rNXeIK6geT8fnRtd OM1PKN8jra+skiqahqqR4/tSarPvs42zxVGVGUCEMOefg+fnBH+xVjzcH/CmdnQTo0Lw d6kZNxH3TEppHm7bARAZutswMdZxsOHaoneqX1LohzfgMmzxzCFyR1A0yTQQk0mBUdBR pfTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=KYPeA6qi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g15si2068753ybd.237.2021.06.03.01.51.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:51:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=KYPeA6qi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:33470 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loj4a-0000yN-W0 for patch@linaro.org; Thu, 03 Jun 2021 04:51:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39978) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidw-0008AR-Kv; Thu, 03 Jun 2021 04:23:56 -0400 Received: from ozlabs.org ([203.11.71.1]:58225) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidt-0000WL-4t; Thu, 03 Jun 2021 04:23:56 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5q3XLCz9t2b; Thu, 3 Jun 2021 18:22:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708559; bh=g3GnL6dCKLHlkD5YTqijT4hasfIEpMNDFl8xNvBf3kU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KYPeA6qivQfqzvk84QHZr8FCp3Y9k73XhecxErF5cqWzAnIAFe9k7uSZpxULHYq3X g0HU8klhljfMeIiYumcBWZButAktY+fqfIhfqLouvgMdB4MfotTJ4yjfYE24HImGdJ TBsCQQKIMhcv06HKk/0/JjJkLCHDPLNfZ/Xoz/PM= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 33/42] target/ppc: Move D/DS/X-form integer loads to decodetree Date: Thu, 3 Jun 2021 18:22:22 +1000 Message-Id: <20210603082231.601214-34-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson These are all connected by macros in the legacy decoding. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/insn32.decode | 37 ++++++ target/ppc/translate.c | 147 ++++----------------- target/ppc/translate/fixedpoint-impl.c.inc | 89 +++++++++++++ 3 files changed, 150 insertions(+), 123 deletions(-) -- 2.31.1 diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e7c062d8b4..70f64c235b 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -20,6 +20,43 @@ &D rt ra si:int64_t @D ...... rt:5 ra:5 si:s16 &D +%ds_si 2:s14 !function=times_4 +@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si + +&X rt ra rb +@X ...... rt:5 ra:5 rb:5 .......... . &X + +### Fixed-Point Load Instructions + +LBZ 100010 ..... ..... ................ @D +LBZU 100011 ..... ..... ................ @D +LBZX 011111 ..... ..... ..... 0001010111 - @X +LBZUX 011111 ..... ..... ..... 0001110111 - @X + +LHZ 101000 ..... ..... ................ @D +LHZU 101001 ..... ..... ................ @D +LHZX 011111 ..... ..... ..... 0100010111 - @X +LHZUX 011111 ..... ..... ..... 0100110111 - @X + +LHA 101010 ..... ..... ................ @D +LHAU 101011 ..... ..... ................ @D +LHAX 011111 ..... ..... ..... 0101010111 - @X +LHAXU 011111 ..... ..... ..... 0101110111 - @X + +LWZ 100000 ..... ..... ................ @D +LWZU 100001 ..... ..... ................ @D +LWZX 011111 ..... ..... ..... 0000010111 - @X +LWZUX 011111 ..... ..... ..... 0000110111 - @X + +LWA 111010 ..... ..... ..............10 @DS +LWAX 011111 ..... ..... ..... 0101010101 - @X +LWAUX 011111 ..... ..... ..... 0101110101 - @X + +LD 111010 ..... ..... ..............00 @DS +LDU 111010 ..... ..... ..............01 @DS +LDX 011111 ..... ..... ..... 0000010101 - @X +LDUX 011111 ..... ..... ..... 0000110101 - @X + ### Fixed-Point Arithmetic Instructions ADDI 001110 ..... ..... ................ @D diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 3012c7447a..d9238d1d10 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3323,54 +3323,6 @@ GEN_QEMU_STORE_64(st64, DEF_MEMOP(MO_Q)) GEN_QEMU_STORE_64(st64r, BSWAP_MEMOP(MO_Q)) #endif -#define GEN_LD(name, ldop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_LDU(name, ldop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0 || \ - rA(ctx->opcode) == rD(ctx->opcode))) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - if (type == PPC_64B) \ - gen_addr_imm_index(ctx, EA, 0x03); \ - else \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_LDUX(name, ldop, opc2, opc3, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0 || \ - rA(ctx->opcode) == rD(ctx->opcode))) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_reg_index(ctx, EA); \ - gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - #define GEN_LDX_E(name, ldop, opc2, opc3, type, type2, chk) \ static void glue(gen_, name##x)(DisasContext *ctx) \ { \ @@ -3389,21 +3341,6 @@ static void glue(gen_, name##x)(DisasContext *ctx) \ #define GEN_LDX_HVRM(name, ldop, opc2, opc3, type) \ GEN_LDX_E(name, ldop, opc2, opc3, type, PPC_NONE, CHK_HVRM) -#define GEN_LDS(name, ldop, op, type) \ -GEN_LD(name, ldop, op | 0x20, type); \ -GEN_LDU(name, ldop, op | 0x21, type); \ -GEN_LDUX(name, ldop, 0x17, op | 0x01, type); \ -GEN_LDX(name, ldop, 0x17, op | 0x00, type) - -/* lbz lbzu lbzux lbzx */ -GEN_LDS(lbz, ld8u, 0x02, PPC_INTEGER); -/* lha lhau lhaux lhax */ -GEN_LDS(lha, ld16s, 0x0A, PPC_INTEGER); -/* lhz lhzu lhzux lhzx */ -GEN_LDS(lhz, ld16u, 0x08, PPC_INTEGER); -/* lwz lwzu lwzux lwzx */ -GEN_LDS(lwz, ld32u, 0x00, PPC_INTEGER); - #define GEN_LDEPX(name, ldop, opc2, opc3) \ static void glue(gen_, name##epx)(DisasContext *ctx) \ { \ @@ -3424,47 +3361,12 @@ GEN_LDEPX(ld, DEF_MEMOP(MO_Q), 0x1D, 0x00) #endif #if defined(TARGET_PPC64) -/* lwaux */ -GEN_LDUX(lwa, ld32s, 0x15, 0x0B, PPC_64B); -/* lwax */ -GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B); -/* ldux */ -GEN_LDUX(ld, ld64_i64, 0x15, 0x01, PPC_64B); -/* ldx */ -GEN_LDX(ld, ld64_i64, 0x15, 0x00, PPC_64B); - /* CI load/store variants */ GEN_LDX_HVRM(ldcix, ld64_i64, 0x15, 0x1b, PPC_CILDST) GEN_LDX_HVRM(lwzcix, ld32u, 0x15, 0x15, PPC_CILDST) GEN_LDX_HVRM(lhzcix, ld16u, 0x15, 0x19, PPC_CILDST) GEN_LDX_HVRM(lbzcix, ld8u, 0x15, 0x1a, PPC_CILDST) -static void gen_ld(DisasContext *ctx) -{ - TCGv EA; - if (Rc(ctx->opcode)) { - if (unlikely(rA(ctx->opcode) == 0 || - rA(ctx->opcode) == rD(ctx->opcode))) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - return; - } - } - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_imm_index(ctx, EA, 0x03); - if (ctx->opcode & 0x02) { - /* lwa (lwau is undefined) */ - gen_qemu_ld32s(ctx, cpu_gpr[rD(ctx->opcode)], EA); - } else { - /* ld - ldu */ - gen_qemu_ld64_i64(ctx, cpu_gpr[rD(ctx->opcode)], EA); - } - if (Rc(ctx->opcode)) { - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); - } - tcg_temp_free(EA); -} - /* lq */ static void gen_lq(DisasContext *ctx) { @@ -7637,6 +7539,14 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) tcg_gen_st_i64(src, cpu_env, avr64_offset(regno, high)); } +/* + * Helpers for decodetree used by !function for decoding arguments. + */ +static int times_4(DisasContext *ctx, int x) +{ + return x * 4; +} + /* * Helpers for trans_* functions to check for specific insns flags. * Use token pasting to ensure that we use the proper flag with the @@ -7663,6 +7573,21 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) # define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) #endif +/* + * Helpers for implementing sets of trans_* functions. + * Defer the implementation of NAME to FUNC, with optional extra arguments. + */ +#define TRANS(NAME, FUNC, ...) \ + static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \ + { return FUNC(ctx, a, __VA_ARGS__); } + +#define TRANS64(NAME, FUNC, ...) \ + static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \ + { REQUIRE_64BIT(ctx); return FUNC(ctx, a, __VA_ARGS__); } + +/* TODO: More TRANS* helpers for extra insn_flags checks. */ + + #include "decode-insn32.c.inc" #include "decode-insn64.c.inc" #include "translate/fixedpoint-impl.c.inc" @@ -7847,7 +7772,6 @@ GEN_HANDLER2_E(extswsli1, "extswsli", 0x1F, 0x1B, 0x1B, 0x00000000, PPC_NONE, PPC2_ISA300), #endif #if defined(TARGET_PPC64) -GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B), GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX), GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B), #endif @@ -8213,34 +8137,11 @@ GEN_PPC64_R2(rldcr, 0x1E, 0x09), GEN_PPC64_R4(rldimi, 0x1E, 0x06), #endif -#undef GEN_LD -#undef GEN_LDU -#undef GEN_LDUX #undef GEN_LDX_E -#undef GEN_LDS -#define GEN_LD(name, ldop, opc, type) \ -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_LDU(name, ldop, opc, type) \ -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_LDUX(name, ldop, opc2, opc3, type) \ -GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type), #define GEN_LDX_E(name, ldop, opc2, opc3, type, type2, chk) \ GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000001, type, type2), -#define GEN_LDS(name, ldop, op, type) \ -GEN_LD(name, ldop, op | 0x20, type) \ -GEN_LDU(name, ldop, op | 0x21, type) \ -GEN_LDUX(name, ldop, 0x17, op | 0x01, type) \ -GEN_LDX(name, ldop, 0x17, op | 0x00, type) - -GEN_LDS(lbz, ld8u, 0x02, PPC_INTEGER) -GEN_LDS(lha, ld16s, 0x0A, PPC_INTEGER) -GEN_LDS(lhz, ld16u, 0x08, PPC_INTEGER) -GEN_LDS(lwz, ld32u, 0x00, PPC_INTEGER) + #if defined(TARGET_PPC64) -GEN_LDUX(lwa, ld32s, 0x15, 0x0B, PPC_64B) -GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B) -GEN_LDUX(ld, ld64_i64, 0x15, 0x01, PPC_64B) -GEN_LDX(ld, ld64_i64, 0x15, 0x00, PPC_64B) GEN_LDX_E(ldbr, ld64ur_i64, 0x14, 0x10, PPC_NONE, PPC2_DBRX, CHK_NONE) /* HV/P7 and later only */ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index ce034a14a7..6140dd41ca 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -36,6 +36,95 @@ static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) return true; } +/* + * Fixed-Point Load/Store Instructions + */ + +static bool do_ldst(DisasContext *ctx, int rt, int ra, TCGv displ, bool update, + bool store, MemOp mop) +{ + TCGv ea; + + if (update && (ra == 0 || (!store && ra == rt))) { + gen_invalid(ctx); + return true; + } + gen_set_access_type(ctx, ACCESS_INT); + + ea = tcg_temp_new(); + if (ra) { + tcg_gen_add_tl(ea, cpu_gpr[ra], displ); + } else { + tcg_gen_mov_tl(ea, displ); + } + if (NARROW_MODE(ctx)) { + tcg_gen_ext32u_tl(ea, ea); + } + mop ^= ctx->default_tcg_memop_mask; + if (store) { + tcg_gen_qemu_st_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop); + } else { + tcg_gen_qemu_ld_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop); + } + if (update) { + tcg_gen_mov_tl(cpu_gpr[ra], ea); + } + tcg_temp_free(ea); + + return true; +} + +static bool do_ldst_D(DisasContext *ctx, arg_D *a, bool update, bool store, + MemOp mop) +{ + return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop); +} + +static bool do_ldst_X(DisasContext *ctx, arg_X *a, bool update, + bool store, MemOp mop) +{ + return do_ldst(ctx, a->rt, a->ra, cpu_gpr[a->rb], update, store, mop); +} + +/* Load Byte and Zero */ +TRANS(LBZ, do_ldst_D, false, false, MO_UB) +TRANS(LBZX, do_ldst_X, false, false, MO_UB) +TRANS(LBZU, do_ldst_D, true, false, MO_UB) +TRANS(LBZUX, do_ldst_X, true, false, MO_UB) + +/* Load Halfword and Zero */ +TRANS(LHZ, do_ldst_D, false, false, MO_UW) +TRANS(LHZX, do_ldst_X, false, false, MO_UW) +TRANS(LHZU, do_ldst_D, true, false, MO_UW) +TRANS(LHZUX, do_ldst_X, true, false, MO_UW) + +/* Load Halfword Algebraic */ +TRANS(LHA, do_ldst_D, false, false, MO_SW) +TRANS(LHAX, do_ldst_X, false, false, MO_SW) +TRANS(LHAU, do_ldst_D, true, false, MO_SW) +TRANS(LHAXU, do_ldst_X, true, false, MO_SW) + +/* Load Word and Zero */ +TRANS(LWZ, do_ldst_D, false, false, MO_UL) +TRANS(LWZX, do_ldst_X, false, false, MO_UL) +TRANS(LWZU, do_ldst_D, true, false, MO_UL) +TRANS(LWZUX, do_ldst_X, true, false, MO_UL) + +/* Load Word Algebraic */ +TRANS64(LWA, do_ldst_D, false, false, MO_SL) +TRANS64(LWAX, do_ldst_X, false, false, MO_SL) +TRANS64(LWAUX, do_ldst_X, true, false, MO_SL) + +/* Load Doubleword */ +TRANS64(LD, do_ldst_D, false, false, MO_Q) +TRANS64(LDX, do_ldst_X, false, false, MO_Q) +TRANS64(LDU, do_ldst_D, true, false, MO_Q) +TRANS64(LDUX, do_ldst_X, true, false, MO_Q) + +/* + * Fixed-Point Arithmetic Instructions + */ + static bool trans_ADDI(DisasContext *ctx, arg_D *a) { if (a->ra) { From patchwork Thu Jun 3 08:22:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453233 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp84482jao; Thu, 3 Jun 2021 01:42:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwl9P27+kHyIXVVdO2JXxXw9EbqXkzBNEeICN9/xVQHmZcING864tH4zHUd+qGLDXEfXCN1 X-Received: by 2002:a25:bb85:: with SMTP id y5mr55059129ybg.391.1622709726411; Thu, 03 Jun 2021 01:42:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709726; cv=none; d=google.com; s=arc-20160816; b=r88dL2u16K0SizpNGAM85c3UpYeGHzyNDm0RqT8xrsMMUmiQ4jnBhh8JmjGLuHL9fr 5pvl9DvhUat9RvcZxlbBT2jVfp5+1yVdGLLtRmWkVYR2OhbmkJEvRNJYokBlnMx+4p6Z sxkQP/w8EWX5Pr9GefrZ6lBOzBRnJpCfbkc1h0phUdxwLJQbAS+ApAlXOrjCCkKUXdqp 8fPXd/uaCSz8ZPEM9Fv0nFU7MEYb61X8WCEqNhz9PVXBmimnuhhGEcDHChvRr8V446LA DHhtxOtvVahiQ7kMaN58AiNPnwgrBx1WZBPc9jkWs2PkQeWYq8BktMyTNcJBoKvBUxgx BmgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Dyp73EKiutm6vLc3zTJitxCwngmvez78PgG6bYrnbqc=; b=jWwgkor/F71rL0yZ1TaKStsL/sYzvq/w1cMLmCbE8SVkjNNQRhaQmaJp63wgweYpw2 tyfAd9fVy6cnBgkNb6KDHp0MontRla04Ho6rAvCpOUDoDNoYWF3mTs7QAbjQus7ugIfG A5Kd1NH5nXYw868hZ1NdP+n6SqC6jm4BfYm0TE9Q0O/H5RBDvnVyvdRa9egIvMDwmXgg jlhb6kW7O2B1r/E1TDsEUQS1Gm3vatnerCsGWQsHywe9ofzYGuHT2NeeB/170jUEFrJH 2IW2/X0IXN0K5sADmDkf3rrUM1yAxYdACz9vVvYiurFQfVPNExHEVOMsFvuUZ0luxg7T ujmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=JAy2MwqN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h126si1835989ybh.449.2021.06.03.01.42.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:42:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=JAy2MwqN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:56894 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loivV-000405-Rq for patch@linaro.org; Thu, 03 Jun 2021 04:42:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39976) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidw-0008A8-Hr; Thu, 03 Jun 2021 04:23:56 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:41115 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidt-0000Y4-4f; Thu, 03 Jun 2021 04:23:55 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5q4dCfz9t2g; Thu, 3 Jun 2021 18:22:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708559; bh=1p0QItMfqcgQJ0I2dKcNL+H+aE+4GbEGvW7Cxb6MkY8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JAy2MwqND1mGvH/z+y3wXpCCNxv1KDi9+zO9MX9LMP1YUPCQjt6eCnLSoEAOa99tJ K4gaK1iLX3lZLV1gDZY4Wo/eg4afEp8F5qho6pQKjZgC4cE0KkfDl+roCw/dcFMBcF juh/tOPPQVNz0VCradMgc/SE0EBuRWdU8okNFB4s= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 34/42] target/ppc: Implement prefixed integer load instructions Date: Thu, 3 Jun 2021 18:22:23 +1000 Message-Id: <20210603082231.601214-35-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-8-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/insn64.decode | 15 +++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 16 ++++++++++++++++ 2 files changed, 31 insertions(+) -- 2.31.1 diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 9aa5097a98..547bd1736f 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -24,6 +24,21 @@ ...... rt:5 ra:5 ................ \ &PLS_D si=%pls_si +### Fixed-Point Load Instructions + +PLBZ 000001 10 0--.-- .................. \ + 100010 ..... ..... ................ @PLS_D +PLHZ 000001 10 0--.-- .................. \ + 101000 ..... ..... ................ @PLS_D +PLHA 000001 10 0--.-- .................. \ + 101010 ..... ..... ................ @PLS_D +PLWZ 000001 10 0--.-- .................. \ + 100000 ..... ..... ................ @PLS_D +PLWA 000001 00 0--.-- .................. \ + 101001 ..... ..... ................ @PLS_D +PLD 000001 00 0--.-- .................. \ + 111001 ..... ..... ................ @PLS_D + ### Fixed-Point Arithmetic Instructions PADDI 000001 10 0--.-- .................. \ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 6140dd41ca..7687f31d6f 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -80,6 +80,16 @@ static bool do_ldst_D(DisasContext *ctx, arg_D *a, bool update, bool store, return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop); } +static bool do_ldst_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool update, + bool store, MemOp mop) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + return do_ldst_D(ctx, &d, update, store, mop); +} + static bool do_ldst_X(DisasContext *ctx, arg_X *a, bool update, bool store, MemOp mop) { @@ -91,35 +101,41 @@ TRANS(LBZ, do_ldst_D, false, false, MO_UB) TRANS(LBZX, do_ldst_X, false, false, MO_UB) TRANS(LBZU, do_ldst_D, true, false, MO_UB) TRANS(LBZUX, do_ldst_X, true, false, MO_UB) +TRANS(PLBZ, do_ldst_PLS_D, false, false, MO_UB) /* Load Halfword and Zero */ TRANS(LHZ, do_ldst_D, false, false, MO_UW) TRANS(LHZX, do_ldst_X, false, false, MO_UW) TRANS(LHZU, do_ldst_D, true, false, MO_UW) TRANS(LHZUX, do_ldst_X, true, false, MO_UW) +TRANS(PLHZ, do_ldst_PLS_D, false, false, MO_UW) /* Load Halfword Algebraic */ TRANS(LHA, do_ldst_D, false, false, MO_SW) TRANS(LHAX, do_ldst_X, false, false, MO_SW) TRANS(LHAU, do_ldst_D, true, false, MO_SW) TRANS(LHAXU, do_ldst_X, true, false, MO_SW) +TRANS(PLHA, do_ldst_PLS_D, false, false, MO_SW) /* Load Word and Zero */ TRANS(LWZ, do_ldst_D, false, false, MO_UL) TRANS(LWZX, do_ldst_X, false, false, MO_UL) TRANS(LWZU, do_ldst_D, true, false, MO_UL) TRANS(LWZUX, do_ldst_X, true, false, MO_UL) +TRANS(PLWZ, do_ldst_PLS_D, false, false, MO_UL) /* Load Word Algebraic */ TRANS64(LWA, do_ldst_D, false, false, MO_SL) TRANS64(LWAX, do_ldst_X, false, false, MO_SL) TRANS64(LWAUX, do_ldst_X, true, false, MO_SL) +TRANS64(PLWA, do_ldst_PLS_D, false, false, MO_SL) /* Load Doubleword */ TRANS64(LD, do_ldst_D, false, false, MO_Q) TRANS64(LDX, do_ldst_X, false, false, MO_Q) TRANS64(LDU, do_ldst_D, true, false, MO_Q) TRANS64(LDUX, do_ldst_X, true, false, MO_Q) +TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q) /* * Fixed-Point Arithmetic Instructions From patchwork Thu Jun 3 08:22:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453231 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp84104jao; Thu, 3 Jun 2021 01:41:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyx6sYC+F4AOrO8fg0BkXFZChgySh2P3yr2+ucT523CyVte41jSUG3g1W6fX0GShbnYgMuk X-Received: by 2002:a25:af04:: with SMTP id a4mr53315296ybh.131.1622709678755; Thu, 03 Jun 2021 01:41:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709678; cv=none; d=google.com; s=arc-20160816; b=qdvr8O3sx4do2cVttcoJIULSnT7MWXdL2a+5vndeH0ElGiCFbWYS23aF26YqJOiSdC aUWOj5zw2fT5BIC8uJ/fJJU1WkHBSUR2y6XwcDq7Ep8g+29YP97mO8/OKbOREoTsw/ZO fbiGfbti5YHth5VgvLWVl3keuz5lt29kmPDjAG2DohLaoN1DcG5Qi7BoZl+VkzsjBOnk ee9f5vuyaRE8FsOJEexfWXoB/1+2SmHEYydo2y3osTqcNp0nYVy4YmsFHwl01Abyjim9 UTJde+Kocg8RnmkJ63v3jcvSrO6oDuk68LeF8MXT/KXctZ+JxXUxA7W73R6KUmQlTmdH sniA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xYOJl137iSvLnJAxBifxW1AKij8NX0zjr3ZMqj8h1WI=; b=A5EMs53Qb6TW6N9j3JBHhVMdrX5eUGTB5BQSKqL1hy3koNCduB77I0saUFbH/Pgkrq AHK6cTfuivkBxBvBb1Zz6xcskpswvRZ0yJ+PpGmx6q6a0IgN2XRsAIrO3sQ1VA+hZHgt Im5f3HJgaL/bhiVmEPJQoJLrRg40vG0QtDr3k7+nlh6qSx6k5uZgalOZ8vQD0iCjJwEg Sm65lbLmIjb1fALFtiM8Z52OYhFclh3MDTOQoNTf3Hc9EKv1V7gWyvZSxN1RKMDVFt3R iejaV0Oe8s5qTzEsRpBruqFsfX4oNL7I0qWunmBzQBd+ZrcMIiqPOsA1ZJPgB8PC64df 3HxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=RHl+9tvs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g1si1946514ybc.32.2021.06.03.01.41.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:41:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=RHl+9tvs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:51996 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loiuk-0000gD-4p for patch@linaro.org; Thu, 03 Jun 2021 04:41:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40006) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loie0-0008Ff-E9; Thu, 03 Jun 2021 04:24:00 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:45911 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidx-0000bq-2B; Thu, 03 Jun 2021 04:23:59 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5q6SVvz9t5G; Thu, 3 Jun 2021 18:22:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708559; bh=M+zSZGhgcEUqc1YqT6EAdN/4wahTJaWpgEf1EAF8ZRs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RHl+9tvs4olQOyXWq4AL3RCtmUm+FFytIFxU27P/EhkVddxdcJ6Ilv4fgKhHiq2Yc 6eTOOOAnXrbCcTkSAVd43p1dNwOtr9M5BOF9eQrnMlRz9hlVgMZTujZ9P2oWDBDNKx 9lId5Hl/rg0ZeKGnde3UEXyyaEXU8uRCdXWtajKw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 35/42] target/ppc: Move D/DS/X-form integer stores to decodetree Date: Thu, 3 Jun 2021 18:22:24 +1000 Message-Id: <20210603082231.601214-36-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson These are all connected by macros in the legacy decoding. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-9-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/insn32.decode | 22 ++++++ target/ppc/translate.c | 85 +--------------------- target/ppc/translate/fixedpoint-impl.c.inc | 24 ++++++ 3 files changed, 49 insertions(+), 82 deletions(-) -- 2.31.1 diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 70f64c235b..00ec0f4328 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -57,6 +57,28 @@ LDU 111010 ..... ..... ..............01 @DS LDX 011111 ..... ..... ..... 0000010101 - @X LDUX 011111 ..... ..... ..... 0000110101 - @X +### Fixed-Point Store Instructions + +STB 100110 ..... ..... ................ @D +STBU 100111 ..... ..... ................ @D +STBX 011111 ..... ..... ..... 0011010111 - @X +STBUX 011111 ..... ..... ..... 0011110111 - @X + +STH 101100 ..... ..... ................ @D +STHU 101101 ..... ..... ................ @D +STHX 011111 ..... ..... ..... 0110010111 - @X +STHUX 011111 ..... ..... ..... 0110110111 - @X + +STW 100100 ..... ..... ................ @D +STWU 100101 ..... ..... ................ @D +STWX 011111 ..... ..... ..... 0010010111 - @X +STWUX 011111 ..... ..... ..... 0010110111 - @X + +STD 111110 ..... ..... ..............00 @DS +STDU 111110 ..... ..... ..............01 @DS +STDX 011111 ..... ..... ..... 0010010101 - @X +STDUX 011111 ..... ..... ..... 0010110101 - @X + ### Fixed-Point Arithmetic Instructions ADDI 001110 ..... ..... ................ @D diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d9238d1d10..3c3cb1b664 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3299,7 +3299,9 @@ static void glue(gen_qemu_, stop)(DisasContext *ctx, \ tcg_gen_qemu_st_tl(val, addr, ctx->mem_idx, op); \ } +#if defined(TARGET_PPC64) || !defined(CONFIG_USER_ONLY) GEN_QEMU_STORE_TL(st8, DEF_MEMOP(MO_UB)) +#endif GEN_QEMU_STORE_TL(st16, DEF_MEMOP(MO_UW)) GEN_QEMU_STORE_TL(st32, DEF_MEMOP(MO_UL)) @@ -3432,52 +3434,6 @@ static void gen_lq(DisasContext *ctx) #endif /*** Integer store ***/ -#define GEN_ST(name, stop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_STU(name, stop, opc, type) \ -static void glue(gen_, stop##u)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - if (type == PPC_64B) \ - gen_addr_imm_index(ctx, EA, 0x03); \ - else \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_STUX(name, stop, opc2, opc3, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_reg_index(ctx, EA); \ - gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - #define GEN_STX_E(name, stop, opc2, opc3, type, type2, chk) \ static void glue(gen_, name##x)(DisasContext *ctx) \ { \ @@ -3495,19 +3451,6 @@ static void glue(gen_, name##x)(DisasContext *ctx) \ #define GEN_STX_HVRM(name, stop, opc2, opc3, type) \ GEN_STX_E(name, stop, opc2, opc3, type, PPC_NONE, CHK_HVRM) -#define GEN_STS(name, stop, op, type) \ -GEN_ST(name, stop, op | 0x20, type); \ -GEN_STU(name, stop, op | 0x21, type); \ -GEN_STUX(name, stop, 0x17, op | 0x01, type); \ -GEN_STX(name, stop, 0x17, op | 0x00, type) - -/* stb stbu stbux stbx */ -GEN_STS(stb, st8, 0x06, PPC_INTEGER); -/* sth sthu sthux sthx */ -GEN_STS(sth, st16, 0x0C, PPC_INTEGER); -/* stw stwu stwux stwx */ -GEN_STS(stw, st32, 0x04, PPC_INTEGER); - #define GEN_STEPX(name, stop, opc2, opc3) \ static void glue(gen_, name##epx)(DisasContext *ctx) \ { \ @@ -3529,8 +3472,6 @@ GEN_STEPX(std, DEF_MEMOP(MO_Q), 0x1d, 0x04) #endif #if defined(TARGET_PPC64) -GEN_STUX(std, st64_i64, 0x15, 0x05, PPC_64B); -GEN_STX(std, st64_i64, 0x15, 0x04, PPC_64B); GEN_STX_HVRM(stdcix, st64_i64, 0x15, 0x1f, PPC_CILDST) GEN_STX_HVRM(stwcix, st32, 0x15, 0x1c, PPC_CILDST) GEN_STX_HVRM(sthcix, st16, 0x15, 0x1d, PPC_CILDST) @@ -8166,31 +8107,11 @@ GEN_LDEPX(lw, DEF_MEMOP(MO_UL), 0x1F, 0x00) GEN_LDEPX(ld, DEF_MEMOP(MO_Q), 0x1D, 0x00) #endif -#undef GEN_ST -#undef GEN_STU -#undef GEN_STUX #undef GEN_STX_E -#undef GEN_STS -#define GEN_ST(name, stop, opc, type) \ -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_STU(name, stop, opc, type) \ -GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_STUX(name, stop, opc2, opc3, type) \ -GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type), #define GEN_STX_E(name, stop, opc2, opc3, type, type2, chk) \ GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000000, type, type2), -#define GEN_STS(name, stop, op, type) \ -GEN_ST(name, stop, op | 0x20, type) \ -GEN_STU(name, stop, op | 0x21, type) \ -GEN_STUX(name, stop, 0x17, op | 0x01, type) \ -GEN_STX(name, stop, 0x17, op | 0x00, type) - -GEN_STS(stb, st8, 0x06, PPC_INTEGER) -GEN_STS(sth, st16, 0x0C, PPC_INTEGER) -GEN_STS(stw, st32, 0x04, PPC_INTEGER) + #if defined(TARGET_PPC64) -GEN_STUX(std, st64_i64, 0x15, 0x05, PPC_64B) -GEN_STX(std, st64_i64, 0x15, 0x04, PPC_64B) GEN_STX_E(stdbr, st64r_i64, 0x14, 0x14, PPC_NONE, PPC2_DBRX, CHK_NONE) GEN_STX_HVRM(stdcix, st64_i64, 0x15, 0x1f, PPC_CILDST) GEN_STX_HVRM(stwcix, st32, 0x15, 0x1c, PPC_CILDST) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 7687f31d6f..adeee33289 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -137,6 +137,30 @@ TRANS64(LDU, do_ldst_D, true, false, MO_Q) TRANS64(LDUX, do_ldst_X, true, false, MO_Q) TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q) +/* Store Byte */ +TRANS(STB, do_ldst_D, false, true, MO_UB) +TRANS(STBX, do_ldst_X, false, true, MO_UB) +TRANS(STBU, do_ldst_D, true, true, MO_UB) +TRANS(STBUX, do_ldst_X, true, true, MO_UB) + +/* Store Halfword */ +TRANS(STH, do_ldst_D, false, true, MO_UW) +TRANS(STHX, do_ldst_X, false, true, MO_UW) +TRANS(STHU, do_ldst_D, true, true, MO_UW) +TRANS(STHUX, do_ldst_X, true, true, MO_UW) + +/* Store Word */ +TRANS(STW, do_ldst_D, false, true, MO_UL) +TRANS(STWX, do_ldst_X, false, true, MO_UL) +TRANS(STWU, do_ldst_D, true, true, MO_UL) +TRANS(STWUX, do_ldst_X, true, true, MO_UL) + +/* Store Doubleword */ +TRANS64(STD, do_ldst_D, false, true, MO_Q) +TRANS64(STDX, do_ldst_X, false, true, MO_Q) +TRANS64(STDU, do_ldst_D, true, true, MO_Q) +TRANS64(STDUX, do_ldst_X, true, true, MO_Q) + /* * Fixed-Point Arithmetic Instructions */ From patchwork Thu Jun 3 08:22:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 453230 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp83631jao; Thu, 3 Jun 2021 01:40:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxdnNEQNK0plhG+o0c2SGNeAzs7jxkO/X3AH69PwV9Gv/16U+hFKaMsjuIca87qYAuij/Zp X-Received: by 2002:a25:b70c:: with SMTP id t12mr54654789ybj.196.1622709617363; Thu, 03 Jun 2021 01:40:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622709617; cv=none; d=google.com; s=arc-20160816; b=w0nUam2qrwqlGzhRt0IyUXxcUHVGzQkV7RX0/+OLqoijmba5T9+zP4/i3ltNVmtoBE vsEDfVf7OUCirgEwQQr/Uq+Y/CRYWGalzFY20eG1D2gN4MlPBwWFVraXxh9L7pO2ervn s5KIQRieKTutFw8cV4qKaUkrZ8Cn2DyyZMEDPtrJvRWDfXaNByglqWZCNtT7QOrRg8tb 0NZz2o6mh51goA1cu2JhJ4c6X6jaETCRO0Ms3/XnheIIWhho7jtnwpmoiI+rvN6+4s6A VPq8kGK6bUjI9x6obbXSsOXRTZ+W9ILIVr1UlUxWnBQdpK7e8mPjWsFFhmolhG/c13GM 9kKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cCHjNIglPeEqDtgh3P9uzRLxjmCluQe4kEPlFM/aXxM=; b=MjmglFUmKBLWwk4LzXrK5BBYTr7IVtZxLafu6EzxxvokFWTv9UFCG6ZUemDJPdmj5a WlbsjEJyCA+KEXN7YUjA51gKh056+omZpYSm8Uqq9TMFpq19iGx3eyf0N/++ninvpohH c3fQccK492BYWgTlDKfOLBsvocAKuo+sJm7nMgqj4sxO/EPBnQFsyOjkFCU6Hj0ou1rw vP28Ux2N8wy2ToSt8JtGWzWIg9bVFm2JjyDp6RPkUzHEzkw0zvHVaLYfJuOVHmzRGqRW 8vWrJX1ZsCYhlruBGaYxBngHQfTe9eXDm/RuNWEs7QSv3OI9MkWSI93OrG1q/h2gZ0r+ usSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=APYO1oQG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f36si2501589ybj.187.2021.06.03.01.40.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Jun 2021 01:40:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=APYO1oQG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:47292 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1loitk-00060a-Mh for patch@linaro.org; Thu, 03 Jun 2021 04:40:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39836) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidb-0007gi-OI; Thu, 03 Jun 2021 04:23:36 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:54637 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1loidZ-0000YB-55; Thu, 03 Jun 2021 04:23:35 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4Fwf5q5Pvsz9t2p; Thu, 3 Jun 2021 18:22:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708559; bh=ztbthMJY1sb70wNeuiduPWgqKUX4JcbHO+Ql/jratVs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=APYO1oQGgi38m3zvgmltf4v6dmbKPXvqwsXYGFHWQIgBQbepKiYynhJAqk5U37etm rln9LnQZCdxKyHqt46JtqI8LeU8CQgZK4ekaDR+V954kp0S/HrStqig2q8LLICoeT2 DL/dY8wp6FKD81QfEKOuCHf0OAcAmqb3IcgZn9Ko= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 36/42] target/ppc: Implement prefixed integer store instructions Date: Thu, 3 Jun 2021 18:22:25 +1000 Message-Id: <20210603082231.601214-37-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-10-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/insn64.decode | 12 ++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 4 ++++ 2 files changed, 16 insertions(+) -- 2.31.1 diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 547bd1736f..72c5944a53 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -39,6 +39,18 @@ PLWA 000001 00 0--.-- .................. \ PLD 000001 00 0--.-- .................. \ 111001 ..... ..... ................ @PLS_D +### Fixed-Point Store Instructions + +PSTW 000001 10 0--.-- .................. \ + 100100 ..... ..... ................ @PLS_D +PSTB 000001 10 0--.-- .................. \ + 100110 ..... ..... ................ @PLS_D +PSTH 000001 10 0--.-- .................. \ + 101100 ..... ..... ................ @PLS_D + +PSTD 000001 00 0--.-- .................. \ + 111101 ..... ..... ................ @PLS_D + ### Fixed-Point Arithmetic Instructions PADDI 000001 10 0--.-- .................. \ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index adeee33289..2d2d874146 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -142,24 +142,28 @@ TRANS(STB, do_ldst_D, false, true, MO_UB) TRANS(STBX, do_ldst_X, false, true, MO_UB) TRANS(STBU, do_ldst_D, true, true, MO_UB) TRANS(STBUX, do_ldst_X, true, true, MO_UB) +TRANS(PSTB, do_ldst_PLS_D, false, true, MO_UB) /* Store Halfword */ TRANS(STH, do_ldst_D, false, true, MO_UW) TRANS(STHX, do_ldst_X, false, true, MO_UW) TRANS(STHU, do_ldst_D, true, true, MO_UW) TRANS(STHUX, do_ldst_X, true, true, MO_UW) +TRANS(PSTH, do_ldst_PLS_D, false, true, MO_UW) /* Store Word */ TRANS(STW, do_ldst_D, false, true, MO_UL) TRANS(STWX, do_ldst_X, false, true, MO_UL) TRANS(STWU, do_ldst_D, true, true, MO_UL) TRANS(STWUX, do_ldst_X, true, true, MO_UL) +TRANS(PSTW, do_ldst_PLS_D, false, true, MO_UL) /* Store Doubleword */ TRANS64(STD, do_ldst_D, false, true, MO_Q) TRANS64(STDX, do_ldst_X, false, true, MO_Q) TRANS64(STDU, do_ldst_D, true, true, MO_Q) TRANS64(STDUX, do_ldst_X, true, true, MO_Q) +TRANS64(PSTD, do_ldst_PLS_D, false, true, MO_Q) /* * Fixed-Point Arithmetic Instructions