From patchwork Wed Jun 2 14:10:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54E21C47092 for ; Wed, 2 Jun 2021 14:11:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3DCE7613EE for ; Wed, 2 Jun 2021 14:11:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230409AbhFBONk (ORCPT ); Wed, 2 Jun 2021 10:13:40 -0400 Received: from mail-bn8nam11on2088.outbound.protection.outlook.com ([40.107.236.88]:32416 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230475AbhFBONU (ORCPT ); Wed, 2 Jun 2021 10:13:20 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=OngY6rbT0wypgMLP8aysX4zw1vmiqV6M+fl80cwoEnIpTX/Zm4pfDtGukZzouGCNoA7Zo97OnzbRU9MzJbIsj1gCZLrd9x18dVYvF0FwgkJQMAzuBz2qKVSHw5fKF+x0jk5VpYKMFzlJj5lVseLj+ivaYmPz3DpffRMYcwe8TnhyDNd4PKQUa4S6qwMgt3BBVgL1hChXdA1mTNxZy6eQnVFNl+WbpUKk4cbV/eOHsZ0pmZYkUOVWFfQkMD1CY60Or1L6Ag2A+DwwDgtbLuvBiT9fEDmBIxsvilWR68JLEfUbORaSj4bEiAH+4oLycY+mDR4A7pnXrac1mENFRWo/Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=b7OcioCq+8o2r70L9N0hO5CldAYJzBAXRKvcHyOO4Vk=; b=WwlM16I8VM6iLv+PfMlal21ZXShZq3AtGaB1SxxMZvGUihdqeeG0V4Tgq+auz9qjczd8H3XVYfvhmBXFAsmJF1O9UhnoZrG5yPnhNpFponUw1hSoi5qpVfJYTKnFO9YhwLfH5v2HGcAlVI711mvs63Yarnd3Wn5yJoNN8dbJgO0sDV30KjyAXhvsRnPFbwvlmFDrF3VeR88aXfLpd+Zk9XtuJPkgfXmkWo0hNe80NPFldHoJZd8k0bgwi78myHk6dUXMH0349SkzbVw+nfMjFrbZ9L/1JMrmd4UwFw5LQJ00xxoVWhwSPpOhssSSjhoRJQFe4jKNbk83B8AqjIka8Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=b7OcioCq+8o2r70L9N0hO5CldAYJzBAXRKvcHyOO4Vk=; b=D41kZAffHmqIGfImSfUIeJbQTurmH3OeO/rPeRJO2sFRST6KHYzWf2y8Wm5JILIlEHY/vvqQCvXvvaeFX1rCp6BgWK5dfGtaHOWBWE528td14Ypv0yZTjvkclP4V3b+3rNJjev2Lg6dh3WrPO5aW0Yp0PQEfFT99vH5a1SSnrnE= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:34 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:34 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 03/37] x86/cpufeatures: Add SEV-SNP CPU feature Date: Wed, 2 Jun 2021 09:10:23 -0500 Message-Id: <20210602141057.27107-4-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:31 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9a896f7b-c3de-4879-a4d4-08d925d052cd X-MS-TrafficTypeDiagnostic: SN1PR12MB2368: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XFtAUz7dNHfIKvIYaty1za8+kv4PhI8I8/sR6eF80kVnTgqE0WZpU8ImGjIFVTConJO82RokHNdD7EXyBkFW+0iS4C2shKdDvQlXoEUm5r3BeFQLbhkBaak7zPRBGoTVqYVDOAUunZhRPxjO/dO6IuQ19S5In8ohw6aWvxRf/O4H6D3gugIVDASvRAMfQtIRz3iiOBJBEcw8UMukdmDcUXRYo+bfKU/cYyUMKGp4z1x1fnxgwPPpxJkuX/A7W4CsAIvAbC0//GPajue63mGcRKBMVy5zTdL0+4GJ71JMJoUCKKTwnwOWeshPTOJvelmCwKtFqECy+Cg4erj+bFZ8eQhlxQDew+P4spp8Kjc4OwH0M9wP0vGSQCBqUCBtus8FOMYWiFE1Wnl6RiBIi5sqBjSTeiPYiAKwYhjv20mdtdojGJHS7YhcvvNnHEfbEBk6U8B4LteP1ktN8la6b5LNnFm2EltSgzfX3Rp2yM/gWs4ToYjGK6P9/77TdoVJ1Snjh73DUPW/xe8ZcIphfutMVMfcgyc9LPeDItj/TjeYxhZbTlqaI/aseYRVpwbwFmdciCOaHknnLmJ9bP4WfM+P45rIDv7Nokqvod3ELB7XRUo/LKNvUtuSx0l5hWuit8YxLkefapfUdMHxW7HQHpkxLw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(136003)(396003)(376002)(366004)(346002)(39860400002)(5660300002)(86362001)(6486002)(52116002)(7696005)(44832011)(38350700002)(38100700002)(956004)(2616005)(1076003)(8676002)(7416002)(8936002)(478600001)(186003)(316002)(4326008)(16526019)(26005)(66556008)(66476007)(2906002)(36756003)(54906003)(83380400001)(6666004)(66946007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: vtvrakr1FW6s83Go0DSwwGeyF3mRP+p+2hgnPQkvF+EXJ/QDKydOip7vXJ0AV/n2j54AqcLt/xnuVd1vlGlv2ZLXPj6sIQot+t6mpoJn68IPaWU7Bun6oL2MSwlmcGT2XNkmTtW5REiVxMcob/aXqcKdtguDKi4FjgEnIFGQVXBOxSqSCCrCK0VyZQmXqa0D4EosJQCIfVOjwti4hWTQUVTr53EgzaDggVvBi7RwGqkn7rLQ4B6W4oinVHfwrQpUb/8iYI2vSQoYF83Vl+4q4rlBwQPzRqC1WslBy6CTzN5GMnuPknLSzvuC15s4+f9GiLn4HYteA2LcuVhrnT7ckIIBjccEwI/emoquUvitIzlRG2DZ8YchqZTyXPbzcJG51zP/lkmuHmEp9aL4bm5hFfYpEYfIq/8TBizPHVbjeZwRX2nB2S1OjTTAHC0u3KWrumCvU+pJgNZEI4XPieBDM1XFCrrMB6//fDUIkFvfJI3Zs2TmoXqXjRsbtpy+yKcdUeSlv8LRI/0aLYYO70mW7gIl6lsYsFfmMLiGRlxLNEvNbTMbOONdNg6SVoLb4WhFhUoSDOMnYtMA8dC7+3EA4U6T8GCeibnbYbosTLgHaBr37NbGSJufSd16Yva3/CvUdx1rtPAoHs6yQbiE/Vvb+5sPeH+hV//tS9SEp5PhqiADVUzxP4E4mTxuQ1dHMDLoIyJX+chp1+qrVDD/ao7v6xpEE7VMm1K12Bk8hjS0RqlQFN90FtjRcdRmWtnEhsDf6CDlgbBFvrJ5Zj3LR5EvRZ2tbqAsppTQ9biZco/GEkfXTIws1M9aZ1NLhr6zRDzEyKSvpiXoRnTc/HCmUgWCIdosYectMEpM5VjjKK93qwC6KOGmw6t4ErEX/Gq382JjPigIOdgMyPvMAHgK5kCoXUI+niUARNELqpM246/cVH0gaLdBHLu6VqDAYo9YggYb/US3QvCUIqAQDCwURVsQuzkhR4EPP2eELIFuIv3jNqLHKoNEgVykBMuyUouB3ZE5enf7uzgGs4h3i9DgIWM0TKscTEICyt50kevA2oFMHQ/9z18Xx1B20lAabTBGYVwWZM0rmuKiYBSwYroWfrsvWNKn7gGKxjjOU6FzqKHD5095f3H28cJsDuSMUB4TexdCjUgoH1vCtNxbeoUEKJhiIw4Q0HpIUDwjJ6IKGZ77BC39KsKhCnP03249wc2+99dQ0ovI+aWJT0HR4onZD1mLOPmdyKiTj5/oL7m7kcx3omc5F49pc2OeUiECqMR7TS8vKPZDpAWEzZ4uCnDyG8Z0X946MLFFknihwN33+P5hzecuvNE8udyYPwjhub69va0q X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9a896f7b-c3de-4879-a4d4-08d925d052cd X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:32.4178 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AB/Mf7eSNU/c9AgfTggRoFxD5RW8XWWy3pJDshAYsb6GKIu9Uy+IAd1AeZ4bdgXxEEFnpj+IIgY2nsw3k7Di4A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2368 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Add CPU feature detection for Secure Encrypted Virtualization with Secure Nested Paging. This feature adds a strong memory integrity protection to help prevent malicious hypervisor-based attacks like data replay, memory re-mapping, and more. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/amd.c | 3 ++- tools/arch/x86/include/asm/cpufeatures.h | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index ac37830ae941..433d00323b36 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -397,6 +397,7 @@ #define X86_FEATURE_SEV (19*32+ 1) /* AMD Secure Encrypted Virtualization */ #define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* "" VM Page Flush MSR is supported */ #define X86_FEATURE_SEV_ES (19*32+ 3) /* AMD Secure Encrypted Virtualization - Encrypted State */ +#define X86_FEATURE_SEV_SNP (19*32+4) /* AMD Secure Encrypted Virtualization - Secure Nested Paging */ #define X86_FEATURE_SME_COHERENT (19*32+10) /* "" AMD hardware-enforced cache coherency */ /* diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 0adb0341cd7c..19567f976996 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -586,7 +586,7 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c) * If BIOS has not enabled SME then don't advertise the * SME feature (set in scattered.c). * For SEV: If BIOS has not enabled SEV then don't advertise the - * SEV and SEV_ES feature (set in scattered.c). + * SEV, SEV_ES and SEV_SNP feature. * * In all cases, since support for SME and SEV requires long mode, * don't advertise the feature under CONFIG_X86_32. @@ -618,6 +618,7 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c) clear_sev: setup_clear_cpu_cap(X86_FEATURE_SEV); setup_clear_cpu_cap(X86_FEATURE_SEV_ES); + setup_clear_cpu_cap(X86_FEATURE_SEV_SNP); } } diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h index cc96e26d69f7..e78ac4011ec8 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h @@ -390,6 +390,7 @@ #define X86_FEATURE_SEV (19*32+ 1) /* AMD Secure Encrypted Virtualization */ #define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* "" VM Page Flush MSR is supported */ #define X86_FEATURE_SEV_ES (19*32+ 3) /* AMD Secure Encrypted Virtualization - Encrypted State */ +#define X86_FEATURE_SEV_SNP (19*32+4) /* AMD Secure Encrypted Virtualization - Secure Nested Paging */ #define X86_FEATURE_SME_COHERENT (19*32+10) /* "" AMD hardware-enforced cache coherency */ /* From patchwork Wed Jun 2 14:10:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 327B5C47083 for ; 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The RMP is a single data structure shared across the system that contains one entry for every 4K page of DRAM that may be used by SEV-SNP VMs. The goal of RMP is to track the owner of each page of memory. Pages of memory can be owned by the hypervisor, owned by a specific VM or owned by the AMD-SP. See APM2 section 15.36.3 for more detail on RMP. The RMP table is used to enforce access control to memory. The table itself is not directly writable by the software. New CPU instructions (RMPUPDATE, PVALIDATE, RMPADJUST) are used to manipulate the RMP entries. Based on the platform configuration, the BIOS reserves the memory used for the RMP table. The start and end address of the RMP table must be queried by reading the RMP_BASE and RMP_END MSRs. If the RMP_BASE and RMP_END are not set then disable the SEV-SNP feature. The SEV-SNP feature is enabled only after the RMP table is successfully initialized. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/disabled-features.h | 8 +- arch/x86/include/asm/msr-index.h | 6 ++ arch/x86/kernel/sev.c | 113 +++++++++++++++++++++++ 3 files changed, 126 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index b7dd944dc867..0d5c8d08185c 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -68,6 +68,12 @@ # define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31)) #endif +#ifdef CONFIG_AMD_MEM_ENCRYPT +# define DISABLE_SEV_SNP 0 +#else +# define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31)) +#endif + /* * Make sure to add features to the correct mask */ @@ -91,7 +97,7 @@ DISABLE_ENQCMD) #define DISABLED_MASK17 0 #define DISABLED_MASK18 0 -#define DISABLED_MASK19 0 +#define DISABLED_MASK19 (DISABLE_SEV_SNP) #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 20) #endif /* _ASM_X86_DISABLED_FEATURES_H */ diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 69ce50fa3565..e8d45929010a 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -485,6 +485,8 @@ #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) #define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT) #define MSR_AMD64_SEV_SNP_ENABLED BIT_ULL(MSR_AMD64_SEV_SNP_ENABLED_BIT) +#define MSR_AMD64_RMP_BASE 0xc0010132 +#define MSR_AMD64_RMP_END 0xc0010133 #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f @@ -542,6 +544,10 @@ #define MSR_AMD64_SYSCFG 0xc0010010 #define MSR_AMD64_SYSCFG_MEM_ENCRYPT_BIT 23 #define MSR_AMD64_SYSCFG_MEM_ENCRYPT BIT_ULL(MSR_AMD64_SYSCFG_MEM_ENCRYPT_BIT) +#define MSR_AMD64_SYSCFG_SNP_EN_BIT 24 +#define MSR_AMD64_SYSCFG_SNP_EN BIT_ULL(MSR_AMD64_SYSCFG_SNP_EN_BIT) +#define MSR_AMD64_SYSCFG_SNP_VMPL_EN_BIT 25 +#define MSR_AMD64_SYSCFG_SNP_VMPL_EN BIT_ULL(MSR_AMD64_SYSCFG_SNP_VMPL_EN_BIT) #define MSR_K8_INT_PENDING_MSG 0xc0010055 /* C1E active bits in int pending message */ #define K8_INTP_C1E_ACTIVE_MASK 0x18000000 diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 8aae1166f52e..172497d6cbb9 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -24,6 +24,8 @@ #include #include #include +#include +#include #include #include @@ -38,6 +40,7 @@ #include #include #include /* For struct boot_params */ +#include #include "sev-internal.h" @@ -54,6 +57,9 @@ static struct ghcb __initdata *boot_ghcb; static unsigned long snp_secrets_phys; +static unsigned long rmptable_start __ro_after_init; +static unsigned long rmptable_end __ro_after_init; + /* #VC handler runtime per-CPU data */ struct sev_es_runtime_data { struct ghcb ghcb_page; @@ -2085,3 +2091,110 @@ unsigned long snp_issue_guest_request(int type, struct snp_guest_request_data *i return ret; } EXPORT_SYMBOL_GPL(snp_issue_guest_request); + +#undef pr_fmt +#define pr_fmt(fmt) "SEV-SNP: " fmt + +static int __snp_enable(unsigned int cpu) +{ + u64 val; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return 0; + + rdmsrl(MSR_AMD64_SYSCFG, val); + + val |= MSR_AMD64_SYSCFG_SNP_EN; + val |= MSR_AMD64_SYSCFG_SNP_VMPL_EN; + + wrmsrl(MSR_AMD64_SYSCFG, val); + + return 0; +} + +static __init void snp_enable(void *arg) +{ + __snp_enable(smp_processor_id()); +} + +static __init int __snp_rmptable_init(void) +{ + u64 rmp_base, rmp_end; + unsigned long sz; + void *start; + u64 val; + + rdmsrl(MSR_AMD64_RMP_BASE, rmp_base); + rdmsrl(MSR_AMD64_RMP_END, rmp_end); + + if (!rmp_base || !rmp_end) { + pr_info("Memory for the RMP table has not been reserved by BIOS\n"); + return 1; + } + + sz = rmp_end - rmp_base + 1; + + start = memremap(rmp_base, sz, MEMREMAP_WB); + if (!start) { + pr_err("Failed to map RMP table 0x%llx-0x%llx\n", rmp_base, rmp_end); + return 1; + } + + /* + * Check if SEV-SNP is already enabled, this can happen if we are coming from + * kexec boot. + */ + rdmsrl(MSR_AMD64_SYSCFG, val); + if (val & MSR_AMD64_SYSCFG_SNP_EN) + goto skip_enable; + + /* Initialize the RMP table to zero */ + memset(start, 0, sz); + + /* Flush the caches to ensure that data is written before SNP is enabled. */ + wbinvd_on_all_cpus(); + + /* Enable SNP on all CPUs. */ + on_each_cpu(snp_enable, NULL, 1); + +skip_enable: + rmptable_start = (unsigned long)start; + rmptable_end = rmptable_start + sz; + + pr_info("RMP table physical address 0x%016llx - 0x%016llx\n", rmp_base, rmp_end); + + return 0; +} + +static int __init snp_rmptable_init(void) +{ + if (!boot_cpu_has(X86_FEATURE_SEV_SNP)) + return 0; + + /* + * The SEV-SNP support requires that IOMMU must be enabled, and is not + * configured in the passthrough mode. + */ + if (no_iommu || iommu_default_passthrough()) { + setup_clear_cpu_cap(X86_FEATURE_SEV_SNP); + pr_err("IOMMU is either disabled or configured in passthrough mode.\n"); + return 0; + } + + if (__snp_rmptable_init()) { + setup_clear_cpu_cap(X86_FEATURE_SEV_SNP); + return 1; + } + + cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/rmptable_init:online", __snp_enable, NULL); + + return 0; +} + +/* + * This must be called after the PCI subsystem. This is because before enabling + * the SNP feature we need to ensure that IOMMU is not configured in the + * passthrough mode. The iommu_default_passthrough() is used for checking the + * passthough state, and it is available after subsys_initcall(). + */ +fs_initcall(snp_rmptable_init); From patchwork Wed Jun 2 14:10:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C705EC47097 for ; Wed, 2 Jun 2021 14:12:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B3102613F3 for ; Wed, 2 Jun 2021 14:12:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230446AbhFBOOF (ORCPT ); Wed, 2 Jun 2021 10:14:05 -0400 Received: from mail-bn8nam11on2062.outbound.protection.outlook.com ([40.107.236.62]:57888 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230234AbhFBONh (ORCPT ); Wed, 2 Jun 2021 10:13:37 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AlSZLEjeg7eDOwUbgqJ0Bp0tPyZwXNsw1F4vK/gCQycbxyhEb78T4NoZD8SINKYqPCWc+0mi5fjtn8qVXc8SvhtoTRumqcZJ8bKAYIdbU4lVA/nObCE2AFPbV36lYn7VzTp275MT6l2mNzC61PodNtSxOl722RkkFYr5flv7/PZE16trTJ18rwB/siDB5JaU/LLdUukqOU3GWRqHsLzxOTMfs79+Sh4R2waJBxYrraINXd3AEWXz96TtFxovFBzi9fLaOI5zNxXYMA/kAatrYZJoAPTNCPqu36Prz52GaH2n4GCDZjV96JBys8lY5REaocf/lEJSLFrTMcpIG8/BWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=o5FeCbgJvCPDvNZucTG6C/Be5DjljDLwjfU1yTbGz3c=; b=TY2unl9Bn0+gYOR5KBXrA78lSQxlA2K6KUgv7Vgg1iJbWO1Jmqu9ViVlGAdKzjpKPZRXQ/JjjsEWxHufCybRiNbTTIQCkcaILtkH5LEopt7M1471IYR1MaXnIXJUCV+kzJy1OnAGXn6kr63rdtrz/dYQbDHYFoBXMqxlFgpUDdN5hKN1koTohjREzqLq2t/pFXPWnAma5qAbiyA2+ywK+EYQ6EALkXqUtcFFyy+s8Ak3WWRoThIuAarMPc5wVxpjHl0sCmaWVEI0VIl5ByeS3jrDgK3xlSJPuq7QAM23RUwRsFMRYhY5UG3KV1Tmf35UalV28rUpNj/Sbo2aytjiZA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=o5FeCbgJvCPDvNZucTG6C/Be5DjljDLwjfU1yTbGz3c=; b=L1orI7FmTdpKRbgmDwBg96RjF/tICP0FErx2qc91HbJb1LTCoesCE7jNnnFzQ+eiXI6L21uggrZMstojC07lQoxBqC8iTQBlpdJcsiYI2MmP3twIyQgulXd+IVAqGAfPX1D/BrOrfWDAgUllNo4oI+3hC5YUY31IvokhH4btaoM= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:35 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:35 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. 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The RMP entry format is documented in AMD PPR, see https://bugzilla.kernel.org/attachment.cgi?id=296015. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/sev.h | 4 +-- arch/x86/kernel/sev.c | 28 +++++++++++++++++++++ include/linux/sev.h | 51 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 80 insertions(+), 3 deletions(-) create mode 100644 include/linux/sev.h diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index da2f757cd9bc..2764a438dbeb 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -9,6 +9,7 @@ #define __ASM_ENCRYPTED_STATE_H #include +#include #include #include @@ -74,9 +75,6 @@ struct cc_blob_sev_info { /* Software defined (when rFlags.CF = 1) */ #define PVALIDATE_FAIL_NOUPDATE 255 -/* RMP page size */ -#define RMP_PG_SIZE_4K 0 - /* Memory opertion for snp_prep_memory() */ enum snp_mem_op { MEMORY_PRIVATE, diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 172497d6cbb9..51676ab1a321 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -46,6 +46,10 @@ #define DR7_RESET_VALUE 0x400 +#define RMPTABLE_ENTRIES_OFFSET 0x4000 +#define RMPENTRY_SHIFT 8 +#define rmptable_page_offset(x) (RMPTABLE_ENTRIES_OFFSET + (((unsigned long)x) >> RMPENTRY_SHIFT)) + /* For early boot hypervisor communication in SEV-ES enabled guests */ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); @@ -2198,3 +2202,27 @@ static int __init snp_rmptable_init(void) * passthough state, and it is available after subsys_initcall(). */ fs_initcall(snp_rmptable_init); + +struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level) +{ + unsigned long phys = page_to_pfn(page) << PAGE_SHIFT; + struct rmpentry *entry, *large_entry; + unsigned long vaddr; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return NULL; + + vaddr = rmptable_start + rmptable_page_offset(phys); + if (unlikely(vaddr > rmptable_end)) + return NULL; + + entry = (struct rmpentry *)vaddr; + + /* Read a large RMP entry to get the correct page level used in RMP entry. */ + vaddr = rmptable_start + rmptable_page_offset(phys & PMD_MASK); + large_entry = (struct rmpentry *)vaddr; + *level = RMP_TO_X86_PG_LEVEL(rmpentry_pagesize(large_entry)); + + return entry; +} +EXPORT_SYMBOL_GPL(snp_lookup_page_in_rmptable); diff --git a/include/linux/sev.h b/include/linux/sev.h new file mode 100644 index 000000000000..83c89e999999 --- /dev/null +++ b/include/linux/sev.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * AMD Secure Encrypted Virtualization + * + * Author: Brijesh Singh + */ + +#ifndef __LINUX_SEV_H +#define __LINUX_SEV_H + +struct __packed rmpentry { + union { + struct { + u64 assigned : 1, + pagesize : 1, + immutable : 1, + rsvd1 : 9, + gpa : 39, + asid : 10, + vmsa : 1, + validated : 1, + rsvd2 : 1; + } info; + u64 low; + }; + u64 high; +}; + +#define rmpentry_assigned(x) ((x)->info.assigned) +#define rmpentry_pagesize(x) ((x)->info.pagesize) +#define rmpentry_vmsa(x) ((x)->info.vmsa) +#define rmpentry_asid(x) ((x)->info.asid) +#define rmpentry_validated(x) ((x)->info.validated) +#define rmpentry_gpa(x) ((unsigned long)(x)->info.gpa) +#define rmpentry_immutable(x) ((x)->info.immutable) + +/* RMP page size */ +#define RMP_PG_SIZE_4K 0 + +#define RMP_TO_X86_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M) + +#ifdef CONFIG_AMD_MEM_ENCRYPT +struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level); +#else +static inline struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level) +{ + return NULL; +} + +#endif /* CONFIG_AMD_MEM_ENCRYPT */ +#endif /* __LINUX_SEV_H */ From patchwork Wed Jun 2 14:10:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E376BC4708F for ; Wed, 2 Jun 2021 14:12:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CDA2E613EE for ; Wed, 2 Jun 2021 14:12:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230272AbhFBOOi (ORCPT ); Wed, 2 Jun 2021 10:14:38 -0400 Received: from mail-bn8nam11on2088.outbound.protection.outlook.com ([40.107.236.88]:32416 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230359AbhFBONj (ORCPT ); Wed, 2 Jun 2021 10:13:39 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZD4KV6sga9O3iiXNC5qMp52yANHwPombGqFEdq0glQkE5Etu/Nhf04sIaz3cwTqKRcTMA025HgbzOWCk11bY4Eizye2rl4uE53nAurMuvjCvbOU/7znJ+HJ6SkxYU2ezScCBfSCmqoGPvTq/fLndU2pzajRg5RNNtDR1q8JTF22iZqIxg1Baz1RvRRvpEIytS9IowAEas8b+pAgyzfC+mYh7URuLF6DLLIsPOj2AXWiZxSBmxcbnT8mqslbB26yM0vw/YpE3+wHpnqzmECZewmkZGICp44OHTHODnK7AWpGFMtWr1I3zS/0qPYlkpQpgMDfCySwzEGGZdfuXH00hcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZEZwO4zibzF6XLvhJ7uKSuP2o00KS+r4CawKQPuRyXY=; b=O+w2aEu1DtCvVGu4UGCAcqQK+gfjbuZ73wgLDDPRCo+ApXJuy1A973xXJ3OU2RtwlINE8VCDtOyhvCU8d+PnTZHbH2CpySimzaNPo7IfZTLpBlGutoxpBbRi0DOOvWM/twac5MflXjJ1yC5VZ1z1DWNqCQXDqX/t7WKvPikh46tmJGFdNgPrxOSUlus5WBAtYMtdJ1mccxtYL7CNwWl9Fncedsv9B4P/OCMpVxn6PbCHbD9lJjio74nyOnfM+ox7hH5hONRXWLNS9RgsiSO0X8k4Np9pX9DwA3WhSLXv4RS+MtGMeB1DR1V2iT65F8n2Ozd6gGVqf5qHsCb0MI7GBw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZEZwO4zibzF6XLvhJ7uKSuP2o00KS+r4CawKQPuRyXY=; b=jcHpo5VJwxfteSnrCEHR7H582g9PFyUdAf1iZRtfcsNechPrBNJfFRwrcJ5CfLnMorzH9NwdaKXpOGt2j/wPylFi/wLIx9gb3ewazaoPD05pXwv4tjK14qfqMhxCde6KXpjMqea/dSKN3P/hfgWEnpol+R85UWoXbig79K+9gYI= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:35 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:35 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. 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The hypervisor will use the instruction to add pages to the RMP table. See APM3 for details on the instruction operations. The PSMASH instruction expands a 2MB RMP entry into a corresponding set of contiguous 4KB-Page RMP entries. The hypervisor will use this instruction to adjust the RMP entry without invalidating the previous RMP entry. Signed-off-by: Brijesh Singh --- arch/x86/kernel/sev.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/sev.h | 20 ++++++++++++++++++++ 2 files changed, 62 insertions(+) diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 51676ab1a321..9727df945fb1 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -2226,3 +2226,45 @@ struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level) return entry; } EXPORT_SYMBOL_GPL(snp_lookup_page_in_rmptable); + +int psmash(struct page *page) +{ + unsigned long spa = page_to_pfn(page) << PAGE_SHIFT; + int ret; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return -ENXIO; + + /* Retry if another processor is modifying the RMP entry. */ + do { + /* Binutils version 2.36 supports the PSMASH mnemonic. */ + asm volatile(".byte 0xF3, 0x0F, 0x01, 0xFF" + : "=a"(ret) + : "a"(spa) + : "memory", "cc"); + } while (ret == FAIL_INUSE); + + return ret; +} +EXPORT_SYMBOL_GPL(psmash); + +int rmpupdate(struct page *page, struct rmpupdate *val) +{ + unsigned long spa = page_to_pfn(page) << PAGE_SHIFT; + int ret; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return -ENXIO; + + /* Retry if another processor is modifying the RMP entry. */ + do { + /* Binutils version 2.36 supports the RMPUPDATE mnemonic. */ + asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFE" + : "=a"(ret) + : "a"(spa), "c"((unsigned long)val) + : "memory", "cc"); + } while (ret == FAIL_INUSE); + + return ret; +} +EXPORT_SYMBOL_GPL(rmpupdate); diff --git a/include/linux/sev.h b/include/linux/sev.h index 83c89e999999..bcd4d75d87c8 100644 --- a/include/linux/sev.h +++ b/include/linux/sev.h @@ -39,13 +39,33 @@ struct __packed rmpentry { #define RMP_TO_X86_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M) +struct rmpupdate { + u64 gpa; + u8 assigned; + u8 pagesize; + u8 immutable; + u8 rsvd; + u32 asid; +} __packed; + + +/* + * The psmash() and rmpupdate() returns FAIL_INUSE when another processor is + * modifying the RMP entry. + */ +#define FAIL_INUSE 3 + #ifdef CONFIG_AMD_MEM_ENCRYPT struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level); +int psmash(struct page *page); +int rmpupdate(struct page *page, struct rmpupdate *e); #else static inline struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level) { return NULL; } +static inline int psmash(struct page *page) { return -ENXIO; } +static inline int rmpupdate(struct page *page, struct rmpupdate *e) { return -ENXIO; } #endif /* CONFIG_AMD_MEM_ENCRYPT */ #endif /* __LINUX_SEV_H */ From patchwork Wed Jun 2 14:10:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452660 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40CFDC47083 for ; Wed, 2 Jun 2021 14:13:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B5AD613F3 for ; Wed, 2 Jun 2021 14:13:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230333AbhFBOP3 (ORCPT ); Wed, 2 Jun 2021 10:15:29 -0400 Received: from mail-bn8nam11on2088.outbound.protection.outlook.com ([40.107.236.88]:32416 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231627AbhFBOOK (ORCPT ); Wed, 2 Jun 2021 10:14:10 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=cqtacyGbzahgZkDEbHsOWNePCQGPBYmqrsekjXTYgwgf2fkfTFoJxGM4JYYv4tip1fYN5ceIgG4DciBr4XUML4ETdoxjwVoM9aOhcFRzgxyyaZXguNu0M0zGE4siwcwCJrNJutEL8eh6BDKzY5vX/E11gu1QReq89he1kCh369q0L6B+mEjk1nHTLzqPvDlHwWH6nsZzLp0PmfQNdpzF4OpgrPikoS1369wFcoJuEV+IkkAR83yiqwUOZ++T+RAeAdNGMocnN6k/rAMI+XM3G5nWHbmWLp9X1W6j8bYfmGSCjQa/FjKdhFNLRPnE6+znDcM3yAbJVi169Jo1HvtBlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=UgzOEPHPOpw/L+40HOMnWYeNM0P9/hPteowwlWxGbZc=; b=ihReDO2C69FHIWSqoSRF9+8qqrWGn8RCsYzq5W+OB3ILPkdJi+VyCmn6962vn8hCL4NJv9wpfyBNewpfVqEgo9+l4W+cxkeg1KkEH0YIA6PL30UdBVsr/4/MBr4AECHVKZ+tDiwI2Gnbkc8LiTBpY/7Ra03bTLP2/B8tev9Z/cZb+CiCcyYkDJELURmEN/uFV7onbo83JDPpwdNRONs2sfI50V6JqStNgKlTKgFKM6KiDZK0CfZTCTvPD94qrb/hJOCl4Qoj/PYoZQovQyYwm+G8hif9cJn9882iOSbChkZj2k2yke7W3RGeDy4P/1g1B66/w6wn7IUv7NgXkBCcUQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=UgzOEPHPOpw/L+40HOMnWYeNM0P9/hPteowwlWxGbZc=; b=DUwO0SuYKBIZ8mKCmUbmbrMpJiKWweWgFVNGov66S6f7VZtL/p03fP/wFmdc0NXE+RTGyzGKATZkuO6tfX/VPT8WloWRwPRc7aGgbqy2JC9ALVSuU/y1ZPrAH22C0qUhnv+IaxAntTeHjHALraichMuirzFAZtYSJJR+J/p5T1M= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:39 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:39 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. 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If the hardware encounters the check failure, then it raises the #PF (with RMP set). Dump the RMP table to help the debug. Signed-off-by: Brijesh Singh --- arch/x86/mm/fault.c | 78 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 2715240c757e..e6deedf27d78 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -19,6 +19,7 @@ #include /* faulthandler_disabled() */ #include /* efi_crash_gracefully_on_page_fault()*/ #include +#include /* snp_lookup_page_in_rmptable() */ #include /* boot_cpu_has, ... */ #include /* dotraplinkage, ... */ @@ -502,6 +503,80 @@ static void show_ldttss(const struct desc_ptr *gdt, const char *name, u16 index) name, index, addr, (desc.limit0 | (desc.limit1 << 16))); } +static void dump_rmpentry(unsigned long address) +{ + struct rmpentry *e; + unsigned long pfn; + pgd_t *pgd; + pte_t *pte; + int level; + + pgd = __va(read_cr3_pa()); + pgd += pgd_index(address); + + pte = lookup_address_in_pgd(pgd, address, &level); + if (unlikely(!pte)) + return; + + switch (level) { + case PG_LEVEL_4K: { + pfn = pte_pfn(*pte); + break; + } + case PG_LEVEL_2M: { + pfn = pmd_pfn(*(pmd_t *)pte); + break; + } + case PG_LEVEL_1G: { + pfn = pud_pfn(*(pud_t *)pte); + break; + } + case PG_LEVEL_512G: { + pfn = p4d_pfn(*(p4d_t *)pte); + break; + } + default: + return; + } + + e = snp_lookup_page_in_rmptable(pfn_to_page(pfn), &level); + if (unlikely(!e)) + return; + + /* + * If the RMP entry at the faulting address was not assigned, then dump may + * not provide any useful debug information. Iterate through the entire 2MB + * region, and dump the RMP entries if one of the bit in the RMP entry is set. + */ + if (rmpentry_assigned(e)) { + pr_alert("RMPEntry paddr 0x%lx [assigned=%d immutable=%d pagesize=%d gpa=0x%lx" + " asid=%d vmsa=%d validated=%d]\n", pfn << PAGE_SHIFT, + rmpentry_assigned(e), rmpentry_immutable(e), rmpentry_pagesize(e), + rmpentry_gpa(e), rmpentry_asid(e), rmpentry_vmsa(e), + rmpentry_validated(e)); + + pr_alert("RMPEntry paddr 0x%lx %016llx %016llx\n", pfn << PAGE_SHIFT, + e->high, e->low); + } else { + unsigned long pfn_end; + + pfn = pfn & ~0x1ff; + pfn_end = pfn + PTRS_PER_PMD; + + while (pfn < pfn_end) { + e = snp_lookup_page_in_rmptable(pfn_to_page(pfn), &level); + + if (unlikely(!e)) + return; + + if (e->low || e->high) + pr_alert("RMPEntry paddr 0x%lx: %016llx %016llx\n", + pfn << PAGE_SHIFT, e->high, e->low); + pfn++; + } + } +} + static void show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long address) { @@ -578,6 +653,9 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad } dump_pagetable(address); + + if (error_code & X86_PF_RMP) + dump_rmpentry(address); } static noinline void From patchwork Wed Jun 2 14:10:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452657 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79304C4708F for ; Wed, 2 Jun 2021 14:14:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 606C961242 for ; Wed, 2 Jun 2021 14:14:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230029AbhFBOQb (ORCPT ); Wed, 2 Jun 2021 10:16:31 -0400 Received: from mail-bn8nam11on2062.outbound.protection.outlook.com ([40.107.236.62]:57888 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230208AbhFBOOu (ORCPT ); Wed, 2 Jun 2021 10:14:50 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bXf1qq8cRQFPniCwQwb3KkyoleLTqBeEL1UEj22pb/KoBJVMTcIarQ2jf13uoSqUspPRIs8LyijQ46Eur3rxx8IRlEZGe8iqX9NedCxNheUtbNfdMAIg0Ocp8TDhZoam3paXZyhja9iOMsPa8fqx4A7hOPceAOQtNCTr1mU7I4A4d9u948eEeughX7587XNi8uygNqRN0Z+7gwZTDLiC00ysJkzAP3OfyYw+icNq1MVjvi8EV9owURL703MxztLWTgqG3ulMxfXRVzsNM/1NVOxZf9OqTOL3tqtI6m1Rb7632Uh/RtbLuXtK5XQhOulaTsYTxR51esvniTql/8qvTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=g2Z7JSlGWPerJZfQq8QU8d7hr+48kKTAD1KSOj4Bnmo=; b=jvl5TSGmxFcqjHtB0n7lotOZkt4mF35MWxzlKnznxlpExe9zPiNTDyv/zBsmhv5AiBhP+8qY7ducpvVchZCug/8YyM23RaTwuKvkygwwL01TqEdnMPAJzwJKhDnN0sYbyRoSeWkm0dAnV3wVan49FKrOfAI9H8MhtYSK1PYicj2L+tC7u1sMyd3RCGBLQSbVBYDJhekM0+ykLzFr+X89e10+TEw2fRZvesUBXZy39xtfAlqzbpmccEDzG6bF7O9KqCJ/d1S9Q5WzcBlxTAeecQp77TswIcV3lQZMFBbu/3oj7vTscQDZcCNFWvjRBhtB6vLOxg/ScWOBP9zAWCCAGQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=g2Z7JSlGWPerJZfQq8QU8d7hr+48kKTAD1KSOj4Bnmo=; b=Gmysjav6szr5xnBlkSfYKZIWOCw0Px16oi7rX5qY1y8z71bRhc959loo6pVLEDTHHBTZHRY391ob5n/HG9rfSUdPfpuNSleuWWt9ja+J1a7wCKVwEHNZmV4bOQQuA3HgT7oMMJNQg7XDzZr4gAwvJsGgWGjqTL+pENJDvUtvkG8= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:42 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:42 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. 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SEV-SNP builds upon existing SEV and SEV-ES functionality while adding new hardware security protection. Define the commands and structures used to communicate with the AMD-SP when creating and managing the SEV-SNP guests. The SEV-SNP firmware spec is available at developer.amd.com/sev. Signed-off-by: Brijesh Singh --- drivers/crypto/ccp/sev-dev.c | 16 ++- include/linux/psp-sev.h | 222 +++++++++++++++++++++++++++++++++++ include/uapi/linux/psp-sev.h | 44 +++++++ 3 files changed, 281 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 3506b2050fb8..0331d4cea7da 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -130,7 +130,21 @@ static int sev_cmd_buffer_len(int cmd) case SEV_CMD_DOWNLOAD_FIRMWARE: return sizeof(struct sev_data_download_firmware); case SEV_CMD_GET_ID: return sizeof(struct sev_data_get_id); case SEV_CMD_ATTESTATION_REPORT: return sizeof(struct sev_data_attestation_report); - case SEV_CMD_SEND_CANCEL: return sizeof(struct sev_data_send_cancel); + case SEV_CMD_SEND_CANCEL: return sizeof(struct sev_data_send_cancel); + case SEV_CMD_SNP_GCTX_CREATE: return sizeof(struct sev_data_snp_gctx_create); + case SEV_CMD_SNP_LAUNCH_START: return sizeof(struct sev_data_snp_launch_start); + case SEV_CMD_SNP_LAUNCH_UPDATE: return sizeof(struct sev_data_snp_launch_update); + case SEV_CMD_SNP_ACTIVATE: return sizeof(struct sev_data_snp_activate); + case SEV_CMD_SNP_DECOMMISSION: return sizeof(struct sev_data_snp_decommission); + case SEV_CMD_SNP_PAGE_RECLAIM: return sizeof(struct sev_data_snp_page_reclaim); + case SEV_CMD_SNP_GUEST_STATUS: return sizeof(struct sev_data_snp_guest_status); + case SEV_CMD_SNP_LAUNCH_FINISH: return sizeof(struct sev_data_snp_launch_finish); + case SEV_CMD_SNP_DBG_DECRYPT: return sizeof(struct sev_data_snp_dbg); + case SEV_CMD_SNP_DBG_ENCRYPT: return sizeof(struct sev_data_snp_dbg); + case SEV_CMD_SNP_PAGE_UNSMASH: return sizeof(struct sev_data_snp_page_unsmash); + case SEV_CMD_SNP_PLATFORM_STATUS: return sizeof(struct sev_data_snp_platform_status_buf); + case SEV_CMD_SNP_GUEST_REQUEST: return sizeof(struct sev_data_snp_guest_request); + case SEV_CMD_SNP_CONFIG: return sizeof(struct sev_data_snp_config); default: return 0; } diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index d48a7192e881..c3755099ab55 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -85,6 +85,34 @@ enum sev_cmd { SEV_CMD_DBG_DECRYPT = 0x060, SEV_CMD_DBG_ENCRYPT = 0x061, + /* SNP specific commands */ + SEV_CMD_SNP_INIT = 0x81, + SEV_CMD_SNP_SHUTDOWN = 0x82, + SEV_CMD_SNP_PLATFORM_STATUS = 0x83, + SEV_CMD_SNP_DF_FLUSH = 0x84, + SEV_CMD_SNP_INIT_EX = 0x85, + SEV_CMD_SNP_DECOMMISSION = 0x90, + SEV_CMD_SNP_ACTIVATE = 0x91, + SEV_CMD_SNP_GUEST_STATUS = 0x92, + SEV_CMD_SNP_GCTX_CREATE = 0x93, + SEV_CMD_SNP_GUEST_REQUEST = 0x94, + SEV_CMD_SNP_ACTIVATE_EX = 0x95, + SEV_CMD_SNP_LAUNCH_START = 0xA0, + SEV_CMD_SNP_LAUNCH_UPDATE = 0xA1, + SEV_CMD_SNP_LAUNCH_FINISH = 0xA2, + SEV_CMD_SNP_DBG_DECRYPT = 0xB0, + SEV_CMD_SNP_DBG_ENCRYPT = 0xB1, + SEV_CMD_SNP_PAGE_SWAP_OUT = 0xC0, + SEV_CMD_SNP_PAGE_SWAP_IN = 0xC1, + SEV_CMD_SNP_PAGE_MOVE = 0xC2, + SEV_CMD_SNP_PAGE_MD_INIT = 0xC3, + SEV_CMD_SNP_PAGE_MD_RECLAIM = 0xC4, + SEV_CMD_SNP_PAGE_RO_RECLAIM = 0xC5, + SEV_CMD_SNP_PAGE_RO_RESTORE = 0xC6, + SEV_CMD_SNP_PAGE_RECLAIM = 0xC7, + SEV_CMD_SNP_PAGE_UNSMASH = 0xC8, + SEV_CMD_SNP_CONFIG = 0xC9, + SEV_CMD_MAX, }; @@ -510,6 +538,200 @@ struct sev_data_attestation_report { u32 len; /* In/Out */ } __packed; +/** + * struct sev_data_snp_platform_status_buf - SNP_PLATFORM_STATUS command params + * + * @address: physical address where the status should be copied + */ +struct sev_data_snp_platform_status_buf { + u64 status_paddr; /* In */ +} __packed; + +/** + * struct sev_data_snp_download_firmware - SNP_DOWNLOAD_FIRMWARE command params + * + * @address: physical address of firmware image + * @len: len of the firmware image + */ +struct sev_data_snp_download_firmware { + u64 address; /* In */ + u32 len; /* In */ +} __packed; + +/** + * struct sev_data_snp_gctx_create - SNP_GCTX_CREATE command params + * + * @gctx_paddr: system physical address of the page donated to firmware by + * the hypervisor to contain the guest context. + */ +struct sev_data_snp_gctx_create { + u64 gctx_paddr; /* In */ +} __packed; + +/** + * struct sev_data_snp_activate - SNP_ACTIVATE command params + * + * @gctx_paddr: system physical address guest context page + * @asid: ASID to bind to the guest + */ +struct sev_data_snp_activate { + u64 gctx_paddr; /* In */ + u32 asid; /* In */ +} __packed; + +/** + * struct sev_data_snp_decommission - SNP_DECOMMISSION command params + * + * @address: system physical address guest context page + */ +struct sev_data_snp_decommission { + u64 gctx_paddr; /* In */ +} __packed; + +/** + * struct sev_data_snp_launch_start - SNP_LAUNCH_START command params + * + * @gctx_addr: system physical address of guest context page + * @policy: guest policy + * @ma_gctx_addr: system physical address of migration agent + * @imi_en: launch flow is launching an IMI for the purpose of + * guest-assisted migration. + * @ma_en: the guest is associated with a migration agent + */ +struct sev_data_snp_launch_start { + u64 gctx_paddr; /* In */ + u64 policy; /* In */ + u64 ma_gctx_paddr; /* In */ + u32 ma_en:1; /* In */ + u32 imi_en:1; /* In */ + u32 rsvd:30; + u8 gosvw[16]; /* In */ +} __packed; + +/* SNP support page type */ +enum { + SNP_PAGE_TYPE_NORMAL = 0x1, + SNP_PAGE_TYPE_VMSA = 0x2, + SNP_PAGE_TYPE_ZERO = 0x3, + SNP_PAGE_TYPE_UNMEASURED = 0x4, + SNP_PAGE_TYPE_SECRET = 0x5, + SNP_PAGE_TYPE_CPUID = 0x6, + + SNP_PAGE_TYPE_MAX +}; + +/** + * struct sev_data_snp_launch_update - SNP_LAUNCH_UPDATE command params + * + * @gctx_addr: system physical address of guest context page + * @imi_page: indicates that this page is part of the IMI of the guest + * @page_type: encoded page type + * @page_size: page size 0 indicates 4K and 1 indicates 2MB page + * @address: system physical address of destination page to encrypt + * @vmpl3_perms: VMPL permission mask for VMPL3 + * @vmpl2_perms: VMPL permission mask for VMPL2 + * @vmpl1_perms: VMPL permission mask for VMPL1 + */ +struct sev_data_snp_launch_update { + u64 gctx_paddr; /* In */ + u32 page_size:1; /* In */ + u32 page_type:3; /* In */ + u32 imi_page:1; /* In */ + u32 rsvd:27; + u32 rsvd2; + u64 address; /* In */ + u32 rsvd3:8; + u32 vmpl3_perms:8; /* In */ + u32 vmpl2_perms:8; /* In */ + u32 vmpl1_perms:8; /* In */ + u32 rsvd4; +} __packed; + +/** + * struct sev_data_snp_launch_finish - SNP_LAUNCH_FINISH command params + * + * @gctx_addr: system pphysical address of guest context page + */ +struct sev_data_snp_launch_finish { + u64 gctx_paddr; + u64 id_block_paddr; + u64 id_auth_paddr; + u8 id_block_en:1; + u8 auth_key_en:1; + u64 rsvd:62; + u8 host_data[32]; +} __packed; + +/** + * struct sev_data_snp_guest_status - SNP_GUEST_STATUS command params + * + * @gctx_paddr: system physical address of guest context page + * @address: system physical address of guest status page + */ +struct sev_data_snp_guest_status { + u64 gctx_paddr; + u64 address; +} __packed; + +/** + * struct sev_data_snp_page_reclaim - SNP_PAGE_RECLAIM command params + * + * @paddr: system physical address of page to be claimed. The BIT0 indicate + * the page size. 0h indicates 4 kB and 1h indicates 2 MB page. + */ +struct sev_data_snp_page_reclaim { + u64 paddr; +} __packed; + +/** + * struct sev_data_snp_page_unsmash - SNP_PAGE_UNMASH command params + * + * @paddr: system physical address of page to be unmashed. The BIT0 indicate + * the page size. 0h indicates 4 kB and 1h indicates 2 MB page. + */ +struct sev_data_snp_page_unsmash { + u64 paddr; +} __packed; + +/** + * struct sev_data_dbg - DBG_ENCRYPT/DBG_DECRYPT command parameters + * + * @handle: handle of the VM to perform debug operation + * @src_addr: source address of data to operate on + * @dst_addr: destination address of data to operate on + * @len: len of data to operate on + */ +struct sev_data_snp_dbg { + u64 gctx_paddr; /* In */ + u64 src_addr; /* In */ + u64 dst_addr; /* In */ + u32 len; /* In */ +} __packed; + +/** + * struct sev_snp_guest_request - SNP_GUEST_REQUEST command params + * + * @gctx_paddr: system physical address of guest context page + * @req_paddr: system physical address of request page + * @res_paddr: system physical address of response page + */ +struct sev_data_snp_guest_request { + u64 gctx_paddr; /* In */ + u64 req_paddr; /* In */ + u64 res_paddr; /* In */ +} __packed; + +/** + * struuct sev_data_snp_init - SNP_INIT_EX structure + * + * @init_rmp: indicate that the RMP should be initialized. + */ +struct sev_data_snp_init_ex { + u32 init_rmp:1; + u32 rsvd:31; + u8 rsvd1[60]; +} __packed; + #ifdef CONFIG_CRYPTO_DEV_SP_PSP /** diff --git a/include/uapi/linux/psp-sev.h b/include/uapi/linux/psp-sev.h index 91b4c63d5cbf..b7207629eb90 100644 --- a/include/uapi/linux/psp-sev.h +++ b/include/uapi/linux/psp-sev.h @@ -28,6 +28,8 @@ enum { SEV_PEK_CERT_IMPORT, SEV_GET_ID, /* This command is deprecated, use SEV_GET_ID2 */ SEV_GET_ID2, + SNP_PLATFORM_STATUS = 255, + SNP_CONFIG, SEV_MAX, }; @@ -61,6 +63,13 @@ typedef enum { SEV_RET_INVALID_PARAM, SEV_RET_RESOURCE_LIMIT, SEV_RET_SECURE_DATA_INVALID, + SEV_RET_INVALID_PAGE_SIZE, + SEV_RET_INVALID_PAGE_STATE, + SEV_RET_INVALID_MDATA_ENTRY, + SEV_RET_INVALID_PAGE_OWNER, + SEV_RET_INVALID_PAGE_AEAD_OFLOW, + SEV_RET_RMP_INIT_REQUIRED, + SEV_RET_MAX, } sev_ret_code; @@ -147,6 +156,41 @@ struct sev_user_data_get_id2 { __u32 length; /* In/Out */ } __packed; +/** + * struct sev_data_snp_platform_status - Platform status + * + * @major: API major version + * @minor: API minor version + * @state: current platform state + * @build: firmware build id for the API version + * @guest_count: the number of guest currently managed by the firmware + * @tcb_version: current TCB version + */ +struct sev_user_snp_status { + __u8 api_major; /* Out */ + __u8 api_minor; /* Out */ + __u8 state; /* Out */ + __u8 rsvd; + __u32 build_id; /* Out */ + __u32 rsvd1; + __u32 guest_count; /* Out */ + __u64 tcb_version; /* Out */ + __u64 rsvd2; +} __packed; + +/** + * struct sev_data_snp_config - system wide configuration value for SNP. + * + * @reported_tcb: The TCB version to report in the guest attestation report. + * @mask_chip_id: Indicates that the CHID_ID field in the attestation report + * will always be zero. + */ +struct sev_data_snp_config { + __u64 reported_tcb; /* In */ + __u32 mask_chip_id; /* In */ + __u8 rsvd[52]; +} __packed; + /** * struct sev_issue_cmd - SEV ioctl parameters * From patchwork Wed Jun 2 14:10:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452655 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FFC8C4708F for ; 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Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 12/37] crypto: ccp: Add support to initialize the AMD-SP for SEV-SNP Date: Wed, 2 Jun 2021 09:10:32 -0500 Message-Id: <20210602141057.27107-13-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:42 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f65a89c6-c2a9-456d-077c-08d925d05957 X-MS-TrafficTypeDiagnostic: SN1PR12MB2368: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3rZUSmjsuzZufBudDfjbA20/8tKgwP9gs3i2330q4jSzlfUkX3IZK7WfMKNNLt+bCXZeRNtuOU+JZq9iiqW9yRHkPwEWW64c15hj8Jg7oagz97NgDNGZAwUJZMaoVY9GrOwxLtKxg/xh2mA5fqd7xgGOltFZ8XA6wYBawOn2+HUKv3RFivGyorf7fU9Oh97cRw0paXnUzIITpCIhK1w+cl/Ii0ErpUuFpSlmaohR/iG6obplMcwv26ee/9qA606vhBJ6V4mG0QKIH8BZDwEYeEYtX4XYVvH4YPNSSm9QexvLVeb/g8HkpJZQ3zzotBqHO7VtanDQaBYSffOyp5eRbK97/putz6CDRJgNfRTQox+CFkc4S2mZZ2wOiNOS4e7JR62rOnO3evfpJ2aiyeNCsqrANQGNtRzDDfB3qyCwSWb1PjGJW3I26grtL8Gg4c/VVle7l4SnSYIC5wwy92KD+7TndyL6CxF0SjNOkW07iXZqgISdGnViOJZ0EMF9VV0tPLpm39hZyHqIEgb/yV2rKqE43dHlFjTozLY3DGxkYkYFX2w6gis/YLcT+dOlQN4Z4DFuVGATIAL2h0HTLgfprhhlK1geKJC8Yv58hUfAo1cwIjPMQ4hCoEkrFqCupRt9zizzPel7T7F679TsiyH3fykfzTL9VGQe2vQXTFLxwWpMlPffKB641zKWS+B6TdC0 X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(136003)(396003)(376002)(366004)(346002)(39860400002)(5660300002)(86362001)(6486002)(52116002)(7696005)(44832011)(38350700002)(38100700002)(956004)(2616005)(1076003)(8676002)(7416002)(8936002)(478600001)(186003)(316002)(4326008)(16526019)(26005)(66556008)(66476007)(2906002)(36756003)(54906003)(83380400001)(6666004)(66946007)(134885004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: N0zHONSA6PE6B23xhflEql0rXZUFzO4GNi6lh8Ir9R88Qn8aOVmXBze7uEK6w6nm++mpKwklz9t0kI6dyXvsC9KHJQ+77rZKwIKrIH82WVhqXe6ZmW/uZPVpJou2I0Maszygt7jwNnIfLVHQnXU6PJLJL/0sRx5XNy3HCb42m27IHTzlh8YjbMhzhMEmz7BnGEVi2sY8svPV/7AOBh2GlZWBKnPGpoiqmI5pHaUPkdP8bKNe+qDzhjwbE/l3maT3Aftlamjv9i1smFcS5aw0FRZo2aH1cqU1Apu5KFIdzvVgaBvJLEvkne06cFhgTxm6ZNMzAgM3AkgTeRL0oLi0V33LVLIhAUOAJBwew5f2lWtSpn4vU9hlKKp0WTtC9KWUKBrxmupYcznvSErghcgDvjnJO6+9UXOo/dp6QUetoK0e5TvJz+vE6yOT6Pus4aV304kqB5cVCLT7H7o8cxodZqwqfFjmYHo2b6H3TPrnAdc/MzQDLk48GTtJPQZmawb2fK0fCdVPq0qwTz8wxltdvdQulT8mcA/vyN1hJVi3yMsQ0L1bgCG4RtiRFZpQqn7z89F//iL7CeJNPqLMx0Hczh0v18iAYTVDc12qHX/7vOWjoBEJcwmgUdY9AuUzIPC77SBqm36oqVjL6Z69YcrJHwmkM0JR54PK0q3GIG44LF8RYStVL14LX4hVUNGt2w4tjtzkWvr4v6Qqo8roFc/zHexiH6x+9uwjqRMZBhvHpwtp+b0FE+XJR6zClvl04LzVbMA2SJPdO8ppBQG1krPgYM9fCVyDf6KOJrDg5/TRN5wbGqui5C9L425+O4rwXXqNoWf3RAhSOWzjee9fCfDIZPVL9enAtSIghhHrIvKrij+89OPUX0t0oNO7tXAOMa6W4Ks0Aqh6iTUAq5qnWVIAnY5qYwuGHH4S/d2Kh9qlebfSuMR2Kd8eajBGvAuIkpsiWNtar4i07Jd9aiRfyxNI3XyDaGOgADhKrcCGUWzHRzEJb9OGr5nSQrj6TPiIjSfmXSdfG6DEi9B51mq3+Pc/DxLAO7/okd7WaLuYoe7WgegfmrJwaHSn70Qh/5D1KcEm7ljHlsgc7aCzMHBRpDa0oUYtwL3GNrzubCg6y9Ra2AoSeyvTaSzEk5FP2AYFnC/3keCl+o+0tYOyi3DfixZIl3a/dKIEkh9qkitRCOS8lms+7N9Lc3SjvOHSGV02/SDGKRWl+bUxrKyXDtirxQolPNuao8lkZ9xKAI2hOa+uDyIGWP2wIYmAn2+y5p9yM3K5ASKmbB2wR2DznSzUDtEXO8KOJazpmE6HS3QdjlRY2hv3A0a5bL6JLMikpz2EQQwQ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: f65a89c6-c2a9-456d-077c-08d925d05957 X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:43.3815 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: e9whaJ3936iNvAMi3R5uxGEQct6Z/ybFANuAl0ksS2ih62Ix/2xm+pxxtcTuFQCg05XiJjTeqIPMZTrQFENSsQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2368 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Before SNP VMs can be launched, the platform must be appropriately configured and initialized. Platform initialization is accomplished via the SNP_INIT command. Signed-off-by: Brijesh Singh --- drivers/crypto/ccp/sev-dev.c | 111 +++++++++++++++++++++++++++++++++-- drivers/crypto/ccp/sev-dev.h | 2 + include/linux/psp-sev.h | 16 +++++ 3 files changed, 124 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 0331d4cea7da..2203167dbc2e 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -591,6 +591,92 @@ static int sev_update_firmware(struct device *dev) return ret; } +static void snp_set_hsave_pa(void *arg) +{ + wrmsrl(MSR_VM_HSAVE_PA, 0); +} + +static int __sev_snp_init_locked(int *error) +{ + struct psp_device *psp = psp_master; + struct sev_device *sev; + int rc = 0; + + if (!psp || !psp->sev_data) + return -ENODEV; + + sev = psp->sev_data; + + if (sev->snp_inited) + return 0; + + /* SNP_INIT requires the MSR_VM_HSAVE_PA must be set to 0h across all cores. */ + on_each_cpu(snp_set_hsave_pa, NULL, 1); + + /* Prepare for first SEV guest launch after INIT */ + wbinvd_on_all_cpus(); + + /* Issue the SNP_INIT firmware command. */ + rc = __sev_do_cmd_locked(SEV_CMD_SNP_INIT, NULL, error); + if (rc) + return rc; + + sev->snp_inited = true; + dev_dbg(sev->dev, "SEV-SNP firmware initialized\n"); + + return rc; +} + +int sev_snp_init(int *error) +{ + int rc; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return -ENODEV; + + mutex_lock(&sev_cmd_mutex); + rc = __sev_snp_init_locked(error); + mutex_unlock(&sev_cmd_mutex); + + return rc; +} +EXPORT_SYMBOL_GPL(sev_snp_init); + +static int __sev_snp_shutdown_locked(int *error) +{ + struct sev_device *sev = psp_master->sev_data; + int ret; + + if (!sev->snp_inited) + return 0; + + /* SHUTDOWN requires the DF_FLUSH */ + wbinvd_on_all_cpus(); + __sev_do_cmd_locked(SEV_CMD_SNP_DF_FLUSH, NULL, NULL); + + ret = __sev_do_cmd_locked(SEV_CMD_SNP_SHUTDOWN, NULL, error); + if (ret) { + dev_err(sev->dev, "SEV-SNP firmware shutdown failed\n"); + return ret; + } + + sev->snp_inited = false; + dev_dbg(sev->dev, "SEV-SNP firmware shutdown\n"); + + return ret; +} + +static int sev_snp_shutdown(int *error) +{ + int rc; + + mutex_lock(&sev_cmd_mutex); + rc = __sev_snp_shutdown_locked(NULL); + mutex_unlock(&sev_cmd_mutex); + + return rc; +} + static int sev_ioctl_do_pek_import(struct sev_issue_cmd *argp, bool writable) { struct sev_device *sev = psp_master->sev_data; @@ -1095,6 +1181,21 @@ void sev_pci_init(void) "SEV: TMR allocation failed, SEV-ES support unavailable\n"); } + /* + * If boot CPU supports the SNP, then let first attempt to initialize + * the SNP firmware. + */ + if (cpu_feature_enabled(X86_FEATURE_SEV_SNP)) { + rc = sev_snp_init(&error); + if (rc) { + /* + * If we failed to INIT SNP then don't abort the probe. + * Continue to initialize the legacy SEV firmware. + */ + dev_err(sev->dev, "SEV-SNP: failed to INIT error %#x\n", error); + } + } + /* Initialize the platform */ rc = sev_platform_init(&error); if (rc && (error == SEV_RET_SECURE_DATA_INVALID)) { @@ -1109,13 +1210,11 @@ void sev_pci_init(void) rc = sev_platform_init(&error); } - if (rc) { + if (rc) dev_err(sev->dev, "SEV: failed to INIT error %#x\n", error); - return; - } - dev_info(sev->dev, "SEV API:%d.%d build:%d\n", sev->api_major, - sev->api_minor, sev->build); + dev_info(sev->dev, "SEV%s API:%d.%d build:%d\n", sev->snp_inited ? + "-SNP" : "", sev->api_major, sev->api_minor, sev->build); return; @@ -1138,4 +1237,6 @@ void sev_pci_exit(void) get_order(SEV_ES_TMR_SIZE)); sev_es_tmr = NULL; } + + sev_snp_shutdown(NULL); } diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h index 666c21eb81ab..186ad20cbd24 100644 --- a/drivers/crypto/ccp/sev-dev.h +++ b/drivers/crypto/ccp/sev-dev.h @@ -52,6 +52,8 @@ struct sev_device { u8 build; void *cmd_buf; + + bool snp_inited; }; int sev_dev_init(struct psp_device *psp); diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index c3755099ab55..1b53e8782250 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -748,6 +748,20 @@ struct sev_data_snp_init_ex { */ int sev_platform_init(int *error); +/** + * sev_snp_init - perform SEV SNP_INIT command + * + * @error: SEV command return code + * + * Returns: + * 0 if the SEV successfully processed the command + * -%ENODEV if the SEV device is not available + * -%ENOTSUPP if the SEV does not support SEV + * -%ETIMEDOUT if the SEV command timed out + * -%EIO if the SEV returned a non-zero return code + */ +int sev_snp_init(int *error); + /** * sev_platform_status - perform SEV PLATFORM_STATUS command * @@ -855,6 +869,8 @@ sev_platform_status(struct sev_user_data_status *status, int *error) { return -E static inline int sev_platform_init(int *error) { return -ENODEV; } +static inline int sev_snp_init(int *error) { return -ENODEV; } + static inline int sev_guest_deactivate(struct sev_data_deactivate *data, int *error) { return -ENODEV; } From patchwork Wed Jun 2 14:10:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C37C0C47096 for ; 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dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SA0PR12MB4495.namprd12.prod.outlook.com (2603:10b6:806:70::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:45 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:45 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 13/37] crypto: ccp: Shutdown SNP firmware on kexec Date: Wed, 2 Jun 2021 09:10:33 -0500 Message-Id: <20210602141057.27107-14-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:43 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f35e2d1b-f209-41d8-a08b-08d925d059fe X-MS-TrafficTypeDiagnostic: SA0PR12MB4495: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: H8NFa4KWEyWqKdCBxPsG/ScuhA0vo5Ur628Ztj9I+dBZGoU0avUG/u3kO8hDlfVyRE5IyH2eVmsKVj6ZFl/3o6PbB58pYIfl4qSZjlOtd9hcPHRyulztbfdL/i4ISaWg+ZynqTm21nFOSKv6/FTUfm0VIyZDCEotKXGVWIm3PASNVL09oQ21Bn/MuFtZjgBmAXkBjqkpIy8cBdF0tv1ejl6rccmJAZxyCPrltLA9qWgLEQxa6o/rOSOO0oV0xVwNDUlcfEAGj/RTUKhKxlY6InOeR0sBYBQfqVAj+C2FEwHV8PlGDqSpSBMiLYWMTfiRbxjWrQWuHxy9b29PwJ0A5GMFN520EWhMj1UMe1l49hfQNrLTzEboym3UMwEbDWdO/JrAiBylWLuD9UQQ41NvLqR1xhYyJCvz8qG+wDe7zcCWaEi+4SacoW9fF6YwTOiKM9RMjf7CDUtYstw2WKC4QS3ohRHAzRcdOp9mxa1BN/jhodsANHhBXpDQyiNHoqdYOEetAEBF0kXDnV8lNELYUE7to+xOXluDg+WTmYYe+VBFPZnAgGkjPqYNRm0aot3HkYFQ8FutVGMmN1eUUKRs+GwkELbbIFN0VyW/U5uX3bvK6w7EOIXyDQdjHZrr01R0VZPnb5n13j1TVbeVmlVl9g== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(136003)(376002)(396003)(346002)(366004)(39860400002)(1076003)(54906003)(44832011)(8676002)(2616005)(956004)(478600001)(6486002)(316002)(86362001)(4326008)(7416002)(6666004)(38100700002)(7696005)(38350700002)(52116002)(16526019)(26005)(186003)(2906002)(5660300002)(66946007)(8936002)(83380400001)(36756003)(66556008)(66476007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 6dNlb4UavJy88d2ZFHiT3FrNwBVEHXwSQF34vEkeK/9oWtwHfsVzEuERVJ9NylKGVZF6b4B3pEknP4C/rEIXYJvUsK8SK77Qi9u7gZYErV0s9mrd9E4aTyBqVT5UkbUwutGbfUgEoelLSpwE1a5Ub1QlLuRrB+JN4eZI/eIbRz3BMd24TKdeTuIYfgl67vZlyK/mwXHVpQ8laUb7tFAG2sfPu+A1JH1GkNAvu14RmmNpYxDOV4zy7CMy0shFvE+ixdRhAzh81PoOS96WqQbNirRmPwbT8Gh4bygb1pxNO13HKN4ad13sCgUf5i1FuHI8SS6lsTbl7coN6jsrexsbFi3Ize6ONxU1ovDu0dsTC+m9idbaYkw/nYjUsd/b29saEe1H9cV8bOTl3vFsY+ec1hWgwrpmCkzndeQEnx2hVv0C3TgKgcnWZIeOzMcXOFm1BMAPRUcR8SmvlQT/De/oSsJXE6XTXJE6cqKRgCFbBbLODl/buohtXWbVcERQ3e4ZzcT+xz02mg0kyh0R7GPB5qhLCiND3sPGHY/+ZjkvCx4pUw386k9dQninzrAdi0Mu9Cj4JECSIPoF+U9BsTV00eGIQnsg2yMHzHraYYjpvPqVYtMsHjeVdiuN145gUI+lLVsudko5j2A3ogZMvr2wbLfxPiLGeI67Gth9Y/yOZ5YynTmDuMdurHiI1M9pCdGeVQY3FdFLmNYMCdMh+MLFUdNN3weVi7/afrL3WDGDg0btI3IM+jXxRs58jwpieDlXEckBUFmFq1ux2XOOPVtaNbUDqRSNCvDXhY6jyheUvNXm85j0/qhGxT+z0LbwwfEMOsn8dflRPItFgrjU5/9tjnCc9EJqsR8rHMsl7jWX7X8UGVAiwHTx/DJG0EKs1bWQFr7N/TJArYSOs4zqd6Jf1XsO5NFfHJ6AMtrKsPilBwJA9aM5myKiO52E8aX8DNl3A2LByEyaafEgD2RlhQvIqSRS7rEqli0yYVhyOH0GVThNucAKqyGZcBVvW4tGk0/lgn+gRdY4Thj8m+fqv365GKGEIjpsaW9mPXvoRH34MVgF9taQY4XJTMaEZoyybY7kyJllViNvLn1ulMLT+jaHzoEhszXUntf0UjjE/cIQqQaCwLyNXeNA+9E0+EoaenUxgMMcCJtFI8RqOuV9q8a+Mx0kUHBYAZMvtaN2nhmBYNS/R8ac/5IjHeDk4lVIj3qrF47iGBDRw3vhRXqDAvwQRPYEg25mS/eWry0RzTUEZSXeFNVRa89YtXldtzkTOLxQk3o77gydl634o3KYhQaq9u8zBfgKo+KgtM57eQlOGI6FzKdcUMkqZtoX25rXi69n X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: f35e2d1b-f209-41d8-a08b-08d925d059fe X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:44.4799 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: I/NlmFy8BklacN89fQZrdQhTBPvkx9g67AzV2T3zqD7FnKuoqH1Fm5M4Jzluo0SExPM89Lo3CYN7jhfg3EPT5Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4495 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org When the kernel is getting ready to kexec, it calls the device_shutdown() to allow drivers to cleanup before the kexec. If SEV firmware is initialized then shut it down before kexec'ing the new kernel. Signed-off-by: Brijesh Singh --- drivers/crypto/ccp/sev-dev.c | 53 +++++++++++++++++------------------- drivers/crypto/ccp/sp-pci.c | 12 ++++++++ 2 files changed, 37 insertions(+), 28 deletions(-) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 2203167dbc2e..b225face37b1 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -310,6 +310,9 @@ static int __sev_platform_shutdown_locked(int *error) struct sev_device *sev = psp_master->sev_data; int ret; + if (sev->state == SEV_STATE_UNINIT) + return 0; + ret = __sev_do_cmd_locked(SEV_CMD_SHUTDOWN, NULL, error); if (ret) return ret; @@ -1115,6 +1118,22 @@ int sev_dev_init(struct psp_device *psp) return ret; } +static void sev_firmware_shutdown(struct sev_device *sev) +{ + sev_platform_shutdown(NULL); + + if (sev_es_tmr) { + /* The TMR area was encrypted, flush it from the cache */ + wbinvd_on_all_cpus(); + + free_pages((unsigned long)sev_es_tmr, + get_order(SEV_ES_TMR_SIZE)); + sev_es_tmr = NULL; + } + + sev_snp_shutdown(NULL); +} + void sev_dev_destroy(struct psp_device *psp) { struct sev_device *sev = psp->sev_data; @@ -1122,6 +1141,8 @@ void sev_dev_destroy(struct psp_device *psp) if (!sev) return; + sev_firmware_shutdown(sev); + if (sev->misc) kref_put(&misc_dev->refcount, sev_exit); @@ -1152,21 +1173,6 @@ void sev_pci_init(void) if (sev_get_api_version()) goto err; - /* - * If platform is not in UNINIT state then firmware upgrade and/or - * platform INIT command will fail. These command require UNINIT state. - * - * In a normal boot we should never run into case where the firmware - * is not in UNINIT state on boot. But in case of kexec boot, a reboot - * may not go through a typical shutdown sequence and may leave the - * firmware in INIT or WORKING state. - */ - - if (sev->state != SEV_STATE_UNINIT) { - sev_platform_shutdown(NULL); - sev->state = SEV_STATE_UNINIT; - } - if (sev_version_greater_or_equal(0, 15) && sev_update_firmware(sev->dev) == 0) sev_get_api_version(); @@ -1224,19 +1230,10 @@ void sev_pci_init(void) void sev_pci_exit(void) { - if (!psp_master->sev_data) - return; - - sev_platform_shutdown(NULL); - - if (sev_es_tmr) { - /* The TMR area was encrypted, flush it from the cache */ - wbinvd_on_all_cpus(); + struct sev_device *sev = psp_master->sev_data; - free_pages((unsigned long)sev_es_tmr, - get_order(SEV_ES_TMR_SIZE)); - sev_es_tmr = NULL; - } + if (!sev) + return; - sev_snp_shutdown(NULL); + sev_firmware_shutdown(sev); } diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index f468594ef8af..fb1b499bf04d 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -239,6 +239,17 @@ static int sp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return ret; } +static void sp_pci_shutdown(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + struct sp_device *sp = dev_get_drvdata(dev); + + if (!sp) + return; + + sp_destroy(sp); +} + static void sp_pci_remove(struct pci_dev *pdev) { struct device *dev = &pdev->dev; @@ -369,6 +380,7 @@ static struct pci_driver sp_pci_driver = { .id_table = sp_pci_table, .probe = sp_pci_probe, .remove = sp_pci_remove, + .shutdown = sp_pci_shutdown, .driver.pm = &sp_pci_pm_ops, }; From patchwork Wed Jun 2 14:10:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57A19C47083 for ; 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The commands for SEV-SNP is defined in the SEV-SNP firmware specification. Signed-off-by: Brijesh Singh --- drivers/crypto/ccp/sev-dev.c | 24 ++++++++++++ include/linux/psp-sev.h | 74 ++++++++++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index b225face37b1..def2996111db 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -1014,6 +1014,30 @@ int sev_guest_df_flush(int *error) } EXPORT_SYMBOL_GPL(sev_guest_df_flush); +int snp_guest_decommission(struct sev_data_snp_decommission *data, int *error) +{ + return sev_do_cmd(SEV_CMD_SNP_DECOMMISSION, data, error); +} +EXPORT_SYMBOL_GPL(snp_guest_decommission); + +int snp_guest_df_flush(int *error) +{ + return sev_do_cmd(SEV_CMD_SNP_DF_FLUSH, NULL, error); +} +EXPORT_SYMBOL_GPL(snp_guest_df_flush); + +int snp_guest_page_reclaim(struct sev_data_snp_page_reclaim *data, int *error) +{ + return sev_do_cmd(SEV_CMD_SNP_PAGE_RECLAIM, data, error); +} +EXPORT_SYMBOL_GPL(snp_guest_page_reclaim); + +int snp_guest_dbg_decrypt(struct sev_data_snp_dbg *data, int *error) +{ + return sev_do_cmd(SEV_CMD_SNP_DBG_DECRYPT, data, error); +} +EXPORT_SYMBOL_GPL(snp_guest_dbg_decrypt); + static void sev_exit(struct kref *ref) { misc_deregister(&misc_dev->misc); diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index 1b53e8782250..63ef766cbd7a 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -860,6 +860,65 @@ int sev_guest_df_flush(int *error); */ int sev_guest_decommission(struct sev_data_decommission *data, int *error); +/** + * snp_guest_df_flush - perform SNP DF_FLUSH command + * + * @sev_ret: sev command return code + * + * Returns: + * 0 if the sev successfully processed the command + * -%ENODEV if the sev device is not available + * -%ENOTSUPP if the sev does not support SEV + * -%ETIMEDOUT if the sev command timed out + * -%EIO if the sev returned a non-zero return code + */ +int snp_guest_df_flush(int *error); + +/** + * snp_guest_decommission - perform SNP_DECOMMISSION command + * + * @decommission: sev_data_decommission structure to be processed + * @sev_ret: sev command return code + * + * Returns: + * 0 if the sev successfully processed the command + * -%ENODEV if the sev device is not available + * -%ENOTSUPP if the sev does not support SEV + * -%ETIMEDOUT if the sev command timed out + * -%EIO if the sev returned a non-zero return code + */ +int snp_guest_decommission(struct sev_data_snp_decommission *data, int *error); + +/** + * snp_guest_page_reclaim - perform SNP_PAGE_RECLAIM command + * + * @decommission: sev_snp_page_reclaim structure to be processed + * @sev_ret: sev command return code + * + * Returns: + * 0 if the sev successfully processed the command + * -%ENODEV if the sev device is not available + * -%ENOTSUPP if the sev does not support SEV + * -%ETIMEDOUT if the sev command timed out + * -%EIO if the sev returned a non-zero return code + */ +int snp_guest_page_reclaim(struct sev_data_snp_page_reclaim *data, int *error); + +/** + * snp_guest_dbg_decrypt - perform SEV SNP_DBG_DECRYPT command + * + * @sev_ret: sev command return code + * + * Returns: + * 0 if the sev successfully processed the command + * -%ENODEV if the sev device is not available + * -%ENOTSUPP if the sev does not support SEV + * -%ETIMEDOUT if the sev command timed out + * -%EIO if the sev returned a non-zero return code + */ +int snp_guest_dbg_decrypt(struct sev_data_snp_dbg *data, int *error); + + void *psp_copy_user_blob(u64 uaddr, u32 len); #else /* !CONFIG_CRYPTO_DEV_SP_PSP */ @@ -887,6 +946,21 @@ sev_issue_cmd_external_user(struct file *filep, unsigned int id, void *data, int static inline void *psp_copy_user_blob(u64 __user uaddr, u32 len) { return ERR_PTR(-EINVAL); } +static inline int +snp_guest_decommission(struct sev_data_snp_decommission *data, int *error) { return -ENODEV; } + +static inline int snp_guest_df_flush(int *error) { return -ENODEV; } + +static inline int snp_guest_page_reclaim(struct sev_data_snp_page_reclaim *data, int *error) +{ + return -ENODEV; +} + +static inline int snp_guest_dbg_decrypt(struct sev_data_snp_dbg *data, int *error) +{ + return -ENODEV; +} + #endif /* CONFIG_CRYPTO_DEV_SP_PSP */ #endif /* __PSP_SEV_H__ */ From patchwork Wed Jun 2 14:10:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F8A7C4708F for ; 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dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:48 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:48 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 16/37] crypto: ccp: Handle the legacy SEV command when SNP is enabled Date: Wed, 2 Jun 2021 09:10:36 -0500 Message-Id: <20210602141057.27107-17-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:47 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e5c2487b-3e8a-4e6c-dedf-08d925d05c4d X-MS-TrafficTypeDiagnostic: SN1PR12MB2368: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1468; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: hjiH7v6f9ql0TVy3l/BWVdOm8+6uwmAUwZIOea1BS+toqHagxEAezciLSGthiJCPRENhqls/UIvjaZfr0UPXeN6/gldAxR6/56bIgwV7dvsbsT+P84uAdvLe6sCUJC5Wr6lxGIOqun3tfHm+CKsx/mgC0f+mcXuXNxwZF4CG+xehc/JfzjkFl3a+GlTuxdOsOKCGueGgdWpUU+2w5W5tiLSJbtU+VmZHhzurC6kSTeItfO82M50BCSoLRfcHHxuM9xFJL2WODSAd//c3ZEHKvTCsvl6PASmBS30VucIg8ryFQNbcA2y+LD1ASUFV5j3zrg5bVnM1Tvjtrl/16lusF4HNNpnW/b/Qyl2++M8VWmla1iWlz6HOUxLYNoOVLl1BcZ0KVN6CmCdqdVLAyyQJWiZT+KbkmRhMi6wG7imMhi9ZGxopfV+i2Nwt+O/e8Hoz2MJ3lELEVU1CMFrEZzQVniWzaI9NtBWuygPXK1oDCcwGY+MkEX4SoGHKpwLq/xSTlmoXaMN2LEi+DIK4ug/Q0Ku2+hEBHzk5TZZPYoh8dnd+Vhx6lEALIsIx8qZ80UGEVZYKdHlaLi8BBWpH03nOdOaPC9AlAPERZ1/W8LQGCStx03oVFVPuHHfopvOUUxjKRJa89o6FQB8HgHalW2Ioog== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(136003)(396003)(376002)(366004)(346002)(39860400002)(5660300002)(86362001)(6486002)(52116002)(7696005)(44832011)(38350700002)(38100700002)(956004)(2616005)(1076003)(8676002)(7416002)(8936002)(478600001)(186003)(316002)(4326008)(16526019)(26005)(66556008)(66476007)(2906002)(36756003)(30864003)(54906003)(83380400001)(6666004)(66946007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: TJcHCSA3gV+d9wG5XeeQKYtx2bjDw6/9dt8c+IfzH5ALYAqBTyjG5sSXpOg6o91B6fYIDJbRhhCPurJABSQSkq1Gl83vkEsQS7djRcwldXg/a7+VNRc9Pix/ucNmrfxQGXocOQpEiomZw347Vyo2D3krKKlOB/2VMd8XxA/zEQ60VWAfQOFdxqa5ifDh2DTqXdq8qI+yDehChsI6iDLFpbZ+Kh3DMacMNPB15MA0zh16cd/fxBBSAq6Bg/9FmforIzOZvc1Ls/84fFmKhPd/G86vGkxHUmztdnWmp0Cun1z1dmvuM4kWqy43aQC+WmYqX21T8plGwFZjqgQ95ZDRICRmq9mesCyWDT1v9d9+JbkfCD1o75Sd8QS0wAqybx1dCDG4WRUmu9G0+Qqk94ObdDSIy+iJ+ggKAMk0BH6pYtaTEh7wt7wVhrpviOhgAs7XHzJuIuKEjCOdhezcijthQH55QHjkItjwiURpv4VidD1H3uYPo3JODgEUsYm+qPHezeHPmQqhb7z+DqUlsMRg+f2Zl3sDLC4YAaL/UDO9OUzZTYQJ3DdfXPdtvx2mkrZL+qMx2cOFbTDVezXMsRJtvQAZLhAWbgFTZhCBb9JbwV7nAttGMwkpwBxX+5GcaqZHeXg4ZHBLnvPMMVI/5Dlc1U+ftKWTc/q9gR6EPmUCwTixAOK0bH4MIvoPFR09rBV27Y0s3Js6lZ2vwqKCDJunLpVfcWUSOLy2uHTHwxn/R5d4E/yGSBWGXe6COdCSGQO8+TIUs6NhbvnH9HSGltxwWEfLXm34bgfUS/v3UNNzaMm/p6rZlazgbyiSWEmVRqTuvEnakg+atWrdnzoyhi3ctTBG4MOW6xUjwVBAEzVYbMiSzWoqBs6z0CbSWrUXKUtfcBgSx3yTAzZGGMywpXGJ9cdXp/rvfeqy+FQS85OhuMTlGXcsUdC8wC5p1Onn0i8joMne975BlAlfvm14q02sORPvrG/N0IoyKAs0ZANCLLBVMDhIUpJgMZsKzfaNuHVFQvAyUVGPUCESTw9W5ao6dZp/bApAE8fDd12Mv8hrpFqp92YNU7AfTDC0Km68embKhy4swCvYpmh/JUHBP8/vBl2AFFP7NP44GchOg4Il94WLPClFD4fHROLMKTQ2mZUGlQYu3bQPcmOKnUiBphJjp/DVD6PnvJULrBnfnyB23RevebERMwmwEFDDWM5VMm94sD9bvlK2XeeuDN0YDQTDTK5fvVcokmuneym54NKy2rycm6Xc3pcAPd7EPoIKLa+bUoNROspsHW/86mBtJbzaV8st34YnU6Iv1kSw0Yw7Rir5tKUAZ937c2m4DBuaPhRl X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: e5c2487b-3e8a-4e6c-dedf-08d925d05c4d X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:48.3547 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /ZgAVMh1VDDh4v5PNy1J19e8rHj3U/LqNBUk421DmDI9WY0IURVhQBiiq3c9B1ZCEmgIw9pH4KvT44FCCEyz5g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2368 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The behavior of the SEV-legacy commands is altered when the SNP firmware is in the INIT state. When SNP is in INIT state, all the SEV-legacy commands that cause the firmware to write to memory must be in the firmware state before issuing the command.. A command buffer may contains a system physical address that the firmware may write to. There are two cases that need to be handled: 1) system physical address points to a guest memory 2) system physical address points to a host memory To handle the case #1, map_firmware_writeable() helper simply changes the page state in the RMP table before and after the command is sent to the firmware. For the case #2, the map_firmware_writeable() replaces the host system physical memory with a pre-allocated firmware page, and after the command completes, the unmap_firmware_writeable() copies the content from pre-allocated firmware page to original host system physical. The unmap_firmware_writeable() calls a __sev_do_cmd_locked() to clear the immutable bit from the memory page. To support the nested calling, a separate command buffer is required. Allocate a backup command buffer and keep reference count of it. If a nested call is detected then use the backup cmd_buf to complete the command submission. Signed-off-by: Brijesh Singh --- drivers/crypto/ccp/sev-dev.c | 348 ++++++++++++++++++++++++++++++++++- drivers/crypto/ccp/sev-dev.h | 12 ++ 2 files changed, 350 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index cbf77cbf1887..c886d76ae31d 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -265,12 +265,299 @@ void snp_free_firmware_page(void *addr) } EXPORT_SYMBOL(snp_free_firmware_page); +static int alloc_snp_host_map(struct sev_device *sev) +{ + struct page *page; + int i; + + for (i = 0; i < MAX_SNP_HOST_MAP_BUFS; i++) { + struct snp_host_map *map = &sev->snp_host_map[i]; + + memset(map, 0, sizeof(*map)); + + page = __snp_alloc_firmware_pages(GFP_KERNEL_ACCOUNT, + get_order(SEV_FW_BLOB_MAX_SIZE)); + if (!page) + return -ENOMEM; + + map->host = page_address(page); + } + + return 0; +} + +static void free_snp_host_map(struct sev_device *sev) +{ + int i; + + for (i = 0; i < MAX_SNP_HOST_MAP_BUFS; i++) { + struct snp_host_map *map = &sev->snp_host_map[i]; + + if (map->host) { + __snp_free_firmware_pages(virt_to_page(map->host), + get_order(SEV_FW_BLOB_MAX_SIZE)); + memset(map, 0, sizeof(*map)); + } + } +} + +static int map_firmware_writeable(u64 *paddr, u32 len, bool guest, struct snp_host_map *map) +{ + unsigned int npages = PAGE_ALIGN(len) >> PAGE_SHIFT; + int ret; + + map->active = false; + + if (!paddr || !len) + return 0; + + map->paddr = *paddr; + map->len = len; + + /* If paddr points to a guest memory then change the page state to firmwware. */ + if (guest) { + struct rmpupdate val = {}; + + val.immutable = true; + val.assigned = true; + ret = snp_set_rmptable_state(*paddr, npages, &val, true, false); + if (ret) + return ret; + + goto done; + } + + if (unlikely(!map->host)) + return -EINVAL; + + /* Check if the pre-allocated buffer can be used to fullfil the request. */ + if (unlikely(len > SEV_FW_BLOB_MAX_SIZE)) + return -EINVAL; + + /* Set the paddr to use an intermediate firmware buffer */ + *paddr = __psp_pa(map->host); + +done: + map->active = true; + return 0; +} + +static int unmap_firmware_writeable(u64 *paddr, u32 len, bool guest, struct snp_host_map *map) +{ + unsigned int npages = PAGE_ALIGN(len) >> PAGE_SHIFT; + int ret; + + if (!map->active) + return 0; + + /* If paddr points to a guest memory then restore the page state to hypervisor. */ + if (guest) { + struct rmpupdate val = {}; + + ret = snp_set_rmptable_state(*paddr, npages, &val, true, true); + if (ret) + return ret; + + goto done; + } + + /* Copy the response data firmware buffer to the callers buffer. */ + memcpy(__va(__sme_clr(map->paddr)), map->host, min_t(size_t, len, map->len)); + *paddr = map->paddr; + +done: + map->active = false; + return 0; +} + +static bool sev_legacy_cmd_buf_writable(int cmd) +{ + switch (cmd) { + case SEV_CMD_PLATFORM_STATUS: + case SEV_CMD_GUEST_STATUS: + case SEV_CMD_LAUNCH_START: + case SEV_CMD_RECEIVE_START: + case SEV_CMD_LAUNCH_MEASURE: + case SEV_CMD_SEND_START: + case SEV_CMD_SEND_UPDATE_DATA: + case SEV_CMD_SEND_UPDATE_VMSA: + case SEV_CMD_PEK_CSR: + case SEV_CMD_PDH_CERT_EXPORT: + case SEV_CMD_GET_ID: + case SEV_CMD_ATTESTATION_REPORT: + return true; + default: + return false; + } +} + +#define prep_buffer(name, addr, len, guest, map) \ + func(&((typeof(name *))cmd_buf)->addr, ((typeof(name *))cmd_buf)->len, guest, map) + +static int __snp_cmd_buf_copy(int cmd, void *cmd_buf, bool to_fw, int fw_err) +{ + int (*func)(u64 *paddr, u32 len, bool guest, struct snp_host_map *map); + struct sev_device *sev = psp_master->sev_data; + struct rmpupdate val = {}; + bool from_fw = !to_fw; + int ret; + + /* + * After the command is completed, change the command buffer memory to + * hypervisor state. + * + * The immutable bit is automatically cleared by the firmware, so + * no not need to reclaim the page. + */ + if (from_fw && sev_legacy_cmd_buf_writable(cmd)) { + ret = snp_set_rmptable_state(__pa(cmd_buf), 1, &val, true, false); + if (ret) + return ret; + + /* No need to go further if firmware failed to execute command. */ + if (fw_err) + return 0; + } + + if (to_fw) + func = map_firmware_writeable; + else + func = unmap_firmware_writeable; + + /* + * A command buffer may contains a system physical address. If the address + * points to a host memory then use an intermediate firmware page otherwise + * change the page state in the RMP table. + */ + switch (cmd) { + case SEV_CMD_PDH_CERT_EXPORT: + if (prep_buffer(struct sev_data_pdh_cert_export, pdh_cert_address, + pdh_cert_len, false, &sev->snp_host_map[0])) + goto err; + if (prep_buffer(struct sev_data_pdh_cert_export, cert_chain_address, + cert_chain_len, false, &sev->snp_host_map[1])) + goto err; + break; + case SEV_CMD_GET_ID: + if (prep_buffer(struct sev_data_get_id, address, len, + false, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_PEK_CSR: + if (prep_buffer(struct sev_data_pek_csr, address, len, + false, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_LAUNCH_UPDATE_DATA: + if (prep_buffer(struct sev_data_launch_update_data, address, len, + true, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_LAUNCH_UPDATE_VMSA: + if (prep_buffer(struct sev_data_launch_update_vmsa, address, len, + true, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_LAUNCH_MEASURE: + if (prep_buffer(struct sev_data_launch_measure, address, len, + false, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_LAUNCH_UPDATE_SECRET: + if (prep_buffer(struct sev_data_launch_secret, guest_address, guest_len, + true, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_DBG_DECRYPT: + if (prep_buffer(struct sev_data_dbg, dst_addr, len, false, + &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_DBG_ENCRYPT: + if (prep_buffer(struct sev_data_dbg, dst_addr, len, true, + &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_ATTESTATION_REPORT: + if (prep_buffer(struct sev_data_attestation_report, address, len, + false, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_SEND_START: + if (prep_buffer(struct sev_data_send_start, session_address, + session_len, false, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_SEND_UPDATE_DATA: + if (prep_buffer(struct sev_data_send_update_data, hdr_address, hdr_len, + false, &sev->snp_host_map[0])) + goto err; + if (prep_buffer(struct sev_data_send_update_data, trans_address, + trans_len, false, &sev->snp_host_map[1])) + goto err; + break; + case SEV_CMD_SEND_UPDATE_VMSA: + if (prep_buffer(struct sev_data_send_update_vmsa, hdr_address, hdr_len, + false, &sev->snp_host_map[0])) + goto err; + if (prep_buffer(struct sev_data_send_update_vmsa, trans_address, + trans_len, false, &sev->snp_host_map[1])) + goto err; + break; + case SEV_CMD_RECEIVE_UPDATE_DATA: + if (prep_buffer(struct sev_data_receive_update_data, guest_address, + guest_len, true, &sev->snp_host_map[0])) + goto err; + break; + case SEV_CMD_RECEIVE_UPDATE_VMSA: + if (prep_buffer(struct sev_data_receive_update_vmsa, guest_address, + guest_len, true, &sev->snp_host_map[0])) + goto err; + break; + default: + break; + } + + /* The command buffer need to be in the firmware state. */ + if (to_fw && sev_legacy_cmd_buf_writable(cmd)) { + val.assigned = true; + val.immutable = true; + ret = snp_set_rmptable_state(__pa(cmd_buf), 1, &val, true, false); + if (ret) + return ret; + } + + return 0; + +err: + return -EINVAL; +} + +static inline bool need_firmware_copy(int cmd) +{ + struct sev_device *sev = psp_master->sev_data; + + /* After SNP is INIT'ed, the behavior of legacy SEV command is changed. */ + return ((cmd < SEV_CMD_SNP_INIT) && sev->snp_inited) ? true : false; +} + +static int snp_aware_copy_to_firmware(int cmd, void *data) +{ + return __snp_cmd_buf_copy(cmd, data, true, 0); +} + +static int snp_aware_copy_from_firmware(int cmd, void *data, int fw_err) +{ + return __snp_cmd_buf_copy(cmd, data, false, fw_err); +} + static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret) { struct psp_device *psp = psp_master; struct sev_device *sev; unsigned int phys_lsb, phys_msb; unsigned int reg, ret = 0; + void *cmd_buf; int buf_len; if (!psp || !psp->sev_data) @@ -290,12 +577,26 @@ static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret) * work for some memory, e.g. vmalloc'd addresses, and @data may not be * physically contiguous. */ - if (data) - memcpy(sev->cmd_buf, data, buf_len); + if (data) { + if (unlikely(sev->cmd_buf_active > 2)) + return -EBUSY; + + cmd_buf = sev->cmd_buf_active ? sev->cmd_buf_backup : sev->cmd_buf; + + memcpy(cmd_buf, data, buf_len); + sev->cmd_buf_active++; + + /* + * The behavior of the SEV-legacy commands is altered when the + * SNP firmware is in the INIT state. + */ + if (need_firmware_copy(cmd) && snp_aware_copy_to_firmware(cmd, sev->cmd_buf)) + return -EFAULT; + } /* Get the physical address of the command buffer */ - phys_lsb = data ? lower_32_bits(__psp_pa(sev->cmd_buf)) : 0; - phys_msb = data ? upper_32_bits(__psp_pa(sev->cmd_buf)) : 0; + phys_lsb = data ? lower_32_bits(__psp_pa(cmd_buf)) : 0; + phys_msb = data ? upper_32_bits(__psp_pa(cmd_buf)) : 0; dev_dbg(sev->dev, "sev command id %#x buffer 0x%08x%08x timeout %us\n", cmd, phys_msb, phys_lsb, psp_timeout); @@ -336,15 +637,24 @@ static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret) ret = -EIO; } - print_hex_dump_debug("(out): ", DUMP_PREFIX_OFFSET, 16, 2, data, - buf_len, false); - /* * Copy potential output from the PSP back to data. Do this even on * failure in case the caller wants to glean something from the error. */ - if (data) - memcpy(data, sev->cmd_buf, buf_len); + if (data) { + /* + * Restore the page state after the command completes. + */ + if (need_firmware_copy(cmd) && + snp_aware_copy_from_firmware(cmd, cmd_buf, ret)) + return -EFAULT; + + memcpy(data, cmd_buf, buf_len); + sev->cmd_buf_active--; + } + + print_hex_dump_debug("(out): ", DUMP_PREFIX_OFFSET, 16, 2, data, + buf_len, false); return ret; } @@ -1216,10 +1526,12 @@ int sev_dev_init(struct psp_device *psp) if (!sev) goto e_err; - sev->cmd_buf = (void *)devm_get_free_pages(dev, GFP_KERNEL, 0); + sev->cmd_buf = (void *)devm_get_free_pages(dev, GFP_KERNEL, 1); if (!sev->cmd_buf) goto e_sev; + sev->cmd_buf_backup = (uint8_t *)sev->cmd_buf + PAGE_SIZE; + psp->sev_data = sev; sev->dev = dev; @@ -1271,6 +1583,12 @@ static void sev_firmware_shutdown(struct sev_device *sev) sev_es_tmr = NULL; } + /* + * The host map need to clear the immutable bit so it must be free'd before the + * SNP firmware shutdown. + */ + free_snp_host_map(sev); + sev_snp_shutdown(NULL); } @@ -1330,6 +1648,14 @@ void sev_pci_init(void) */ dev_err(sev->dev, "SEV-SNP: failed to INIT error %#x\n", error); } + + /* + * Allocate the intermediate buffers used for the legacy command handling. + */ + if (alloc_snp_host_map(sev)) { + dev_notice(sev->dev, "Failed to alloc host map (disabling legacy SEV)\n"); + goto skip_legacy; + } } /* Obtain the TMR memory area for SEV-ES use */ @@ -1359,12 +1685,14 @@ void sev_pci_init(void) if (rc) dev_err(sev->dev, "SEV: failed to INIT error %#x\n", error); +skip_legacy: dev_info(sev->dev, "SEV%s API:%d.%d build:%d\n", sev->snp_inited ? "-SNP" : "", sev->api_major, sev->api_minor, sev->build); return; err: + free_snp_host_map(sev); psp_master->sev_data = NULL; } diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h index 186ad20cbd24..fe5d7a3ebace 100644 --- a/drivers/crypto/ccp/sev-dev.h +++ b/drivers/crypto/ccp/sev-dev.h @@ -29,11 +29,20 @@ #define SEV_CMDRESP_CMD_SHIFT 16 #define SEV_CMDRESP_IOC BIT(0) +#define MAX_SNP_HOST_MAP_BUFS 2 + struct sev_misc_dev { struct kref refcount; struct miscdevice misc; }; +struct snp_host_map { + u64 paddr; + u32 len; + void *host; + bool active; +}; + struct sev_device { struct device *dev; struct psp_device *psp; @@ -52,8 +61,11 @@ struct sev_device { u8 build; void *cmd_buf; + void *cmd_buf_backup; + int cmd_buf_active; bool snp_inited; + struct snp_host_map snp_host_map[MAX_SNP_HOST_MAP_BUFS]; }; int sev_dev_init(struct psp_device *psp); From patchwork Wed Jun 2 14:10:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0781BC47083 for ; Wed, 2 Jun 2021 14:16:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB19D613D8 for ; Wed, 2 Jun 2021 14:16:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230406AbhFBORx (ORCPT ); Wed, 2 Jun 2021 10:17:53 -0400 Received: from mail-bn8nam11on2066.outbound.protection.outlook.com ([40.107.236.66]:15585 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231713AbhFBOPv (ORCPT ); Wed, 2 Jun 2021 10:15:51 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kq2cpsQolvTBKrwRP0PhrwYCfMFwJIjRNao0OrODSJZ4MIHk3l6QiNTpymoyaWPk9b8C/xw0RUXcbWlxzOLo14qjQE2KD6syN9x1z/X/5UeRWcthYXFfRCB1YOaQUkpsD9lvBUTicY8uU/OgU7hmi+xsX7zRQreRFz17ONeXoHg3Eo/xTf1D2c34erfPtcGwduC5UrLRq8jJqHs16+mxovzbvPQyDwoPgXh7V1qqEIWIKFiq+R/l9nyY5979XyxrJwtz9tzV3YBv4hTAM+st0Ycsj9GPGTCrj55GF6tfX3OHNAgxF20UMzQ92LYDXIfxoxjX4Y4r7C4eNLn70BSf5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZXWvmF41owDiMt6To+AsmIAEf1i35/5Hhllt7y5Df9I=; b=l4TzTCLL8KqLrHnWe/IGiwihbES5WD5+qJWkmoYg6zvE2st7J4uTvVS7nHM/PmD6kSlJusjJ8ROq3InFWebtDBn+czeatKtQS8Xk8Oy0bp/4cdeYFbtyptQwC2o1yYTeyfbuqApwoT+/8+TQz6tCVfCKxgChIgvLItotopaKR1VkoJiv5zo4YgSnlSSmD77Ch52Ct/Hhoxqr5FqajGojpyFY4NfnihUZJ/gOrqKm+lwJw9cmvwtjuYWWmyUS+iY91r9JlHgnUgiHsuTuM8jYuPxuSCwHghYDxGf9vdtJ3pUKE2DEXwZz+hBzftxwCTABWaGIj22XUEJWQx+WbrA0EA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZXWvmF41owDiMt6To+AsmIAEf1i35/5Hhllt7y5Df9I=; b=KXF2d5E0S+ilm5h2Vi7U6kNMVm2zrwq8m+835/2Rv+AvxORCPz7YGsQQR5isukbL68+pdlQAkPDBSiXzrjvP3XbwkxYtHUvNO8KOaRc+6NJqajITlIa1a7WrI589lVubb2fq+h4klQtv2UUb8647R43Jk2J3FlvZGQBvu3dvDlE= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SN1PR12MB2368.namprd12.prod.outlook.com (2603:10b6:802:32::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20; Wed, 2 Jun 2021 14:11:50 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:49 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 17/37] KVM: SVM: make AVIC backing, VMSA and VMCB memory allocation SNP safe Date: Wed, 2 Jun 2021 09:10:37 -0500 Message-Id: <20210602141057.27107-18-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:48 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0feb9bc1-80db-456f-b5fe-08d925d05d1f X-MS-TrafficTypeDiagnostic: SN1PR12MB2368: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7DITOTE3nnQdwdszN0TNWkm6M6g0AUbJ4T6K5oU9wWzlPBwf+uMrNy2Wr6Rg7ujr58uR9b0YK8cNQLchxjQYi7LBE99pz7kOnzGJ1hJj/MxFJBJrWoPP9uUa+6RQ15y6Qz35kY4VzBJMpo+WMyPrpGG8fbqFpr+zXQpHvJhxXfY1UXcsRnxWw7/BwySy9M2Cka0H/X5kUSua1S4uTiOU+qDJDvz2f+lWCxa8hYv7vDhZVt8lG+TcnGy3wle8M1ybPHpbsYxtoiMX62rM1cggzmf9pwzMCCyTOv3k5ja3T7UEaG+P/NsRBZqRJx+vUOA/C7T9LRnPeIYx0YX94jh8WxLvZCkR2oVipFB6+8UnLkCgYabTXE145evR52K/otJThOjYBXyxru/li1agU1dzbPP3kcQE5jovVEDvYRT6o27xWbhNmT8xYLuubSWO/ILwpthCRArGd8gfopFCKJDx0VBxYVCx2e3yTtu0snSqjlc/v1lJcy/DRo4KLr2FBwjwOiLRknmLDqSL+HwqTMyxCJ94g3nAaDawEgBZipzFZezbazp7luF4DlNSLa9JdewkySE0CwbUfZK2ydu7B9VjYbaeU08ermlVDnDn1C1QcNhaz7fOAMxDSzJIGK+PYO0w1IX4Qt0vB7jPvG90WVYgKQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(136003)(396003)(376002)(366004)(346002)(39860400002)(5660300002)(86362001)(6486002)(52116002)(7696005)(44832011)(38350700002)(38100700002)(956004)(2616005)(1076003)(8676002)(7416002)(8936002)(478600001)(186003)(316002)(4326008)(16526019)(26005)(66556008)(66476007)(2906002)(36756003)(54906003)(83380400001)(6666004)(66946007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 0RMpvbeFhrIseM8VC391Z/WRdeZkeNWxvQIZhI36Dr4TK6QuV4NbUn5NLgpD805UqBoQLtMOIE9A7/uFOZL/rUyEVmt6/XFfpIOKUFvJYo6p1ZUiX9BOMeZzLSD3u/QAfJQZV3nJ9nospUUzKQGy0/lZ7Jgf9G81zZYbyiKIY5rdNxbduu6xHArCB/PXz33gQObeI/IxIGdkKmsn8U21IUUKZFlV0APbgD2s+o6LJHRMix0ZbLsPIO8EZhRUba4LD8xeDsr8xdt5H1njpMcDD49I11naV2uywDmv3mBV0UAnUcMB5aePIM8rNRJ6PAMmmF2LpAyw1zep4eee1AZbCZvtEcgTQVtZdrYKMpyxe0ZIrMJVdpqDT5UmsET3H+4B4tG0JVCPmi28UGfGGurZ+CpH4L0mfXFao84aw4zTFi1U1AM3fo/xCoPluQ5fU0/2JWbTRV89s0hJ3j1S+WCJBYAVcGngQRiRTbu0T0jiLNNcqdrbo6WRhMgdzzHjdDa6F4n25/D5sU72E5TfMURMPR5M+UvYcKsxFJ9Fy9uWJlx7N+aZT54sFB/vkYbi49jWkC2j0NfVWdgz7QppM3weM3M3Op/lBIdaT70rrbJvpOKoy4yoy6ARS2WuvRfJXOWtyDid+6UBiDy+Vv4xxKBCjfM7tPbT5/OSrjEMFreR067OUrpIRJCI0G2QssMXyddLM5aMUEbTi/fcMqoLtRsHxBJV/Rfa8+HuKUQ615RAJQoXN3KZpfIHz7pdwxmu/YV0ke5bRYmPeKgDCL1VSjEFUQr262cYlcKhwYyNn0B5qPMXxWij7JM0Iv9jlJltKpe3lXY6rTGZri2bc//hqkY/J3ksDVR9Aqcn8EWN/KFe3mjf0+spsuEiXuD32rHRd2128EdqS/+y3Yso5FyfdBWTmhK/8x7w4aC1GWN5W6CsOM2qnFc6rttx5JHmoW8UY90ebME8G9/Tf60FWouzpToZ4Hq1w4lNF94mY7UEGly6rPKX0qRfjkN5IdagH/H+xR7Nr1A7rE1ALSOZlhiR+5xopx72TIe23OqgQR1L80Yqcho9F+YmWQXYIGHgTJmCBY4Kdfz9xfmgF2ZYZ03EsgHXv3INDIMNH2sr1Et7Z+1JqNiZsWMSZHN4DmtTMQYyEohoH50lKj708h5O/jtLHOmplCXPuhliFCyu0z+HW1BCxuQ/pSuU+qri9/P/iGOBwFNF8DHiyVbAQ/uor5RnLNTFB4zyGC9pqfBH+K7caFpADNnyVMirMoCs9zLdvjSYumDYgngsMdBxVxk32sL646gbmvPJ7fVtfrzDP5PHg7AabYwQgo35+/v1n6oDLubSiTth X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0feb9bc1-80db-456f-b5fe-08d925d05d1f X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:49.7499 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: suaUDRvA7At25DUzPln6YYamWfk6dVpesAALGE0cn7k/t5D8erwWrybZqio0K339d7i0Sqv1SDkLwkw3Jjxxkg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2368 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org When SEV-SNP is globally enabled on a system, the VMRUN instruction performs additional security checks on AVIC backing, VMSA, and VMCB page. On a successful VMRUN, these pages are marked "in-use" by the hardware in the RMP entry, and any attempt to modify the RMP entry for these pages will result in page-fault (RMP violation check). While performing the RMP check, hardware will try to create a 2MB TLB entry for the large page accesses. When it does this, it first reads the RMP for the base of 2MB region and verifies that all this memory is safe. If AVIC backing, VMSA, and VMCB memory happen to be the base of 2MB region, then RMP check will fail because of the "in-use" marking for the base entry of this 2MB region. e.g. 1. A VMCB was allocated on 2MB-aligned address. 2. The VMRUN instruction marks this RMP entry as "in-use". 3. Another process allocated some other page of memory that happened to be within the same 2MB region. 4. That process tried to write its page using physmap. If the physmap entry in step #4 uses a large (1G/2M) page, then the hardware will attempt to create a 2M TLB entry. The hardware will find that the "in-use" bit is set in the RMP entry (because it was a VMCB page) and will cause an RMP violation check. See APM2 section 15.36.12 for more information on VMRUN checks when SEV-SNP is globally active. A generic allocator can return a page which are 2M aligned and will not be safe to be used when SEV-SNP is globally enabled. Add a snp_safe_alloc_page() helper that can be used for allocating the SNP safe memory. The helper allocated 2 pages and splits them into order-1 allocation. It frees one page and keeps one of the page which is not 2M aligned. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/lapic.c | 5 ++++- arch/x86/kvm/svm/sev.c | 27 +++++++++++++++++++++++++++ arch/x86/kvm/svm/svm.c | 16 ++++++++++++++-- arch/x86/kvm/svm/svm.h | 1 + 5 files changed, 47 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 55efbacfc244..188110ab2c02 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1383,6 +1383,7 @@ struct kvm_x86_ops { int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); + void *(*alloc_apic_backing_page)(struct kvm_vcpu *vcpu); }; struct kvm_x86_nested_ops { diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index c0ebef560bd1..d4c77f66d7d5 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -2441,7 +2441,10 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu, int timer_advance_ns) vcpu->arch.apic = apic; - apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); + if (kvm_x86_ops.alloc_apic_backing_page) + apic->regs = kvm_x86_ops.alloc_apic_backing_page(vcpu); + else + apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); if (!apic->regs) { printk(KERN_ERR "malloc apic regs error for vcpu %x\n", vcpu->vcpu_id); diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index b8505710c36b..411ed72f63af 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -2692,3 +2692,30 @@ void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector) break; } } + +struct page *snp_safe_alloc_page(struct kvm_vcpu *vcpu) +{ + unsigned long pfn; + struct page *p; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); + + p = alloc_pages(GFP_KERNEL_ACCOUNT | __GFP_ZERO, 1); + if (!p) + return NULL; + + /* split the page order */ + split_page(p, 1); + + /* Find a non-2M aligned page */ + pfn = page_to_pfn(p); + if (IS_ALIGNED(__pfn_to_phys(pfn), PMD_SIZE)) { + pfn++; + __free_page(p); + } else { + __free_page(pfn_to_page(pfn + 1)); + } + + return pfn_to_page(pfn); +} diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 2acf187a3100..a7adf6ca1713 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1336,7 +1336,7 @@ static int svm_create_vcpu(struct kvm_vcpu *vcpu) svm = to_svm(vcpu); err = -ENOMEM; - vmcb01_page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); + vmcb01_page = snp_safe_alloc_page(vcpu); if (!vmcb01_page) goto out; @@ -1345,7 +1345,7 @@ static int svm_create_vcpu(struct kvm_vcpu *vcpu) * SEV-ES guests require a separate VMSA page used to contain * the encrypted register state of the guest. */ - vmsa_page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); + vmsa_page = snp_safe_alloc_page(vcpu); if (!vmsa_page) goto error_free_vmcb_page; @@ -4439,6 +4439,16 @@ static int svm_vm_init(struct kvm *kvm) return 0; } +static void *svm_alloc_apic_backing_page(struct kvm_vcpu *vcpu) +{ + struct page *page = snp_safe_alloc_page(vcpu); + + if (!page) + return NULL; + + return page_address(page); +} + static struct kvm_x86_ops svm_x86_ops __initdata = { .hardware_unsetup = svm_hardware_teardown, .hardware_enable = svm_hardware_enable, @@ -4564,6 +4574,8 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .complete_emulated_msr = svm_complete_emulated_msr, .vcpu_deliver_sipi_vector = svm_vcpu_deliver_sipi_vector, + + .alloc_apic_backing_page = svm_alloc_apic_backing_page, }; static struct kvm_x86_init_ops svm_init_ops __initdata = { diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 5f874168551b..1175edb02d33 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -554,6 +554,7 @@ void sev_es_create_vcpu(struct vcpu_svm *svm); void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); void sev_es_prepare_guest_switch(struct vcpu_svm *svm, unsigned int cpu); void sev_es_unmap_ghcb(struct vcpu_svm *svm); +struct page *snp_safe_alloc_page(struct kvm_vcpu *vcpu); /* vmenter.S */ From patchwork Wed Jun 2 14:10:38 2021 Content-Type: text/plain; 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Wed, 2 Jun 2021 14:11:51 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 18/37] KVM: SVM: Add initial SEV-SNP support Date: Wed, 2 Jun 2021 09:10:38 -0500 Message-Id: <20210602141057.27107-19-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:50 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 88c61faf-c630-4e37-97fd-08d925d05dd2 X-MS-TrafficTypeDiagnostic: SN1PR12MB2368: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2733; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BEoGdOUP8U7wdTG6CBHx0qxDsbziAIVtFXWYclc5rdDJXB/GeL5cs1vOHEcNiKxHvs5jZTawhrQ+fHeh9ABKwAtuXQsNoxMor0aP6sperAXjrA9Hq5uwXtjI06PMoQh0A3+VyazbsjrxJlR7N2Om1pxHNX4bXw6xjU03lUlqZYmWPvzlhQxgxpI33WDuabdHR5FDTy+7Y8AOP4C+tlPFtkwGW78FXsP0R+kl2R67DnORIt5Ph4PtFM/Q41nrkl8wupOa5NOJFEm7S5uD2JMp3UQCwxdt8h36/lh66LU+uGlZn3oEPMRe9Go1vjAFjpwGTlSX5BFpRh+gXjyGxveAW3j33O08zeXmmlyUL6GLQylA/S2J/0BXtYoYXzK6y+BifgQ9r5iE84sOdtHsHDvui7qCvdE2URW9gSX7qBRRgWZW3ZMukQsKSQkV9YOs7sl6Q5zmaektVuIaPYZXhu2//IMB9rBWzQuRNi6xNrPNl80FXWP1r8NICBRbn4JlS1WDOUSIQnRRZvgIkrUjriQGhN9ywWLPFE8Ru1Lnoa7fqQ4a1H08BrjCLzhpV7aq14J99PTW0IxQ74hUxu57nKSPIE9DShBkEFTwp4nlTYqRN+BI3O1NSVA1njfEkCo7Wcyc8VYW55hJ9usBYsx4GCzhbA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(136003)(396003)(376002)(366004)(346002)(39860400002)(5660300002)(86362001)(6486002)(52116002)(7696005)(44832011)(38350700002)(38100700002)(956004)(2616005)(1076003)(8676002)(7416002)(8936002)(478600001)(186003)(316002)(4326008)(16526019)(26005)(66556008)(66476007)(2906002)(36756003)(54906003)(83380400001)(6666004)(66946007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 5/r50BPDtdw/wh15i1PXkyFGFLRKBTJM/rgL7+mVkcUEFHLSYMNn5BcT1S8soZcfZ1MMEsI1HmR38hifnmbIw3GEkocs+wkFZbryrginGLj1EeZoCe3NAmfut2P3Qw0BEEhJwpRp8lja32TrGsTByS0Lsxly31XwekLXNUAB1vRWFw6ZiyEelUO0xasoQobUo3mo2NVNvnNucI+++/QxP49WLrAoHHJZKZooSaXVlim8FarozUELHHSeLnjOTTH0pth6bmIU2tFdR7EXBSPLOhLwPs2Y7mgkdJ2QkPBrQDIcqRmW7jZg4DHVdTKqV4emoZUOvJLPwIQL5JFGKN2y1ZFFOCVBpDsy5niVBv+cR8o4zTxxo8FGqSOjsCxAanA9bY3lYaK1jNqiMaqpEUcIEMHRI1OTLH+gJtaTINi1cRtoxdOpKArnG+n29EzRQ4ksnw6b5h0XnRGBuoTIq0oWE88Od3owBdR8FzYmNNM6Q7yetrpI6vKdcZboL7bvstFWExNmL49hiq4+lYxx9sZ+Z0KLo+e+ERAGxCwKy/UCf5N2p13VkRMxIySLGkiXIsiuiue07vlcJhyWKUAbw1/tCkL1xiogQLuMfccyFUvcEvNroQrlwLbaRTihd3B5h0+erTYCjTRl3FiCYz6JahoTzk9jdD1S8LFRSJfsolYw70jVybohbARhy6fTwc9hHaJ6DrXntMLJp8pwzGo+jgGd+L4NhfYSl8bbhfVObLF58KdUpdn/1Poq6yVHcsGv7ieg09mFlZctXtnF+G7Gg1NPY9x6Jd01q1j05xa0GcwIyyfYTJ9REdrDl5pigHRXw15G4xfMV97ObNTbOh2x3CohI6bZznzNl1/S6CHAILl88rSxDC/f34oGdSjvKcSZuN+rZDoUpSlj9+Mr/qlZ65rftScP1tYKcwrIXJh58+SkIhGq4K2ctRLlVPMnwNxMO2E8vE2Y9VQy7FVYZDFqTjEDPbpALZpFBdT58qtF+YyzX4XTf20C1Fem96Mswp/nNd7SmcWKE/lUIw+cqBmyQzomMtna+MEd9NYSOqd2d53qwvmeThZWz7DE5ZsWSeFO+BBJQr07KHEIiPQ0gevvU2c+P1o5Kfm01FIn9ifoFNqeXB93LNefByp/P+HhcguL/axSufxmLZNlEO61KpQz3a4CNsi9anEIiMbIrJsWlB0FhzWEOH+cFyc/0VEAzDTf/jn74NGff2x6T9Ggo157iGObrQUtBFO94R0VIJYrKvGI5q81MsFnVeNaNwrab8pJPFGeDlY/LPI4B3e7UTTj4UW9RJmjiGiItKDIgwMZH77m2IYxlDo4gGm1K1w1AYZwyQ5e X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 88c61faf-c630-4e37-97fd-08d925d05dd2 X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:50.9592 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: paiV6HYMitQDkiT2DbmL1osiozvqsTX4zZXYJrGzlnW5SWGqq8JmqkAIUxRAVP6LvVoZS/ZHAvpwr/NiztVhQA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2368 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The next generation of SEV is called SEV-SNP (Secure Nested Paging). SEV-SNP builds upon existing SEV and SEV-ES functionality while adding new hardware based security protection. SEV-SNP adds strong memory encryption integrity protection to help prevent malicious hypervisor-based attacks such as data replay, memory re-mapping, and more, to create an isolated execution environment. The SNP feature can be enabled in the KVM by passing the sev-snp module parameter. Signed-off-by: Brijesh Singh --- arch/x86/kvm/svm/sev.c | 18 ++++++++++++++++++ arch/x86/kvm/svm/svm.h | 12 ++++++++++++ 2 files changed, 30 insertions(+) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 411ed72f63af..abca2b9dee83 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -52,9 +52,14 @@ module_param_named(sev, sev_enabled, bool, 0444); /* enable/disable SEV-ES support */ static bool sev_es_enabled = true; module_param_named(sev_es, sev_es_enabled, bool, 0444); + +/* enable/disable SEV-SNP support */ +static bool sev_snp_enabled = true; +module_param_named(sev_snp, sev_snp_enabled, bool, 0444); #else #define sev_enabled false #define sev_es_enabled false +#define sev_snp_enabled false #endif /* CONFIG_KVM_AMD_SEV */ #define AP_RESET_HOLD_NONE 0 @@ -1825,6 +1830,7 @@ void __init sev_hardware_setup(void) { #ifdef CONFIG_KVM_AMD_SEV unsigned int eax, ebx, ecx, edx, sev_asid_count, sev_es_asid_count; + bool sev_snp_supported = false; bool sev_es_supported = false; bool sev_supported = false; @@ -1888,9 +1894,21 @@ void __init sev_hardware_setup(void) pr_info("SEV-ES supported: %u ASIDs\n", sev_es_asid_count); sev_es_supported = true; + /* SEV-SNP support requested? */ + if (!sev_snp_enabled) + goto out; + + /* Is SEV-SNP enabled? */ + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + goto out; + + pr_info("SEV-SNP supported: %u ASIDs\n", min_sev_asid - 1); + sev_snp_supported = true; + out: sev_enabled = sev_supported; sev_es_enabled = sev_es_supported; + sev_snp_enabled = sev_snp_supported; #endif } diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 1175edb02d33..b9ea99f8579e 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -58,6 +58,7 @@ enum { struct kvm_sev_info { bool active; /* SEV enabled guest */ bool es_active; /* SEV-ES enabled guest */ + bool snp_active; /* SEV-SNP enabled guest */ unsigned int asid; /* ASID used for this guest */ unsigned int handle; /* SEV firmware handle */ int fd; /* SEV device fd */ @@ -232,6 +233,17 @@ static inline bool sev_es_guest(struct kvm *kvm) #endif } +static inline bool sev_snp_guest(struct kvm *kvm) +{ +#ifdef CONFIG_KVM_AMD_SEV + struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; + + return sev_es_guest(kvm) && sev->snp_active; +#else + return false; +#endif +} + static inline void vmcb_mark_all_dirty(struct vmcb *vmcb) { vmcb->control.clean = 0; From patchwork Wed Jun 2 14:10:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A2DFC47093 for ; Wed, 2 Jun 2021 14:13:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42C08613EE for ; Wed, 2 Jun 2021 14:13:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231352AbhFBOOl (ORCPT ); Wed, 2 Jun 2021 10:14:41 -0400 Received: from mail-dm6nam10on2044.outbound.protection.outlook.com ([40.107.93.44]:27560 "EHLO NAM10-DM6-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231392AbhFBONw (ORCPT ); Wed, 2 Jun 2021 10:13:52 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=KdLexQJkiOqvgEwBX7TUOBmizO5ThHMgpiyT5MJv8TmbtNX5swrgBESPtBWEfFmFdvVdNU4ogBtQvFmHj7impVH+A5dKNTd6NY3K1ARq8pgZBYViUUI89CoeGd1JCJmGxUpU2k5YIVpc23ZCHnYSf7RT3D043Y8K/C973OU2yEM9yg+XD1wIRF2w7caAUzJ4mUIjdRpN/d37/JUbHlIU8rozHoVl6Vj3TxThp7HSIro85xjfzSZiUA2XTaX7UBYHBisDEyJD41oJDyWQn9ho8m7ayQvXqwfY9HM3KFaBYyM4KeO5PS8YNJg7wCPp4WlWH4g0yq7fGV9vnslpzuj+Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Fj30EHwlZ9k9PEPjfuYC35sYctmpeoUpUlo67lH5/OU=; b=RYcf4GDtjcFEJmxU1RbsaFeZNyglIl7d3LtXcRikKwYPeSwdczOpqcQ46Ysgrcjcu55Zm8g5IVdVMOp285MsBMR7Kw78zjdp0FgHlNPvr1/t9JU3sPLFi8f3dkajpS9kUQExJUsXQ1cvMPviRIigA8jPUSDhJJKnd0KrqKPa0B3R81Qdt3Vp8ZhF4zV36/5rp7DkTwXSLi5+uzy4MgCOzwuzYijIn45OWpPIAD6Cg2benhz0loU08lUv5OxbRTJJASYIsn6yTgZkIbR7Uo1B2aSd2JeK4YXxL++AwRzvJlRZtohOzodnTpZ02OmWAatcLOtidYfGeKfqsJj2nOQTAg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Fj30EHwlZ9k9PEPjfuYC35sYctmpeoUpUlo67lH5/OU=; b=yo7ysLAelDAojnk99Ov1k9PuzNwW9csWwhOSzohSFhWZGX3lVqq5ycehnmMMOpMtu+ihDJWIa0Wfcd8hj1BPxhTAL1ovIc0URYDeiNTgG6RBLXmMt0SYh+M2jSDTCRKOYUc3aXGP82AFq4Q46tm39C4hQXYv4DTgwzZw9a4e+dA= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SA0PR12MB4592.namprd12.prod.outlook.com (2603:10b6:806:9b::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.22; Wed, 2 Jun 2021 14:11:55 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:55 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 21/37] KVM: SVM: Add KVM_SEV_SNP_LAUNCH_UPDATE command Date: Wed, 2 Jun 2021 09:10:41 -0500 Message-Id: <20210602141057.27107-22-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:11:54 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 37222725-8ed4-4af0-8471-08d925d06057 X-MS-TrafficTypeDiagnostic: SA0PR12MB4592: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dTmoTivpCjx9ud+u29BpLTPIULWnsMovs9+ygRLrJGTmR9fLW6GqGxTygsvQzvg2TAr5tXmnvWIYNMffGaJfapOrz7lthprdMXg5ahHxHIKBiw7XRwdDtK+4ZHcxZtO91NIAfJeefEQkAhbWc4uCW6RQ+RaoBDcwikRimcPoqtQg34R/eREuunFhi30gEYW2Rlhjp+/Com7s7kz1IsdhgNi/hFJs9Vek14qVD+mPxfRzLifiemKktp2dES03AFhpSLD5l+sk2ihOrU+jkrG89DLWppkKS0sBCCcZAGWILih+C8SxYjMNqMy1lIZxvvaCpzRPNcQ3Ib8EsmoWOZOjhLmbshDeUb1AXTv5S9IHfLzSWq/uUNeZzpVagZNVzI292SYtsXyesxTHiFvmU7ZyRw7k6NEHYeqOy5afwp/yQPnoPumsQGrgMbfFeEPW0+Y21JWWJNUyFAoLN1OcO1fofIDUNfqhU4hwB746f7Su0dPaEjnt4qV8SV8N6rghKCo1EbcMXqbmcD/tvpT+LCjHODYhTtjtugJo8gcOQ/YejhXRX/R8SE09k0JrK0+7VnJSbvmnY5jide8Fiw46u0R4UzzK6R8qoYM0tI7dVrx3K6jbzBlXna0zIh7H3Zg2gct/Ps56m3ZpxBCttD/cbrC6wQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(396003)(346002)(136003)(39860400002)(366004)(376002)(956004)(8936002)(8676002)(36756003)(478600001)(54906003)(83380400001)(1076003)(44832011)(2616005)(6666004)(38350700002)(38100700002)(5660300002)(66476007)(66556008)(2906002)(66946007)(4326008)(26005)(86362001)(186003)(7696005)(52116002)(16526019)(6486002)(7416002)(316002); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: H+xF+Gr2Fhm1ZzZ8jv86zVfSLKR4HE/1I91WUFgHiCKvzP9ls7O9dvBSmgZ5rbVtauAtwzD9tHXDUXTv3H8HsG2cckIMqyCGjKi2M547aNY6d3NcfXU82fiz8DLQBogvysyBNxZf1YnAuOuqPOz4Z0WoC6z023mnLC0KBeI1INKYxzthYhUJdB0+Yk9UEzabvwL7Vt1QLe+Jipme1qwEs/cmfbOQxguwc6rwBaf/oLuUz8Ze8tQKckyvSECr4p9kLjOkge2fCM6gBQ+ymcGzijVfFPpBpyrTTtjtWyqc9LUTI6PDzPxPtRod8oS5AcVWOJgxXEK5h/NzwjaQ2aHLilnU8Xug+obP+tbdyi+UpweYI07SZYRM06mvPKeMJsjKwow34d8iMbaBMrfQzAFSVJJMesxx31ebNxjOjwmVzNykn/OLThb2MLXU9/aotdtELEreM6KRS+U5tOQ2HW5sj8Iy4Dt9mqvxoBzJEhaVQgwm/M1YV+jSG8XS+FRm4Jfp5Fw/3j2ICucgkxfqrES/kEChdO8RRLJv4fKNtvC9qZxQIbdrgs+xSG2xuHkN6twjaxeyskVm5bZsY0pCZ81CmxRGlktdgcG9kFiTA0i97aji3qN7M9q7vscsIw/tdpCl7s1hWvyXsYNn0dILHMLV9Gqr43SXES92Ttx8+8rwCWd++pCfz88KxxCfggnp94is9C7k51hNhFb7uk/JADzcFCitvyILvsDM1s9HT0lt9MVuQfOOmnKU48ZERbhDXBBor+Ay2tudJ4ep+dDyl1QpKa4TVoBiqYFvsIuaDvOjyrNlB8oE2AV/f0bcsKh1J2nj5jQSF0WBvG/bWWu6JnMFa1Uh+ZVy+qqbZdCd7DGV2Mic8Ecqg1/Tdg8kOsSoLDj0B5WqHfahN7fONMfZWzwJ6VyqQbLI6i3WuZw7S1OsZeXZPq0sq23f/2GrZ4aDDHl7BiaNDgGgyBwNbasnMuleoKLdF2ogZadTSogNxFNHOgiK4b7PAmevJFAS89/1KBdEI0ZYghSuPSDUX12IX7AQ6Ujm34DzEw4qVQsI/gA9qhytTthOIxOGFPTOHyNycPawPyULmGSMisNoiBLS7H3HkY8ZkJJ8EsanhiLw1EHubhp/431WyT8RTZyvMlS4yXNy3bX9B952Bn0k552E3Ef52QGcKQs0/MJ4YIHEAfXWF3Zkk0kM8V+pFoGXABLAWaiSyzbnytH0z2BRJyBggd8pgRSBSoxIJBEnwro+hC8E2+YOaFHP7r7NhMZDCnV5t1f5TgmY7OR41tHDMlTUAdZQn3woMs2Qte2su1PisO5JEwDCxCk46S+0Lzlt+XLH44sn X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 37222725-8ed4-4af0-8471-08d925d06057 X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:11:55.1698 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kuF5wglqHlcQc7AWgBs+wNnvCWnQeAspPQs6spmELInT7xYWVA9MrUveioVLarLO/G7To8uLpTTpEJ5wKvZF0w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4592 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The KVM_SEV_SNP_LAUNCH_UPDATE command can be used to insert data into the guest's memory. The data is encrypted with the cryptographic context created with the KVM_SEV_SNP_LAUNCH_START. In addition to the inserting data, it can insert a two special pages into the guests memory: the secrets page and the CPUID page. For more information see the SEV-SNP specification. Signed-off-by: Brijesh Singh --- arch/x86/kvm/svm/sev.c | 139 +++++++++++++++++++++++++++++++++++++++ include/linux/sev.h | 2 + include/uapi/linux/kvm.h | 18 +++++ 3 files changed, 159 insertions(+) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index dac71bdedac4..dc9343ecca14 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -1605,6 +1606,141 @@ static int snp_launch_start(struct kvm *kvm, struct kvm_sev_cmd *argp) return rc; } +static struct kvm_memory_slot *hva_to_memslot(struct kvm *kvm, unsigned long hva) +{ + struct kvm_memslots *slots = kvm_memslots(kvm); + struct kvm_memory_slot *memslot; + + kvm_for_each_memslot(memslot, slots) { + if (hva >= memslot->userspace_addr && + hva < memslot->userspace_addr + (memslot->npages << PAGE_SHIFT)) + return memslot; + } + + return NULL; +} + +static bool hva_to_gpa(struct kvm *kvm, unsigned long hva, gpa_t *gpa) +{ + struct kvm_memory_slot *memslot; + gpa_t gpa_offset; + + memslot = hva_to_memslot(kvm, hva); + if (!memslot) + return false; + + gpa_offset = hva - memslot->userspace_addr; + *gpa = ((memslot->base_gfn << PAGE_SHIFT) + gpa_offset); + + return true; +} + +static int snp_page_reclaim(struct page *page, int rmppage_size) +{ + struct sev_data_snp_page_reclaim data = {}; + struct rmpupdate e = {}; + int rc, err; + + data.paddr = __sme_page_pa(page) | rmppage_size; + rc = snp_guest_page_reclaim(&data, &err); + if (rc) + return rc; + + return rmpupdate(page, &e); +} + +static int snp_launch_update(struct kvm *kvm, struct kvm_sev_cmd *argp) +{ + unsigned long npages, vaddr, vaddr_end, i, next_vaddr; + struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; + struct sev_data_snp_launch_update data = {}; + struct kvm_sev_snp_launch_update params; + int *error = &argp->error; + struct kvm_vcpu *vcpu; + struct page **inpages; + struct rmpupdate e; + int ret; + + if (!sev_snp_guest(kvm)) + return -ENOTTY; + + if (!sev->snp_context) + return -EINVAL; + + if (copy_from_user(¶ms, (void __user *)(uintptr_t)argp->data, sizeof(params))) + return -EFAULT; + + data.gctx_paddr = __psp_pa(sev->snp_context); + + /* Lock the user memory. */ + inpages = sev_pin_memory(kvm, params.uaddr, params.len, &npages, 1); + if (!inpages) + return -ENOMEM; + + vcpu = kvm_get_vcpu(kvm, 0); + vaddr = params.uaddr; + vaddr_end = vaddr + params.len; + + for (i = 0; vaddr < vaddr_end; vaddr = next_vaddr, i++) { + unsigned long psize, pmask; + int level = PG_LEVEL_4K; + gpa_t gpa; + + if (!hva_to_gpa(kvm, vaddr, &gpa)) { + ret = -EINVAL; + goto e_unpin; + } + + psize = page_level_size(level); + pmask = page_level_mask(level); + gpa = gpa & pmask; + + /* Transition the page state to pre-guest */ + memset(&e, 0, sizeof(e)); + e.assigned = 1; + e.gpa = gpa; + e.asid = sev_get_asid(kvm); + e.immutable = true; + e.pagesize = X86_TO_RMP_PG_LEVEL(level); + ret = rmpupdate(inpages[i], &e); + if (ret) { + ret = -EFAULT; + goto e_unpin; + } + + data.address = __sme_page_pa(inpages[i]); + data.page_size = e.pagesize; + data.page_type = params.page_type; + ret = __sev_issue_cmd(argp->sev_fd, SEV_CMD_SNP_LAUNCH_UPDATE, &data, error); + if (ret) { + snp_page_reclaim(inpages[i], e.pagesize); + goto e_unpin; + } + + next_vaddr = (vaddr & pmask) + psize; + } + +e_unpin: + /* Content of memory is updated, mark pages dirty */ + memset(&e, 0, sizeof(e)); + for (i = 0; i < npages; i++) { + set_page_dirty_lock(inpages[i]); + mark_page_accessed(inpages[i]); + + /* + * If its an error, then update RMP entry to change page ownership + * to the hypervisor. + */ + if (ret) + rmpupdate(inpages[i], &e); + } + + /* Unlock the user pages */ + sev_unpin_memory(kvm, inpages, npages); + + return ret; +} + int svm_mem_enc_op(struct kvm *kvm, void __user *argp) { struct kvm_sev_cmd sev_cmd; @@ -1697,6 +1833,9 @@ int svm_mem_enc_op(struct kvm *kvm, void __user *argp) case KVM_SEV_SNP_LAUNCH_START: r = snp_launch_start(kvm, &sev_cmd); break; + case KVM_SEV_SNP_LAUNCH_UPDATE: + r = snp_launch_update(kvm, &sev_cmd); + break; default: r = -EINVAL; goto out; diff --git a/include/linux/sev.h b/include/linux/sev.h index bcd4d75d87c8..82e804a2ee0d 100644 --- a/include/linux/sev.h +++ b/include/linux/sev.h @@ -36,8 +36,10 @@ struct __packed rmpentry { /* RMP page size */ #define RMP_PG_SIZE_4K 0 +#define RMP_PG_SIZE_2M 1 #define RMP_TO_X86_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M) +#define X86_TO_RMP_PG_LEVEL(level) (((level) == PG_LEVEL_4K) ? RMP_PG_SIZE_4K : RMP_PG_SIZE_2M) struct rmpupdate { u64 gpa; diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 56ab5576741e..8890d5a340be 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -1681,6 +1681,7 @@ enum sev_cmd_id { /* SNP specific commands */ KVM_SEV_SNP_INIT = 255, KVM_SEV_SNP_LAUNCH_START, + KVM_SEV_SNP_LAUNCH_UPDATE, KVM_SEV_NR_MAX, }; @@ -1786,6 +1787,23 @@ struct kvm_sev_snp_launch_start { __u8 gosvw[16]; }; +#define KVM_SEV_SNP_PAGE_TYPE_NORMAL 0x1 +#define KVM_SEV_SNP_PAGE_TYPE_VMSA 0x2 +#define KVM_SEV_SNP_PAGE_TYPE_ZERO 0x3 +#define KVM_SEV_SNP_PAGE_TYPE_UNMEASURED 0x4 +#define KVM_SEV_SNP_PAGE_TYPE_SECRETS 0x5 +#define KVM_SEV_SNP_PAGE_TYPE_CPUID 0x6 + +struct kvm_sev_snp_launch_update { + __u64 uaddr; + __u32 len; + __u8 imi_page; + __u8 page_type; + __u8 vmpl3_perms; + __u8 vmpl2_perms; + __u8 vmpl1_perms; +}; + #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) #define KVM_DEV_ASSIGN_MASK_INTX (1 << 2) From patchwork Wed Jun 2 14:10:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452656 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D843C4708F for ; Wed, 2 Jun 2021 14:15:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EEB9D613F6 for ; Wed, 2 Jun 2021 14:15:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231865AbhFBORE (ORCPT ); Wed, 2 Jun 2021 10:17:04 -0400 Received: from mail-dm6nam12on2058.outbound.protection.outlook.com ([40.107.243.58]:12928 "EHLO NAM12-DM6-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231994AbhFBOPD (ORCPT ); Wed, 2 Jun 2021 10:15:03 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=blHPFbEERjgERwZcxiIKtzeylxFTwhNZMt4dJ5L9yU59AKbTOmmI5rA1R/8hnhGPRwZWdNZ3BzTEboWlKQt+3tgr+rnqVWrnkcD2gWFVfhtGMQcblMuja+jSQiHKgEnIuUtm4wDLmpy49f+Dq9AHCvkxL/uvPhXCPZ3615wAytIHdxnk6oBut19gnp3b87X+Vhmvdlo1HInI9JhqHzBgzSGThhCi//FkSahu6lj2nYD7LFZEl4d/3goMmeHL0YjbQF5NRJ4385rpF2nEzrjXTVxBh+vMuVe8RRxge9rSsHpbnu3cPcC/YbqiPY5tJzxkeELFggvDfW0WOGRR1QfZbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Ctf2ZME0dCzsd2GPR85K3/wNdSfar94NNCdQynI6vjY=; b=m6unJd3J8DuMx+RYNI1hm1xPu6pCGJAiytyvUkVkT5YaucLVSSOZjcujh0oZuCt+okgaRY5gciJuB2VPiZDNvWcogeEt31hugqARDVGP1hhzKNohQjNceOOMH/ZV5u+8quXdycu7Jr2Sz+FV5TqOJgfz8FskjthdUgxC8T1cVBtelEICisX4Q1A6FdUHFM4Omwoda/ix34m//iXlF5PYrKdpFUNFvU3UnWrA6Uu24m3dKrGZA72bvsMph6iSH83/Yi0YouvL49BA24UQU4Etmd6Ldg+K0NRhq6RPR1Q0Yn/TmjmuvOGkEqfQPUcDA4x9QwJ2gerkzjtlHkW7jhZZcA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Ctf2ZME0dCzsd2GPR85K3/wNdSfar94NNCdQynI6vjY=; b=TR57PGWJmxjuEQ+Z01+FWtbwJoiZPEe8v6+o5Qrs9hX/0GeoFn4dSAHFe9MNgErBAHAjB+4SiEeCTDXAimf+Rrc9Qm2/Pb8d0FiY1J+f9aZOBNyX4zyiwtt0PSTrAfllueJiTI+xf/xb7OSKAeUgck6G7buwndtCPeQ4q34Ac4Y= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SA0PR12MB4592.namprd12.prod.outlook.com (2603:10b6:806:9b::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.22; Wed, 2 Jun 2021 14:11:59 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:11:59 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. 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The TDP page level is checked against the page level programmed in the RMP entry. If the page level does not match, then it will cause a nested page fault with the RMP bit set to indicate the RMP violation. To keep the TDP and RMP page level's in sync, the KVM fault handle kvm_handle_page_fault() will call get_tdp_max_page_level() to get the maximum allowed page level so that it can limit the TDP level. In the case of SEV-SNP guest, the get_tdp_max_page_level() will consult the RMP table to compute the maximum allowed page level for a given GPA. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu/mmu.c | 6 ++++-- arch/x86/kvm/svm/sev.c | 20 ++++++++++++++++++++ arch/x86/kvm/svm/svm.c | 1 + arch/x86/kvm/svm/svm.h | 1 + arch/x86/kvm/vmx/vmx.c | 8 ++++++++ 6 files changed, 35 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 188110ab2c02..cd2e19e1d323 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1384,6 +1384,7 @@ struct kvm_x86_ops { void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); void *(*alloc_apic_backing_page)(struct kvm_vcpu *vcpu); + int (*get_tdp_max_page_level)(struct kvm_vcpu *vcpu, gpa_t gpa, int max_level); }; struct kvm_x86_nested_ops { diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 0144c40d09c7..7991ffae7b31 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -3781,11 +3781,13 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, bool prefault) { + int max_level = kvm_x86_ops.get_tdp_max_page_level(vcpu, gpa, PG_LEVEL_2M); + pgprintk("%s: gva %lx error %x\n", __func__, gpa, error_code); /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */ return direct_page_fault(vcpu, gpa & PAGE_MASK, error_code, prefault, - PG_LEVEL_2M, false); + max_level, false); } int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, @@ -3826,7 +3828,7 @@ int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, { int max_level; - for (max_level = KVM_MAX_HUGEPAGE_LEVEL; + for (max_level = kvm_x86_ops.get_tdp_max_page_level(vcpu, gpa, KVM_MAX_HUGEPAGE_LEVEL); max_level > PG_LEVEL_4K; max_level--) { int page_num = KVM_PAGES_PER_HPAGE(max_level); diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 856a6cf99a61..6b0c230c5f37 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -3184,3 +3184,23 @@ struct page *snp_safe_alloc_page(struct kvm_vcpu *vcpu) return pfn_to_page(pfn); } + +int sev_get_tdp_max_page_level(struct kvm_vcpu *vcpu, gpa_t gpa, int max_level) +{ + struct rmpentry *e; + kvm_pfn_t pfn; + int level; + + if (!sev_snp_guest(vcpu->kvm)) + return max_level; + + pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa)); + if (is_error_noslot_pfn(pfn)) + return max_level; + + e = snp_lookup_page_in_rmptable(pfn_to_page(pfn), &level); + if (unlikely(!e)) + return max_level; + + return min_t(uint32_t, level, max_level); +} diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index a7adf6ca1713..2632eae52aa3 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -4576,6 +4576,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .vcpu_deliver_sipi_vector = svm_vcpu_deliver_sipi_vector, .alloc_apic_backing_page = svm_alloc_apic_backing_page, + .get_tdp_max_page_level = sev_get_tdp_max_page_level, }; static struct kvm_x86_init_ops svm_init_ops __initdata = { diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index bc5582b44356..32abcbd774d0 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -568,6 +568,7 @@ void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); void sev_es_prepare_guest_switch(struct vcpu_svm *svm, unsigned int cpu); void sev_es_unmap_ghcb(struct vcpu_svm *svm); struct page *snp_safe_alloc_page(struct kvm_vcpu *vcpu); +int sev_get_tdp_max_page_level(struct kvm_vcpu *vcpu, gpa_t gpa, int max_level); /* vmenter.S */ diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 4bceb5ca3a89..fbc9034edf16 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7612,6 +7612,12 @@ static bool vmx_check_apicv_inhibit_reasons(ulong bit) return supported & BIT(bit); } + +static int vmx_get_tdp_max_page_level(struct kvm_vcpu *vcpu, gpa_t gpa, int max_level) +{ + return max_level; +} + static struct kvm_x86_ops vmx_x86_ops __initdata = { .hardware_unsetup = hardware_unsetup, @@ -7742,6 +7748,8 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .complete_emulated_msr = kvm_complete_insn_gp, .vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector, + + .get_tdp_max_page_level = vmx_get_tdp_max_page_level, }; static __init void vmx_setup_user_return_msrs(void) From patchwork Wed Jun 2 14:10:47 2021 Content-Type: text/plain; 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Wed, 2 Jun 2021 14:12:03 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 27/37] KVM: X86: Define new RMP check related #NPF error bits Date: Wed, 2 Jun 2021 09:10:47 -0500 Message-Id: <20210602141057.27107-28-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:12:02 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 909b0bb4-8862-4a60-e981-08d925d0654e X-MS-TrafficTypeDiagnostic: SA0PR12MB4592: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3513; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JLSwBGon0GZqzEXT9VEkPA6MqHMnvRyHbOm7Abgt/r6h48MPmwj8601n2Q/GezcEF7Ze1g43HPCJhV8xeSLPBPjy2/+0m+36qP4OKonUAABBTMsMsMaRg/HRFvTg/WxsOtf2UtWU/e1oRCcfg7CKq+0JuCIil+Lik/xT7Wfm3ALEzbsWEyAgra9yHyg4X62E+d9NxEjAg1BtyiK92hVcPCcKvDnLuG9fw1s0mxltN7t0lkBVUhjsPVVpRSmb0Nm5xOt9jM3m0nJHvPpdbGtTDsrmssAXo759zaVHcyjw1RPlAT24Igu+QCYuEIh2FeTW/3BpFqFyM1nThrrTgn0Bj+8VM7LUfs4DA0D8rRHegcyRYB8hDOtvWrOQGkQiu5UvyIHfaGkLqOv3RYq6pNYK6950mX3uBVrrvFGiS6qkrzLJchvKzLpURvoZu8UhoR8pvHU0y936YrWVZ6vNWZzikQo4xMhpae7C6p8d6f1ZW+hzc3fIz6SplM3d7X5JkAi91i3E5VCyOAhJcIMF19kozMAqIvwhf4zuRjCzjZfCyHjnE5OLfvyUkVqop86syC5v/xIhTicw7m45QiKDfsnQK+g6qlnmgUaNjdbbO1loR0gIVMvWosFhoPSKy2Vl0edlt2h//gdIv53vphvaFcSmcQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(396003)(346002)(136003)(39860400002)(366004)(376002)(956004)(8936002)(8676002)(36756003)(478600001)(54906003)(83380400001)(1076003)(44832011)(2616005)(6666004)(38350700002)(38100700002)(5660300002)(66476007)(66556008)(2906002)(66946007)(4326008)(26005)(86362001)(186003)(7696005)(52116002)(16526019)(6486002)(7416002)(316002); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: k5CMy81fzO4vzgRZ6B1aRtVer7W+71KfcB6wNY5CDuQ2rFaU0wTVWDiBEiSDuVRzr3xFkM0u2nS56221TWZ5LLzyG1CO1Siuqpd+cPSJHSfZTxm5Y0Z6Th2Kp+4mgQaPJXpeg8MFPmD5y6w/I4LaAN/wrranrNxvUBJKzEUvFGl/a/yaPe2uXYFwjMhj7lj1+Mgl9+ojNv93SBlJZl09pdgqvVz4zsbE2T9e4MsTtQUGYfda5K935vUMkyNmiOxEoiZAXSc4nPtHDK6/8DHizddLQ91lIvJpM0RVCG2tJKRyzOxqO+wUvogTHyRUN2kNuBZDR+j7DAZFPUtJLmyn260r/eDtWzXPoEnGidHndfwbRFQF/Ch999M/CJDgmYKDy5IQicLsRf5x7CzVYA/MiskAqQWvFXCU9u7uGBb9pUi9YY/jxi5b6UttyLKM/gxVRQ9QBbo8AZ3R0n2U3M3ukmozVmDlL9ige3+SoY4yD8h6G8xIUVHaF+ZgIbn5deQy7mtWNuypuxmiS6LjG5k7yy2s093mZ0Dckj/DXtp9uKnWmD7HnlthCXUlgq5L0JENPHIBtmrlfwqmb/ZiXY/UpfQxAtQta2MLX/nBg5uX4sVDfFOzfKNRmnlOPPwCyJArXCalrFbDqpphNUKm9s9u2jeDv/YLHIfd/dLST/dy/4u8SPAI+r6QMAYOvKidQ8V2W2qQIGitu8M5uZXfKVguDqoXgN9T9v6dHC92bFpL7IPdRUm5fU91GNoYSs1InWih2HNT71Zo16GIOkHeftBYw0+JV8zhUxpGHzkvYKsDbHpkzFMAfqXHa7TPup/9urZbrYYwyT8tHtU6VyjnQn6dCzGkjggw25yeCI773UB6/2Y8ICNB4fVQFo/xTwlgvmzAjvYHxIOIpNPg6dXytrAzXOiO5qj+zVXjJKY+X2trOQx/kK5GtgXcKNL1YwM79hTuycNGTssGZYfqbWBCA/ooxZeM25gvG0O9dtPjqjRIx/eD8khTpLHWZlCp8rsdoF4V5TpkdtVNR70w/YdrkJeaeJcEY1dhe1hq094AMX7uvJUd6f8J2wdgEBEVL1DF1yO4mMpqbi18OQS5pItCEo8pZvQ0ITtmJ2Ce6aqRmbksd1954h7bO9MQX0Br7jbeLO0tvsbjDOe8JrsEqVGMTO3t4RmnVb3PxuAKCikI/YQN8BdNU2f87Mwe6t7vXptzOLd6PZD2Y/fIkuc84cOA+ITf5CVpThBXdSiDGj0ZCAASj+eve3u9ArNnjkyeTuZdizOX3aCEI4YJmoGm6aAJ9Za3oEt8AkMhDQGwJp0L/F3FympGaVps1Q6s/zDvfrLNCjS4 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 909b0bb4-8862-4a60-e981-08d925d0654e X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:12:03.5519 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +2EnkUdcbBZc9Pr94GXBMBJwbvkbHO6dGSm4T86jgcoBNBt74cGoKMaat1cHIl/xKymbI9NS/yXBH424Yvbhzg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4592 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org When SEV-SNP is enabled globally, the hardware places restrictions on all memory accesses based on the RMP entry, whether the hyperviso or a VM, performs the accesses. When hardware encounters an RMP access violation during a guest access, it will cause a #VMEXIT(NPF). See APM2 section 16.36.10 for more details. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/kvm_host.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index cd2e19e1d323..59185b6bc82a 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -239,8 +239,12 @@ enum x86_intercept_stage; #define PFERR_FETCH_BIT 4 #define PFERR_PK_BIT 5 #define PFERR_SGX_BIT 15 +#define PFERR_GUEST_RMP_BIT 31 #define PFERR_GUEST_FINAL_BIT 32 #define PFERR_GUEST_PAGE_BIT 33 +#define PFERR_GUEST_ENC_BIT 34 +#define PFERR_GUEST_SIZEM_BIT 35 +#define PFERR_GUEST_VMPL_BIT 36 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) @@ -251,6 +255,10 @@ enum x86_intercept_stage; #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) +#define PFERR_GUEST_RMP_MASK (1ULL << PFERR_GUEST_RMP_BIT) +#define PFERR_GUEST_ENC_MASK (1ULL << PFERR_GUEST_ENC_BIT) +#define PFERR_GUEST_SIZEM_MASK (1ULL << PFERR_GUEST_SIZEM_BIT) +#define PFERR_GUEST_VMPL_MASK (1ULL << PFERR_GUEST_VMPL_BIT) #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ PFERR_WRITE_MASK | \ From patchwork Wed Jun 2 14:10:48 2021 Content-Type: text/plain; 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Wed, 2 Jun 2021 14:12:04 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 28/37] KVM: X86: update page-fault trace to log the 64-bit error code Date: Wed, 2 Jun 2021 09:10:48 -0500 Message-Id: <20210602141057.27107-29-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; Wed, 2 Jun 2021 14:12:03 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e63e3224-3870-4c3f-9adf-08d925d0660e X-MS-TrafficTypeDiagnostic: SA0PR12MB4592: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5797; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 1c9QTLjnVUrRfH/F1be6xcMgyxZqOLp34CwZTYLq0oC2jsCYiByiYPkQxTGPPKopXfQI1tKUp7sClFta8Ran2vB3JwpvzI7eYGsPQQd0NT+jBFUnSgvYaZoUU5K7XTuwXhsNkQqGN1GAE/XrNhdlrvTvF5ZO7k9MuS7CLk52X/1rPFJ1VXONgN6IN6LX6jkD57aHs2qbBzNw6tB4YusKCh/0zuZ3rbmpg7EfXUspJiSVBEhwmh3pvXmBFnAuhLYU5zBGHk19q7JhA0PVAWu2Gk9IsC7vafS3PJn+/LSBgp/ydhMAoVd6N+RTKNOvYLCgX/t74efpyfNKYc2x3ER2jScWpu0dH6lXmFUpCZ6kxxSC+BK+7CMGHk4BSEW4PBmBuiTzMHY66YHRkmSvFEtzFG1qELakF7AHwB4BkTuuggitybqSl0RTDB22FkFpg5znl9IB7jEsylhorAKnOWJ3ux+1tfxgcWplmDgvAOW7eRAtSzp6p/CpNzSKznEOkHsjztUFfiVm9AEoEFpj5SlhYTBxiZDnKk7AdsJWaaAvmj7ZIOPjRMr7m/WEcCkEWmvuTwH667KQDHlmPqP7IXgnHWjr4qNeCLYcszyB2e7TIa8N8bUob8clwiPzEyBx9Uew1ocE2H9ehQqKvX7l+wg9Cw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR12MB2718.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(956004)(8936002)(8676002)(36756003)(498600001)(54906003)(83380400001)(1076003)(44832011)(2616005)(6666004)(38350700002)(38100700002)(5660300002)(66476007)(66556008)(2906002)(66946007)(4326008)(26005)(86362001)(186003)(7696005)(52116002)(16526019)(6486002)(7416002); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: WxhEby/+l2J3Ss0rTer7mWWFjJoVgJlYIJYiI/4McG38U1Ydo2KQC/tCaYw6Ypr7+t+qoGkfxwRIyiTe8j73iLDF0snl1+lZmMwmdEXDDgTiETyKW+U4f8WI5p3Q9/8cmGZdGB6iAaqBRDTHm80sCCmiVoUr2uGCef1P76+eFrsjoDHpemWMQmT9rIR3vNTDAR6oxfHw0ld9DQ3EvdYiTt5akEi5DsnY66Ehweqszk9SvG4Jgq00LBrKQOeb4R4NmScaYlNQoweSXT7ivL8mqgZu93FBDth5ejVmOaAA0xMpFkURLNI+LC5n/QP2ZW2jIgKiiRqQuIEAYEdm8SmmlqT9yF8Rd4kq0bDhpHTfXcDFSHMWUvzYosT1iounPob3ui3yuFsjaIsFrmOozh1TVIZzNajVRCaJOc+EjqFdHyoLX7mE1QR5qMVtH/rcNgFWfGo03tarb12lkZDQLiIBwbLmRb4nW9VWlYrcl0GamcuQQ8h0LSboj08bA9r9m3CsTXJZa0kSPhRwfdOtBmDUT49rHsvuR34jxkbdiVkgaL727Y19KVzv77874weLAoemG061WJudiD2Hr+93XZmtgd+VPeOVWPpqK4zhKe9exibgj264w8a5wvcfLdh0115lwj1ycZT7wfD/iSe0UxFdzUZGnFf1JP1WMiEvTSD8h8+DW9wgqAHs+ucgK1Qi9+b6hW4l3fY8y61Yzz1q7sxzgFCjXICoNwnuW0ntaBl2cJyG6+46Ch3ezYLe6QQCpBaDFgDKjbCxi6HyuOeKzy3u+McF94I2dUUSwuUjaKiBTeOLodkCoB/PJmY1PzOKWzIYK4PWxwCHnLQXovajMWzTUT2urm/dX1yJhRgBJOW3ZfcBq9iCLfxTpKJH8llv2q0iAbvasIpP2MTsgXwS5913HHNNmG18yi10fuyiV2gxHCeeh/OcBdSwnj000+qJ+JrMoFeGXSPq0pccOPqy0F1pWtOztUsEYpw8Gh99gArsYNtF+L6l8Wai18gM7vQDhMf9VuODK3h8TNYW1yLZcOIrSgMhAh/K6HGOOq782SVkf+4FO8N4qqJyVReigudGEBZAQC+O0dXc0PfL6sap7D9B6surPExe9uymjJMxEFoNMfQsm6wJpqSopmnbDLktckzsHBkbMMFo2ihPzNIfwDZbiN03oOUYLAE6bHpbXHExF91TiNZCascVFLh5eWZgjrn+Afk6Upzuz1g9gx4r06xcfkpBHvu1A14AcI1UGcug4c+o0L4+fQpFJU6UPk99DVg0L00rM0umlVFtv+ErisJr1DGer794psV3jfhCp4gKeROu6ji7yEA7UoSt3m/VIbeE X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: e63e3224-3870-4c3f-9adf-08d925d0660e X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2021 14:12:04.7213 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 3Z9wGdBLA2bwMY/D/pYG7rSsD8AnHPrgfDnzwD/Uuidu4R+FjKYR5Hn9UED0qGuQ1Gd6Zw/3b7jgX+nM06zRbA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4592 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The page-fault error code is a 64-bit value, but the trace prints only the lower 32-bits. Some of the SEV-SNP RMP fault error codes are available in the upper 32-bits. Signed-off-by: Brijesh Singh --- arch/x86/kvm/trace.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h index a61c015870e3..78cbf53bf412 100644 --- a/arch/x86/kvm/trace.h +++ b/arch/x86/kvm/trace.h @@ -365,12 +365,12 @@ TRACE_EVENT(kvm_inj_exception, * Tracepoint for page fault. */ TRACE_EVENT(kvm_page_fault, - TP_PROTO(unsigned long fault_address, unsigned int error_code), + TP_PROTO(unsigned long fault_address, u64 error_code), TP_ARGS(fault_address, error_code), TP_STRUCT__entry( __field( unsigned long, fault_address ) - __field( unsigned int, error_code ) + __field( u64, error_code ) ), TP_fast_assign( @@ -378,7 +378,7 @@ TRACE_EVENT(kvm_page_fault, __entry->error_code = error_code; ), - TP_printk("address %lx error_code %x", + TP_printk("address %lx error_code %llx", __entry->fault_address, __entry->error_code) ); From patchwork Wed Jun 2 14:10:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D5ABC47083 for ; Wed, 2 Jun 2021 14:17:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5F944613BA for ; Wed, 2 Jun 2021 14:17:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231623AbhFBOSy (ORCPT ); Wed, 2 Jun 2021 10:18:54 -0400 Received: from mail-dm6nam12on2079.outbound.protection.outlook.com ([40.107.243.79]:15104 "EHLO NAM12-DM6-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S231653AbhFBOQx (ORCPT ); Wed, 2 Jun 2021 10:16:53 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bI1VX0wUunEp5GZ/OephPMlHO67cBJp1GJRJ6/yLdXVcBqll0gYHkdZWG1l0PTaoTn/DqYg2kHai/eusrH73ldrzkFtJpahKCV9uCusTIkijJ4AULkGDbI6f+5u8/+raJnZ0zokRWJ2SfncVH/NRsiX7ylIecm4RYudfSPO8GZiJDiVbR8Daw80UtJ2p8SXfR/YPUR7b74KR3fAonNHNMuyKHO9mdTKlgAGex9WN9yUdvYqzLTvNFbjHLqxemNfHwqQFbwhvgcJNI05kLB2y2aEIT4oCg5n93Ykfp1ny+T3OdyyvrJHPjDuYGaWZ3dRH/L3Jr59zBfTd4txdqD7EmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KooHv0mllq5V/tjmM2u3XNXV0Y9fxysjExz0F1f2TiU=; b=SI9MqEwndRY1nWAizzZKtc5omI+HmOd84wHIJNeGWY+0EVe8SIqnRqKRCDxRHdY3ZvV5Mitj3bXF0T4ijMKtylYudoszwPLvM7qOLf11TJm48sxBME0hmAGejWuTmlM7IbNbAwjxMHlWWFzK1PJOw6WGGXMnntrlOetvv6SR7M0MOLCVbcmGX5VNHajS/CCh+GZGKt/uTfBC9jMvxsJzK9kt94j1R+5thUri4vXdZ/ZbY0VrxRpYtLeKm69VLHdzL4AFiOSzddMiFDjaxZW+vSVggCryzanRdeDT8BWtsxtCzRqKG2sANBPqXKMHd3ntN2Nw9EoyxcTrahFeId6szA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KooHv0mllq5V/tjmM2u3XNXV0Y9fxysjExz0F1f2TiU=; b=oUViDX+5dylzk4O0uyEan1OshcOazB4Vj7nty6TP+38WJ8EoguGyPGcCRSxBgWRvIcq5wXCOaLa2UtOgUkX83vRjOlHJrXIxIWRsIVQ76mZQ1Ahusu9jeY8t96UeDKY/XDIKDIANdMZ3YeTJcEFeGZq7JejZGheSUEB8jcq0cVo= Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SA0PR12MB4592.namprd12.prod.outlook.com (2603:10b6:806:9b::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.22; Wed, 2 Jun 2021 14:12:06 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:12:06 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. 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Before using a GHCB GPA for a vCPU the first time, a guest must register the vCPU GHCB GPA. If hypervisor can work with the guest requested GPA then it must respond back with the same GPA otherwise return -1. On VMEXIT, Verify that GHCB GPA matches with the registered value. If a mismatch is detected then abort the guest. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/sev-common.h | 1 + arch/x86/kvm/svm/sev.c | 25 +++++++++++++++++++++++++ arch/x86/kvm/svm/svm.h | 7 +++++++ 3 files changed, 33 insertions(+) diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h index 97137f1a567b..e7c6ce2ce45e 100644 --- a/arch/x86/include/asm/sev-common.h +++ b/arch/x86/include/asm/sev-common.h @@ -93,6 +93,7 @@ GHCB_MSR_GPA_REG_REQ) #define GHCB_MSR_GPA_REG_RESP 0x013 +#define GHCB_MSR_GPA_REG_ERROR GENMASK_ULL(51, 0) #define GHCB_MSR_GPA_REG_RESP_VAL(v) ((v) >> GHCB_MSR_GPA_REG_VALUE_POS) /* SNP Page State Change NAE event */ diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 6b0c230c5f37..81c0fc883261 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -2900,6 +2900,25 @@ static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm) GHCB_MSR_INFO_MASK, GHCB_MSR_INFO_POS); break; } + case GHCB_MSR_GPA_REG_REQ: { + kvm_pfn_t pfn; + u64 gfn; + + gfn = get_ghcb_msr_bits(svm, GHCB_MSR_GPA_REG_GFN_MASK, + GHCB_MSR_GPA_REG_VALUE_POS); + + pfn = kvm_vcpu_gfn_to_pfn(vcpu, gfn); + if (is_error_noslot_pfn(pfn)) + gfn = GHCB_MSR_GPA_REG_ERROR; + else + svm->ghcb_registered_gpa = gfn_to_gpa(gfn); + + set_ghcb_msr_bits(svm, gfn, GHCB_MSR_GPA_REG_GFN_MASK, + GHCB_MSR_GPA_REG_VALUE_POS); + set_ghcb_msr_bits(svm, GHCB_MSR_GPA_REG_RESP, GHCB_MSR_INFO_MASK, + GHCB_MSR_INFO_POS); + break; + } case GHCB_MSR_TERM_REQ: { u64 reason_set, reason_code; @@ -2948,6 +2967,12 @@ int sev_handle_vmgexit(struct kvm_vcpu *vcpu) return -EINVAL; } + /* SEV-SNP guest requires that the GHCB GPA must be registered */ + if (sev_snp_guest(svm->vcpu.kvm) && !ghcb_gpa_is_registered(svm, ghcb_gpa)) { + vcpu_unimpl(&svm->vcpu, "vmgexit: GHCB GPA [%#llx] is not registered.\n", ghcb_gpa); + return -EINVAL; + } + svm->ghcb = svm->ghcb_map.hva; ghcb = svm->ghcb_map.hva; diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 32abcbd774d0..af4cce39b30f 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -185,6 +185,8 @@ struct vcpu_svm { bool ghcb_sa_free; bool guest_state_loaded; + + u64 ghcb_registered_gpa; }; struct svm_cpu_data { @@ -245,6 +247,11 @@ static inline bool sev_snp_guest(struct kvm *kvm) #endif } +static inline bool ghcb_gpa_is_registered(struct vcpu_svm *svm, u64 val) +{ + return svm->ghcb_registered_gpa == val; +} + static inline void vmcb_mark_all_dirty(struct vmcb *vmcb) { vmcb->control.clean = 0; From patchwork Wed Jun 2 14:10:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01F9DC47093 for ; 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dkim=none (message not signed) header.d=none; kernel.org; dmarc=none action=none header.from=amd.com; Received: from SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) by SA0PR12MB4574.namprd12.prod.outlook.com (2603:10b6:806:94::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4173.20; Wed, 2 Jun 2021 14:12:37 +0000 Received: from SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94]) by SN6PR12MB2718.namprd12.prod.outlook.com ([fe80::9898:5b48:a062:db94%6]) with mapi id 15.20.4173.030; Wed, 2 Jun 2021 14:12:37 +0000 From: Brijesh Singh To: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , tony.luck@intel.com, npmccallum@redhat.com, Borislav Petkov , Brijesh Singh Subject: [PATCH Part2 RFC v3 30/37] KVM: SVM: Add support to handle MSR based Page State Change VMGEXIT Date: Wed, 2 Jun 2021 09:10:50 -0500 Message-Id: <20210602141057.27107-31-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602141057.27107-1-brijesh.singh@amd.com> References: <20210602141057.27107-1-brijesh.singh@amd.com> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0056.namprd11.prod.outlook.com (2603:10b6:806:d0::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.20 via Frontend Transport; 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Before changing the page state in the RMP entry, we lookup the page in the TDP to make sure that there is a valid mapping for it. If the mapping exist then try to find a workable page level between the TDP and RMP for the page. If the page is not mapped in the TDP, then create a fault such that it gets mapped before we change the page state in the RMP entry. Signed-off-by: Brijesh Singh --- arch/x86/include/asm/sev-common.h | 3 + arch/x86/kvm/svm/sev.c | 141 ++++++++++++++++++++++++++++++ 2 files changed, 144 insertions(+) diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h index e7c6ce2ce45e..ed417340ed42 100644 --- a/arch/x86/include/asm/sev-common.h +++ b/arch/x86/include/asm/sev-common.h @@ -82,6 +82,9 @@ #define GHCB_MSR_PSC_RESP 0x015 #define GHCB_MSR_PSC_ERROR_POS 32 +#define GHCB_MSR_PSC_ERROR_MASK GENMASK_ULL(31, 0) +#define GHCB_MSR_PSC_RSVD_POS 12 +#define GHCB_MSR_PSC_RSVD_MASK GENMASK_ULL(19, 0) #define GHCB_MSR_PSC_RESP_VAL(val) ((val) >> GHCB_MSR_PSC_ERROR_POS) /* GHCB GPA Register */ diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 81c0fc883261..dac7042464be 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -28,6 +28,7 @@ #include "svm_ops.h" #include "cpuid.h" #include "trace.h" +#include "mmu.h" #define __ex(x) __kvm_handle_fault_on_reboot(x) @@ -2821,6 +2822,127 @@ static void set_ghcb_msr(struct vcpu_svm *svm, u64 value) svm->vmcb->control.ghcb_gpa = value; } +static int snp_rmptable_psmash(struct kvm_vcpu *vcpu, kvm_pfn_t pfn) +{ + pfn = pfn & ~(KVM_PAGES_PER_HPAGE(PG_LEVEL_2M) - 1); + + return psmash(pfn_to_page(pfn)); +} + +static int snp_make_page_shared(struct kvm_vcpu *vcpu, gpa_t gpa, kvm_pfn_t pfn, int level) +{ + struct rmpupdate val; + int rc, rmp_level; + struct rmpentry *e; + + e = snp_lookup_page_in_rmptable(pfn_to_page(pfn), &rmp_level); + if (!e) + return -EINVAL; + + if (!rmpentry_assigned(e)) + return 0; + + /* Log if the entry is validated */ + if (rmpentry_validated(e)) + pr_warn_ratelimited("Remove RMP entry for a validated gpa 0x%llx\n", gpa); + + /* + * Is the page part of an existing 2M RMP entry ? Split the 2MB into multiple + * of 4K-page before making the memory shared. + */ + if ((level == PG_LEVEL_4K) && (rmp_level == PG_LEVEL_2M)) { + rc = snp_rmptable_psmash(vcpu, pfn); + if (rc) + return rc; + } + + memset(&val, 0, sizeof(val)); + val.pagesize = X86_TO_RMP_PG_LEVEL(level); + return rmpupdate(pfn_to_page(pfn), &val); +} + +static int snp_make_page_private(struct kvm_vcpu *vcpu, gpa_t gpa, kvm_pfn_t pfn, int level) +{ + struct kvm_sev_info *sev = &to_kvm_svm(vcpu->kvm)->sev_info; + struct rmpupdate val; + struct rmpentry *e; + int rmp_level; + + e = snp_lookup_page_in_rmptable(pfn_to_page(pfn), &rmp_level); + if (!e) + return -EINVAL; + + /* Log if the entry is validated */ + if (rmpentry_validated(e)) + pr_warn_ratelimited("Asked to make a pre-validated gpa %llx private\n", gpa); + + memset(&val, 0, sizeof(val)); + val.gpa = gpa; + val.asid = sev->asid; + val.pagesize = X86_TO_RMP_PG_LEVEL(level); + val.assigned = true; + + return rmpupdate(pfn_to_page(pfn), &val); +} + +static int __snp_handle_page_state_change(struct kvm_vcpu *vcpu, int op, gpa_t gpa, int level) +{ + struct kvm *kvm = vcpu->kvm; + int rc, tdp_level; + kvm_pfn_t pfn; + gpa_t gpa_end; + + gpa_end = gpa + page_level_size(level); + + while (gpa < gpa_end) { + /* + * Get the pfn and level for the gpa from the nested page table. + * + * If the TDP walk failed, then its safe to say that we don't have a valid + * mapping for the gpa in the nested page table. Create a fault to map the + * page is nested page table. + */ + if (!kvm_mmu_get_tdp_walk(vcpu, gpa, &pfn, &tdp_level)) { + pfn = kvm_mmu_map_tdp_page(vcpu, gpa, PFERR_USER_MASK, level); + if (is_error_noslot_pfn(pfn)) + goto out; + + if (!kvm_mmu_get_tdp_walk(vcpu, gpa, &pfn, &tdp_level)) + goto out; + } + + /* Adjust the level so that we don't go higher than the backing page level */ + level = min_t(size_t, level, tdp_level); + + write_lock(&kvm->mmu_lock); + + switch (op) { + case SNP_PAGE_STATE_SHARED: + rc = snp_make_page_shared(vcpu, gpa, pfn, level); + break; + case SNP_PAGE_STATE_PRIVATE: + rc = snp_make_page_private(vcpu, gpa, pfn, level); + break; + default: + rc = -EINVAL; + break; + } + + write_unlock(&kvm->mmu_lock); + + if (rc) { + pr_err_ratelimited("Error op %d gpa %llx pfn %llx level %d rc %d\n", + op, gpa, pfn, level, rc); + goto out; + } + + gpa = gpa + page_level_size(level); + } + +out: + return rc; +} + static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm) { struct vmcb_control_area *control = &svm->vmcb->control; @@ -2919,6 +3041,25 @@ static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm) GHCB_MSR_INFO_POS); break; } + case GHCB_MSR_PSC_REQ: { + gfn_t gfn; + int ret; + u8 op; + + gfn = get_ghcb_msr_bits(svm, GHCB_MSR_PSC_GFN_MASK, GHCB_MSR_PSC_GFN_POS); + op = get_ghcb_msr_bits(svm, GHCB_MSR_PSC_OP_MASK, GHCB_MSR_PSC_OP_POS); + + ret = __snp_handle_page_state_change(vcpu, op, gfn_to_gpa(gfn), PG_LEVEL_4K); + + /* If failed to change the state then spec requires to return all F's */ + if (ret) + ret = -1; + + set_ghcb_msr_bits(svm, ret, GHCB_MSR_PSC_ERROR_MASK, GHCB_MSR_PSC_ERROR_POS); + set_ghcb_msr_bits(svm, 0, GHCB_MSR_PSC_RSVD_MASK, GHCB_MSR_PSC_RSVD_POS); + set_ghcb_msr_bits(svm, GHCB_MSR_PSC_RESP, GHCB_MSR_INFO_MASK, GHCB_MSR_INFO_POS); + break; + } case GHCB_MSR_TERM_REQ: { u64 reason_set, reason_code; From patchwork Wed Jun 2 14:10:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 452658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39908C47083 for ; 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Signed-off-by: Brijesh Singh --- arch/x86/include/asm/sev-common.h | 7 +++ arch/x86/kvm/svm/sev.c | 80 ++++++++++++++++++++++++++++++- include/linux/sev.h | 3 ++ 3 files changed, 88 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h index ed417340ed42..aeaf0ff3f2c7 100644 --- a/arch/x86/include/asm/sev-common.h +++ b/arch/x86/include/asm/sev-common.h @@ -102,6 +102,13 @@ /* SNP Page State Change NAE event */ #define VMGEXIT_PSC_MAX_ENTRY 253 +/* The page state change hdr structure in not valid */ +#define PSC_INVALID_HDR 1 +/* The hdr.cur_entry or hdr.end_entry is not valid */ +#define PSC_INVALID_ENTRY 2 +/* Page state change encountered undefined error */ +#define PSC_UNDEF_ERR 3 + struct __packed snp_page_state_header { u16 cur_entry; u16 end_entry; diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index dac7042464be..ddcbae37de4f 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -2640,6 +2640,7 @@ static int sev_es_validate_vmgexit(struct vcpu_svm *svm) case SVM_VMGEXIT_AP_JUMP_TABLE: case SVM_VMGEXIT_UNSUPPORTED_EVENT: case SVM_VMGEXIT_HV_FT: + case SVM_VMGEXIT_PSC: break; default: goto vmgexit_err; @@ -2888,7 +2889,8 @@ static int snp_make_page_private(struct kvm_vcpu *vcpu, gpa_t gpa, kvm_pfn_t pfn static int __snp_handle_page_state_change(struct kvm_vcpu *vcpu, int op, gpa_t gpa, int level) { struct kvm *kvm = vcpu->kvm; - int rc, tdp_level; + int rc = PSC_UNDEF_ERR; + int tdp_level; kvm_pfn_t pfn; gpa_t gpa_end; @@ -2923,8 +2925,11 @@ static int __snp_handle_page_state_change(struct kvm_vcpu *vcpu, int op, gpa_t g case SNP_PAGE_STATE_PRIVATE: rc = snp_make_page_private(vcpu, gpa, pfn, level); break; + case SNP_PAGE_STATE_PSMASH: + case SNP_PAGE_STATE_UNSMASH: + /* TODO: Add support to handle it */ default: - rc = -EINVAL; + rc = PSC_INVALID_ENTRY; break; } @@ -2943,6 +2948,68 @@ static int __snp_handle_page_state_change(struct kvm_vcpu *vcpu, int op, gpa_t g return rc; } +static inline unsigned long map_to_psc_vmgexit_code(int rc) +{ + switch (rc) { + case PSC_INVALID_HDR: + return ((1ul << 32) | 1); + case PSC_INVALID_ENTRY: + return ((1ul << 32) | 2); + case RMPUPDATE_FAIL_OVERLAP: + return ((3ul << 32) | 2); + default: return (4ul << 32); + } +} + +static unsigned long snp_handle_page_state_change(struct vcpu_svm *svm, struct ghcb *ghcb) +{ + struct snp_page_state_entry *entry; + struct kvm_vcpu *vcpu = &svm->vcpu; + struct snp_page_state_change *info; + int level, op, rc = PSC_UNDEF_ERR; + gpa_t gpa; + + if (!sev_snp_guest(vcpu->kvm)) + goto out; + + if (!setup_vmgexit_scratch(svm, true, sizeof(ghcb->save.sw_scratch))) { + pr_err("vmgexit: scratch area is not setup.\n"); + rc = PSC_INVALID_HDR; + goto out; + } + + info = (struct snp_page_state_change *)svm->ghcb_sa; + entry = &info->entry[info->header.cur_entry]; + + if ((info->header.cur_entry >= VMGEXIT_PSC_MAX_ENTRY) || + (info->header.end_entry >= VMGEXIT_PSC_MAX_ENTRY) || + (info->header.cur_entry > info->header.end_entry)) { + rc = PSC_INVALID_ENTRY; + goto out; + } + + while (info->header.cur_entry <= info->header.end_entry) { + entry = &info->entry[info->header.cur_entry]; + gpa = gfn_to_gpa(entry->gfn); + level = RMP_TO_X86_PG_LEVEL(entry->pagesize); + op = entry->operation; + + if (!IS_ALIGNED(gpa, page_level_size(level))) { + rc = PSC_INVALID_ENTRY; + goto out; + } + + rc = __snp_handle_page_state_change(vcpu, op, gpa, level); + if (rc) + goto out; + + info->header.cur_entry++; + } + +out: + return rc ? map_to_psc_vmgexit_code(rc) : 0; +} + static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm) { struct vmcb_control_area *control = &svm->vmcb->control; @@ -3187,6 +3254,15 @@ int sev_handle_vmgexit(struct kvm_vcpu *vcpu) ret = 1; break; } + case SVM_VMGEXIT_PSC: { + unsigned long rc; + + ret = 1; + + rc = snp_handle_page_state_change(svm, ghcb); + ghcb_set_sw_exit_info_2(ghcb, rc); + break; + } case SVM_VMGEXIT_UNSUPPORTED_EVENT: vcpu_unimpl(vcpu, "vmgexit: unsupported event - exit_info_1=%#llx, exit_info_2=%#llx\n", diff --git a/include/linux/sev.h b/include/linux/sev.h index 82e804a2ee0d..d96900b52aa5 100644 --- a/include/linux/sev.h +++ b/include/linux/sev.h @@ -57,6 +57,9 @@ struct rmpupdate { */ #define FAIL_INUSE 3 +/* RMUPDATE detected 4K page and 2MB page overlap. */ +#define RMPUPDATE_FAIL_OVERLAP 7 + #ifdef CONFIG_AMD_MEM_ENCRYPT struct rmpentry *snp_lookup_page_in_rmptable(struct page *page, int *level); int psmash(struct page *page);