From patchwork Wed Jul 18 06:43:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 142241 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp177565ljj; Tue, 17 Jul 2018 23:43:51 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfvcEhRdWbG9rful1jhod0g8ZANyd2ld6sFmxDar2ioqfi8EYVpCEUK6XX7q9cUMryHT6iz X-Received: by 2002:a62:a119:: with SMTP id b25-v6mr3862451pff.163.1531896231468; Tue, 17 Jul 2018 23:43:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531896231; cv=none; d=google.com; s=arc-20160816; b=Pl+7y0ov1vgETudVgjD1JQiuOi7AhTv0xdvvANq8zWLl5rxRGWU4z1NQ4gspI2RXCD K1p5+rgI7B/ec1cuXOz56VsZ25ZrWBY3eUEP71VJzeKDDDIphHKs80jdnaNW9LqsCBHq cJtjFv9svHHDnun3sZ8/cRKsv+kEZ55uHwrhmA3hwh/TrCF2VBktM3Oqpd8GXoUrKG3l h3XYsiJsot8YyvyqC8dB7ePVZE/t1CNeg4bmt/oD2b3IQjwo1wm8YTFKahu5pGhXilue tlL2EQ11z1YU2JRzbCvNK0IPavBkTTLb5Fs3CgWHmnikBMJbgnzcGttUpRrnmL92E+dv c3pg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=oHL02hiqR4wNYKXWX9KpVqsPtbcwHHOKf5FkMjBlqYM=; b=lZdhTo2xeSdfN+b078z1DRQ4BLNfHhgyhswLYfdPRFuONoWg3CoxG0Asn1+n2o7rKA 1vXwnF8r+6fOhoG4NDa1tl0pe2cvJjkQPhVAZBNWZkoaf6FISNwsrSt1W82dnqTX+os1 3C/EZOn2ju38SsgzsOBN/OIzPcCl48L75Ax0JoH/zjNLVWm6FKnzzH4iZkJIeuEdkTUa /C0iU/y1GNVuePmE1gzDrfOiqSC5ik66IzNaXuaPqwcaXeigwoadWL3QBI7Ur36FUPRf u6ugEjuJZu27IGXG09isgwb5bSLLdDvTbekR039Oc9I23SHFJUmluI03BZx3O+bPgX2/ b4AQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=dPM4VirE; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t21-v6si2753159pgb.553.2018.07.17.23.43.51; Tue, 17 Jul 2018 23:43:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=dPM4VirE; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726985AbeGRHUI (ORCPT + 5 others); Wed, 18 Jul 2018 03:20:08 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:41553 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729010AbeGRHUI (ORCPT ); Wed, 18 Jul 2018 03:20:08 -0400 Received: by mail-wr1-f67.google.com with SMTP id j5-v6so3415715wrr.8 for ; Tue, 17 Jul 2018 23:43:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=AQma1INj9PDjYURj+rLLqne78i7V0ruv9qs3xa+leU0=; b=dPM4VirE34Z7s4dwJRj6na8ombwtmojaSITUtP+xGLiG5SNgYZCLlzxjRhmZX6ZhlX aGsgbCBzQw5ds2xPHDlOuouUGAQrTgqU+ZHrABjcYVM8aYXjy0dWLY5VLk99oQS5JB/F ifGkQS+LB7YGbEsgF6Q1CfbhGJDJifwUVgBkI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=AQma1INj9PDjYURj+rLLqne78i7V0ruv9qs3xa+leU0=; b=jQTHL3qEM3XAvztbK/bYcQqiy4QVjcP72aZjhQNoR2mCzsoTxkU4j2pkGkDZCSOkc7 iNP9wXbwrF7cnA7WYguLnb7ijk6tHwOiZYkqLUpZst15K2wCrDbbw/cicQx9bteYNzYX XqptU5D5r/1hlgC3kLhAKs8JZ8iOzRdU109/iMjiVYEMVOnUOdeG+JcSxmM4Nhk8ZR4v DjErJr+cPBADmO51W5r8KE8RwnUsJF47Xe+hA+ljIyKd/uy72jtHBNEooaGu4v8IIJGO Y11iYiEXDi01Ep/iaMROVbf2Y/2YDduMNpL0yMRPxoWHm/AhZCje7icmdd4Vw/3XdvGw o52A== X-Gm-Message-State: AOUpUlGmqsCUR3gxnlgER1OP/5C6XNtodY9usPu18S3yScpboStdMmos d1i+Drp4SMwv/YPIimJH69Of2w== X-Received: by 2002:adf:8b01:: with SMTP id n1-v6mr3500964wra.282.1531896229031; Tue, 17 Jul 2018 23:43:49 -0700 (PDT) Received: from localhost ([103.249.91.115]) by smtp.gmail.com with ESMTPSA id y102-v6sm2544665wmh.9.2018.07.17.23.43.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Jul 2018 23:43:48 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, vivek.gautam@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, Zhang Rui , Rob Herring , Mark Rutland , linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v8 2/7] dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IP Date: Wed, 18 Jul 2018 12:13:08 +0530 Message-Id: <842b6fb711b9be401a0b3fdb2827dcb8980699b2.1531895128.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We want to create common code for v2 of the TSENS IP block that is used in a large number of Qualcomm SoCs. "qcom,tsens-v2" should be able to handle most of the common functionality start with a common get_temp() function. It is also necessary to split out the memory regions for the TM and SROT register banks because their offsets are not constant across SoC families. Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson Tested-by: Matthias Kaehlcke Reviewed-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson --- .../devicetree/bindings/thermal/qcom-tsens.txt | 31 +++++++++++++++++----- 1 file changed, 25 insertions(+), 6 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt index 06195e8..1d9e8cf 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt @@ -1,18 +1,28 @@ * QCOM SoC Temperature Sensor (TSENS) Required properties: -- compatible : - - "qcom,msm8916-tsens" : For 8916 Family of SoCs - - "qcom,msm8974-tsens" : For 8974 Family of SoCs - - "qcom,msm8996-tsens" : For 8996 Family of SoCs +- compatible: + Must be one of the following: + - "qcom,msm8916-tsens" (MSM8916) + - "qcom,msm8974-tsens" (MSM8974) + - "qcom,msm8996-tsens" (MSM8996) + - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) + - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) + The generic "qcom,tsens-v2" property must be used as a fallback for any SoC + with version 2 of the TSENS IP. MSM8996 is the only exception because the + generic property did not exist when support was added. + +- reg: Address range of the thermal registers. + New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM + register spaces separately, with order being TM before SROT. + See Example 2, below. -- reg: Address range of the thermal registers - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. - #qcom,sensors: Number of sensors in tsens block - Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify nvmem cells -Example: +Example 1 (legacy support before a fallback tsens-v2 property was introduced): tsens: thermal-sensor@900000 { compatible = "qcom,msm8916-tsens"; reg = <0x4a8000 0x2000>; @@ -20,3 +30,12 @@ tsens: thermal-sensor@900000 { nvmem-cell-names = "caldata", "calsel"; #thermal-sensor-cells = <1>; }; + +Example 2 (for any platform containing v2 of the TSENS IP): +tsens0: thermal-sensor@c263000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0xc263000 0x1ff>, /* TM */ + <0xc222000 0x1ff>; /* SROT */ + #qcom,sensors = <13>; + #thermal-sensor-cells = <1>; + }; From patchwork Wed Jul 18 06:43:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 142243 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp177790ljj; Tue, 17 Jul 2018 23:44:08 -0700 (PDT) X-Google-Smtp-Source: AAOMgpe0A3ZcPWo+82OWLjANFyyCKa7P7z/VB7aRS1NuaG/ZFZ70VsduNsgQGxo93gJqFga9e9eK X-Received: by 2002:a63:291:: with SMTP id 139-v6mr4601970pgc.365.1531896248190; Tue, 17 Jul 2018 23:44:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531896248; cv=none; d=google.com; s=arc-20160816; b=JxbUTY12zaGLGjsDykjVKutMjzo+lR/6DKevP0zTU1+bZPkRApR5+ouWykLHeUaYzd yP0HnBgOszll2VqD0LQpiRWLjYgpe7S9vkEdzuhLPJ7Z7vebREmKLfbU/Og2+P56cgKF SPx5j1gk2lkK93wzHF7fFYBN1FKhte8SgLPEZ/eExNJ85wjm1PImHpYm4+o/l1OSccbF PuTeXo3mVoo4a86kIcNsfdnErbLEd6fwE1mnu7kkmtJ5mfbr3EMEJw323l2MkGbYJApt cqd1ruGimqURc33NDBCWDlvlGmM4doBtRKBKTsLWUH5me5u3QhFa3Tq7gmx+zNVGv402 qSpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=MBmPPjf6HVVgw1iKJ/wrdR8GPmJ+DiZZKyKRZwNQNoY=; b=fj0wu2IYTlMwBQUMrw5IdXU1eUBmjVNBDv5m6UCm/GhHG3vV5rmbevTTGdcb80BWNe jNjqEp4NqcnYn08YdECRATPC7UbiqWiQc7EMBuGVGHEj7eoSKo01YB8MhYe0EJEjOrYf hY/0jKkz4/3/tKX8mK+tExDVrUYSjmFIE1bij8Vtie2div59cLGHK9mvVRU6b1eXukgD DX1/e3BqZD9tfOEaCawakMz7D7Sh/VFqVz113hB1754qPUV6jftNxa+/L3vG+jNTcTAY UiA+6gDd1JKrUvPNzH6KQ8PFfE3CZEjBqdw5/XlX52dtVd/J2X5Wq6SMmaeaCMxEetwD e0cg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=YQ1zB8U6; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x63-v6si2665982pfb.352.2018.07.17.23.44.07; Tue, 17 Jul 2018 23:44:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=YQ1zB8U6; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729374AbeGRHUZ (ORCPT + 5 others); Wed, 18 Jul 2018 03:20:25 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:39347 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729324AbeGRHUY (ORCPT ); Wed, 18 Jul 2018 03:20:24 -0400 Received: by mail-wm0-f67.google.com with SMTP id h20-v6so1588079wmb.4 for ; Tue, 17 Jul 2018 23:44:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=oUO1jTYttP/QLbWHGOr2MUnHUZOUMjTQ0O4rLImfJII=; b=YQ1zB8U6wZg3c8D198e2AHWegXFdKLfD26VsNN19w2TRMNlzoNglwKxp48ZG8r9H1k Qy+mD4vuIEf2hEkJpvCUBCd8lCRC1FRKhA8OLmaLk8hdjXQAns56q0cItd/DN/oik5Z7 Kb8a8/3R8fHP0ggd+pHRAK/nQa28FKsQ30TXE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=oUO1jTYttP/QLbWHGOr2MUnHUZOUMjTQ0O4rLImfJII=; b=cGR/K5/zo/6WnT1NelMmNOvkAqMDzhf7Eus3Q7kez96YiE0wa7tB1Ole3etjR7vUjc fmHIx6fwxAOZmRPJfZDlvaD9hs0VAu2nb5KOGHZhf9oRx1GnN/dQpYb+9YtASsHLiHn/ pqZqXylmGmZuI3rJO5ENTb3TEUdhqo2Z+CdXgO3wZYwALn3iK0wkaSsbRu53mHDTjpt2 p/snIjzfziKnVY9U6d7kDnMv4dFkfAP82nTuMhZnTgbRlvXsUl5/M0P5H5VAfYF/WG3y vyHIf09j1px+USMNvhD9PduPLzY9ORPyYdBDmUpWK12IiuieenmNZTJGborxZI8uPOL5 btIA== X-Gm-Message-State: AOUpUlEBvRDAnGNFqZ7azN2ogUyQl67Y7bfYx9tWTnJ3AsSgYJSOcr0y I/usrp64gkIgwxdbHSqGYwNCXA== X-Received: by 2002:a1c:2396:: with SMTP id j144-v6mr725114wmj.26.1531896245241; Tue, 17 Jul 2018 23:44:05 -0700 (PDT) Received: from localhost ([103.249.91.115]) by smtp.gmail.com with ESMTPSA id 35-v6sm2161913wrh.52.2018.07.17.23.44.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Jul 2018 23:44:04 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, vivek.gautam@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 4/7] arm64: dts: msm8996: thermal: Initialise via DT and add second controller Date: Wed, 18 Jul 2018 12:13:10 +0530 Message-Id: <540bcdb06d3e032de903748545076327ebc04026.1531895128.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We also split up the regmap address space into two, for the TM and SROT registers. This was required to deal with different address offsets for the TM and SROT registers across different SoC families. 8996 has two TSENS IP blocks, initialise the second one too. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria Reviewed-by: Bjorn Andersson Tested-by: Matthias Kaehlcke Reviewed-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 8c7f9ca..688e752 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -459,9 +459,19 @@ status = "disabled"; }; - tsens0: thermal-sensor@4a8000 { + tsens0: thermal-sensor@4a9000 { compatible = "qcom,msm8996-tsens"; - reg = <0x4a8000 0x2000>; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + #qcom,sensors = <13>; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@4ad000 { + compatible = "qcom,msm8996-tsens"; + reg = <0x4ad000 0x1000>, /* TM */ + <0x4ac000 0x1000>; /* SROT */ + #qcom,sensors = <8>; #thermal-sensor-cells = <1>; };