From patchwork Tue Jun 1 20:10:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 451722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 364DFC47080 for ; Tue, 1 Jun 2021 20:10:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 19E3A613DD for ; Tue, 1 Jun 2021 20:10:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234656AbhFAUMQ (ORCPT ); Tue, 1 Jun 2021 16:12:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234638AbhFAUMP (ORCPT ); Tue, 1 Jun 2021 16:12:15 -0400 Received: from mail-oo1-xc30.google.com (mail-oo1-xc30.google.com [IPv6:2607:f8b0:4864:20::c30]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75A37C06174A for ; Tue, 1 Jun 2021 13:10:31 -0700 (PDT) Received: by mail-oo1-xc30.google.com with SMTP id j17-20020a4ad6d10000b02901fef5280522so84953oot.0 for ; Tue, 01 Jun 2021 13:10:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QcUUMExtnu0Erc+KV6ZLS5k3H19BD2zY2/L6Th+LVvs=; b=HYrYh1I8tDUYUIrssrpdcJcKrijkLQvDplLmwbrnKEolJDbNUacH0VTBj7j0+iK9ZR 0iqS2Pfr/gQmDjBIyokiAchJiyicRqeWhbna9R0TZM6Ne2G4mYxIUHW5isEyuOfzBmAv 6/vrPBowiFxMhcieAa0tO5HIWEeRGPmvt2WYlk4vuzbMV0YX4muMq4g1dvJcxpHdg1Xm OX4rHlEIru0aL9KjhJ76RbUF8m2An45FTkVNln8cs//jeUiirRVsZ/8gyXuJHFbP6JaB yVVRl/J6OY3N1wg/5ujle+Pptdw87jDeNzvgzaigWVy9sKocS5QmkDNOlAPdLUM8X4fv v7uA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QcUUMExtnu0Erc+KV6ZLS5k3H19BD2zY2/L6Th+LVvs=; b=qP2ZzB2gchYEtj5X+jICJIhXP1rulGR++OAGnfEotnfsXyjYSDM3QlhGOStSLY08t2 zM/QnpbOr2zHKKQVR9FMmg5VRQ4YLyBxmeGKKUITlpiyL4C8Gki5SfoMYPfzBlk6sgqr 9GpY8zUv8EunU/XNJYX2tZd/UiINiR95rKoQLmVIRpjSeeulD1s/ncVm3uwMJpfqnU57 8FF+zTmapht9NUNyMMF5YBwJNOe9zPlG8i7GgNHszSAEFvw1hvyT+0QS9bGbK5agXSPJ BL6k4zTVen0CX3TRMIpUgns/zjkBu0zN2ACLWlknhDgz+KnMJuTFbEctrxsrH0SXXNeg hMmQ== X-Gm-Message-State: AOAM5305jS1zal3lu1Bk4DCGZ+7zqKsrdoG9rCqTBdx9b92IM19hXS/H u+4S08mVTtD+jkFrJMjNlN3liK6pBbI= X-Google-Smtp-Source: ABdhPJyfYNvCuMl5zFmhxki/Kb1XoDS0IsWbq1QMPdOCAgCmGmZJWjuBvTeJiTPly57HWh9iMUewXw== X-Received: by 2002:a4a:d809:: with SMTP id f9mr15514840oov.71.1622578230370; Tue, 01 Jun 2021 13:10:30 -0700 (PDT) Received: from wintermute.localdomain (cpe-76-183-134-35.tx.res.rr.com. [76.183.134.35]) by smtp.gmail.com with ESMTPSA id p25sm468118ood.4.2021.06.01.13.10.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Jun 2021 13:10:29 -0700 (PDT) From: Chris Morgan To: linux-spi@vger.kernel.org Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, p.yadav@ti.com, Chris Morgan Subject: [PATCH v3 1/4] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Date: Tue, 1 Jun 2021 15:10:18 -0500 Message-Id: <20210601201021.4406-2-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210601201021.4406-1-macroalpha82@gmail.com> References: <20210601201021.4406-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Chris Morgan Add bindings for the Rockchip serial flash controller. New device specific parameter of rockchip,sfc-no-dma included in documentation. Signed-off-by: Chris Morgan --- .../devicetree/bindings/spi/rockchip,sfc.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/rockchip,sfc.yaml diff --git a/Documentation/devicetree/bindings/spi/rockchip,sfc.yaml b/Documentation/devicetree/bindings/spi/rockchip,sfc.yaml new file mode 100644 index 000000000000..d5f8edd621ae --- /dev/null +++ b/Documentation/devicetree/bindings/spi/rockchip,sfc.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/rockchip,sfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Serial Flash Controller (SFC) + +maintainers: + - Heiko Stuebner + - Chris Morgan + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + oneOf: + - const: rockchip,px30-sfc + - const: rockchip,rk1806-sfc + - const: rockchip,rk1808-sfc + - const: rockchip,rk312x-sfc + - const: rockchip,rk3308-sfc + - const: rockchip,rv1108-sfc + - items: + - const: rockchip,rk3036-sfc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + items: + - const: ahb + - const: sfc + + power-domains: + maxItems: 1 + + rockchip,sfc-no-dma: + vendor,bool-property: + descrption: Boolean value for disabling DMA + type: boolean + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + sfc: spi@ff3a0000 { + compatible = "rockchip,px30-sfc","rockchip,rk3036-sfc"; + reg = <0x0 0xff3a0000 0x0 0x4000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "sfc", "ahb"; + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; + pinctrl-names = "default"; + power-domains = <&power PX30_PD_MMC_NAND>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <108000000>; + reg = <0>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + }; + }; + +... From patchwork Tue Jun 1 20:10:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 451721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39AD4C47093 for ; Tue, 1 Jun 2021 20:10:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 22B87613DE for ; Tue, 1 Jun 2021 20:10:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234513AbhFAUMS (ORCPT ); Tue, 1 Jun 2021 16:12:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234671AbhFAUMQ (ORCPT ); Tue, 1 Jun 2021 16:12:16 -0400 Received: from mail-oi1-x230.google.com (mail-oi1-x230.google.com [IPv6:2607:f8b0:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04DF1C06175F for ; Tue, 1 Jun 2021 13:10:34 -0700 (PDT) Received: by mail-oi1-x230.google.com with SMTP id b25so625646oic.0 for ; Tue, 01 Jun 2021 13:10:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SJn5FRuw/EiIvtLinsK2GbKy9tMV7GDq0Fhvm6NhLVg=; b=JX1cphjxSijfmB4ZAnLWJ7O6M0wZJXlUNzB8TuxqJSrXdYuuUGIBUujhQ9jGLh1oUj NYX6sr63ZZ6Kv3rtBHlfjFw9J9DD6SnGws2WcyuFc6nqCeSh12fdfV//wXT+kPMf5EWu 5zQ+cCqVzgeUnOL35f/WPhy2iy3Q3sjE3aNF7KVigcSYRjhyD0dy0AcAkz+BIfDsCKX5 4VuDfFRChojJSMiueCNIuZSs6EjhBPg0DoVRHhaHusx2aHlA0GzZJEL7U+wrhkSUFXRO 0/44o+Fhd6d5sHIPUY/eLiwvDCUI7QJM8+i/TRxDm2k2R2nFMjG+knAwYHDtZNUr1I0y CNpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SJn5FRuw/EiIvtLinsK2GbKy9tMV7GDq0Fhvm6NhLVg=; b=mo4zKVUg1syXqaJylNFaUjlOI8uVDhzUBpjSFotApN5+P0GP1dtrkUzJuxDpsahXSH A+py700/jlFxD6pxexUsh4qjwzK3pzzTzQ+trNAsO7npACBga0M0KuH80mCKTa9aHMqP PZ6995ZyJcjNd9+o8KfiY5gsO5HxsQ6NNurR1UGhuFJJ3PqQahKKpYoMBxsv0vivNJBY zeOxf0vnmXnm62lpv7L5MucUbvjkXIfC1n3bKz5d85LxgMhS5qQN/R9SiiF0c0yjGt8G aw5XeJPA45FkZb53s7vHV0H8z2n0zysm6+F+dBHo35D1BkQhcdDi3ukLLTZoP+HfVaRd SYrg== X-Gm-Message-State: AOAM533xQJbIamQ4X8kQi9xLzXpcv6vrttoL18YLTAI8MZc+a5Kjq6Hs jy5v6YEOhYAw1BugKdlnPomzJcxtTvQ= X-Google-Smtp-Source: ABdhPJxOcxQ4KlMkRDkgNCMadsKgeZ8Bb4XeVjMZjVMIqSt4wFGX9j3RuwSR/zSMLzQPwYm4Qzrezw== X-Received: by 2002:aca:d18:: with SMTP id 24mr1189511oin.56.1622578232856; Tue, 01 Jun 2021 13:10:32 -0700 (PDT) Received: from wintermute.localdomain (cpe-76-183-134-35.tx.res.rr.com. [76.183.134.35]) by smtp.gmail.com with ESMTPSA id p25sm468118ood.4.2021.06.01.13.10.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Jun 2021 13:10:32 -0700 (PDT) From: Chris Morgan To: linux-spi@vger.kernel.org Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, p.yadav@ti.com, Chris Morgan Subject: [PATCH v3 3/4] arm64: dts: rockchip: Add SFC to PX30 Date: Tue, 1 Jun 2021 15:10:20 -0500 Message-Id: <20210601201021.4406-4-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210601201021.4406-1-macroalpha82@gmail.com> References: <20210601201021.4406-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Chris Morgan Add a devicetree entry for the Rockchip SFC for the PX30 SOC. Signed-off-by: Chris Morgan --- arch/arm64/boot/dts/rockchip/px30.dtsi | 38 ++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 09baa8a167ce..1f4feb53e270 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -966,6 +966,18 @@ emmc: mmc@ff390000 { status = "disabled"; }; + sfc: spi@ff3a0000 { + compatible = "rockchip,px30-sfc","rockchip,rk3036-sfc"; + reg = <0x0 0xff3a0000 0x0 0x4000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "sfc", "ahb"; + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus4>; + pinctrl-names = "default"; + power-domains = <&power PX30_PD_MMC_NAND>; + status = "disabled"; + }; + nfc: nand-controller@ff3b0000 { compatible = "rockchip,px30-nfc"; reg = <0x0 0xff3b0000 0x0 0x4000>; @@ -1967,6 +1979,32 @@ flash_bus8: flash-bus8 { }; }; + serial_flash { + sfc_bus4: sfc-bus4 { + rockchip,pins = + <1 RK_PA0 3 &pcfg_pull_none>, + <1 RK_PA1 3 &pcfg_pull_none>, + <1 RK_PA2 3 &pcfg_pull_none>, + <1 RK_PA3 3 &pcfg_pull_none>; + }; + + sfc_bus2: sfc-bus2 { + rockchip,pins = + <1 RK_PA0 3 &pcfg_pull_none>, + <1 RK_PA1 3 &pcfg_pull_none>; + }; + + sfc_cs: sfc-cs { + rockchip,pins = + <1 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = + <1 RK_PB1 3 &pcfg_pull_none>; + }; + }; + lcdc { lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin { rockchip,pins = From patchwork Tue Jun 1 20:10:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 451720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB77BC47080 for ; Tue, 1 Jun 2021 20:10:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C66E660FD8 for ; Tue, 1 Jun 2021 20:10:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234671AbhFAUMS (ORCPT ); Tue, 1 Jun 2021 16:12:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234707AbhFAUMR (ORCPT ); Tue, 1 Jun 2021 16:12:17 -0400 Received: from mail-oi1-x234.google.com (mail-oi1-x234.google.com [IPv6:2607:f8b0:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BEDEC061574 for ; Tue, 1 Jun 2021 13:10:35 -0700 (PDT) Received: by mail-oi1-x234.google.com with SMTP id u11so591423oiv.1 for ; Tue, 01 Jun 2021 13:10:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=S1IlgvnVJwHgpqMHaCMFQfQ+LU3PHCxwl3hNw4XjuSw=; b=EeNU8PFN5nikWcHPD/AwUBoiScDgl3EWWa8zrjb9U/cIEJaY/YIDjVHe2I+r9DlqRz keTAwHu+jIwm+1KlgwWXVTU6efE2liPqXwTj2+SqgtNecF85PawwDOJ+CD2PnjSEJpRM Hho76fCx8UppcH6i+Y2LYtrUGMIZjP6pbStqRwo/EEdDqyYlu03GH4zXLTNpxUu7LpW3 cMCwetoqLRXuJ3YcBIbMVwMtyek4TGjTprNx8g4DQP4ZLQuip7yEDnnBZ+B9rRavhwOu 5/OsJ2FecXsBtzrQOa94o9MZDjM+jP+O8QLEcDmgLkduywyVbnLhZPmKjpIWuypuioHy ZlHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S1IlgvnVJwHgpqMHaCMFQfQ+LU3PHCxwl3hNw4XjuSw=; b=jMWh/DJD3rMOLH+LuvsJyiNJFrnC1MUd5SNunhP7mqBuJ272FlGVQwPA94PEcoiinw 3EswX1YMeqbgrPazIIMus6XuGsUdL5th7PCEcKUEDRaNpYXqt8Izju0KHHQhHjHylhwD yDIKc4KpfcNMES7Ru5N3inuW1A7cz35l2ohcVHhOOQzZyuxGeBNr9b3UsXE6OsAOu3JT HGuqELTr2y5CZMaGvbZiiuZVRoVFXLOjHsn9Nsn+Fdy5MfM6oU3qpPK78z6sl7kejZE+ mIyCVI99uJSFWL/fQ5ZP+4pAdnQKST2UkjFYkObMm1CWSjW2+SGzZpu8epcfbfxj2b3Z f4BA== X-Gm-Message-State: AOAM533ftoW5O3x/iOAV4ix8a6nRQO8qkN9OEdef6mzTzNrc3oqdyfbx yTwZlp8E5KaLJFPuVZD+IDb9JoWVAqA= X-Google-Smtp-Source: ABdhPJz9bgTRA0/4PRS/IEFOuAyN5MObDSPJSbOquTl1lnc/ePqcF0ozUNWfTLHywvolDHjhWICuXg== X-Received: by 2002:aca:1c18:: with SMTP id c24mr7158644oic.139.1622578234094; Tue, 01 Jun 2021 13:10:34 -0700 (PDT) Received: from wintermute.localdomain (cpe-76-183-134-35.tx.res.rr.com. [76.183.134.35]) by smtp.gmail.com with ESMTPSA id p25sm468118ood.4.2021.06.01.13.10.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Jun 2021 13:10:33 -0700 (PDT) From: Chris Morgan To: linux-spi@vger.kernel.org Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, p.yadav@ti.com, Chris Morgan Subject: [PATCH v4 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Date: Tue, 1 Jun 2021 15:10:21 -0500 Message-Id: <20210601201021.4406-5-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210601201021.4406-1-macroalpha82@gmail.com> References: <20210601201021.4406-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Chris Morgan This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx and tx bus width is set to 2 for this reason. Signed-off-by: Chris Morgan --- .../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts index 49c97f76df77..46f1d2f356cc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts @@ -484,6 +484,22 @@ &sdmmc { status = "okay"; }; +&sfc { + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <108000000>; + reg = <0>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + }; +}; + &tsadc { status = "okay"; };