From patchwork Mon May 31 12:51:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 450614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88283C4708F for ; Mon, 31 May 2021 12:51:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6194B61287 for ; Mon, 31 May 2021 12:51:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231564AbhEaMxe (ORCPT ); Mon, 31 May 2021 08:53:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231330AbhEaMxd (ORCPT ); Mon, 31 May 2021 08:53:33 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0AD8C061760 for ; Mon, 31 May 2021 05:51:53 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id h24so12602165ejy.2 for ; Mon, 31 May 2021 05:51:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HnsBV9+SaqA7SSr/e4/pLlJDmVEvCyduIpG+v1vPt2g=; b=cHGn2PdV4mfXdgm+mq8KEZsSF/uJCdptXmE+2LkSBGKKcSRuofv/OOLd+XhDhHd8TX ZlJoaoVhyxbl/3+IEEmSgUg6fpg0TnfCJUQ2eWkMrBFvN3EmdQGFJtFZyj6BWqBSzvAK USd70VTYrPM/ATe76tVQ92tZ2ieIdIFT30hOqAHfo3CE5CPl9SU0yjRLTNSa+5Thvoq2 gT1Fm+Ae9c4EghtnyCsonlYnwfQ4LSKVLUZzgAMZxgwtc0uBTF95GeH6ZnEmiWC3OAYc xi1gZEeYI988rBOaaBQHvSm8r1M2bP1W8l40ofhMQ2DPFViWcdumwLGPwn2MPcAQyOaN BrTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HnsBV9+SaqA7SSr/e4/pLlJDmVEvCyduIpG+v1vPt2g=; b=C14OKOGWlTZQgKneR9UuHaU/IRHKENDkicwGxYG6WGcVA9NVoO7j+v+xKKGhujxYmO bFm3cwqY0EvD+sk+1eej+Aa0+/App/J0eE5xm9QND3dQtQEvlf9/BkkH4OgBj47g58tR DkoCUcIrbw+z/iClPo2CmjCRakIKYIqTPkDAExlVYcGXImbCMqQtFqp4P6T2ZAm1YR9p Y17hkMxeU1zRqLpQ1DgOBbrYWPBBzL7RMoOFW4VFZpcmLvLo8q8P3EYwj/tNDYoj3fnh RFxjQFb/EKN0e7uG32UTognyAAcSKEML35bhK7MTiBC8FBXSd3oJOcTB6mEZDtPDnbpD ulug== X-Gm-Message-State: AOAM530VhQPi4LxqoNBFWmRzYFhMgXcIVsURTXQUqmiXKTaCV+wt1zLt inM6sstl8fVikw4Ztq+oFeOzHA== X-Google-Smtp-Source: ABdhPJwW0GxPhh2pD2DVSxdtCbFZyTAfxzRHgLulAGdQl78QBhK1tX91rhtNO/iJAkZxJQyvZh54OA== X-Received: by 2002:a17:906:4e95:: with SMTP id v21mr8487102eju.434.1622465512351; Mon, 31 May 2021 05:51:52 -0700 (PDT) Received: from localhost.localdomain ([188.252.220.231]) by smtp.googlemail.com with ESMTPSA id zb2sm5886898ejb.52.2021.05.31.05.51.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 May 2021 05:51:51 -0700 (PDT) From: Robert Marko To: lee.jones@linaro.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, p.zabel@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko , Andy Shevchenko Subject: [PATCH v3 2/6] gpio: Add Delta TN48M CPLD GPIO driver Date: Mon, 31 May 2021 14:51:39 +0200 Message-Id: <20210531125143.257622-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210531125143.257622-1-robert.marko@sartura.hr> References: <20210531125143.257622-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M CPLD is used as a GPIO expander for the SFP GPIOs. It is a mix of input only and output only pins. Signed-off-by: Robert Marko Reviewed-by: Andy Shevchenko Acked-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- Changes in v2: * Rewrite to use simple I2C MFD and GPIO regmap * Drop DT bindings for pin numbering drivers/gpio/Kconfig | 12 ++++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-tn48m.c | 89 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 102 insertions(+) create mode 100644 drivers/gpio/gpio-tn48m.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e3607ec4c2e8..472f7764508e 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1310,6 +1310,18 @@ config GPIO_TIMBERDALE help Add support for the GPIO IP in the timberdale FPGA. +config GPIO_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD GPIO driver" + depends on MFD_TN48M_CPLD + select GPIO_REGMAP + help + This enables support for the GPIOs found on the Delta + Networks TN48M switch CPLD. + They are used for inputs and outputs on the SFP slots. + + This driver can also be built as a module. If so, the + module will be called gpio-tn48m. + config GPIO_TPS65086 tristate "TI TPS65086 GPO" depends on MFD_TPS65086 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index c58a90a3c3b1..271fb806475e 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -145,6 +145,7 @@ obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o obj-$(CONFIG_GPIO_THUNDERX) += gpio-thunderx.o obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o +obj-$(CONFIG_GPIO_TN48M_CPLD) += gpio-tn48m.o obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o diff --git a/drivers/gpio/gpio-tn48m.c b/drivers/gpio/gpio-tn48m.c new file mode 100644 index 000000000000..41484c002826 --- /dev/null +++ b/drivers/gpio/gpio-tn48m.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright 2021 Sartura Ltd + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +enum tn48m_gpio_type { + TN48M_SFP_TX_DISABLE = 1, + TN48M_SFP_PRESENT, + TN48M_SFP_LOS, +}; + +static int tn48m_gpio_probe(struct platform_device *pdev) +{ + struct gpio_regmap_config config = {0}; + enum tn48m_gpio_type type; + struct regmap *regmap; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + type = (uintptr_t)device_get_match_data(&pdev->dev); + if (!type) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio = 4; + + switch (type) { + case TN48M_SFP_TX_DISABLE: + config.reg_set_base = base; + break; + case TN48M_SFP_PRESENT: + config.reg_dat_base = base; + break; + case TN48M_SFP_LOS: + config.reg_dat_base = base; + break; + default: + dev_err(&pdev->dev, "unknown type %d\n", type); + return -ENODEV; + } + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id tn48m_gpio_of_match[] = { + { .compatible = "delta,tn48m-gpio-sfp-tx-disable", .data = (void *)TN48M_SFP_TX_DISABLE }, + { .compatible = "delta,tn48m-gpio-sfp-present", .data = (void *)TN48M_SFP_PRESENT }, + { .compatible = "delta,tn48m-gpio-sfp-los", .data = (void *)TN48M_SFP_LOS }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_gpio_of_match); + +static struct platform_driver tn48m_gpio_driver = { + .driver = { + .name = "delta-tn48m-gpio", + .of_match_table = tn48m_gpio_of_match, + }, + .probe = tn48m_gpio_probe, +}; +module_platform_driver(tn48m_gpio_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Mon May 31 12:51:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 450613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58319C47080 for ; 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Mon, 31 May 2021 05:51:55 -0700 (PDT) Received: from localhost.localdomain ([188.252.220.231]) by smtp.googlemail.com with ESMTPSA id zb2sm5886898ejb.52.2021.05.31.05.51.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 May 2021 05:51:55 -0700 (PDT) From: Robert Marko To: lee.jones@linaro.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, p.zabel@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v3 4/6] reset: Add Delta TN48M CPLD reset controller Date: Mon, 31 May 2021 14:51:41 +0200 Message-Id: <20210531125143.257622-4-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210531125143.257622-1-robert.marko@sartura.hr> References: <20210531125143.257622-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M CPLD exposes resets for the following: * 88F7040 SoC * 88F6820 SoC * 98DX3265 switch MAC-s * 88E1680 PHY-s * 88E1512 PHY * PoE PSE controller Signed-off-by: Robert Marko --- drivers/reset/Kconfig | 9 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-tn48m.c | 128 ++++++++++++++++++++++++++++++++++++ 3 files changed, 138 insertions(+) create mode 100644 drivers/reset/reset-tn48m.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 4171c6f76385..e3ff4b020c96 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -64,6 +64,15 @@ config RESET_BRCMSTB_RESCAL This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on BCM7216. +config RESET_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD reset controller" + depends on MFD_TN48M_CPLD + help + This enables the reset controller driver for the Delta TN48M CPLD. + It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X + switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and + Microchip PD69200 PoE PSE controller. + config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on HAS_IOMEM diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 65a118a91b27..6d6945638b76 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o +obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o diff --git a/drivers/reset/reset-tn48m.c b/drivers/reset/reset-tn48m.c new file mode 100644 index 000000000000..960ee5f4eb40 --- /dev/null +++ b/drivers/reset/reset-tn48m.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD reset driver + * + * Copyright 2021 Sartura Ltd + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define TN48M_RESET_REG 0x10 + +struct tn48_reset_map { + u8 bit; +}; + +struct tn48_reset_data { + struct reset_controller_dev rcdev; + struct regmap *regmap; +}; + +static const struct tn48_reset_map tn48m_resets[] = { + [CPU_88F7040_RESET] = {0}, + [CPU_88F6820_RESET] = {1}, + [MAC_98DX3265_RESET] = {2}, + [PHY_88E1680_RESET] = {4}, + [PHY_88E1512_RESET] = {6}, + [POE_RESET] = {7}, +}; + +static inline struct tn48_reset_data *to_tn48_reset_data( + struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct tn48_reset_data, rcdev); +} + +static int tn48m_control_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + + return regmap_update_bits(data->regmap, TN48M_RESET_REG, + BIT(tn48m_resets[id].bit), 0); +} + +static int tn48m_control_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return tn48m_control_assert(rcdev, id); +} + +static int tn48m_control_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int regval; + int ret; + + ret = regmap_read(data->regmap, TN48M_RESET_REG, ®val); + if (ret < 0) + return ret; + + if (BIT(tn48m_resets[id].bit) & regval) + return 0; + else + return 1; +} + +static const struct reset_control_ops tn48_reset_ops = { + .reset = tn48m_control_reset, + .assert = tn48m_control_assert, + .status = tn48m_control_status, +}; + +static int tn48m_reset_probe(struct platform_device *pdev) +{ + struct tn48_reset_data *data; + struct regmap *regmap; + + if (!pdev->dev.parent) + return -ENODEV; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = regmap; + + data->rcdev.owner = THIS_MODULE; + data->rcdev.ops = &tn48_reset_ops; + data->rcdev.nr_resets = ARRAY_SIZE(tn48m_resets); + data->rcdev.of_node = pdev->dev.of_node; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +} + +static const struct of_device_id tn48m_reset_of_match[] = { + { .compatible = "delta,tn48m-reset", }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_reset_of_match); + +static struct platform_driver tn48m_reset_driver = { + .driver = { + .name = "delta-tn48m-reset", + .of_match_table = tn48m_reset_of_match, + }, + .probe = tn48m_reset_probe, +}; +module_platform_driver(tn48m_reset_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD reset driver"); +MODULE_LICENSE("GPL"); From patchwork Mon May 31 12:51:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 450612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1365C47080 for ; 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Mon, 31 May 2021 05:51:58 -0700 (PDT) Received: from localhost.localdomain ([188.252.220.231]) by smtp.googlemail.com with ESMTPSA id zb2sm5886898ejb.52.2021.05.31.05.51.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 May 2021 05:51:58 -0700 (PDT) From: Robert Marko To: lee.jones@linaro.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, p.zabel@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org Cc: luka.perkov@sartura.hr, jmp@epiphyte.org, pmenzel@molgen.mpg.de, buczek@molgen.mpg.de, Robert Marko Subject: [PATCH v3 6/6] MAINTAINERS: Add Delta Networks TN48M CPLD drivers Date: Mon, 31 May 2021 14:51:43 +0200 Message-Id: <20210531125143.257622-6-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210531125143.257622-1-robert.marko@sartura.hr> References: <20210531125143.257622-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add maintainers entry for the Delta Networks TN48M CPLD MFD drivers. Signed-off-by: Robert Marko --- Changes in v3: * Add reset driver documentation Changes in v2: * Drop no more existing files MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9450e052f1b1..ea9e82103862 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5096,6 +5096,15 @@ W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git F: drivers/media/platform/sti/delta +DELTA NETWORKS TN48M CPLD DRIVERS +M: Robert Marko +S: Maintained +F: Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml +F: Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml +F: Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml +F: include/dt-bindings/reset/delta,tn48m-reset.h +F: drivers/gpio/gpio-tn48m.c + DENALI NAND DRIVER L: linux-mtd@lists.infradead.org S: Orphan