From patchwork Thu May 27 19:44:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 448870 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp815874jac; Thu, 27 May 2021 12:45:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwL7wNUrcR5r07oWBFVLZfINBrJeXHxodhFzsPutsTAN7rVDoVw7YAJT0zAHFTQHoJBbFN0 X-Received: by 2002:a02:7110:: with SMTP id n16mr4952845jac.69.1622144713451; Thu, 27 May 2021 12:45:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622144713; cv=none; d=google.com; s=arc-20160816; b=uzLP6oiMQCIH9jZKU9Yk51DJsdSWk3PDAFrpcy/0h2FDOQ40K3EvMBHADCb9heFQyy cD9dmB7Uiw2TtJbyeVKclp7+fKuilOMIANfNuhnsLynlOYKPcAcUWwEhlHi+XaAW6qd/ sL1vWPRl8e8jerNS6BFBV4idyMVw4reKkLi8Ea/aEOPAtUkYbvHn0dODNRcKckAlg8Vg FxQ+CTz9OgMigsQRxFBEzOQPlzAZB+RrPkCXxtxtGEaNhvN6G7c+kTQ0sWvGBdgPWXJS FReNPmRCZzvQaEyl6WhdSKa6dOVnTiBwH5kitjACK5siDAtPuAUU8bM8TTcUU7eJCLjS YUXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=SCG8OE5qOIVZQEwlpjsRVT6lDie+7rchIBrbAOlTaWU=; b=qYvxVczqhSgdq47jORgr+h8waS1gRufyOP9Ikn0atIjX2h5skw2itSl75aJATDDgyt feljpP7VHK15G954NeR1IihlZZWtas/itmulS5+MG/bIzObUFiMKS/OSHyvV7T2GRA5L d3Pq48mWD/+4id0AGSg12AYQ8RtyINZVYpYXldSffUmOwsdxN46JWt7r9sdST3Ry1ZGk u0N+tBI7QG3hY2UJ0Snv5MusrpxxAnqTkdLJwsuPFQKC2oGS4Vlt9H0vMbttRNPWGUkE GsEmhno9k8yLUXKsALC6xHqYRGYx3CasZbIU4ImWn0agNdSMe6bdPPpDbpwP1QUIWy92 aerA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p4si3432036ios.73.2021.05.27.12.45.13; Thu, 27 May 2021 12:45:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235473AbhE0Tqj (ORCPT + 17 others); Thu, 27 May 2021 15:46:39 -0400 Received: from relay03.th.seeweb.it ([5.144.164.164]:38785 "EHLO relay03.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235283AbhE0Tqg (ORCPT ); Thu, 27 May 2021 15:46:36 -0400 Received: from localhost.localdomain (83.6.168.57.neoplus.adsl.tpnet.pl [83.6.168.57]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 5C88F20326; Thu, 27 May 2021 21:44:59 +0200 (CEST) From: Konrad Dybcio To: ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Loic Poulain , Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] arch: arm64: dts: msm8996: Rename speedbin node Date: Thu, 27 May 2021 21:44:54 +0200 Message-Id: <20210527194455.782108-1-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Loic Poulain The speedbin value blown in the efuse is used to determine is used to determine the voltage and frequency value for different IPs, including GPU, CPUs... So it's really not a gpu specific information. This patch simply renames 'gpu_speed_bin' node to 'speedbin'. Signed-off-by: Loic Poulain Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.31.1 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 3fc912f587ba..509d5bfec8ad 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -425,7 +425,7 @@ qusb2s_hstx_trim: hstx_trim@24f { bits = <1 4>; }; - gpu_speed_bin: gpu_speed_bin@133 { + speedbin_efuse: speedbin@133 { reg = <0x133 0x1>; bits = <5 3>; }; @@ -724,7 +724,7 @@ gpu: gpu@b00000 { power-domains = <&mmcc GPU_GX_GDSC>; iommus = <&adreno_smmu 0>; - nvmem-cells = <&gpu_speed_bin>; + nvmem-cells = <&speedbin_efuse>; nvmem-cell-names = "speed_bin"; qcom,gpu-quirk-two-pass-use-wfi;