From patchwork Tue Jul 3 06:04:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 141556 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp764365ljj; Mon, 2 Jul 2018 23:05:26 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLUMdvBxrn/6ePal97I/tL55x0aBizo5YjJK3oYFpCi5sT2qBGCpeef7/N96ANFSdh4/Igt X-Received: by 2002:a65:448c:: with SMTP id l12-v6mr23603656pgq.277.1530597926167; Mon, 02 Jul 2018 23:05:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530597926; cv=none; d=google.com; s=arc-20160816; b=WhkOTn55ORonQBDo+D0eec/T2UgH0yzFI5d2YhVPlZHfJ+m/QwUwDuGfs1xFPn0KHl 5i+jRSUj2vdMRUEmQ5x/00BOzx3cAOSY6crjubWjCpnzjOanvxl7kaMuP/u55Ew2j9l3 yKS2Wh94Wa6TmULrJWiCNTqIPgKCoST/uCE8TYfbNN8wQB57OlryJ3d2ma46625XD3oK 8Az8dBtJ1vg6E8sKhfNkkkMz8DMv9Oo8K4Dh1STEapH1/JsFVFR3+p2dkpV3M/DybRkW 4EiZ9s3SW7Lb4newbx4VV/cvULXI8+8Demq6LsjEG1/TE/YleFix8gDIyJVfryxG9jKO LcHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=SqW3KVk47jJYgwdHegb5oWuD1rioefveeEk5Ol2JRis=; b=hg/HE6g/iXoeTo13q3DgPlYdAm9RKMG07vkUB7Kr1Q2uRtlA2sFJz5TtMoq89htibp +ToWgF8u/F+tUiNYvpMcy2XSy1YCHyUxzmcoPSwwaNX/jP/ZL0QB+WjxSVDa3DwFkelJ ZCt1vJhTOMb1NlJ6Vu379J1ZWj4e+NFEkp8VTdVxQbIhcnlfPIDD94G9eOxq8rCtRh9e PMyAyhcdTrW9gvSSAn8w2GP2Oj2k3ikU/3u5hL1V0Iz/4pSPlNUolzeaXclbULqf+4FZ fvdp55TKDj2qmiejbtwGNINjlrdtv/drnWByiriid+vNWbxELB6b6VVJYxI1Di+nALXd ZjAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="EEewNVU/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v21-v6si341839pgn.371.2018.07.02.23.05.25; Mon, 02 Jul 2018 23:05:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="EEewNVU/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754377AbeGCGFV (ORCPT + 31 others); Tue, 3 Jul 2018 02:05:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:48804 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754330AbeGCGFT (ORCPT ); Tue, 3 Jul 2018 02:05:19 -0400 Received: from localhost.localdomain (unknown [171.61.87.109]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9ED8122B3E; Tue, 3 Jul 2018 06:05:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1530597918; bh=vqbdfVIz9JaSHAHJTTY1b9AOAsYF89G7ZnKmi2+m8i8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EEewNVU/lYt9+6SAIXb7U46lorw/YFA4UpGOwYDe4ZTzPYOskc6GygPve+6dDhnIS 5cDRDajxxgXUetXs3MsW4qBLPYw/2du/yzPEiyq/TzDCswgU0jUMsMYFAYaNSChCy9 5Qr8kLLaOcGdpjH4FcS4OfW7iauC8KlP5vf/bGjs= From: Vinod Koul To: linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Bjorn Andersson , Matt Mackall , Herbert Xu , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-msm@vger.kernel.org, Stephen Boyd , Timur Tabi , Vinod Koul Subject: [PATCH v3 3/6] crypto: Add Qcom prng driver Date: Tue, 3 Jul 2018 11:34:31 +0530 Message-Id: <20180703060434.19293-4-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180703060434.19293-1-vkoul@kernel.org> References: <20180703060434.19293-1-vkoul@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This ports the Qcom prng from older hw_random driver. No change of functionality and move from hw_random to crypto APIs is done. Signed-off-by: Vinod Koul --- drivers/crypto/Kconfig | 11 +++ drivers/crypto/Makefile | 1 + drivers/crypto/qcom-rng.c | 208 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 220 insertions(+) create mode 100644 drivers/crypto/qcom-rng.c -- 2.14.4 diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 43cccf6aff61..b8d9e71e550a 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -585,6 +585,17 @@ config CRYPTO_DEV_QCE hardware. To compile this driver as a module, choose M here. The module will be called qcrypto. +config CRYPTO_DEV_QCOM_RNG + tristate "Qualcomm Randon Number Generator Driver" + depends on ARCH_QCOM || COMPILE_TEST + select CRYPTO_RNG + help + This driver provides support for the Random Number + Generator hardware found on Qualcomm SoCs. + + To compile this driver as a module, choose M here. the + module will be called qcom-rng. If unsure, say N. + config CRYPTO_DEV_VMX bool "Support for VMX cryptographic acceleration instructions" depends on PPC64 && VSX diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile index 7ae87b4f6c8d..3602875c4f80 100644 --- a/drivers/crypto/Makefile +++ b/drivers/crypto/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_CRYPTO_DEV_PICOXCELL) += picoxcell_crypto.o obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/ obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/ +obj-$(CONFIG_CRYPTO_DEV_QCOM_RNG) += qcom-rng.o obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/ obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o obj-$(CONFIG_CRYPTO_DEV_SAHARA) += sahara.o diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c new file mode 100644 index 000000000000..e235a35359d3 --- /dev/null +++ b/drivers/crypto/qcom-rng.c @@ -0,0 +1,208 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2017-18 Linaro Limited +// +// Based on msm-rng.c and downstream driver + +#include +#include +#include +#include +#include +#include + +/* Device specific register offsets */ +#define PRNG_DATA_OUT 0x0000 +#define PRNG_STATUS 0x0004 +#define PRNG_LFSR_CFG 0x0100 +#define PRNG_CONFIG 0x0104 + +/* Device specific register masks and config values */ +#define PRNG_LFSR_CFG_MASK 0x0000ffff +#define PRNG_LFSR_CFG_CLOCKS 0x0000dddd +#define PRNG_CONFIG_HW_ENABLE BIT(1) +#define PRNG_STATUS_DATA_AVAIL BIT(0) + +#define MAX_HW_FIFO_DEPTH 16 +#define MAX_HW_FIFO_SIZE (MAX_HW_FIFO_DEPTH * 4) +#define WORD_SZ 4 + +struct qcom_rng { + struct mutex lock; + void __iomem *base; + struct clk *clk; +}; + +struct qcom_rng_ctx { + struct qcom_rng *rng; +}; + +static struct qcom_rng *qcom_rng_dev; + +static int qcom_rng_read(struct qcom_rng *rng, void *data, size_t max) +{ + size_t currsize = 0; + u32 *retdata = data; + u32 val; + + /* read random data from hardware */ + do { + val = readl_relaxed(rng->base + PRNG_STATUS); + if (!(val & PRNG_STATUS_DATA_AVAIL)) + break; + + val = readl_relaxed(rng->base + PRNG_DATA_OUT); + if (!val) + break; + + *retdata++ = val; + currsize += WORD_SZ; + + /* make sure we stay on 32bit boundary */ + if ((max - currsize) < WORD_SZ) + break; + } while (currsize < max); + + return currsize; +} + +static int qcom_rng_generate(struct crypto_rng *tfm, + const u8 *src, unsigned int slen, + u8 *dstn, unsigned int dlen) +{ + struct qcom_rng_ctx *ctx = crypto_rng_ctx(tfm); + struct qcom_rng *rng = ctx->rng; + int ret; + + ret = clk_prepare_enable(rng->clk); + if (ret) + return ret; + + mutex_lock(&rng->lock); + + ret = qcom_rng_read(rng, dstn, dlen); + + mutex_unlock(&rng->lock); + clk_disable_unprepare(rng->clk); + + return 0; +} + +static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed, + unsigned int slen) +{ + return 0; +} + +static int qcom_rng_enable(struct qcom_rng *rng) +{ + u32 val; + int ret; + + ret = clk_prepare_enable(rng->clk); + if (ret) + return ret; + + /* Enable PRNG only if it is not already enabled */ + val = readl_relaxed(rng->base + PRNG_CONFIG); + if (val & PRNG_CONFIG_HW_ENABLE) + goto already_enabled; + + val = readl_relaxed(rng->base + PRNG_LFSR_CFG); + val &= ~PRNG_LFSR_CFG_MASK; + val |= PRNG_LFSR_CFG_CLOCKS; + writel(val, rng->base + PRNG_LFSR_CFG); + + val = readl_relaxed(rng->base + PRNG_CONFIG); + val |= PRNG_CONFIG_HW_ENABLE; + writel(val, rng->base + PRNG_CONFIG); + +already_enabled: + clk_disable_unprepare(rng->clk); + + return 0; +} + +static int qcom_rng_init(struct crypto_tfm *tfm) +{ + struct qcom_rng_ctx *ctx = crypto_tfm_ctx(tfm); + + ctx->rng = qcom_rng_dev; + + return qcom_rng_enable(ctx->rng); +} + +static struct rng_alg qcom_rng_alg = { + .generate = qcom_rng_generate, + .seed = qcom_rng_seed, + .seedsize = 0, + .base = { + .cra_name = "stdrng", + .cra_driver_name = "qcom-rng", + .cra_flags = CRYPTO_ALG_TYPE_RNG, + .cra_priority = 300, + .cra_ctxsize = sizeof(struct qcom_rng_ctx), + .cra_module = THIS_MODULE, + .cra_init = qcom_rng_init, + } +}; + +static int qcom_rng_probe(struct platform_device *pdev) +{ + struct resource *res; + struct qcom_rng *rng; + int ret; + + rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL); + if (!rng) + return -ENOMEM; + + platform_set_drvdata(pdev, rng); + mutex_init(&rng->lock); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + rng->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(rng->base)) + return PTR_ERR(rng->base); + + rng->clk = devm_clk_get(&pdev->dev, "core"); + if (IS_ERR(rng->clk)) + return PTR_ERR(rng->clk); + + qcom_rng_dev = rng; + ret = crypto_register_rng(&qcom_rng_alg); + if (ret) { + dev_err(&pdev->dev, "Register crypto rng failed: %d\n", ret); + qcom_rng_dev = NULL; + } + + return ret; +} + +static int qcom_rng_remove(struct platform_device *pdev) +{ + crypto_unregister_rng(&qcom_rng_alg); + + qcom_rng_dev = NULL; + + return 0; +} + +static const struct of_device_id qcom_rng_of_match[] = { + { .compatible = "qcom,prng" }, + {} +}; +MODULE_DEVICE_TABLE(of, qcom_rng_of_match); + +static struct platform_driver qcom_rng_driver = { + .probe = qcom_rng_probe, + .remove = qcom_rng_remove, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = of_match_ptr(qcom_rng_of_match), + } +}; +module_platform_driver(qcom_rng_driver); + +MODULE_ALIAS("platform:" KBUILD_MODNAME); +MODULE_DESCRIPTION("Qualcomm random number generator driver"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Jul 3 06:04:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 141565 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp764527ljj; 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[209.132.180.67]) by mx.google.com with ESMTP id h4-v6si362140pgm.441.2018.07.02.23.05.33; Mon, 02 Jul 2018 23:05:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Y1g8T5R6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932824AbeGCGF2 (ORCPT + 31 others); Tue, 3 Jul 2018 02:05:28 -0400 Received: from mail.kernel.org ([198.145.29.99]:48878 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754330AbeGCGFZ (ORCPT ); Tue, 3 Jul 2018 02:05:25 -0400 Received: from localhost.localdomain (unknown [171.61.87.109]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 606AE22B3E; Tue, 3 Jul 2018 06:05:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1530597925; bh=8JNS2DZGAsTgZ58HUrqCCs42FBM2QkfnS+kA/MKmZtY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y1g8T5R6acSZ6FJ/ITJ1nk/UHMaCBCb3Cbyaoe3n+CtX9SdrIt3NAJsZX0c0lz4D1 dYVjbtvTPyLLDR4MoMA20QgJ/6EX6+bDO29AYhPyOSd3PlVovHTuQWeKoOGrgZZ5dq Yd+D1V1r8OhmT59wRkwbh61+0N8Ct07wZ9jitqW4= From: Vinod Koul To: linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Bjorn Andersson , Matt Mackall , Herbert Xu , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-msm@vger.kernel.org, Stephen Boyd , Timur Tabi , Vinod Koul Subject: [PATCH v3 5/6] crypto: qcom: Add support for prng-ee Date: Tue, 3 Jul 2018 11:34:33 +0530 Message-Id: <20180703060434.19293-6-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180703060434.19293-1-vkoul@kernel.org> References: <20180703060434.19293-1-vkoul@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Qcom 8996 and later chips features multiple Execution Environments (EE) and secure world is typically responsible for configuring the prng. Add driver data for qcom,prng as 0 and qcom,prng-ee as 1 and use that to skip initialization routine. Signed-off-by: Vinod Koul --- drivers/crypto/qcom-rng.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) -- 2.14.4 diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c index e235a35359d3..fdbbcac7bcb8 100644 --- a/drivers/crypto/qcom-rng.c +++ b/drivers/crypto/qcom-rng.c @@ -30,6 +30,7 @@ struct qcom_rng { struct mutex lock; void __iomem *base; struct clk *clk; + unsigned int skip_init; }; struct qcom_rng_ctx { @@ -128,7 +129,10 @@ static int qcom_rng_init(struct crypto_tfm *tfm) ctx->rng = qcom_rng_dev; - return qcom_rng_enable(ctx->rng); + if (!ctx->rng->skip_init) + return qcom_rng_enable(ctx->rng); + + return 0; } static struct rng_alg qcom_rng_alg = { @@ -168,6 +172,8 @@ static int qcom_rng_probe(struct platform_device *pdev) if (IS_ERR(rng->clk)) return PTR_ERR(rng->clk); + rng->skip_init = (unsigned long)of_device_get_match_data(&pdev->dev); + qcom_rng_dev = rng; ret = crypto_register_rng(&qcom_rng_alg); if (ret) { @@ -188,7 +194,8 @@ static int qcom_rng_remove(struct platform_device *pdev) } static const struct of_device_id qcom_rng_of_match[] = { - { .compatible = "qcom,prng" }, + { .compatible = "qcom,prng", .data = (void *)0}, + { .compatible = "qcom,prng-ee", .data = (void *)1}, {} }; MODULE_DEVICE_TABLE(of, qcom_rng_of_match); From patchwork Tue Jul 3 06:04:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 141539 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp764538ljj; Mon, 2 Jul 2018 23:05:34 -0700 (PDT) X-Google-Smtp-Source: AAOMgpe4MkuSLJoncrxHb1cAc81SeR7m4oftIr+xdAjqL1EETGgIE7hgZZP1x0MRuYC49TUW8TPP X-Received: by 2002:a65:4b4e:: with SMTP id k14-v6mr15646715pgt.31.1530597933914; Mon, 02 Jul 2018 23:05:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530597933; cv=none; d=google.com; s=arc-20160816; b=gWWeCOoRYQzngr2JN4eJ8DUYZxNcdyn8WvSfQaUJNurDnga3O2qGTqkzdrb6NTiZNe FrV+Hmes9cU+aJwaUAbIFDaZbk0holCTQvVdxPl8vzM8uOeHZrf/axsH5rqkfdrc2Zdt C5SDljVIfHR68e/nhUhQfGErXQSXWJnhrD3KQmzERhcXG2GQPcllDNlcatJ5efEkmeaK 89/064HfrwudyyWVKqgRIWN7TCnZva9AzmfzzfohvIlncYBbDCsQ57IykLE0blFM3UGb b3kjpvzYMytiHbQ2o7ePULyVPXHM8Ck1e1uAKU2w/iM6/3JJRQwys75OhUtzaxAj+idP RecA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=e4OmM8lymTlj+yw9dX2hmqXRV2oI84DEHfuTDsTtwQg=; b=S0w2mKCR8meTHG05n8EVNkRIVx6ASO3pnmVuxmB1IW2g/rii7MZSx+cpNiER9/tp+h 7wtDqCZP97EBSdYumGe7JUQivqfbeOXaxAVhqZxWfgcWTj+769o4zOnHncXlRkWgZ9Ar Buug6lRx+QHdj26dezzsqKQaDQKAaFAJCRMl+Z2ZgBR7ub6IsPI2aD3hOZ2sGzY7jPfX 8r57PFPycMU6fAK5D6aV4In0E0uvPR7iPA2eGMYZv0q05cICdAoXS3OStTjUGU5EU3QU nH2C21c+T097tK0YMTutWGmSnjDJKvOfPpQrl/Yssdad7cWYk6FPgVCI5o2v+VDwNVyT m9Kw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=EbSsGKxs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h4-v6si362140pgm.441.2018.07.02.23.05.33; Mon, 02 Jul 2018 23:05:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=EbSsGKxs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754433AbeGCGFb (ORCPT + 31 others); Tue, 3 Jul 2018 02:05:31 -0400 Received: from mail.kernel.org ([198.145.29.99]:48904 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754330AbeGCGF3 (ORCPT ); Tue, 3 Jul 2018 02:05:29 -0400 Received: from localhost.localdomain (unknown [171.61.87.109]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A1ACB2246B; Tue, 3 Jul 2018 06:05:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1530597928; bh=aF3rf44giV/wvjQxhP5XV8IvH31YiGS4j2a0DW/7JAM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EbSsGKxsjEznU5RWPLr8Vfrqh0JKLVCtiqZEeEx7zS5RCcOsq6+8iWqsnfM9SAu8k Dh5s0dXhLOFU18Tv2HkofI5nIBVEqiEH2EiFAibmIVw0kKYJyh2FHlr4/mi5AWb0xh zS6eVxXTeN0hZx+WpseXo08f9keQQuIotUODGSuQ= From: Vinod Koul To: linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Bjorn Andersson , Matt Mackall , Herbert Xu , Arnd Bergmann , Greg Kroah-Hartman , linux-arm-msm@vger.kernel.org, Stephen Boyd , Timur Tabi , Vinod Koul Subject: [PATCH v3 6/6] crypto: qcom: Add ACPI support Date: Tue, 3 Jul 2018 11:34:34 +0530 Message-Id: <20180703060434.19293-7-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180703060434.19293-1-vkoul@kernel.org> References: <20180703060434.19293-1-vkoul@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Timur Tabi Add support for probing on ACPI systems, with ACPI HID QCOM8160. On ACPI systems, clocks are always enabled, the PRNG should already be enabled, and the register region is read-only. The driver only verifies that the hardware is already enabled never tries to disable or configure it. Signed-off-by: Timur Tabi [port to crypto API] Signed-off-by: Vinod Koul --- drivers/crypto/qcom-rng.c | 37 +++++++++++++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 4 deletions(-) -- 2.14.4 diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c index fdbbcac7bcb8..bc0131d130d6 100644 --- a/drivers/crypto/qcom-rng.c +++ b/drivers/crypto/qcom-rng.c @@ -4,6 +4,7 @@ // Based on msm-rng.c and downstream driver #include +#include #include #include #include @@ -154,6 +155,7 @@ static int qcom_rng_probe(struct platform_device *pdev) { struct resource *res; struct qcom_rng *rng; + u32 val; int ret; rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL); @@ -168,11 +170,27 @@ static int qcom_rng_probe(struct platform_device *pdev) if (IS_ERR(rng->base)) return PTR_ERR(rng->base); - rng->clk = devm_clk_get(&pdev->dev, "core"); - if (IS_ERR(rng->clk)) - return PTR_ERR(rng->clk); - rng->skip_init = (unsigned long)of_device_get_match_data(&pdev->dev); + /* + * ACPI systems have v2 hardware. The clocks are always enabled, + * the PRNG register space is read-only and the PRNG should + * already be enabled. + */ + if (has_acpi_companion(&pdev->dev)) { + val = readl(rng->base + PRNG_CONFIG); + if (!(val & PRNG_CONFIG_HW_ENABLE)) { + dev_err(&pdev->dev, "device is not enabled\n"); + return -ENODEV; + } + rng->skip_init = 1; + } else { + rng->clk = devm_clk_get(&pdev->dev, "core"); + if (IS_ERR(rng->clk)) + return PTR_ERR(rng->clk); + + rng->skip_init = + (unsigned long)of_device_get_match_data(&pdev->dev); + } qcom_rng_dev = rng; ret = crypto_register_rng(&qcom_rng_alg); @@ -193,6 +211,16 @@ static int qcom_rng_remove(struct platform_device *pdev) return 0; } +#if IS_ENABLED(CONFIG_ACPI) +static const struct acpi_device_id qcom_rng_acpi_match[] = { + { + .id = "QCOM8160", + }, + {} +}; +MODULE_DEVICE_TABLE(acpi, msm_rng_acpi_match); +#endif + static const struct of_device_id qcom_rng_of_match[] = { { .compatible = "qcom,prng", .data = (void *)0}, { .compatible = "qcom,prng-ee", .data = (void *)1}, @@ -206,6 +234,7 @@ static struct platform_driver qcom_rng_driver = { .driver = { .name = KBUILD_MODNAME, .of_match_table = of_match_ptr(qcom_rng_of_match), + .acpi_match_table = ACPI_PTR(qcom_rng_acpi_match), } }; module_platform_driver(qcom_rng_driver);