From patchwork Mon May 17 20:50:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440223 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1433392jac; Mon, 17 May 2021 13:53:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw5ZzQqDklFTXj/3R0pb8mk5l9VnqicpyCIeozVDJF4FC2QDJydLZ5J+F1UGQ/pJgMBeRVM X-Received: by 2002:a05:6e02:144f:: with SMTP id p15mr1293812ilo.143.1621284809376; Mon, 17 May 2021 13:53:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621284809; cv=none; d=google.com; s=arc-20160816; b=xarEFHRrpTLaCKZwEN3oXzJm7gW6jBkWhmX2wbqooJovROpLulH+ZjtQAUZNRBWSW6 Qgb6i7fBx5s0/9skyCmpkesNgoHBlY2zfj3cB8K8ipetzDp12JQiogiCndQEF7ZjctJf wPm9FJh1Ky5XgaDSMbehX430UU+57QjAdyUNYICCUaTMRvQbPWnbAUiaViyxj95XP+nr inMF6Q4KNhYWFr9wV1IVtN3lLkJlId3vtMuazZT/SO/wU071CvuwfMF0YQb0q6jwonIg 9UrD7tDXHeeG1ZlFhSvLHQTtPfm0et7lgOkOy78NtQyVn+NSJ8YugE51VYuVnPrYWqwp SZww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=2c6ThTlNA3ryImuQ6uSwGbVMW4T6h8STltbSUR/cobw=; b=qfYIgluehyWXno1DfU16c9ExQ686IKE20g2rvWDX/ZbSDDzthLHSRdTRpooE96T/g2 iv19LZp/RItXyywYK2uC6TzmMtubkCwLGj5+348G/TzLZROfEydcf58zhFdDCx8Dm3tc WOhGYxOfTxXzrAMfdh0v4VrWLUNvAoAoW4nyJ7/7TqXZdjEETWH60qrBPFPWKw/h4oQ9 yjw2gIdFheqoy91h/Cotkw0iQqwkPsGX5xXDj78oEvfm9cHrto+PIlAi0YRsDDjCjpjL z0ZxtWmF921akX17QgjIqo54l64KoiHtkbXc9D7W/HvZlM9YxLm7lWjMNYQdexZJDmjq u8Cw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j11si19458811jat.42.2021.05.17.13.53.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:53:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:40570 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likEy-0002Sg-KE for patch@linaro.org; Mon, 17 May 2021 16:53:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45302) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likCN-0002B1-I1; Mon, 17 May 2021 16:50:47 -0400 Received: from [201.28.113.2] (port=31739 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likCH-0000Gd-FS; Mon, 17 May 2021 16:50:47 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:28 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id AC76380139F; Mon, 17 May 2021 17:50:27 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 01/23] target/ppc: Introduce gen_icount_io_start Date: Mon, 17 May 2021 17:50:03 -0300 Message-Id: <20210517205025.3777947-2-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:28.0237 (UTC) FILETIME=[44B3EBD0:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Create a function to handle the details for interacting with icount. Force the exit from the tb via DISAS_TOO_MANY, which allows chaining to the next tb, where the code emitted for gen_tb_start() will determine if we must exit. We can thus remove any matching conditional call to gen_stop_exception. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 174 +++++++++-------------------------------- 1 file changed, 39 insertions(+), 135 deletions(-) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d51a1913a7..060ef83bc0 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -304,6 +304,20 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, ctx->base.is_jmp = DISAS_NORETURN; } +static void gen_icount_io_start(DisasContext *ctx) +{ + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + /* + * An I/O instruction must be last in the TB. + * Chain to the next TB, and let the code from gen_tb_start + * decide if we need to return to the main loop. + * Doing this first also allows this value to be overridden. + */ + ctx->base.is_jmp = DISAS_TOO_MANY; + } +} + /* * Tells the caller what is the appropriate exception to generate and prepares * SPR registers for this exception. @@ -540,24 +554,14 @@ void spr_write_ureg(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) void spr_read_decr(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_decr(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_decr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_decr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } #endif @@ -565,24 +569,14 @@ void spr_write_decr(DisasContext *ctx, int sprn, int gprn) /* Time base */ void spr_read_tbl(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_tbl(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_read_tbu(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_tbu(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_read_atbl(DisasContext *ctx, int gprn, int sprn) @@ -598,24 +592,14 @@ void spr_read_atbu(DisasContext *ctx, int gprn, int sprn) #if !defined(CONFIG_USER_ONLY) void spr_write_tbl(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_tbu(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_atbl(DisasContext *ctx, int sprn, int gprn) @@ -631,80 +615,45 @@ void spr_write_atbu(DisasContext *ctx, int sprn, int gprn) #if defined(TARGET_PPC64) void spr_read_purr(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_purr(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_purr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_purr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } /* HDECR */ void spr_read_hdecr(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_hdecr(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_hdecr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_hdecr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_read_vtb(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_vtb(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_vtb(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_vtb(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_tbu40(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_tbu40(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } #endif @@ -912,71 +861,41 @@ void spr_write_601_ubatl(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) void spr_read_40x_pit(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_40x_pit(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_40x_pit(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_40x_pit(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_store_spr(sprn, cpu_gpr[gprn]); gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]); /* We must stop translation as we may have rebooted */ gen_stop_exception(ctx); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_40x_sler(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_booke_tcr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_booke_tcr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_booke_tsr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_booke_tsr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } #endif @@ -2860,18 +2779,13 @@ static void gen_darn(DisasContext *ctx) if (l > 2) { tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], -1); } else { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); if (l == 0) { gen_helper_darn32(cpu_gpr[rD(ctx->opcode)]); } else { /* Return 64-bit random for both CRN and RRN */ gen_helper_darn64(cpu_gpr[rD(ctx->opcode)]); } - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } } #endif @@ -5013,9 +4927,7 @@ static void gen_rfi(DisasContext *ctx) } /* Restore CPU state */ CHK_SV; - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_update_cfar(ctx, ctx->cia); gen_helper_rfi(cpu_env); ctx->base.is_jmp = DISAS_EXIT; @@ -5030,9 +4942,7 @@ static void gen_rfid(DisasContext *ctx) #else /* Restore CPU state */ CHK_SV; - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_update_cfar(ctx, ctx->cia); gen_helper_rfid(cpu_env); ctx->base.is_jmp = DISAS_EXIT; @@ -5047,9 +4957,7 @@ static void gen_rfscv(DisasContext *ctx) #else /* Restore CPU state */ CHK_SV; - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_update_cfar(ctx, ctx->cia); gen_helper_rfscv(cpu_env); ctx->base.is_jmp = DISAS_EXIT; @@ -5379,9 +5287,7 @@ static void gen_mtmsrd(DisasContext *ctx) CHK_SV; #if !defined(CONFIG_USER_ONLY) - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); if (ctx->opcode & 0x00010000) { /* L=1 form only updates EE and RI */ TCGv t0 = tcg_temp_new(); @@ -5416,9 +5322,7 @@ static void gen_mtmsr(DisasContext *ctx) CHK_SV; #if !defined(CONFIG_USER_ONLY) - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); if (ctx->opcode & 0x00010000) { /* L=1 form only updates EE and RI */ TCGv t0 = tcg_temp_new(); From patchwork Mon May 17 20:50:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440226 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1434890jac; Mon, 17 May 2021 13:55:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwXargxC/4yJNBxj6jaXUcL7h6NVK7avxATEqPa/mifyfrj0FrG4GCMHa1dOEWrIvKjEsmP X-Received: by 2002:a6b:d913:: with SMTP id r19mr1572195ioc.110.1621284952119; Mon, 17 May 2021 13:55:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621284952; cv=none; d=google.com; s=arc-20160816; b=dAaTqy/tL/9l3mkGwNsk02ufuJfkJqOFnjnkhBjyQ2yC2ErWkJBHeTxBkGdgyXSZ2K VbdlfQwDN9Xx+9Q3omjCFnbEB7QpOv4+Nqrh6JXBnq1IfXraZ2SfXZHYQo0I2Wkov15f FnX1aEB6Cv6byOAK9muFKZueUIPBK98k4tCstLHGSQnarqpFbESsT77sFtmzLNqV6kbt dMMpI39JkEbgZdYom2mmZwr6UL7nryh6gIQs3ul+tGgDiIr18LI+QlOgpN9j3Fd73Ih3 e/X6tPh4dthm3eWviUm/1qpK+mcl6pJKoPaAR985Ml1vpVHam0hynIYcJghSnS9q9QMT 3Dsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=d0MWaPgwhiEhmoDGMrGaTBQeFh3pzW0aBHoe+OMos1Q=; b=Eq+VkuhbyclTCI78BAkKgqYOmKBUqR5F1kknxwL+VL4f+tcAQBgRk7bS+EOkEsmRBB QA6TGaUJPW9poMux0cdP8vVuFHKJe+YS7LguDIU5+E/F97yZsI7j4/41rk0qVRYrQd3p mc5jS0W3Z03i/McUGY8Ndgaq6QRpOzVJIjwghLZWzt0aLR9E5+Am/fLqV9MduNRKVWGQ ivJhcaZKWEBsrZb7vmRaOj8wtdpTEHwsDbzYhMjN90dG4tvw4ZoWknIJWdlw3TCmu/tu 7xI+RsHOonIOQb/f7/H/O71Aq2PzH8fEKq9WXyIPdxJBP5xQXAM9G/cSHPk/xYFCrBVv KwQQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p5si20219839ilm.11.2021.05.17.13.55.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:55:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:50596 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likHH-0000yv-FN for patch@linaro.org; Mon, 17 May 2021 16:55:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likCQ-0002GJ-BS; Mon, 17 May 2021 16:50:50 -0400 Received: from [201.28.113.2] (port=31739 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likCO-0000Gd-NL; Mon, 17 May 2021 16:50:50 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:28 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 3640C8000C2; Mon, 17 May 2021 17:50:28 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 02/23] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE Date: Mon, 17 May 2021 17:50:04 -0300 Message-Id: <20210517205025.3777947-3-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:28.0690 (UTC) FILETIME=[44F90B20:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- linux-user/ppc/cpu_loop.c | 3 --- target/ppc/cpu.h | 1 - target/ppc/translate.c | 24 +++++++----------------- 3 files changed, 7 insertions(+), 21 deletions(-) -- 2.25.1 diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index 4a0f6c8dc2..fe526693d2 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env) cpu_abort(cs, "Maintenance exception while in user mode. " "Aborting\n"); break; - case POWERPC_EXCP_STOP: /* stop translation */ - /* We did invalidate the instruction cache. Go on */ - break; case POWERPC_EXCP_BRANCH: /* branch instruction: */ /* We just stopped because of a branch. Go on */ break; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 99ee1e09b2..9e38df685d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -132,7 +132,6 @@ enum { /* EOL */ POWERPC_EXCP_NB = 103, /* QEMU exceptions: used internally during code translation */ - POWERPC_EXCP_STOP = 0x200, /* stop translation */ POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */ /* QEMU exceptions: special cases we want to stop translation */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 060ef83bc0..f57b67be5f 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -369,13 +369,6 @@ static inline void gen_hvpriv_exception(DisasContext *ctx, uint32_t error) gen_exception_err(ctx, POWERPC_EXCP_HV_EMU, POWERPC_EXCP_PRIV | error); } -/* Stop translation */ -static inline void gen_stop_exception(DisasContext *ctx) -{ - gen_update_nip(ctx, ctx->base.pc_next); - ctx->exception = POWERPC_EXCP_STOP; -} - /*****************************************************************************/ /* SPR READ/WRITE CALLBACKS */ @@ -829,7 +822,7 @@ void spr_write_hid0_601(DisasContext *ctx, int sprn, int gprn) { gen_helper_store_hid0_601(cpu_env, cpu_gpr[gprn]); /* Must stop the translation as endianness may have changed */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } #endif @@ -877,7 +870,7 @@ void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn) gen_store_spr(sprn, cpu_gpr[gprn]); gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]); /* We must stop translation as we may have rebooted */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn) @@ -4080,7 +4073,7 @@ static void gen_isync(DisasContext *ctx) gen_check_tlb_flush(ctx, false); } tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } #define MEMOP_GET_SIZE(x) (1 << ((x) & MO_SIZE)) @@ -5312,7 +5305,7 @@ static void gen_mtmsrd(DisasContext *ctx) gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]); } /* Must stop the translation as machine state (may have) changed */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; #endif /* !defined(CONFIG_USER_ONLY) */ } #endif /* defined(TARGET_PPC64) */ @@ -5355,7 +5348,7 @@ static void gen_mtmsr(DisasContext *ctx) tcg_temp_free(msr); } /* Must stop the translation as machine state (may have) changed */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; #endif } @@ -7492,7 +7485,7 @@ static void gen_wrtee(DisasContext *ctx) * Stop translation to have a chance to raise an exception if we * just set msr_ee to 1 */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -7506,7 +7499,7 @@ static void gen_wrteei(DisasContext *ctx) if (ctx->opcode & 0x00008000) { tcg_gen_ori_tl(cpu_msr, cpu_msr, (1 << MSR_EE)); /* Stop translation to have a chance to raise an exception */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } else { tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE)); } @@ -9128,9 +9121,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) case POWERPC_EXCP_BRANCH: ctx->base.is_jmp = DISAS_NORETURN; break; - case POWERPC_EXCP_STOP: - ctx->base.is_jmp = DISAS_EXIT; - break; default: /* Every other ctx->exception should have set NORETURN. */ g_assert_not_reached(); From patchwork Mon May 17 20:50:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. 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[209.51.188.17]) by mx.google.com with ESMTPS id g5si1629082jan.100.2021.05.17.13.54.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:54:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:45578 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likG9-0005yI-64 for patch@linaro.org; Mon, 17 May 2021 16:54:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45758) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDW-00047m-FQ; Mon, 17 May 2021 16:51:58 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDU-00013X-90; Mon, 17 May 2021 16:51:58 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:29 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id A7AFE80139F; Mon, 17 May 2021 17:50:28 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 03/23] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN Date: Mon, 17 May 2021 17:50:05 -0300 Message-Id: <20210517205025.3777947-4-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:29.0174 (UTC) FILETIME=[4542E560:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The translation of branch instructions always results in exit from the TB. Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- linux-user/ppc/cpu_loop.c | 3 --- target/ppc/cpu.h | 2 -- target/ppc/translate.c | 8 ++------ 3 files changed, 2 insertions(+), 11 deletions(-) -- 2.25.1 diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index fe526693d2..fa91ea0eed 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env) cpu_abort(cs, "Maintenance exception while in user mode. " "Aborting\n"); break; - case POWERPC_EXCP_BRANCH: /* branch instruction: */ - /* We just stopped because of a branch. Go on */ - break; case POWERPC_EXCP_SYSCALL_USER: /* system call in user-mode emulation */ /* WARNING: diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 9e38df685d..cab33a3680 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -131,8 +131,6 @@ enum { POWERPC_EXCP_SYSCALL_VECTORED = 102, /* scv exception */ /* EOL */ POWERPC_EXCP_NB = 103, - /* QEMU exceptions: used internally during code translation */ - POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */ /* QEMU exceptions: special cases we want to stop translation */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ }; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index f57b67be5f..d019454550 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4692,7 +4692,6 @@ static void gen_b(DisasContext *ctx) { target_ulong li, target; - ctx->exception = POWERPC_EXCP_BRANCH; /* sign extend LI */ li = LI(ctx->opcode); li = (li ^ 0x02000000) - 0x02000000; @@ -4706,6 +4705,7 @@ static void gen_b(DisasContext *ctx) } gen_update_cfar(ctx, ctx->cia); gen_goto_tb(ctx, 0, target); + ctx->base.is_jmp = DISAS_NORETURN; } #define BCOND_IM 0 @@ -4718,7 +4718,6 @@ static void gen_bcond(DisasContext *ctx, int type) uint32_t bo = BO(ctx->opcode); TCGLabel *l1; TCGv target; - ctx->exception = POWERPC_EXCP_BRANCH; if (type == BCOND_LR || type == BCOND_CTR || type == BCOND_TAR) { target = tcg_temp_local_new(); @@ -4825,6 +4824,7 @@ static void gen_bcond(DisasContext *ctx, int type) gen_set_label(l1); gen_goto_tb(ctx, 1, ctx->base.pc_next); } + ctx->base.is_jmp = DISAS_NORETURN; } static void gen_bc(DisasContext *ctx) @@ -9102,7 +9102,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->exception != POWERPC_EXCP_BRANCH && ctx->base.is_jmp != DISAS_NORETURN)) { uint32_t excp = gen_prep_dbgex(ctx); gen_exception_nip(ctx, excp, ctx->base.pc_next); @@ -9118,9 +9117,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) switch (ctx->exception) { case POWERPC_EXCP_NONE: break; - case POWERPC_EXCP_BRANCH: - ctx->base.is_jmp = DISAS_NORETURN; - break; default: /* Every other ctx->exception should have set NORETURN. */ g_assert_not_reached(); From patchwork Mon May 17 20:50:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440224 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1433882jac; Mon, 17 May 2021 13:54:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwzzonmMDAM3xxAk9yoWmlCqYw/afxHuUf28axqkMvfEWDohsujtQB6TQXAkkt+r4tFvkar X-Received: by 2002:a02:54c1:: with SMTP id t184mr1854215jaa.79.1621284859461; Mon, 17 May 2021 13:54:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621284859; cv=none; d=google.com; s=arc-20160816; b=f8m2OnsaMNPHwLGDVSZGWbvBkE+LQ3eKsZg3nMdj4NglJkahkdlz7pvxlOE/mK0SK3 +VUR57mTeWysuT53CEoTM3ntmUzpKUHQWHEKNeV6uu+KpXlXr62GkaVSZPzafG1Fcysl CERNk2V9FaZvRYFM2tJgxT36+H/wzUiuyc1+/pUH4nib/hqvSAyR1y1296iZEhRVRsX8 wsjfcWN3Ox8ui4W6hJqpq0ZG6okJ9iW68c0drbWnazh1O1vhaMAiMEcBygxiED3zLF6m gpZ1CQGYdkzy7cG3qsFKHBl1Nm2t/kzU+FcgreSnpTm+Ni9WT/+p5YgLAtAglaXhXBtd uJ2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=mcSLkFwfVgk6vAR+p/LbzPWFb76NvAiuEnIo1hfCw18=; b=dWjRwQ4N0u+/v2Opr+Ls7XBjl4XtH/BvIezhUbrTkSAYRvo3vTfnUD67RYp75XWEwX dlrXsVF/BxKDqQKJxgQs4ingCOoDbvUjDSbeqtussqje5lRuQdEZoGovHVP6RyVtpoDD gwT+L4weXcF+IU+O4try5v7pUMj7N47Zj8FUC3bz7zo18WQAcH9BrESfIRaQq7O3tv4n NhLlHnja8bHXEMYXt+xS4AqZw6xsImEVymYIV1mAevd0ijYszG6jtu8qUk/s1U1ly7m5 33QXJES3pDmPCEv53t6K6inBGp12ywa/vVbgiB6cJ/jR3vzosYxi3LLdgNWB4/2YsN4d u93A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a5si10797568ilh.94.2021.05.17.13.54.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:54:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43302 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likFm-0004Kz-R0 for patch@linaro.org; Mon, 17 May 2021 16:54:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45772) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDa-0004FG-3k; Mon, 17 May 2021 16:52:02 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDX-00013X-Hr; Mon, 17 May 2021 16:52:00 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:29 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 29A6E8000C2; Mon, 17 May 2021 17:50:29 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 04/23] target/ppc: Remove DisasContext.exception Date: Mon, 17 May 2021 17:50:06 -0300 Message-Id: <20210517205025.3777947-5-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:29.0643 (UTC) FILETIME=[458A75B0:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Now that we have removed all of the fake exceptions, and all real exceptions exit via DISAS_NORETURN, we can remove this field. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 30 ++++-------------------------- 1 file changed, 4 insertions(+), 26 deletions(-) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d019454550..80cd11b3f8 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -159,7 +159,6 @@ struct DisasContext { DisasContextBase base; target_ulong cia; /* current instruction address */ uint32_t opcode; - uint32_t exception; /* Routine used to access memory */ bool pr, hv, dr, le_mode; bool lazy_tlb_flush; @@ -261,15 +260,12 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) * These are all synchronous exceptions, we set the PC back to the * faulting instruction */ - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->cia); - } + gen_update_nip(ctx, ctx->cia); t0 = tcg_const_i32(excp); t1 = tcg_const_i32(error); gen_helper_raise_exception_err(cpu_env, t0, t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - ctx->exception = excp; ctx->base.is_jmp = DISAS_NORETURN; } @@ -281,13 +277,10 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) * These are all synchronous exceptions, we set the PC back to the * faulting instruction */ - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->cia); - } + gen_update_nip(ctx, ctx->cia); t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = excp; ctx->base.is_jmp = DISAS_NORETURN; } @@ -300,7 +293,6 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = excp; ctx->base.is_jmp = DISAS_NORETURN; } @@ -4993,13 +4985,10 @@ static void gen_scv(DisasContext *ctx) uint32_t lev = (ctx->opcode >> 5) & 0x7F; /* Set the PC back to the faulting instruction. */ - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->cia); - } + gen_update_nip(ctx, ctx->cia); gen_helper_scv(cpu_env, tcg_constant_i32(lev)); - /* This need not be exact, just not POWERPC_EXCP_NONE */ - ctx->exception = POWERPC_SYSCALL_VECTORED; + ctx->base.is_jmp = DISAS_NORETURN; } #endif #endif @@ -9005,7 +8994,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) uint32_t hflags = ctx->base.tb->flags; int bound; - ctx->exception = POWERPC_EXCP_NONE; ctx->spr_cb = env->spr_cb; ctx->pr = (hflags >> HFLAGS_PR) & 1; ctx->mem_idx = (hflags >> HFLAGS_DMMU_IDX) & 7; @@ -9112,16 +9100,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) "temporaries\n", opc1(ctx->opcode), opc2(ctx->opcode), opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); } - - if (ctx->base.is_jmp == DISAS_NEXT) { - switch (ctx->exception) { - case POWERPC_EXCP_NONE: - break; - default: - /* Every other ctx->exception should have set NORETURN. */ - g_assert_not_reached(); - } - } } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) From patchwork Mon May 17 20:50:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. 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[209.51.188.17]) by mx.google.com with ESMTPS id y3si18573337iom.73.2021.05.17.13.56.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:56:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:54908 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likIA-0003wS-5w for patch@linaro.org; Mon, 17 May 2021 16:56:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45802) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDf-0004IO-5E; Mon, 17 May 2021 16:52:07 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDa-00013X-4i; Mon, 17 May 2021 16:52:03 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:30 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 9B0E480139F; Mon, 17 May 2021 17:50:29 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 05/23] target/ppc: Move single-step check to ppc_tr_tb_stop Date: Mon, 17 May 2021 17:50:07 -0300 Message-Id: <20210517205025.3777947-6-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:30.0081 (UTC) FILETIME=[45CD4B10:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson When single-stepping, force max_insns to 1 in init_disas so that we exit the translation loop immediately. Combine the single-step checks in tb_stop, and give the gdb exception priority over the cpu exception, just as we already do in gen_lookup_and_goto_ptr. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 80cd11b3f8..05e3c0417a 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -8992,7 +8992,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); CPUPPCState *env = cs->env_ptr; uint32_t hflags = ctx->base.tb->flags; - int bound; ctx->spr_cb = env->spr_cb; ctx->pr = (hflags >> HFLAGS_PR) & 1; @@ -9032,8 +9031,12 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->singlestep_enabled |= GDBSTUB_SINGLE_STEP; } - bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; - ctx->base.max_insns = MIN(ctx->base.max_insns, bound); + if (ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP)) { + ctx->base.max_insns = 1; + } else { + int bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; + ctx->base.max_insns = MIN(ctx->base.max_insns, bound); + } } static void ppc_tr_tb_start(DisasContextBase *db, CPUState *cs) @@ -9087,14 +9090,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) handler->count++; #endif - /* Check trace mode exceptions */ - if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && - (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->base.is_jmp != DISAS_NORETURN)) { - uint32_t excp = gen_prep_dbgex(ctx); - gen_exception_nip(ctx, excp, ctx->base.pc_next); - } - if (tcg_check_temp_count()) { qemu_log("Opcode %02x %02x %02x %02x (%08x) leaked " "temporaries\n", opc1(ctx->opcode), opc2(ctx->opcode), @@ -9107,6 +9102,7 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); DisasJumpType is_jmp = ctx->base.is_jmp; target_ulong nip = ctx->base.pc_next; + int sse; if (is_jmp == DISAS_NORETURN) { /* We have already exited the TB. */ @@ -9114,7 +9110,8 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) } /* Honor single stepping. */ - if (unlikely(ctx->base.singlestep_enabled)) { + sse = ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP); + if (unlikely(sse)) { switch (is_jmp) { case DISAS_TOO_MANY: case DISAS_EXIT_UPDATE: @@ -9127,8 +9124,16 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) default: g_assert_not_reached(); } - gen_debug_exception(ctx); - return; + + if (sse & GDBSTUB_SINGLE_STEP) { + gen_debug_exception(ctx); + return; + } + /* else CPU_SINGLE_STEP... */ + if (nip <= 0x100 || nip > 0xf00) { + gen_exception(ctx, gen_prep_dbgex(ctx)); + return; + } } switch (is_jmp) { From patchwork Mon May 17 20:50:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. 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[209.51.188.17]) by mx.google.com with ESMTPS id y10si11871912jan.19.2021.05.17.13.56.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:56:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:50962 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likHQ-0001Dd-1q for patch@linaro.org; Mon, 17 May 2021 16:56:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45834) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDh-0004Pt-Kt; Mon, 17 May 2021 16:52:09 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDg-00013X-9j; Mon, 17 May 2021 16:52:09 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:30 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 132928000C2; Mon, 17 May 2021 17:50:30 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 06/23] target/ppc: Tidy exception vs exit_tb Date: Mon, 17 May 2021 17:50:08 -0300 Message-Id: <20210517205025.3777947-7-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:30.0534 (UTC) FILETIME=[46126A60:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We do not need to emit an exit_tb after an exception, as the latter will exit via longjmp. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 05e3c0417a..e68152810e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4648,8 +4648,9 @@ static void gen_lookup_and_goto_ptr(DisasContext *ctx) } else if (sse & (CPU_SINGLE_STEP | CPU_BRANCH_STEP)) { uint32_t excp = gen_prep_dbgex(ctx); gen_exception(ctx, excp); + } else { + tcg_gen_exit_tb(NULL, 0); } - tcg_gen_exit_tb(NULL, 0); } else { tcg_gen_lookup_and_goto_ptr(); } From patchwork Mon May 17 20:50:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440228 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1435268jac; Mon, 17 May 2021 13:56:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTbnf9V1A47Dt3oSByh/YfajOOs+KQcadzs8zM13ZcC/RWh13Qr6mythvyDAXLd8+sUnZa X-Received: by 2002:a02:a1dd:: with SMTP id o29mr1861571jah.112.1621284996333; Mon, 17 May 2021 13:56:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621284996; cv=none; d=google.com; s=arc-20160816; b=tKRR9hoUv9lncTgmRgXzjNHwfgXEX+WZGUrCYy27Xd7Cf7n+0vimF5E1Zi1WkOGvKP 3co20t8SUbIkd3HGctsI0b9p6OV3pz0Ijhaa8qIUNV8aTJNZFC1Td+wcb9r4M2Qa4Aw6 Of5nyJ81rpec9ghBwvjY7MDtkjlVSg/5MbXGISZa3YOUmeisRBBGDA6P3RvHSmwnA48B 2nR+O78bznaOFpsBflFHWj95O0gFzRezb/S9tApktjujjTnl1laUvT/qyaWT/XZYEBkR g3p4JPEu0aIYFzpB4lej+baSc4mswbkzyxJgQWeYxcD5zWSbs3QK3hF8ckvW0hOhUPAA oKrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=/sodV7XfMQhCpkD3xRH3MmaHc4s9WwO7/DBIbmrs5OU=; b=bwCkTBMtRBj4oAi9b9EIWUb+P/BHfcM8dih/YQtaYQItXd5L9KIa1rHtFe7wGY2ZyW 9Jm0Wspsclko2ey6rvvOvHIIEF337/g4BnFSmknWRzyOgMfOfp1/lxOzSrln0HYOycbJ SBkly3FW2txvNdJBjvVR/WBrNFq+Nr8DhLJmleb9RGbE5eiUrbDX4k+asXUVxiJOUThA mcQbSwM6aIgZU/wPZj8DXJu7DX8Gp8eXQBS6xE7RTFAzgqV8+KfwqMOBu7kWL9riOU4+ NuwAOpr2dHz/xec0/HMjq5TU0PqzMgfTqt3Cviu0+aVOsQqeM4tVnUcybdhqE4FN43Wu YaFA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 16si18398113ilt.35.2021.05.17.13.56.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:56:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:54038 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likHz-0003IP-LA for patch@linaro.org; Mon, 17 May 2021 16:56:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45854) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDk-0004XK-1l; Mon, 17 May 2021 16:52:12 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDi-00013X-Nh; Mon, 17 May 2021 16:52:11 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:30 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 80E2D8000C2; Mon, 17 May 2021 17:50:30 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 07/23] target/ppc: Mark helper_raise_exception* as noreturn Date: Mon, 17 May 2021 17:50:09 -0300 Message-Id: <20210517205025.3777947-8-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:30.0956 (UTC) FILETIME=[4652CEC0:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/helper.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 513066d54d..ea9f2a236c 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -1,5 +1,5 @@ -DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, void, env, i32, i32) -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, void, env, i32) +DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, noreturn, env, i32, i32) +DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) DEF_HELPER_FLAGS_4(tw, TCG_CALL_NO_WG, void, env, tl, tl, i32) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_4(td, TCG_CALL_NO_WG, void, env, tl, tl, i32) From patchwork Mon May 17 20:50:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. 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[209.51.188.17]) by mx.google.com with ESMTPS id g6si20936099jat.77.2021.05.17.13.58.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:58:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:59612 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likJd-00070a-Cp for patch@linaro.org; Mon, 17 May 2021 16:58:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45874) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDm-0004eT-KL; Mon, 17 May 2021 16:52:14 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDl-00013X-5R; Mon, 17 May 2021 16:52:14 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:31 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id E74D280139F; Mon, 17 May 2021 17:50:30 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 08/23] target/ppc: Use translator_loop_temp_check Date: Mon, 17 May 2021 17:50:10 -0300 Message-Id: <20210517205025.3777947-9-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:31.0409 (UTC) FILETIME=[4697EE10:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The special logging is unnecessary. It will have been done immediately before in the log file. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Reviewed-by: Bruno Larsen (billionai) --- target/ppc/translate.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e68152810e..ea200f9637 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9091,11 +9091,7 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) handler->count++; #endif - if (tcg_check_temp_count()) { - qemu_log("Opcode %02x %02x %02x %02x (%08x) leaked " - "temporaries\n", opc1(ctx->opcode), opc2(ctx->opcode), - opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); - } + translator_loop_temp_check(&ctx->base); } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) From patchwork Mon May 17 20:50:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440232 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1437557jac; Mon, 17 May 2021 14:00:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxCzmSkDuiFRm7PwMkwigksxTkKWqTihwJ3iQ9xf8IhY1nvR2njRQgo7TZ8WEwmS5bi9/yd X-Received: by 2002:a05:6e02:d41:: with SMTP id h1mr1307213ilj.0.1621285225784; Mon, 17 May 2021 14:00:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621285225; cv=none; d=google.com; s=arc-20160816; b=FIVnv3JsKs+T7S70rs5Q2xxMK66/UwIpfmqDM7NSzVuIB37R54gtJRu7KM5eCEKDIL lFYjYyO5Ljd8u1+Kr8/0atLyVAigORBzKls0zPxjm9RjUivSNLK1YZefRlytNbrNtVGS b+2Yf6FymbmSxnrEWtc8y98XwVKz+JoxBMclre3ER7lpCzwsVMXdZsMNclGL69dNgV3l Q3OUVCAVfv+HTpEFdGMS3GnobbkNA0XtQ3Z3aqAp4XkMpkuPxLxk3sNBOTKUwwe4gqpp EW5JW06py+m+sqMms78QaUMsSF/nNXlNFfA5/vnoza7XTTZ+KM0ruJzvUPze2ZAqrQ6e RKnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=PDrwKTyKTW2kRpD3uhCF9kKnByfpVefvQo3rV6I0lI8=; b=kuaBTmD2a56s3UKp3xwowUgFX/ovhTlaZy11JvBw7ibKBxA2Nb0T7Cr08gFOtefuxg 6iM+LThiG98HN0DHHg8lWNaSCtFuN3ODwtcPNWUBuRD0UkvgZ1ip7r9K6S2J70k69lD3 kQ9Won87Kr+YrK8O5STtJX40Zx3JCalRsYaDQxTGB1wrsH1Z7LrjItMZ6LnJJumlGOld QE9dtYlKR4OgjKgP1qJspYdIt2y1LSSfCPK7mohuE9xNgSYPQBpkICTpEfRIhrR6u1SG y/bg9NCfewFKN6yPpScpv6lzHEuvTbpjliXS/C7p7nhuFjLervZCb08jRVuXFAVrST0E kA7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l11si20171111jah.65.2021.05.17.14.00.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 14:00:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:40120 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likLh-0004Of-4m for patch@linaro.org; Mon, 17 May 2021 17:00:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45918) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likDp-0004il-NN; Mon, 17 May 2021 16:52:19 -0400 Received: from [201.28.113.2] (port=12648 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likDn-00013X-Jm; Mon, 17 May 2021 16:52:17 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:31 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 638538000C2; Mon, 17 May 2021 17:50:31 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 09/23] target/ppc: Introduce macros to check isa extensions Date: Mon, 17 May 2021 17:50:11 -0300 Message-Id: <20210517205025.3777947-10-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:31.0831 (UTC) FILETIME=[46D85270:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson These will be used by the decodetree trans_* functions to early-exit when the instruction set is not enabled. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index ea200f9637..dc0f5fafc2 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7750,6 +7750,32 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) tcg_gen_st_i64(src, cpu_env, avr64_offset(regno, high)); } +/* + * Helpers for trans_* functions to check for specific insns flags. + * Use token pasting to ensure that we use the proper flag with the + * proper variable. + */ +#define REQUIRE_INSNS_FLAGS(CTX, NAME) \ + do { \ + if (((CTX)->insns_flags & PPC_##NAME) == 0) { \ + return false; \ + } \ + } while (0) + +#define REQUIRE_INSNS_FLAGS2(CTX, NAME) \ + do { \ + if (((CTX)->insns_flags2 & PPC2_##NAME) == 0) { \ + return false; \ + } \ + } while (0) + +/* Then special-case the check for 64-bit so that we elide code for ppc32. */ +#if TARGET_LONG_BITS == 32 +# define REQUIRE_64BIT(CTX) return false +#else +# define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) +#endif + #include "translate/fp-impl.c.inc" #include "translate/vmx-impl.c.inc" From patchwork Mon May 17 20:50:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. 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[209.51.188.17]) by mx.google.com with ESMTPS id h3si17967361jam.96.2021.05.17.13.58.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 13:58:23 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:60158 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likJi-0007O8-RK for patch@linaro.org; Mon, 17 May 2021 16:58:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46156) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likEu-0005S8-R4; Mon, 17 May 2021 16:53:24 -0400 Received: from [201.28.113.2] (port=46491 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likEt-0001mN-0I; Mon, 17 May 2021 16:53:24 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:32 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id C902680139F; Mon, 17 May 2021 17:50:31 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 10/23] target/ppc: Move page crossing check to ppc_tr_translate_insn Date: Mon, 17 May 2021 17:50:12 -0300 Message-Id: <20210517205025.3777947-11-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:32.0300 (UTC) FILETIME=[471FE2C0:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson With prefixed instructions, the number of instructions remaining until the page crossing is no longer constant. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/translate.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.25.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index dc0f5fafc2..b1873d2dcc 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9060,9 +9060,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) if (ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP)) { ctx->base.max_insns = 1; - } else { - int bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; - ctx->base.max_insns = MIN(ctx->base.max_insns, bound); } } @@ -9117,6 +9114,11 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) handler->count++; #endif + /* End the TB when crossing a page boundary. */ + if (ctx->base.is_jmp == DISAS_NEXT && !(pc & ~TARGET_PAGE_MASK)) { + ctx->base.is_jmp = DISAS_TOO_MANY; + } + translator_loop_temp_check(&ctx->base); } From patchwork Mon May 17 20:50:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440233 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1437817jac; Mon, 17 May 2021 14:00:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzR2xJbB7zEKN8pup+gkEYFp3NmmkEiOjJAX7sE06O/d5JvVXMV2q464+GVbDAJ0IPMLIRX X-Received: by 2002:a02:9f96:: with SMTP id a22mr1968478jam.14.1621285244680; Mon, 17 May 2021 14:00:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621285244; cv=none; d=google.com; s=arc-20160816; b=BlEwQVF0tTJ6EtfllRdPeghPgty9diCvPnOXrNYeTTNTiF44tL6ZIjHsw5QKHfXhEG 7xC03qxnOJFZljrwDwyrshz324xTxWtW3EGdAswGEAQapgoT2SHnL+jwazSELmWjKAAP C1ZQH8p8wPZnl6nI5vgMv/oUPMyvS+2PU02y4Gp7iMn5iqRIdifNNw26yaWJH+cd6Njx 9wTPOVKITZGpD+4Y35HUd8QKQ2Mor+mMhKUFalJ3aatOgzGjNZS07ufeHZtKbVDEnX3j g6I/88owFKNUJZj4JMM05trkeThtXTi/Ts670iQaIQX8VbuYZbtIh5vrf9cNAdJ7qYxp C/Tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=Pm2GU+6lTrqPpFQuz7p39JzRlU+5oyvsW/FKmPipvZc=; b=DZXNA2eQt/byzG4HEhCJUVgYdIDJszxJX3Cs6gg8Offs9urLyjUY+0J/poEMQ9vnV5 nQLZKjMMaA8yRf7sp1RRmE24WcjPIsZLBSaVPg3+1wjYpEzHQhPSGVWPMFpymW2SY22H p6MaBxYD7T7TkZZqkvfLtW3Kyk4AxVFTvEzdz+mfb242e7B6DwVSEQ9gykA+2li+loVZ gc7VgAqlan4/oTEuM3GRXH4vkhdW8KepShHGen+xKBMwAvKwXFRYoiem8CHu9aiXRccF nCiWyq+ecDU6++VssEyyh0bq2yYPqQ7oYRRs6Hj88EJI75V2lM5xKqiFyzAEWIzhh+sr YrwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a7si17226357ioc.87.2021.05.17.14.00.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 14:00:44 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:40764 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likM0-0004ou-4R for patch@linaro.org; Mon, 17 May 2021 17:00:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46168) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likEx-0005Yr-SL; Mon, 17 May 2021 16:53:27 -0400 Received: from [201.28.113.2] (port=46491 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likEv-0001mN-RI; Mon, 17 May 2021 16:53:27 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:32 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 463AD8000C2; Mon, 17 May 2021 17:50:32 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 11/23] target/ppc: Add infrastructure for prefixed insns Date: Mon, 17 May 2021 17:50:13 -0300 Message-Id: <20210517205025.3777947-12-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:32.0753 (UTC) FILETIME=[47650210:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Luis Pires Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/cpu.h | 1 + target/ppc/insn32.decode | 18 ++++++++++++ target/ppc/insn64.decode | 18 ++++++++++++ target/ppc/meson.build | 9 ++++++ target/ppc/translate.c | 34 +++++++++++++++++++--- target/ppc/translate/fixedpoint-impl.c.inc | 18 ++++++++++++ 6 files changed, 94 insertions(+), 4 deletions(-) create mode 100644 target/ppc/insn32.decode create mode 100644 target/ppc/insn64.decode create mode 100644 target/ppc/translate/fixedpoint-impl.c.inc -- 2.25.1 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index cab33a3680..351fcdf5f8 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -144,6 +144,7 @@ enum { POWERPC_EXCP_ALIGN_PROT = 0x04, /* Access cross protection boundary */ POWERPC_EXCP_ALIGN_BAT = 0x05, /* Access cross a BAT/seg boundary */ POWERPC_EXCP_ALIGN_CACHE = 0x06, /* Impossible dcbz access */ + POWERPC_EXCP_ALIGN_INSN = 0x07, /* Pref. insn x-ing 64-byte boundary */ /* Exception subtypes for POWERPC_EXCP_PROGRAM */ /* FP exceptions */ POWERPC_EXCP_FP = 0x10, diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode new file mode 100644 index 0000000000..a3a8ae06bf --- /dev/null +++ b/target/ppc/insn32.decode @@ -0,0 +1,18 @@ +# +# Power ISA decode for 32-bit insns (opcode space 0) +# +# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . +# diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode new file mode 100644 index 0000000000..a38b1f84dc --- /dev/null +++ b/target/ppc/insn64.decode @@ -0,0 +1,18 @@ +# +# Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1) +# +# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . +# diff --git a/target/ppc/meson.build b/target/ppc/meson.build index d1aa7d5d39..512e3a0288 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -17,6 +17,15 @@ ppc_ss.add(files( ppc_ss.add(libdecnumber) +gen = [ + decodetree.process('insn32.decode', + extra_args: '--static-decode=decode_insn32'), + decodetree.process('insn64.decode', + extra_args: ['--static-decode=decode_insn64', + '--insnwidth=64']), +] +ppc_ss.add(gen) + ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c')) ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c')) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index b1873d2dcc..64d6acb078 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7776,6 +7776,10 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) # define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) #endif +#include "decode-insn32.c.inc" +#include "decode-insn64.c.inc" +#include "translate/fixedpoint-impl.c.inc" + #include "translate/fp-impl.c.inc" #include "translate/vmx-impl.c.inc" @@ -9089,11 +9093,18 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, return true; } +static bool is_prefix_insn(DisasContext *ctx, uint32_t insn) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + return opc1(insn) == 1; +} + static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); PowerPCCPU *cpu = POWERPC_CPU(cs); CPUPPCState *env = cs->env_ptr; + target_ulong pc; uint32_t insn; bool ok; @@ -9101,11 +9112,26 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n", ctx->base.pc_next, ctx->mem_idx, (int)msr_ir); - ctx->cia = ctx->base.pc_next; - insn = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx)); - ctx->base.pc_next += 4; + ctx->cia = pc = ctx->base.pc_next; + insn = translator_ldl_swap(env, pc, need_byteswap(ctx)); + ctx->base.pc_next = pc += 4; - ok = decode_legacy(cpu, ctx, insn); + if (!is_prefix_insn(ctx, insn)) { + ok = (decode_insn32(ctx, insn) || + decode_legacy(cpu, ctx, insn)); + } else if ((pc & 63) == 0) { + /* + * Power v3.1, section 1.9 Exceptions: + * attempt to execute a prefixed instruction that crosses a + * 64-byte address boundary (system alignment error). + */ + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_INSN); + ok = true; + } else { + uint32_t insn2 = translator_ldl_swap(env, pc, need_byteswap(ctx)); + ctx->base.pc_next = pc += 4; + ok = decode_insn64(ctx, deposit64(insn2, 32, 32, insn)); + } if (!ok) { gen_invalid(ctx); } diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc new file mode 100644 index 0000000000..be75085cee --- /dev/null +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -0,0 +1,18 @@ +/* + * Power ISA decode for Fixed-Point Facility instructions + * + * Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ From patchwork Mon May 17 20:50:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440236 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1439905jac; Mon, 17 May 2021 14:03:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxF53jAgeXS6ZVV1ijCLL80E3YMd95RbDp6mEi+JFEN7V1NwQvxzaK9mFTknbwAu+MmfQ1R X-Received: by 2002:a92:c7a6:: with SMTP id f6mr1324421ilk.17.1621285382827; Mon, 17 May 2021 14:03:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621285382; cv=none; d=google.com; s=arc-20160816; b=tbcLb1GO2eIVLtu6blfivc4KrAAAFRjCJ88KNQ6KtOlTfKrkbPaob7eq7zpwZUijyk NHcQCiUXnVVGDBCnO1EztIXrDT4SXGkcXcmKEze633M+f644NfvjU6PD01dPhl4HEvvH e6zRalauZZ3b/iYCc3X+l8yzyLIz0tmBSJKaLrxJTZk1yjAQFVVuiQ+8jz5/wlQkKT5S g7LLfMeeF5WWj5e7GAjXoCnvYn/xJ/OAWSCwWUBC6xMpUPSa/GvABtw1yhE2XCpq1Yyf aUIO7bCZ2ZviAhMeQfHG+psc77h9QWpPnNeWMNcXR4trKh7ppRDHMsKNf6YtlkHvDEO8 O2GA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=5vBEzm4OOUaQg+3NC1sA42HU1SQ9B6apeEYGVdKX4cg=; b=YlC8oQikidpOzBjyxxsWKNaAxp2MqJXJFkORMR5x0nL2Q7oU3dGh6Xj+LAtpIrj5XR 3l/cP3EeDgCP4CJNu2GS/JQs964n702srU2CwId2gntmZ+IGt88iUvLuzy2NskPFCH58 raTPYMnezxoaVysKeamMzeJLJu51kKjr35CvGTIp83AazMSntTmNumX/D+MpeHymFzuR KjB8vZuQ8j6op+MzJDE4XwuYxFE53F4+EPB64hIizK3557bU1pEEsI32TK5FWKNitSkI zSi3wCjisEskfSfecNV9bTgrRzyytqCRYXU7VWkXQ5/POY/5kpCAPKbKX3phWPida08/ 7N1g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f11si21500791ila.138.2021.05.17.14.03.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 14:03:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:49658 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likOE-0002Ns-5G for patch@linaro.org; Mon, 17 May 2021 17:03:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46192) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likF4-0005ep-7p; Mon, 17 May 2021 16:53:34 -0400 Received: from [201.28.113.2] (port=46491 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likEy-0001mN-Sj; Mon, 17 May 2021 16:53:33 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:33 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id B986B8000C2; Mon, 17 May 2021 17:50:32 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 12/23] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI Date: Mon, 17 May 2021 17:50:14 -0300 Message-Id: <20210517205025.3777947-13-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:33.0206 (UTC) FILETIME=[47AA2160:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 8 ++++ target/ppc/insn64.decode | 12 ++++++ target/ppc/translate.c | 29 -------------- target/ppc/translate/fixedpoint-impl.c.inc | 44 ++++++++++++++++++++++ 4 files changed, 64 insertions(+), 29 deletions(-) -- 2.25.1 diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index a3a8ae06bf..e7c062d8b4 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -16,3 +16,11 @@ # You should have received a copy of the GNU Lesser General Public # License along with this library; if not, see . # + +&D rt ra si:int64_t +@D ...... rt:5 ra:5 si:s16 &D + +### Fixed-Point Arithmetic Instructions + +ADDI 001110 ..... ..... ................ @D +ADDIS 001111 ..... ..... ................ @D diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index a38b1f84dc..1965088915 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -16,3 +16,15 @@ # You should have received a copy of the GNU Lesser General Public # License along with this library; if not, see . # + +# Format MLS:D and 8LS:D +&PLS_D rt ra si:int64_t r:bool +%pls_si 32:s18 0:16 +@PLS_D ...... .. ... r:1 .. .................. \ + ...... rt:5 ra:5 ................ \ + &PLS_D si=%pls_si + +### Fixed-Point Arithmetic Instructions + +PADDI 000001 10 0--.-- .................. \ + 001110 ..... ..... ................ @PLS_D diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 64d6acb078..5bf9001141 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -1846,19 +1846,6 @@ GEN_INT_ARITH_ADD(addex, 0x05, cpu_ov, 1, 1, 0); /* addze addze. addzeo addzeo.*/ GEN_INT_ARITH_ADD_CONST(addze, 0x06, 0, cpu_ca, 1, 1, 0) GEN_INT_ARITH_ADD_CONST(addzeo, 0x16, 0, cpu_ca, 1, 1, 1) -/* addi */ -static void gen_addi(DisasContext *ctx) -{ - target_long simm = SIMM(ctx->opcode); - - if (rA(ctx->opcode) == 0) { - /* li case */ - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm); - } else { - tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], - cpu_gpr[rA(ctx->opcode)], simm); - } -} /* addic addic.*/ static inline void gen_op_addic(DisasContext *ctx, bool compute_rc0) { @@ -1878,20 +1865,6 @@ static void gen_addic_(DisasContext *ctx) gen_op_addic(ctx, 1); } -/* addis */ -static void gen_addis(DisasContext *ctx) -{ - target_long simm = SIMM(ctx->opcode); - - if (rA(ctx->opcode) == 0) { - /* lis case */ - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm << 16); - } else { - tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)], - cpu_gpr[rA(ctx->opcode)], simm << 16); - } -} - /* addpcis */ static void gen_addpcis(DisasContext *ctx) { @@ -7903,10 +7876,8 @@ GEN_HANDLER_E(cmpeqb, 0x1F, 0x00, 0x07, 0x00600000, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(cmpb, 0x1F, 0x1C, 0x0F, 0x00000001, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(cmprb, 0x1F, 0x00, 0x06, 0x00400001, PPC_NONE, PPC2_ISA300), GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL), -GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), -GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER_E(addpcis, 0x13, 0x2, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA300), GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER), GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER), diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index be75085cee..344a3ed54b 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -16,3 +16,47 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +/* + * Incorporate CIA into the constant when R=1. + * Validate that when R=1, RA=0. + */ +static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) +{ + d->rt = a->rt; + d->ra = a->ra; + d->si = a->si; + if (a->r) { + if (unlikely(a->ra != 0)) { + gen_invalid(ctx); + return false; + } + d->si += ctx->cia; + } + return true; +} + +static bool trans_ADDI(DisasContext *ctx, arg_D *a) +{ + if (a->ra) { + tcg_gen_addi_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si); + } else { + tcg_gen_movi_tl(cpu_gpr[a->rt], a->si); + } + return true; +} + +static bool trans_PADDI(DisasContext *ctx, arg_PLS_D *a) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + return trans_ADDI(ctx, &d); +} + +static bool trans_ADDIS(DisasContext *ctx, arg_D *a) +{ + a->si <<= 16; + return trans_ADDI(ctx, a); +} From patchwork Mon May 17 20:50:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440234 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1438392jac; Mon, 17 May 2021 14:01:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxpvygpNz2PPH3UXpuo05TtrxNpzgZfGeyoWY3db73Ak9k5cnubV92efflI2219e2UEtU1x X-Received: by 2002:a92:8e03:: with SMTP id c3mr1352944ild.167.1621285284986; Mon, 17 May 2021 14:01:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621285284; cv=none; d=google.com; s=arc-20160816; b=j5a73vblnAIs/E+R5lkDiS/LovhtMFvCUY1+L9sM3U8tBMz2Z8C7IuobfQjtd0cg1H oePlx1i//H50ipzS+0w51DK/ZyRu2gDPTnkmf4Ba7lhSKR5RMVyg/ienmNxlNLNaiigI dDOCNQG66fEOMOdF2thCI8ZFZ+xEOv1DfqqErvCozH+vIVAoTV7GNOQmEiik9pyyOff6 caAEGOP7FCZY5o/EM1S+F6dB0Z9F+JdtmUmSSlIei0ugjiLRO7rpR2oyB6uXvlhdXQRr qreuHQrNFxD/vliRqpOs7W23zQ/Ks8aNM4pVqFnmtnPvtdQO3DknsRC/0pYXjrDGonyV VfbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=UcjPXWLzu0eiI4aC4+CfXVgY6c2rFf2mYZaxTPQ1c7c=; b=iuXp1g5xBFD8s7YirmRSI6UbiSaS1K8YdK19dVcrZDOYWs+nv+J7QUkysgJzEinvBx Hf3n7V6+AtPjaYA+DjFeEtcGconospOZNKlX2Ss14UuP1cce3aLxZ1eOtb67ptejHanw F1v+At80GLOthgoYTOirxuk45hvPVdsjoddqgE01fN7rtTGNVIFBgABeQniEOQncWb+x 1v2yYJLt5sMVabMq29RhC4XdxOXirGIPDzkadQ24PAN/PmyEtL6SVMGo34SdEUgL6GFY zqVyWGmq9tpc0SZDC9VbzfZwgkB4asvrNdUXi40moKOcaUefwqq5zhnwTFBMyBzM958Q kbRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r1si3156507ilj.100.2021.05.17.14.01.24 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 14:01:24 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43694 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likMe-0006m0-Dp for patch@linaro.org; Mon, 17 May 2021 17:01:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46206) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likF7-0005hu-To; Mon, 17 May 2021 16:53:37 -0400 Received: from [201.28.113.2] (port=46491 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likF6-0001mN-Ct; Mon, 17 May 2021 16:53:37 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:33 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 346408000C2; Mon, 17 May 2021 17:50:33 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 13/23] target/ppc: Implement PNOP Date: Mon, 17 May 2021 17:50:15 -0300 Message-Id: <20210517205025.3777947-14-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:33.0660 (UTC) FILETIME=[47EF67C0:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The illegal suffix behavior matches what was observed in a POWER10 DD2.0 machine. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- v5: - Remove argument set from PNOP; - Use no_overlap_group for invalid suffixes. --- target/ppc/insn64.decode | 67 ++++++++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 11 ++++ 2 files changed, 78 insertions(+) -- 2.25.1 diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 1965088915..9aa5097a98 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -28,3 +28,70 @@ PADDI 000001 10 0--.-- .................. \ 001110 ..... ..... ................ @PLS_D + +### Prefixed No-operation Instruction + +@PNOP 000001 11 0000-- 000000000000000000 \ + ................................ + +{ + [ + ## Invalid suffixes: Branch instruction + # bc[l][a] + INVALID ................................ \ + 010000-------------------------- @PNOP + # b[l][a] + INVALID ................................ \ + 010010-------------------------- @PNOP + # bclr[l] + INVALID ................................ \ + 010011---------------0000010000- @PNOP + # bcctr[l] + INVALID ................................ \ + 010011---------------1000010000- @PNOP + # bctar[l] + INVALID ................................ \ + 010011---------------1000110000- @PNOP + + ## Invalid suffixes: rfebb + INVALID ................................ \ + 010011---------------0010010010- @PNOP + + ## Invalid suffixes: context synchronizing other than isync + # sc + INVALID ................................ \ + 010001------------------------1- @PNOP + # scv + INVALID ................................ \ + 010001------------------------01 @PNOP + # rfscv + INVALID ................................ \ + 010011---------------0001010010- @PNOP + # rfid + INVALID ................................ \ + 010011---------------0000010010- @PNOP + # hrfid + INVALID ................................ \ + 010011---------------0100010010- @PNOP + # urfid + INVALID ................................ \ + 010011---------------0100110010- @PNOP + # stop + INVALID ................................ \ + 010011---------------0101110010- @PNOP + # mtmsr w/ L=0 + INVALID ................................ \ + 011111---------0-----0010010010- @PNOP + # mtmsrd w/ L=0 + INVALID ................................ \ + 011111---------0-----0010110010- @PNOP + + ## Invalid suffixes: Service Processor Attention + INVALID ................................ \ + 000000----------------100000000- @PNOP + ] + + ## Valid suffixes + PNOP ................................ \ + -------------------------------- @PNOP +} diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 344a3ed54b..ce034a14a7 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -60,3 +60,14 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a) a->si <<= 16; return trans_ADDI(ctx, a); } + +static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a) +{ + gen_invalid(ctx); + return true; +} + +static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a) +{ + return true; +} From patchwork Mon May 17 20:50:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440237 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1439957jac; Mon, 17 May 2021 14:03:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzU2WX/Me134FmjWGFgulHIc7OGJt+eWX//jaq6SilerToHVXJbz88HfMgux8M58A58QGsu X-Received: by 2002:a05:6e02:54d:: with SMTP id i13mr1392895ils.26.1621285384827; Mon, 17 May 2021 14:03:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621285384; cv=none; d=google.com; s=arc-20160816; b=ph2ykL9k7Xb5xBkZm1mqEyGLA5Bz3hria1WETh82vdgT7xMKMRfuvmOfXpr4pQXgCB IWsiLux1N62aAVeW6zEOejEU7DAyqy1h4I6FBM61NDPlrT85/46Au32YhmOS8KDHnpKv rRyKDC6Clm9DBSim2Ux+LabYl/YBsHGoJPRkzQWVW3cdYWsr11IwzB5PNoJoVNA+kjdm kblnzavkXzbSjSPq5BUxD5gbJ8l3b7mPPEjaapUQqbgyjAfLEgaGKJArS+WjBe1ofRSX o3WOHLLs8MmMOafHmxHlRnGPpvfqW32CQ+SjOYPZoEEsbqWEYlDgdj6+FkeLtLrCXNvC 1AxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=/i+lXBwNTr9ErIYb3r0xlo/+1q+VkLE1ht0ducBXceM=; b=aynbQZY8GIcqYhblANH5EgQU1BLuulqGtFv3+kDhrI5PZUZSz0Yf1eBDhgUlrmTnO2 Xy54F2sC0v7OmK7MCvOPYUPxZ5Z3pRd/d3K+x46WP1cUFqPPcPYJ8Kk7jrrW8l0kqfbJ GBpXuSvbCskstlmBJM7wI+t+/FDk/l4YJW4B8LM2hKl6ExFSS6nw3+vYOrh4HfDBtOKR CFAaAfqFdmoC3z4H/8YcTk9SrlYi2tZDVBjDdisawM1mGpT+VluMIO4y8reBK8mtutex 7lg2EeRjAfQsJH3zF3ekiTcveJf2qhK4w1FNboI/aBR0vmCv+QrjdW3Ez/k5aXNGFgpG rxTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s15si635593iog.67.2021.05.17.14.03.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 14:03:04 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:52288 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likOG-00049d-7O for patch@linaro.org; Mon, 17 May 2021 17:03:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46272) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likFH-0005rZ-KN; Mon, 17 May 2021 16:53:47 -0400 Received: from [201.28.113.2] (port=46491 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likFF-0001mN-89; Mon, 17 May 2021 16:53:47 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:34 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 214798000C2; Mon, 17 May 2021 17:50:34 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 15/23] target/ppc: Move D/DS/X-form integer loads to decodetree Date: Mon, 17 May 2021 17:50:17 -0300 Message-Id: <20210517205025.3777947-16-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:34.0613 (UTC) FILETIME=[4880D250:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson These are all connected by macros in the legacy decoding. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 37 ++++++ target/ppc/translate.c | 147 ++++----------------- target/ppc/translate/fixedpoint-impl.c.inc | 89 +++++++++++++ 3 files changed, 150 insertions(+), 123 deletions(-) -- 2.25.1 diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e7c062d8b4..70f64c235b 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -20,6 +20,43 @@ &D rt ra si:int64_t @D ...... rt:5 ra:5 si:s16 &D +%ds_si 2:s14 !function=times_4 +@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si + +&X rt ra rb +@X ...... rt:5 ra:5 rb:5 .......... . &X + +### Fixed-Point Load Instructions + +LBZ 100010 ..... ..... ................ @D +LBZU 100011 ..... ..... ................ @D +LBZX 011111 ..... ..... ..... 0001010111 - @X +LBZUX 011111 ..... ..... ..... 0001110111 - @X + +LHZ 101000 ..... ..... ................ @D +LHZU 101001 ..... ..... ................ @D +LHZX 011111 ..... ..... ..... 0100010111 - @X +LHZUX 011111 ..... ..... ..... 0100110111 - @X + +LHA 101010 ..... ..... ................ @D +LHAU 101011 ..... ..... ................ @D +LHAX 011111 ..... ..... ..... 0101010111 - @X +LHAXU 011111 ..... ..... ..... 0101110111 - @X + +LWZ 100000 ..... ..... ................ @D +LWZU 100001 ..... ..... ................ @D +LWZX 011111 ..... ..... ..... 0000010111 - @X +LWZUX 011111 ..... ..... ..... 0000110111 - @X + +LWA 111010 ..... ..... ..............10 @DS +LWAX 011111 ..... ..... ..... 0101010101 - @X +LWAUX 011111 ..... ..... ..... 0101110101 - @X + +LD 111010 ..... ..... ..............00 @DS +LDU 111010 ..... ..... ..............01 @DS +LDX 011111 ..... ..... ..... 0000010101 - @X +LDUX 011111 ..... ..... ..... 0000110101 - @X + ### Fixed-Point Arithmetic Instructions ADDI 001110 ..... ..... ................ @D diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 5bf9001141..e037efcfe1 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3409,54 +3409,6 @@ GEN_QEMU_STORE_64(st64, DEF_MEMOP(MO_Q)) GEN_QEMU_STORE_64(st64r, BSWAP_MEMOP(MO_Q)) #endif -#define GEN_LD(name, ldop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_LDU(name, ldop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0 || \ - rA(ctx->opcode) == rD(ctx->opcode))) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - if (type == PPC_64B) \ - gen_addr_imm_index(ctx, EA, 0x03); \ - else \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_LDUX(name, ldop, opc2, opc3, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0 || \ - rA(ctx->opcode) == rD(ctx->opcode))) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_reg_index(ctx, EA); \ - gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - #define GEN_LDX_E(name, ldop, opc2, opc3, type, type2, chk) \ static void glue(gen_, name##x)(DisasContext *ctx) \ { \ @@ -3475,21 +3427,6 @@ static void glue(gen_, name##x)(DisasContext *ctx) \ #define GEN_LDX_HVRM(name, ldop, opc2, opc3, type) \ GEN_LDX_E(name, ldop, opc2, opc3, type, PPC_NONE, CHK_HVRM) -#define GEN_LDS(name, ldop, op, type) \ -GEN_LD(name, ldop, op | 0x20, type); \ -GEN_LDU(name, ldop, op | 0x21, type); \ -GEN_LDUX(name, ldop, 0x17, op | 0x01, type); \ -GEN_LDX(name, ldop, 0x17, op | 0x00, type) - -/* lbz lbzu lbzux lbzx */ -GEN_LDS(lbz, ld8u, 0x02, PPC_INTEGER); -/* lha lhau lhaux lhax */ -GEN_LDS(lha, ld16s, 0x0A, PPC_INTEGER); -/* lhz lhzu lhzux lhzx */ -GEN_LDS(lhz, ld16u, 0x08, PPC_INTEGER); -/* lwz lwzu lwzux lwzx */ -GEN_LDS(lwz, ld32u, 0x00, PPC_INTEGER); - #define GEN_LDEPX(name, ldop, opc2, opc3) \ static void glue(gen_, name##epx)(DisasContext *ctx) \ { \ @@ -3510,47 +3447,12 @@ GEN_LDEPX(ld, DEF_MEMOP(MO_Q), 0x1D, 0x00) #endif #if defined(TARGET_PPC64) -/* lwaux */ -GEN_LDUX(lwa, ld32s, 0x15, 0x0B, PPC_64B); -/* lwax */ -GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B); -/* ldux */ -GEN_LDUX(ld, ld64_i64, 0x15, 0x01, PPC_64B); -/* ldx */ -GEN_LDX(ld, ld64_i64, 0x15, 0x00, PPC_64B); - /* CI load/store variants */ GEN_LDX_HVRM(ldcix, ld64_i64, 0x15, 0x1b, PPC_CILDST) GEN_LDX_HVRM(lwzcix, ld32u, 0x15, 0x15, PPC_CILDST) GEN_LDX_HVRM(lhzcix, ld16u, 0x15, 0x19, PPC_CILDST) GEN_LDX_HVRM(lbzcix, ld8u, 0x15, 0x1a, PPC_CILDST) -static void gen_ld(DisasContext *ctx) -{ - TCGv EA; - if (Rc(ctx->opcode)) { - if (unlikely(rA(ctx->opcode) == 0 || - rA(ctx->opcode) == rD(ctx->opcode))) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - return; - } - } - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_imm_index(ctx, EA, 0x03); - if (ctx->opcode & 0x02) { - /* lwa (lwau is undefined) */ - gen_qemu_ld32s(ctx, cpu_gpr[rD(ctx->opcode)], EA); - } else { - /* ld - ldu */ - gen_qemu_ld64_i64(ctx, cpu_gpr[rD(ctx->opcode)], EA); - } - if (Rc(ctx->opcode)) { - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); - } - tcg_temp_free(EA); -} - /* lq */ static void gen_lq(DisasContext *ctx) { @@ -7723,6 +7625,14 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) tcg_gen_st_i64(src, cpu_env, avr64_offset(regno, high)); } +/* + * Helpers for decodetree used by !function for decoding arguments. + */ +static int times_4(DisasContext *ctx, int x) +{ + return x * 4; +} + /* * Helpers for trans_* functions to check for specific insns flags. * Use token pasting to ensure that we use the proper flag with the @@ -7749,6 +7659,21 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) # define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) #endif +/* + * Helpers for implementing sets of trans_* functions. + * Defer the implementation of NAME to FUNC, with optional extra arguments. + */ +#define TRANS(NAME, FUNC, ...) \ + static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \ + { return FUNC(ctx, a, __VA_ARGS__); } + +#define TRANS64(NAME, FUNC, ...) \ + static bool trans_##NAME(DisasContext *ctx, arg_##NAME *a) \ + { REQUIRE_64BIT(ctx); return FUNC(ctx, a, __VA_ARGS__); } + +/* TODO: More TRANS* helpers for extra insn_flags checks. */ + + #include "decode-insn32.c.inc" #include "decode-insn64.c.inc" #include "translate/fixedpoint-impl.c.inc" @@ -7933,7 +7858,6 @@ GEN_HANDLER2_E(extswsli1, "extswsli", 0x1F, 0x1B, 0x1B, 0x00000000, PPC_NONE, PPC2_ISA300), #endif #if defined(TARGET_PPC64) -GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B), GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX), GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B), #endif @@ -8299,34 +8223,11 @@ GEN_PPC64_R2(rldcr, 0x1E, 0x09), GEN_PPC64_R4(rldimi, 0x1E, 0x06), #endif -#undef GEN_LD -#undef GEN_LDU -#undef GEN_LDUX #undef GEN_LDX_E -#undef GEN_LDS -#define GEN_LD(name, ldop, opc, type) \ -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_LDU(name, ldop, opc, type) \ -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_LDUX(name, ldop, opc2, opc3, type) \ -GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type), #define GEN_LDX_E(name, ldop, opc2, opc3, type, type2, chk) \ GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000001, type, type2), -#define GEN_LDS(name, ldop, op, type) \ -GEN_LD(name, ldop, op | 0x20, type) \ -GEN_LDU(name, ldop, op | 0x21, type) \ -GEN_LDUX(name, ldop, 0x17, op | 0x01, type) \ -GEN_LDX(name, ldop, 0x17, op | 0x00, type) - -GEN_LDS(lbz, ld8u, 0x02, PPC_INTEGER) -GEN_LDS(lha, ld16s, 0x0A, PPC_INTEGER) -GEN_LDS(lhz, ld16u, 0x08, PPC_INTEGER) -GEN_LDS(lwz, ld32u, 0x00, PPC_INTEGER) + #if defined(TARGET_PPC64) -GEN_LDUX(lwa, ld32s, 0x15, 0x0B, PPC_64B) -GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B) -GEN_LDUX(ld, ld64_i64, 0x15, 0x01, PPC_64B) -GEN_LDX(ld, ld64_i64, 0x15, 0x00, PPC_64B) GEN_LDX_E(ldbr, ld64ur_i64, 0x14, 0x10, PPC_NONE, PPC2_DBRX, CHK_NONE) /* HV/P7 and later only */ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index ce034a14a7..6140dd41ca 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -36,6 +36,95 @@ static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) return true; } +/* + * Fixed-Point Load/Store Instructions + */ + +static bool do_ldst(DisasContext *ctx, int rt, int ra, TCGv displ, bool update, + bool store, MemOp mop) +{ + TCGv ea; + + if (update && (ra == 0 || (!store && ra == rt))) { + gen_invalid(ctx); + return true; + } + gen_set_access_type(ctx, ACCESS_INT); + + ea = tcg_temp_new(); + if (ra) { + tcg_gen_add_tl(ea, cpu_gpr[ra], displ); + } else { + tcg_gen_mov_tl(ea, displ); + } + if (NARROW_MODE(ctx)) { + tcg_gen_ext32u_tl(ea, ea); + } + mop ^= ctx->default_tcg_memop_mask; + if (store) { + tcg_gen_qemu_st_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop); + } else { + tcg_gen_qemu_ld_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop); + } + if (update) { + tcg_gen_mov_tl(cpu_gpr[ra], ea); + } + tcg_temp_free(ea); + + return true; +} + +static bool do_ldst_D(DisasContext *ctx, arg_D *a, bool update, bool store, + MemOp mop) +{ + return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop); +} + +static bool do_ldst_X(DisasContext *ctx, arg_X *a, bool update, + bool store, MemOp mop) +{ + return do_ldst(ctx, a->rt, a->ra, cpu_gpr[a->rb], update, store, mop); +} + +/* Load Byte and Zero */ +TRANS(LBZ, do_ldst_D, false, false, MO_UB) +TRANS(LBZX, do_ldst_X, false, false, MO_UB) +TRANS(LBZU, do_ldst_D, true, false, MO_UB) +TRANS(LBZUX, do_ldst_X, true, false, MO_UB) + +/* Load Halfword and Zero */ +TRANS(LHZ, do_ldst_D, false, false, MO_UW) +TRANS(LHZX, do_ldst_X, false, false, MO_UW) +TRANS(LHZU, do_ldst_D, true, false, MO_UW) +TRANS(LHZUX, do_ldst_X, true, false, MO_UW) + +/* Load Halfword Algebraic */ +TRANS(LHA, do_ldst_D, false, false, MO_SW) +TRANS(LHAX, do_ldst_X, false, false, MO_SW) +TRANS(LHAU, do_ldst_D, true, false, MO_SW) +TRANS(LHAXU, do_ldst_X, true, false, MO_SW) + +/* Load Word and Zero */ +TRANS(LWZ, do_ldst_D, false, false, MO_UL) +TRANS(LWZX, do_ldst_X, false, false, MO_UL) +TRANS(LWZU, do_ldst_D, true, false, MO_UL) +TRANS(LWZUX, do_ldst_X, true, false, MO_UL) + +/* Load Word Algebraic */ +TRANS64(LWA, do_ldst_D, false, false, MO_SL) +TRANS64(LWAX, do_ldst_X, false, false, MO_SL) +TRANS64(LWAUX, do_ldst_X, true, false, MO_SL) + +/* Load Doubleword */ +TRANS64(LD, do_ldst_D, false, false, MO_Q) +TRANS64(LDX, do_ldst_X, false, false, MO_Q) +TRANS64(LDU, do_ldst_D, true, false, MO_Q) +TRANS64(LDUX, do_ldst_X, true, false, MO_Q) + +/* + * Fixed-Point Arithmetic Instructions + */ + static bool trans_ADDI(DisasContext *ctx, arg_D *a) { if (a->ra) { From patchwork Mon May 17 20:50:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 440235 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1439761jac; Mon, 17 May 2021 14:02:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxfdgRderJNE765c7UVyib3FG20W5doOhPVkaBotBeZPEtFwzQlW1n54ckHfO/g1jGhLRlH X-Received: by 2002:a92:d290:: with SMTP id p16mr1331253ilp.80.1621285375192; Mon, 17 May 2021 14:02:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621285375; cv=none; d=google.com; s=arc-20160816; b=zUqJPW/MWmzIH1rxWN2WW/GGy2U0Wd4ZOWEAREaS2hHJ9KXnRBeirwjtvllSOAH7hx B21FrE+OBJK8DwoePYXKdXMLLuTsP74Cvwjjdlh1mFtPNyNlu7crDeGd9xDI2Qt/cBfA AL9/0OGByBS9MW3txE7fkQgjKER9trA4CAS1Z1s9CWdTPKN7cor8ZigBvejtSTGZVvxE w90mvdHolp9fW5oDg7qbSHMGXKip3XXOv1lkYh20pn5pNm3Yii+7pfq7hB0v5mCDm0qq 4QfReJ3+lYD/PKCvDaHYAWFWB/x/ACLMEih+MR8hrX2xykViBFzKUUkERFPxpgEgt6uP ynUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=txcBGPJ0yNhU/1vhT6DVGYhbbXE+awF4P4Yx9drAHCM=; b=RCua9pf3Y29Ml2gKjm+prSnUA3/vTJNnm13oEQtYsoPQtggFKsbj9SL6cIrdekqGs8 wOus3+Us7LVcIv1JAi8/4d0/fYAXhhwKiz+Z+h1KpSo9XWvE+Te1qqGhYqm4ILKvtOBw lAJ05FRmkEM2IS+rC/FYaJEr/9XNWOqn2J6Rm6t0eFlkGD8bRoVS724fyBLaxgZ/z+Q3 i6V9eHY1TFV2iMR58fmR3AkT6heIf8sr2JkPvmUraRyPZ4HSAj73FeAz4/DJ/tFlTDNR nrgLChki9tQ3Bfsu3Jby1qvRJGCoACjucOr6WugAGFrrawhv6skxW8wCnWMzt2i+5vNB 8rtw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Mon, 17 May 2021 16:53:50 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:35 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 9232D80139F; Mon, 17 May 2021 17:50:34 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 16/23] target/ppc: Implement prefixed integer load instructions Date: Mon, 17 May 2021 17:50:18 -0300 Message-Id: <20210517205025.3777947-17-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:35.0066 (UTC) FILETIME=[48C5F1A0:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/insn64.decode | 15 +++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 16 ++++++++++++++++ 2 files changed, 31 insertions(+) -- 2.25.1 diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 9aa5097a98..547bd1736f 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -24,6 +24,21 @@ ...... rt:5 ra:5 ................ \ &PLS_D si=%pls_si +### Fixed-Point Load Instructions + +PLBZ 000001 10 0--.-- .................. \ + 100010 ..... ..... ................ @PLS_D +PLHZ 000001 10 0--.-- .................. \ + 101000 ..... ..... ................ @PLS_D +PLHA 000001 10 0--.-- .................. \ + 101010 ..... ..... ................ @PLS_D +PLWZ 000001 10 0--.-- .................. \ + 100000 ..... ..... ................ @PLS_D +PLWA 000001 00 0--.-- .................. \ + 101001 ..... ..... ................ @PLS_D +PLD 000001 00 0--.-- .................. \ + 111001 ..... ..... ................ @PLS_D + ### Fixed-Point Arithmetic Instructions PADDI 000001 10 0--.-- .................. \ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 6140dd41ca..7687f31d6f 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -80,6 +80,16 @@ static bool do_ldst_D(DisasContext *ctx, arg_D *a, bool update, bool store, return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop); } +static bool do_ldst_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool update, + bool store, MemOp mop) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + return do_ldst_D(ctx, &d, update, store, mop); +} + static bool do_ldst_X(DisasContext *ctx, arg_X *a, bool update, bool store, MemOp mop) { @@ -91,35 +101,41 @@ TRANS(LBZ, do_ldst_D, false, false, MO_UB) TRANS(LBZX, do_ldst_X, false, false, MO_UB) TRANS(LBZU, do_ldst_D, true, false, MO_UB) TRANS(LBZUX, do_ldst_X, true, false, MO_UB) +TRANS(PLBZ, do_ldst_PLS_D, false, false, MO_UB) /* Load Halfword and Zero */ TRANS(LHZ, do_ldst_D, false, false, MO_UW) TRANS(LHZX, do_ldst_X, false, false, MO_UW) TRANS(LHZU, do_ldst_D, true, false, MO_UW) TRANS(LHZUX, do_ldst_X, true, false, MO_UW) +TRANS(PLHZ, do_ldst_PLS_D, false, false, MO_UW) /* Load Halfword Algebraic */ TRANS(LHA, do_ldst_D, false, false, MO_SW) TRANS(LHAX, do_ldst_X, false, false, MO_SW) TRANS(LHAU, do_ldst_D, true, false, MO_SW) TRANS(LHAXU, do_ldst_X, true, false, MO_SW) +TRANS(PLHA, do_ldst_PLS_D, false, false, MO_SW) /* Load Word and Zero */ TRANS(LWZ, do_ldst_D, false, false, MO_UL) TRANS(LWZX, do_ldst_X, false, false, MO_UL) TRANS(LWZU, do_ldst_D, true, false, MO_UL) TRANS(LWZUX, do_ldst_X, true, false, MO_UL) +TRANS(PLWZ, do_ldst_PLS_D, false, false, MO_UL) /* Load Word Algebraic */ TRANS64(LWA, do_ldst_D, false, false, MO_SL) TRANS64(LWAX, do_ldst_X, false, false, MO_SL) TRANS64(LWAUX, do_ldst_X, true, false, MO_SL) +TRANS64(PLWA, do_ldst_PLS_D, false, false, MO_SL) /* Load Doubleword */ TRANS64(LD, do_ldst_D, false, false, MO_Q) TRANS64(LDX, do_ldst_X, false, false, MO_Q) TRANS64(LDU, do_ldst_D, true, false, MO_Q) TRANS64(LDUX, do_ldst_X, true, false, MO_Q) +TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q) /* * Fixed-Point Arithmetic Instructions From patchwork Mon May 17 20:50:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. 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[209.51.188.17]) by mx.google.com with ESMTPS id u12si20464264ilm.67.2021.05.17.14.05.05 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 May 2021 14:05:05 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:58092 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likQC-0007zV-V4 for patch@linaro.org; Mon, 17 May 2021 17:05:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46330) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1likFO-000663-7H; Mon, 17 May 2021 16:53:54 -0400 Received: from [201.28.113.2] (port=46491 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1likFL-0001mN-M5; Mon, 17 May 2021 16:53:53 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:35 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 0A5698000C2; Mon, 17 May 2021 17:50:35 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 17/23] target/ppc: Move D/DS/X-form integer stores to decodetree Date: Mon, 17 May 2021 17:50:19 -0300 Message-Id: <20210517205025.3777947-18-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:35.0504 (UTC) FILETIME=[4908C700:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson These are all connected by macros in the legacy decoding. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 22 ++++++ target/ppc/translate.c | 85 +--------------------- target/ppc/translate/fixedpoint-impl.c.inc | 24 ++++++ 3 files changed, 49 insertions(+), 82 deletions(-) -- 2.25.1 diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 70f64c235b..00ec0f4328 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -57,6 +57,28 @@ LDU 111010 ..... ..... ..............01 @DS LDX 011111 ..... ..... ..... 0000010101 - @X LDUX 011111 ..... ..... ..... 0000110101 - @X +### Fixed-Point Store Instructions + +STB 100110 ..... ..... ................ @D +STBU 100111 ..... ..... ................ @D +STBX 011111 ..... ..... ..... 0011010111 - @X +STBUX 011111 ..... ..... ..... 0011110111 - @X + +STH 101100 ..... ..... ................ @D +STHU 101101 ..... ..... ................ @D +STHX 011111 ..... ..... ..... 0110010111 - @X +STHUX 011111 ..... ..... ..... 0110110111 - @X + +STW 100100 ..... ..... ................ @D +STWU 100101 ..... ..... ................ @D +STWX 011111 ..... ..... ..... 0010010111 - @X +STWUX 011111 ..... ..... ..... 0010110111 - @X + +STD 111110 ..... ..... ..............00 @DS +STDU 111110 ..... ..... ..............01 @DS +STDX 011111 ..... ..... ..... 0010010101 - @X +STDUX 011111 ..... ..... ..... 0010110101 - @X + ### Fixed-Point Arithmetic Instructions ADDI 001110 ..... ..... ................ @D diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e037efcfe1..bf624edba6 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3385,7 +3385,9 @@ static void glue(gen_qemu_, stop)(DisasContext *ctx, \ tcg_gen_qemu_st_tl(val, addr, ctx->mem_idx, op); \ } +#if defined(TARGET_PPC64) || !defined(CONFIG_USER_ONLY) GEN_QEMU_STORE_TL(st8, DEF_MEMOP(MO_UB)) +#endif GEN_QEMU_STORE_TL(st16, DEF_MEMOP(MO_UW)) GEN_QEMU_STORE_TL(st32, DEF_MEMOP(MO_UL)) @@ -3518,52 +3520,6 @@ static void gen_lq(DisasContext *ctx) #endif /*** Integer store ***/ -#define GEN_ST(name, stop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_STU(name, stop, opc, type) \ -static void glue(gen_, stop##u)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - if (type == PPC_64B) \ - gen_addr_imm_index(ctx, EA, 0x03); \ - else \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - -#define GEN_STUX(name, stop, opc2, opc3, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - gen_addr_reg_index(ctx, EA); \ - gen_qemu_##stop(ctx, cpu_gpr[rS(ctx->opcode)], EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ -} - #define GEN_STX_E(name, stop, opc2, opc3, type, type2, chk) \ static void glue(gen_, name##x)(DisasContext *ctx) \ { \ @@ -3581,19 +3537,6 @@ static void glue(gen_, name##x)(DisasContext *ctx) \ #define GEN_STX_HVRM(name, stop, opc2, opc3, type) \ GEN_STX_E(name, stop, opc2, opc3, type, PPC_NONE, CHK_HVRM) -#define GEN_STS(name, stop, op, type) \ -GEN_ST(name, stop, op | 0x20, type); \ -GEN_STU(name, stop, op | 0x21, type); \ -GEN_STUX(name, stop, 0x17, op | 0x01, type); \ -GEN_STX(name, stop, 0x17, op | 0x00, type) - -/* stb stbu stbux stbx */ -GEN_STS(stb, st8, 0x06, PPC_INTEGER); -/* sth sthu sthux sthx */ -GEN_STS(sth, st16, 0x0C, PPC_INTEGER); -/* stw stwu stwux stwx */ -GEN_STS(stw, st32, 0x04, PPC_INTEGER); - #define GEN_STEPX(name, stop, opc2, opc3) \ static void glue(gen_, name##epx)(DisasContext *ctx) \ { \ @@ -3615,8 +3558,6 @@ GEN_STEPX(std, DEF_MEMOP(MO_Q), 0x1d, 0x04) #endif #if defined(TARGET_PPC64) -GEN_STUX(std, st64_i64, 0x15, 0x05, PPC_64B); -GEN_STX(std, st64_i64, 0x15, 0x04, PPC_64B); GEN_STX_HVRM(stdcix, st64_i64, 0x15, 0x1f, PPC_CILDST) GEN_STX_HVRM(stwcix, st32, 0x15, 0x1c, PPC_CILDST) GEN_STX_HVRM(sthcix, st16, 0x15, 0x1d, PPC_CILDST) @@ -8252,31 +8193,11 @@ GEN_LDEPX(lw, DEF_MEMOP(MO_UL), 0x1F, 0x00) GEN_LDEPX(ld, DEF_MEMOP(MO_Q), 0x1D, 0x00) #endif -#undef GEN_ST -#undef GEN_STU -#undef GEN_STUX #undef GEN_STX_E -#undef GEN_STS -#define GEN_ST(name, stop, opc, type) \ -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_STU(name, stop, opc, type) \ -GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_STUX(name, stop, opc2, opc3, type) \ -GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type), #define GEN_STX_E(name, stop, opc2, opc3, type, type2, chk) \ GEN_HANDLER_E(name##x, 0x1F, opc2, opc3, 0x00000000, type, type2), -#define GEN_STS(name, stop, op, type) \ -GEN_ST(name, stop, op | 0x20, type) \ -GEN_STU(name, stop, op | 0x21, type) \ -GEN_STUX(name, stop, 0x17, op | 0x01, type) \ -GEN_STX(name, stop, 0x17, op | 0x00, type) - -GEN_STS(stb, st8, 0x06, PPC_INTEGER) -GEN_STS(sth, st16, 0x0C, PPC_INTEGER) -GEN_STS(stw, st32, 0x04, PPC_INTEGER) + #if defined(TARGET_PPC64) -GEN_STUX(std, st64_i64, 0x15, 0x05, PPC_64B) -GEN_STX(std, st64_i64, 0x15, 0x04, PPC_64B) GEN_STX_E(stdbr, st64r_i64, 0x14, 0x14, PPC_NONE, PPC2_DBRX, CHK_NONE) GEN_STX_HVRM(stdcix, st64_i64, 0x15, 0x1f, PPC_CILDST) GEN_STX_HVRM(stwcix, st32, 0x15, 0x1c, PPC_CILDST) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 7687f31d6f..adeee33289 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -137,6 +137,30 @@ TRANS64(LDU, do_ldst_D, true, false, MO_Q) TRANS64(LDUX, do_ldst_X, true, false, MO_Q) TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q) +/* Store Byte */ +TRANS(STB, do_ldst_D, false, true, MO_UB) +TRANS(STBX, do_ldst_X, false, true, MO_UB) +TRANS(STBU, do_ldst_D, true, true, MO_UB) +TRANS(STBUX, do_ldst_X, true, true, MO_UB) + +/* Store Halfword */ +TRANS(STH, do_ldst_D, false, true, MO_UW) +TRANS(STHX, do_ldst_X, false, true, MO_UW) +TRANS(STHU, do_ldst_D, true, true, MO_UW) +TRANS(STHUX, do_ldst_X, true, true, MO_UW) + +/* Store Word */ +TRANS(STW, do_ldst_D, false, true, MO_UL) +TRANS(STWX, do_ldst_X, false, true, MO_UL) +TRANS(STWU, do_ldst_D, true, true, MO_UL) +TRANS(STWUX, do_ldst_X, true, true, MO_UL) + +/* Store Doubleword */ +TRANS64(STD, do_ldst_D, false, true, MO_Q) +TRANS64(STDX, do_ldst_X, false, true, MO_Q) +TRANS64(STDU, do_ldst_D, true, true, MO_Q) +TRANS64(STDUX, do_ldst_X, true, true, MO_Q) + /* * Fixed-Point Arithmetic Instructions */ From patchwork Mon May 17 20:50:20 2021 Content-Type: text/plain; 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Mon, 17 May 2021 16:53:56 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 17 May 2021 17:50:35 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 77D508000C2; Mon, 17 May 2021 17:50:35 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 18/23] target/ppc: Implement prefixed integer store instructions Date: Mon, 17 May 2021 17:50:20 -0300 Message-Id: <20210517205025.3777947-19-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> References: <20210517205025.3777947-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 May 2021 20:50:35.0972 (UTC) FILETIME=[49503040:01D74B5E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, f4bug@amsat.org, luis.pires@eldorado.org.br, lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst --- target/ppc/insn64.decode | 12 ++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 4 ++++ 2 files changed, 16 insertions(+) -- 2.25.1 diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 547bd1736f..72c5944a53 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -39,6 +39,18 @@ PLWA 000001 00 0--.-- .................. \ PLD 000001 00 0--.-- .................. \ 111001 ..... ..... ................ @PLS_D +### Fixed-Point Store Instructions + +PSTW 000001 10 0--.-- .................. \ + 100100 ..... ..... ................ @PLS_D +PSTB 000001 10 0--.-- .................. \ + 100110 ..... ..... ................ @PLS_D +PSTH 000001 10 0--.-- .................. \ + 101100 ..... ..... ................ @PLS_D + +PSTD 000001 00 0--.-- .................. \ + 111101 ..... ..... ................ @PLS_D + ### Fixed-Point Arithmetic Instructions PADDI 000001 10 0--.-- .................. \ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index adeee33289..2d2d874146 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -142,24 +142,28 @@ TRANS(STB, do_ldst_D, false, true, MO_UB) TRANS(STBX, do_ldst_X, false, true, MO_UB) TRANS(STBU, do_ldst_D, true, true, MO_UB) TRANS(STBUX, do_ldst_X, true, true, MO_UB) +TRANS(PSTB, do_ldst_PLS_D, false, true, MO_UB) /* Store Halfword */ TRANS(STH, do_ldst_D, false, true, MO_UW) TRANS(STHX, do_ldst_X, false, true, MO_UW) TRANS(STHU, do_ldst_D, true, true, MO_UW) TRANS(STHUX, do_ldst_X, true, true, MO_UW) +TRANS(PSTH, do_ldst_PLS_D, false, true, MO_UW) /* Store Word */ TRANS(STW, do_ldst_D, false, true, MO_UL) TRANS(STWX, do_ldst_X, false, true, MO_UL) TRANS(STWU, do_ldst_D, true, true, MO_UL) TRANS(STWUX, do_ldst_X, true, true, MO_UL) +TRANS(PSTW, do_ldst_PLS_D, false, true, MO_UL) /* Store Doubleword */ TRANS64(STD, do_ldst_D, false, true, MO_Q) TRANS64(STDX, do_ldst_X, false, true, MO_Q) TRANS64(STDU, do_ldst_D, true, true, MO_Q) TRANS64(STDUX, do_ldst_X, true, true, MO_Q) +TRANS64(PSTD, do_ldst_PLS_D, false, true, MO_Q) /* * Fixed-Point Arithmetic Instructions