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[209.132.180.67]) by mx.google.com with ESMTP id y11-v6si1633279pgp.234.2018.06.26.09.26.56; Tue, 26 Jun 2018 09:26:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=QBNPm1AD; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751094AbeFZQ0z (ORCPT + 5 others); Tue, 26 Jun 2018 12:26:55 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:56146 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750883AbeFZQ0y (ORCPT ); Tue, 26 Jun 2018 12:26:54 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w5QGQGvP062760; Tue, 26 Jun 2018 11:26:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1530030376; bh=Os1Uv5yxr1em3kAWgJt9zoZ78ARx37RU/SINeSNK+0o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QBNPm1ADjyZ1eDjgpzbHFJjgjl/m2g96wxeTXrt9QZdITp2VtPiZFH3Vc/i8Neqkt B2QudGtY9abJDqjuVMHb6g18AAM0EggU25rfMSVSv8Or/PlIhDpjxUCi29blp/iehy IK/vMEJY1/4xhDW5+Wv/i2SbtXQfg4RXT3Ce1DDw= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQGsP004642; Tue, 26 Jun 2018 11:26:16 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 26 Jun 2018 11:26:15 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 26 Jun 2018 11:26:15 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQFB7005729; Tue, 26 Jun 2018 11:26:15 -0500 From: Nishanth Menon To: Will Deacon , Catalin Marinas , Mark Rutland , Rob Herring CC: Tony Lindgren , Russell King , Santosh Shilimkar , , , , Nishanth Menon , Tero Kristo , Sekhar Nori , Olof Johansson , Arnd Bergmann , Sudeep Holla Subject: [PATCH V2 2/5] arm64: Add support for TI's K3 Multicore SoC architecture Date: Tue, 26 Jun 2018 11:26:12 -0500 Message-ID: <20180626162615.19194-3-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180626162615.19194-1-nm@ti.com> References: <20180626162615.19194-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for Texas Instrument's K3 Multicore SoC architecture processors. Reviewed-by: Tony Lindgren Signed-off-by: Nishanth Menon --- Changes since V1: * Picked up Tony's reviewed-by V1: https://patchwork.kernel.org/patch/10475323/ RFC: https://patchwork.kernel.org/patch/10447633/ arch/arm64/Kconfig.platforms | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index d5aeac351fc3..52df25bf4f8c 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -71,6 +71,13 @@ config ARCH_EXYNOS help This enables support for ARMv8 based Samsung Exynos SoC family. +config ARCH_K3 + bool "Texas Instruments Inc. K3 multicore SoC architecture" + select PM_GENERIC_DOMAINS if PM + help + This enables support for Texas Instruments' K3 multicore SoC + architecture. + config ARCH_LAYERSCAPE bool "ARMv8 based Freescale Layerscape SoC family" select EDAC_SUPPORT From patchwork Tue Jun 26 16:26:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 140029 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp5456692lji; Tue, 26 Jun 2018 09:33:48 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKfbMfOrwH+E4xnrPWo//3yW5kxLm0o7uO+LeLGcIcv/pcqLRY4ubSXtHowEP6Bt+g8LcSg X-Received: by 2002:a17:902:8f94:: with SMTP id z20-v6mr2334285plo.337.1530030828350; Tue, 26 Jun 2018 09:33:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530030828; cv=none; d=google.com; s=arc-20160816; b=rlQVBVVtkLGpUNIKqMUEVk+ICtsoI5wYQ0yfUNObOKQ9WpAwx5RKvvDfWdO939gn1J Opfg+g3i4RzNlVWjQPEdbl/ljLl9ULtG15HrILuLK07CHcAryw3vRoTpbjDwI2XIizhi nQv9t3O7a79bemGysT/U4+1ENvKpgdkjGXgRqpXTjNPQBB/Atw4zAHhhxoI75IwXTVUA tXXBl19cuEZ9ttlHGCiEuBCEuoZDMJBwc3nTNnBI8pMRQzzR6l26gB8bgiy4UwuNhclk hIof71dwD1F0Vghqjlji9MSYwh8YaU8eYhLHGa0cDXpiDfc737JYVc3X7eLKwm5ErHjO KzOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=a/h7FWYGMq0Krrhc66T1bJaFYwYvZ4lrZmHx18QGt5Q=; b=XjDoklOaIYlZsiFmhOjYM8YNFi4H3ncS87dNRY7qQwadXdyLaQ/IAdMwzy4w+JjOfp Z2o6a3t2xFvAryWFO72HZkCgh+G0D7XHii6XDA/v+vRlncj4UEtf2+s+ZdFlvbm2jAfn Pap4t8sLgclnSsNOtb9PmhEQrfyIgwGHVGr2Ov1t97ybpkD0tgQi9rZ72dbnQrC3Ag60 RH+uhyMX2/y0wO8B0W+hQxRn5WIdZBd53hp6B00AcVhaVVBlU+SMb0GN5kd/E2ycnVhV z0e6PtRqUtwqCRNkB12uCx3cGxEsnJEBnLMK3ibwfNAgtHdMru5cRamQ27jCREA8G/oT WOYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=s0WimmQp; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 26 Jun 2018 11:26:15 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQFbU024032; Tue, 26 Jun 2018 11:26:15 -0500 From: Nishanth Menon To: Will Deacon , Catalin Marinas , Mark Rutland , Rob Herring CC: Tony Lindgren , Russell King , Santosh Shilimkar , , , , Nishanth Menon , Tero Kristo , Sekhar Nori , Olof Johansson , Arnd Bergmann , Sudeep Holla Subject: [PATCH V2 4/5] soc: ti: Add Support for AM654 SoC config option Date: Tue, 26 Jun 2018 11:26:14 -0500 Message-ID: <20180626162615.19194-5-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180626162615.19194-1-nm@ti.com> References: <20180626162615.19194-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add option to build AM6 SoC specific components Reviewed-by: Tony Lindgren Signed-off-by: Benjamin Fair Signed-off-by: Nishanth Menon --- Changes since V1: * Picked up Tony's reviewed-by V1:https://patchwork.kernel.org/patch/10475305/ RFC: (new patch broken out from: https://patchwork.kernel.org/patch/10447719/) drivers/soc/ti/Kconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig index 92770d84a288..be4570baad96 100644 --- a/drivers/soc/ti/Kconfig +++ b/drivers/soc/ti/Kconfig @@ -1,3 +1,17 @@ +# 64-bit ARM SoCs from TI +if ARM64 + +if ARCH_K3 + +config ARCH_K3_AM6_SOC + bool "K3 AM6 SoC" + help + Enable support for TI's AM6 SoC Family support + +endif + +endif + # # TI SOC drivers # From patchwork Tue Jun 26 16:26:15 2018 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id o1-v6si1825371pld.424.2018.06.26.09.27.09; Tue, 26 Jun 2018 09:27:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jznJxwwn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752414AbeFZQ1I (ORCPT + 5 others); Tue, 26 Jun 2018 12:27:08 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:56152 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751796AbeFZQ0z (ORCPT ); Tue, 26 Jun 2018 12:26:55 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w5QGQGNM062756; Tue, 26 Jun 2018 11:26:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1530030376; bh=0TA0EzAj75xsqlZAD951i6UiO3LFPJQfV06foUxkNLo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jznJxwwnaC10FvFPysDMKQg2hZHoWf70rcY+5Ze9nw1PrvR5V91ASeF3Kb2YErLxl zfU3N/7u96jStPozZE1jMRGEOqkFlAJv9TvrRTIkSyrMNJj2W4+3rEHfXH2xLQSV3+ trtEcFzbW2jhwg/TmqYG4tci+j7Ya2vqIFmF/ASQ= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQGxa004628; Tue, 26 Jun 2018 11:26:16 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 26 Jun 2018 11:26:16 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 26 Jun 2018 11:26:15 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5QGQFvt001859; Tue, 26 Jun 2018 11:26:15 -0500 From: Nishanth Menon To: Will Deacon , Catalin Marinas , Mark Rutland , Rob Herring CC: Tony Lindgren , Russell King , Santosh Shilimkar , , , , Nishanth Menon , Tero Kristo , Sekhar Nori , Olof Johansson , Arnd Bergmann , Sudeep Holla Subject: [PATCH V2 5/5] arm64: dts: ti: Add support for AM654 EVM base board Date: Tue, 26 Jun 2018 11:26:15 -0500 Message-ID: <20180626162615.19194-6-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180626162615.19194-1-nm@ti.com> References: <20180626162615.19194-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The EValuation Module(EVM) platform for AM654 consists of a common Base board + one or more of daughter cards, which include: a) "Personality Modules", which can be specific to a profile, such as ICSSG enabled or Multi-media (including audio). b) SERDES modules, which may be 2 lane PCIe or two port PCIe + USB2 c) Camera daughter card d) various display panels Among other options. There are two basic configurations defined which include an "EVM" configuration and "IDK" (Industrial development kit) which differ in the specific combination of daughter cards that are used. To simplify support, we choose to support just the base board as the core device tree file and all daughter cards would be expected to be device tree overlays. Reviewed-by: Tony Lindgren Signed-off-by: Lokesh Vutla Signed-off-by: Nishanth Menon --- Changes since V1: * Picked up Tony's reviewed-by V1: https://patchwork.kernel.org/patch/10475333/ RFC: https://patchwork.kernel.org/patch/10447741/ MAINTAINERS | 1 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/ti/Makefile | 9 +++++++ arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 36 ++++++++++++++++++++++++++ 4 files changed, 47 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/Makefile create mode 100644 arch/arm64/boot/dts/ti/k3-am654-base-board.dts -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/MAINTAINERS b/MAINTAINERS index 6785ceaf5b0b..e9e916d1fb52 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2093,6 +2093,7 @@ M: Nishanth Menon L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Supported F: Documentation/devicetree/bindings/arm/ti/k3.txt +F: arch/arm64/boot/dts/ti/Makefile F: arch/arm64/boot/dts/ti/k3-* ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 3543bc324553..4690364d584b 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -23,5 +23,6 @@ subdir-y += rockchip subdir-y += socionext subdir-y += sprd subdir-y += synaptics +subdir-y += ti subdir-y += xilinx subdir-y += zte diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile new file mode 100644 index 000000000000..63e619d0b5b8 --- /dev/null +++ b/arch/arm64/boot/dts/ti/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Make file to build device tree binaries for boards based on +# Texas Instruments Inc processors +# +# Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ +# + +dtb-$(CONFIG_ARCH_K3_AM6_SOC) += k3-am654-base-board.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts new file mode 100644 index 000000000000..af6956fdc13f --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-am654.dtsi" + +/ { + compatible = "ti,am654-evm", "ti,am654"; + model = "Texas Instruments AM654 Base Board"; + + chosen { + stdout-path = "serial2:115200n8"; + bootargs = "earlycon=ns16550a,mmio32,0x02800000"; + }; + + memory@80000000 { + device_type = "memory"; + /* 4G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>, + <0x00000008 0x80000000 0x00000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + secure_ddr: secure_ddr@9e800000 { + reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + }; +};