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Sun, 02 May 2021 16:18:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/28] meson: Split out tcg/meson.build Date: Sun, 2 May 2021 16:18:17 -0700 Message-Id: <20210502231844.1977630-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- meson.build | 8 +------- tcg/meson.build | 13 +++++++++++++ 2 files changed, 14 insertions(+), 7 deletions(-) create mode 100644 tcg/meson.build -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/meson.build b/meson.build index d8bb1ec5aa..f04565c5bb 100644 --- a/meson.build +++ b/meson.build @@ -1934,14 +1934,7 @@ common_ss.add(capstone) specific_ss.add(files('cpu.c', 'disas.c', 'gdbstub.c'), capstone) specific_ss.add(when: 'CONFIG_TCG', if_true: files( 'fpu/softfloat.c', - 'tcg/optimize.c', - 'tcg/tcg-common.c', - 'tcg/tcg-op-gvec.c', - 'tcg/tcg-op-vec.c', - 'tcg/tcg-op.c', - 'tcg/tcg.c', )) -specific_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('tcg/tci.c')) # Work around a gcc bug/misfeature wherein constant propagation looks # through an alias: @@ -1971,6 +1964,7 @@ subdir('net') subdir('replay') subdir('semihosting') subdir('hw') +subdir('tcg') subdir('accel') subdir('plugins') subdir('bsd-user') diff --git a/tcg/meson.build b/tcg/meson.build new file mode 100644 index 0000000000..84064a341e --- /dev/null +++ b/tcg/meson.build @@ -0,0 +1,13 @@ +tcg_ss = ss.source_set() + +tcg_ss.add(files( + 'optimize.c', + 'tcg.c', + 'tcg-common.c', + 'tcg-op.c', + 'tcg-op-gvec.c', + 'tcg-op-vec.c', +)) +tcg_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('tci.c')) + +specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss) From patchwork Sun May 2 23:18:18 2021 Content-Type: text/plain; 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Sun, 02 May 2021 16:18:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/28] meson: Split out fpu/meson.build Date: Sun, 2 May 2021 16:18:18 -0700 Message-Id: <20210502231844.1977630-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- meson.build | 4 +--- fpu/meson.build | 1 + 2 files changed, 2 insertions(+), 3 deletions(-) create mode 100644 fpu/meson.build -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/meson.build b/meson.build index f04565c5bb..bc70c9a2b3 100644 --- a/meson.build +++ b/meson.build @@ -1932,9 +1932,6 @@ subdir('softmmu') common_ss.add(capstone) specific_ss.add(files('cpu.c', 'disas.c', 'gdbstub.c'), capstone) -specific_ss.add(when: 'CONFIG_TCG', if_true: files( - 'fpu/softfloat.c', -)) # Work around a gcc bug/misfeature wherein constant propagation looks # through an alias: @@ -1965,6 +1962,7 @@ subdir('replay') subdir('semihosting') subdir('hw') subdir('tcg') +subdir('fpu') subdir('accel') subdir('plugins') subdir('bsd-user') diff --git a/fpu/meson.build b/fpu/meson.build new file mode 100644 index 0000000000..1a9992ded5 --- /dev/null +++ b/fpu/meson.build @@ -0,0 +1 @@ +specific_ss.add(when: 'CONFIG_TCG', if_true: files('softfloat.c')) From patchwork Sun May 2 23:18:19 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id i9si11845814iog.54.2021.05.02.16.19.28 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:19:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iiJcnhI5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59002 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLN1-0008E7-FY for patch@linaro.org; Sun, 02 May 2021 19:19:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36862) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMS-0008Bd-Oe for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:52 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]:42948) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMP-0002qb-Iu for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:52 -0400 Received: by mail-pg1-x52b.google.com with SMTP id m12so2442936pgr.9 for ; Sun, 02 May 2021 16:18:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Kr/Q5Rp+D/puQ2m1VQCJ8sEPTdRSEK7blwecPZuFo+Q=; b=iiJcnhI5wKoANxzKF5zj9QbMyga3ZpZ5YA452dUeNw2O/+vFoQT0JFyfxGy8qk67Hq tNi1v1fbjJmeN0vTM1ULtwo2JM6urCYw4gl6mq4mm45o4YTvrbd13Xs3Od2LFnTM6T3+ W2nSdWtRjVXjvOXsxDDOV6A44FRCEaXuQoWSd0+4DgyeGh4uHNuIP8hF16SqQ3BuU7N2 2SO1eGa7PfIJLPO8XTcUza0aoS+emENhJCTfmx+38MA9Xz3upuWyaUeycvwSqWU6xAkH 6UZf5v7TPusyllBh81B2cG5VtH1z7VZ9r0KvUOWq+/BLYoaWpbvjSuwxNfHayjooOlhZ KEQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Kr/Q5Rp+D/puQ2m1VQCJ8sEPTdRSEK7blwecPZuFo+Q=; b=RFybpVaKkXB5BklFU2HVApQiNwGuFo21OUAiXAEvUi9RdVoFOhXKbYJLPU55BauZCR tLxWNo1kgriX9H6Vt2NXknsQsG+eX8gKOGfzukbh0jrllH84Eik7NXsrRplfVRKlBnEm t6l0p7SSXvQKikbl+JMuLslK+A319CBGWRtnQJpHuKleQ30uPzGhH45XDqLS+oFo7ROF jaz3corHzmdxejfMpnE6aiKY+GqSlspwE7RP/ZSYO+DYtRRIMqrQKNejMuoNAKWfZl+n ArlxggueDKvqdnceFRJiY5N//e0P+v7xe5R/EcMW/DFCSBWUJ1TYz560hbCnwV58IWBx Y0Hg== X-Gm-Message-State: AOAM533MHkpi4YDFytfUL7kPqQ9Fleb9An/Y1mZjbG2mK7yLP+/fEcLA l1E/JZZz0KwsdJbtmb7fuqRC2FlObSXz7w== X-Received: by 2002:a65:6a0d:: with SMTP id m13mr15831312pgu.43.1619997528163; Sun, 02 May 2021 16:18:48 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/28] tcg: Re-order tcg_region_init vs tcg_prologue_init Date: Sun, 2 May 2021 16:18:19 -0700 Message-Id: <20210502231844.1977630-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Instead of delaying tcg_region_init until after tcg_prologue_init is complete, do tcg_region_init first and let tcg_prologue_init shrink the first region by the size of the generated prologue. Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 11 --------- accel/tcg/translate-all.c | 3 +++ bsd-user/main.c | 1 - linux-user/main.c | 1 - tcg/tcg.c | 52 ++++++++++++++------------------------- 5 files changed, 22 insertions(+), 46 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index e378c2db73..f132033999 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -111,17 +111,6 @@ static int tcg_init(MachineState *ms) tcg_exec_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); mttcg_enabled = s->mttcg_enabled; - - /* - * Initialize TCG regions only for softmmu. - * - * This needs to be done later for user mode, because the prologue - * generation needs to be delayed so that GUEST_BASE is already set. - */ -#ifndef CONFIG_USER_ONLY - tcg_region_init(); -#endif /* !CONFIG_USER_ONLY */ - return 0; } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index b12d0898d0..9841eb3fb6 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1339,6 +1339,9 @@ void tcg_exec_init(unsigned long tb_size, int splitwx) splitwx, &error_fatal); assert(ok); + /* TODO: allocating regions is hand-in-glove with code_gen_buffer. */ + tcg_region_init(); + #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and initialize the prologue now. */ diff --git a/bsd-user/main.c b/bsd-user/main.c index 798aba512c..3669d2b89e 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -994,7 +994,6 @@ int main(int argc, char **argv) generating the prologue until now so that the prologue can take the real value of GUEST_BASE into account. */ tcg_prologue_init(tcg_ctx); - tcg_region_init(); /* build Task State */ memset(ts, 0, sizeof(TaskState)); diff --git a/linux-user/main.c b/linux-user/main.c index f956afccab..746d842b58 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -874,7 +874,6 @@ int main(int argc, char **argv, char **envp) generating the prologue until now so that the prologue can take the real value of GUEST_BASE into account. */ tcg_prologue_init(tcg_ctx); - tcg_region_init(); target_cpu_copy_regs(env, regs); diff --git a/tcg/tcg.c b/tcg/tcg.c index 1fbe0b686d..795a71ff25 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1209,32 +1209,18 @@ TranslationBlock *tcg_tb_alloc(TCGContext *s) void tcg_prologue_init(TCGContext *s) { - size_t prologue_size, total_size; - void *buf0, *buf1; + size_t prologue_size; /* Put the prologue at the beginning of code_gen_buffer. */ - buf0 = s->code_gen_buffer; - total_size = s->code_gen_buffer_size; - s->code_ptr = buf0; - s->code_buf = buf0; + tcg_region_assign(s, 0); + s->code_ptr = s->code_gen_ptr; + s->code_buf = s->code_gen_ptr; s->data_gen_ptr = NULL; - /* - * The region trees are not yet configured, but tcg_splitwx_to_rx - * needs the bounds for an assert. - */ - region.start = buf0; - region.end = buf0 + total_size; - #ifndef CONFIG_TCG_INTERPRETER - tcg_qemu_tb_exec = (tcg_prologue_fn *)tcg_splitwx_to_rx(buf0); + tcg_qemu_tb_exec = (tcg_prologue_fn *)tcg_splitwx_to_rx(s->code_ptr); #endif - /* Compute a high-water mark, at which we voluntarily flush the buffer - and start over. The size here is arbitrary, significantly larger - than we expect the code generation for any one opcode to require. */ - s->code_gen_highwater = s->code_gen_buffer + (total_size - TCG_HIGHWATER); - #ifdef TCG_TARGET_NEED_POOL_LABELS s->pool_labels = NULL; #endif @@ -1251,32 +1237,32 @@ void tcg_prologue_init(TCGContext *s) } #endif - buf1 = s->code_ptr; + prologue_size = tcg_current_code_size(s); + #ifndef CONFIG_TCG_INTERPRETER - flush_idcache_range((uintptr_t)tcg_splitwx_to_rx(buf0), (uintptr_t)buf0, - tcg_ptr_byte_diff(buf1, buf0)); + flush_idcache_range((uintptr_t)tcg_splitwx_to_rx(s->code_buf), + (uintptr_t)s->code_buf, prologue_size); #endif - /* Deduct the prologue from the buffer. */ - prologue_size = tcg_current_code_size(s); - s->code_gen_ptr = buf1; - s->code_gen_buffer = buf1; - s->code_buf = buf1; - total_size -= prologue_size; - s->code_gen_buffer_size = total_size; + /* Deduct the prologue from the first region. */ + region.start = s->code_ptr; - tcg_register_jit(tcg_splitwx_to_rx(s->code_gen_buffer), total_size); + /* Recompute boundaries of the first region. */ + tcg_region_assign(s, 0); + + tcg_register_jit(tcg_splitwx_to_rx(region.start), + region.end - region.start); #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { FILE *logfile = qemu_log_lock(); qemu_log("PROLOGUE: [size=%zu]\n", prologue_size); if (s->data_gen_ptr) { - size_t code_size = s->data_gen_ptr - buf0; + size_t code_size = s->data_gen_ptr - s->code_gen_ptr; size_t data_size = prologue_size - code_size; size_t i; - log_disas(buf0, code_size); + log_disas(s->code_gen_ptr, code_size); for (i = 0; i < data_size; i += sizeof(tcg_target_ulong)) { if (sizeof(tcg_target_ulong) == 8) { @@ -1290,7 +1276,7 @@ void tcg_prologue_init(TCGContext *s) } } } else { - log_disas(buf0, prologue_size); + log_disas(s->code_gen_ptr, prologue_size); } qemu_log("\n"); qemu_log_flush(); From patchwork Sun May 2 23:18:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430472 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1225515ejc; Sun, 2 May 2021 16:27:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwdcd/gc2cfFILfbSlKXvhL8xpuGJwi7MCrisXfCue6ecdudBwArUB/TU4xaajsJE37O4JW X-Received: by 2002:a37:270b:: with SMTP id n11mr16775117qkn.246.1619998052410; Sun, 02 May 2021 16:27:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998052; cv=none; d=google.com; s=arc-20160816; b=fjLrDzV2DW8674bxcPqfmxaqIyNNS6eERNfl2egqxHKVeM9J8Y/3wdZEc5g4IN81Vy kMBbvMrSnM0jLy87YOQMktftBdXFF7aZYwg/QAQ0UbJ/gLknqfcj/CPGIRRJc1pDxPin Hp3/yVt4E66o7ikXDPhaFg5G2W7VrYn++vuewblAj3bS9d9tQtDPq4TA0B37ET2uWkmz aBYVtMGFGRO+hUbZhdhVCMHnE9RU0ASOgZddJ+US6MwXNE+vU2D/VzfDzC1cEBJkr7ZZ MT7r0rucK85o9k/VG9G9iy2UtmW1YXlH9a6wWeGz58ydadVddyKL9ecvJPFOMrv9ub2B opgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4cZuoxcwQ6eXvc/QAg7Oih5qEjK3cLKB2wBaiFUenJA=; b=SYSguuqpLlbhxhOKOJXjzrYoXbxgQ83z95/uzuqdxet7u2HvrU4vKb/5uggn49y972 LS8+0lwzLHsVQmE2KEtXnCpGPXSvN7EM8fIVsh7NVXkIEdiXQ+ktzaBiCdLSKAFzXKGM T0K8eTQb9T4modX8DFFwB8kY+D7cAstrmPeORxfbVIqOoXkhhwfsHxssnn7vJ0f4Hw2g K5E8fFYovDZlX0bO0rcybSelPH3ffKEqHEtGCOmvGrGpTiy2MXKfJs1+mhxlaBpFr+st LWmalbfPYN9VoZ3zXzceHxCa+aon4Dxg+OCkmSr+BlHLm4Ijm2nLnPIGY260SDSAYf7J KgaA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FTNlv1ZE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h7si7896406qkb.75.2021.05.02.16.27.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:27:32 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FTNlv1ZE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56656 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLUp-00028l-PM for patch@linaro.org; Sun, 02 May 2021 19:27:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36890) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMU-0008Dp-Gz for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:54 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:42879) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMQ-0002qn-6m for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:54 -0400 Received: by mail-pj1-x1032.google.com with SMTP id j6-20020a17090adc86b02900cbfe6f2c96so2309720pjv.1 for ; Sun, 02 May 2021 16:18:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4cZuoxcwQ6eXvc/QAg7Oih5qEjK3cLKB2wBaiFUenJA=; b=FTNlv1ZEPxIHdsw9/PcT6g8lFQtXzm4QImZKOKke+yIyO2Bjg+5jUivJHk9Qj9i0+K kifhEzWHyBYHzD/YR35ZMXfFKEVoiYGyDqP77uU067im+RfO4P8IBpqQgZuHIxHUhNVb OuB3wCDa6c/jWjw8wmV5yBVNjThlJN/yLQTbWORcWNRdDjanwiuqAvsVn1CtOZA0RGEd Mt7usMGanvItBxlBr2YO6d6C065+kMj8N296699Ovj26DM9c67spfSpooe6ajOyZcjn2 kQb/OcliLttwiXxU1gyJuPXOiNtAQdrfvaGjliFNU9642E1qcIGDDJD3B7xNJOa+Zexw MNKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4cZuoxcwQ6eXvc/QAg7Oih5qEjK3cLKB2wBaiFUenJA=; b=E+AtAoFo5SCI7QoC1ZLT5zH2UbNnMoqSeW9uA5HtJhuSxdJ1cr8MPELbONoa35zB+x KHyJNaksZ5r45Fa9R44OKvpPmj9SXPa6CUTcbITLfpwZQLvPHGSL0pqxJvwNS6+szNpJ z8pVUH66f+4db+Io+dyj1K+nhmkoJHPSWap2hUJvvC4T7zeKPnZ4Vjb5T6iq1ttFeuW+ R65MguNRfj2bLk//ZyboAh3n4U6moTrnhOOACt9GbhHYoTS7lRTWUa2agmni137CsPOS OezCwIz2CuGz2OpCpgOdx+dGfdeuXro52Vr8/SPvcelA/6fHagRkJSc0NRBUGMvS0Wrd PZwA== X-Gm-Message-State: AOAM530zAtxWO7vlAekFJsd/vY6stzBQwkbFVhLkLqS86D0uftFM+rXB EvPpV+pckW7KJk+Qq8o4RPd394+++DwH4A== X-Received: by 2002:a17:90b:2390:: with SMTP id mr16mr11196668pjb.133.1619997528983; Sun, 02 May 2021 16:18:48 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/28] tcg: Remove error return from tcg_region_initial_alloc__locked Date: Sun, 2 May 2021 16:18:20 -0700 Message-Id: <20210502231844.1977630-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All callers immediately assert on error, so move the assert into the function itself. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/tcg.c b/tcg/tcg.c index 795a71ff25..8b57e93ca2 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -723,9 +723,10 @@ static bool tcg_region_alloc(TCGContext *s) * Perform a context's first region allocation. * This function does _not_ increment region.agg_size_full. */ -static inline bool tcg_region_initial_alloc__locked(TCGContext *s) +static void tcg_region_initial_alloc__locked(TCGContext *s) { - return tcg_region_alloc__locked(s); + bool err = tcg_region_alloc__locked(s); + g_assert(!err); } /* Call from a safe-work context */ @@ -740,9 +741,7 @@ void tcg_region_reset_all(void) for (i = 0; i < n_ctxs; i++) { TCGContext *s = qatomic_read(&tcg_ctxs[i]); - bool err = tcg_region_initial_alloc__locked(s); - - g_assert(!err); + tcg_region_initial_alloc__locked(s); } qemu_mutex_unlock(®ion.lock); @@ -879,11 +878,7 @@ void tcg_region_init(void) /* In user-mode we support only one ctx, so do the initial allocation now */ #ifdef CONFIG_USER_ONLY - { - bool err = tcg_region_initial_alloc__locked(tcg_ctx); - - g_assert(!err); - } + tcg_region_initial_alloc__locked(tcg_ctx); #endif } @@ -945,7 +940,6 @@ void tcg_register_thread(void) MachineState *ms = MACHINE(qdev_get_machine()); TCGContext *s = g_malloc(sizeof(*s)); unsigned int i, n; - bool err; *s = tcg_init_ctx; @@ -969,8 +963,7 @@ void tcg_register_thread(void) tcg_ctx = s; qemu_mutex_lock(®ion.lock); - err = tcg_region_initial_alloc__locked(tcg_ctx); - g_assert(!err); + tcg_region_initial_alloc__locked(s); qemu_mutex_unlock(®ion.lock); } #endif /* !CONFIG_USER_ONLY */ From patchwork Sun May 2 23:18:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430459 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2371648jao; Sun, 2 May 2021 16:19:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJziULK4P/Ikmz1G6oZlT1a8UqqE1AgE4DQUGeds+vlndkl1twOaTKG8aZn2Z3c/0IWN0yOp X-Received: by 2002:a02:c98a:: with SMTP id b10mr6503181jap.103.1619997568120; Sun, 02 May 2021 16:19:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997568; cv=none; d=google.com; s=arc-20160816; b=EVBKfuvYJxE6LghJBnaE0ZFXBeTUWDkXut5waAAUgIAPGi2QlummBnPsCb2+nFjIxv w1SZ02AVA/UUJCvigZ8Vgi6RT7bVhsZOxmQtE0m9EYFRhzVDMXK3g167isC5Wb5up9q4 xvnwXnto204OtE9FhHUbu9EjSlLd319JLg5Z7nS+xkrSYan/ObCqnFoLpeNkg586yprY eFDWHWBAZ4vjF/kjfXc8T1V+du98P5J5sQbgDf4ZqWbKMDWN3OMBEgGi4Bl4cbTHL12C DAaRUfjUN+BtSGHRUpMz+GyCH+lDpTW+8MXw7X2WbVFTXpabgh6KhmmIE8tarrqyXmaf MWsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=T+bwWhG2aXu2Jmbr5CuBFk282uxjI9dQD6yjHdIosCw=; b=grLumelaXwrHa+nlBYRvB7Apf1lXcC3lpNB4Ll3bWnirEKeLAeOln9LX9rc6eNRyIv 40/R9ix7/MbTsxMrW2PO5OkTb3lU4TWuFElRWqYp4shsfYukAvZtnB7/3vbiSk3zBVZN PnwZl6SEizmNjLxu+dCWgqM/q8mt1eqx5b/Vvfde5xAuGGq8NY2ylkEI/X4YkI+G4bCv H0DrRW7WUHxjO0BY0ktejZfIoTTKceCsZ3bLCFVshAuSVPE5Tqzjo8DhgMKNj0bMd9r5 M70KcQ7LLFL333BZCrQTODc+/dc0gc2jOkcowK5WJ0jT32c4lD1bJw2u24HDCom+lmcL WKOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ev9Mj1jt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- tcg/tcg.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/tcg.c b/tcg/tcg.c index 8b57e93ca2..df78c89673 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -729,6 +729,15 @@ static void tcg_region_initial_alloc__locked(TCGContext *s) g_assert(!err); } +#ifndef CONFIG_USER_ONLY +static void tcg_region_initial_alloc(TCGContext *s) +{ + qemu_mutex_lock(®ion.lock); + tcg_region_initial_alloc__locked(s); + qemu_mutex_unlock(®ion.lock); +} +#endif + /* Call from a safe-work context */ void tcg_region_reset_all(void) { @@ -962,9 +971,7 @@ void tcg_register_thread(void) } tcg_ctx = s; - qemu_mutex_lock(®ion.lock); - tcg_region_initial_alloc__locked(s); - qemu_mutex_unlock(®ion.lock); + tcg_region_initial_alloc(s); } #endif /* !CONFIG_USER_ONLY */ From patchwork Sun May 2 23:18:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430464 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1223213ejc; Sun, 2 May 2021 16:22:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzWnULFXOaDM4r+tSshF2e1VpV5SY4Z1ODffQTdNfwFbs6qtckmHbnk7kkKQ/+KrGJS+riV X-Received: by 2002:a02:37c9:: with SMTP id r192mr15618742jar.88.1619997776181; Sun, 02 May 2021 16:22:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997776; cv=none; d=google.com; s=arc-20160816; b=w9ERPLHKLfO9PEFKUmme8qZ+2rk1irlq/emof5Iuhm2oIE4rvqkuC9a957q0xI69Q0 2ltDiJclmFPDTJoitAMEXZMUNYc8ZUuZwtYD/c3ulPXnAq6JmJp0IIzi/oAGd8xJkim7 Yjw+u4AwWBgHNS3ZEp8eEWkDs+gMpXicH70f8eoQPggf44vAUAJXlKGi63OzzQg/AZjl uSc4yHREzVIIsDrzAd63/PCQLjbOHfyVVBVqHZKREeXNAWCZxrEbwOsHY8FDCjoBVhmT C6ArnuEl8gZBP6M+8FLb5xDZT1LBPY2PGYXv9kXAjgaPDkDU3vcP3LjVCzvXTPmMrrlW jJuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=sBQ1+Rv2XXbszZHsJR/EueMHmCKRSaUBKr3RPrTCguk=; b=BhO2ZGiX39z44Grj3mEqj+P6HlsgwMfdTgB0/1DtIXw7GaDa4zkXhlTpX/XYWH3gs+ LmPJf4qyTKDtT0HUGF0d4v9MKYwcMEGZSXh8MLWNt2x+XZ/0VlVfQC7mX9gs+2eqbbSU nRm85N2GA9PiVhie5PvHsHICcUnT+0TulXXpkcjoKKp/CG8ux7mOb+tYBav3+IAXyvUU J24LV8plE8O+O809MujSBP2j4Iu2Ka767hpxKXDEYJH+RBBYEJOJCVim26JTAZ6DfxA0 0NE999WpZtAm/UdzDsfWECNEcydNFKliRvIq85Nnty53nfDPpx2CZRWkKggVWTgOIG8Z aFww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LgNwLPFp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n8si247701jam.34.2021.05.02.16.22.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:22:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LgNwLPFp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39418 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLQN-0003Tp-Ja for patch@linaro.org; Sun, 02 May 2021 19:22:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36878) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMT-0008Ce-NP for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:53 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]:40792) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMR-0002s6-Us for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:53 -0400 Received: by mail-pl1-x62a.google.com with SMTP id n16so1776630plf.7 for ; Sun, 02 May 2021 16:18:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=sBQ1+Rv2XXbszZHsJR/EueMHmCKRSaUBKr3RPrTCguk=; b=LgNwLPFpZXkaGbqqFIqx9umW9JFiw78WHudW/YgDnQ/Z1YAF0w/plfuM5Q0kxFmvXm 5diRYWQnjGozoWHRD8gjbMFgG/IDsVpoUM/v1j0wJRKcAraswy6u3IiWHhTROZIB1ZwK O8DFvS9+P3uvdrl+1/t4s11lPvFas0kd0tHTggUZE9sk+/WuHO8/5oLd4Z92GEo58W1a 4S1Dq/uhB4u4B8lMYNT7DKKof85y3fL9SrVSWIhUpxM0WVQGhYtip3CV763K/FjaLM/C SM91exRRxiWdBCKpXprb6+QBI9WEv/gVIvLwS99YV6suoscxORmeNZ+lvfM5g8b0F9Qu IZ+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sBQ1+Rv2XXbszZHsJR/EueMHmCKRSaUBKr3RPrTCguk=; b=AG4Qddkkxc+XRCMCIAYn0ujyN6szc0n8wDzF5JwVjJpUG0AlPzLexq603SBsQOnSFB OzFWLOUSBnguG422FkFIxGQuj3O+MvZMsBzyVXM6qpLQloEBU4T8czwisRNaxKxzTtLj +qQJE/YnqbsfHt6xFAYY56B2IAeDYhvDZY33vr0jX3z+nPmRe4ecAIWKDDPqZCVgyGOv rt+oIErese6esjW8o12VuzJd7f4gBFuTtiy7nBoIWaH+paZ+2vQUZhYqKw8AHJhJskb3 ttlePGcD0v4PqdETI4NVU5kJaa3nVWotsKbpSPFklRwu7eaT9wBSpdFj2AmfNA9qGZjQ LSbA== X-Gm-Message-State: AOAM533La4px0cYMugsmjhLfNcKbY+wH0sYivQ29xssHReDZYeym0Ow7 bgU5O/AjHCwzsGknxlnStUoHGublczteLg== X-Received: by 2002:a17:90b:347:: with SMTP id fh7mr18204681pjb.23.1619997530725; Sun, 02 May 2021 16:18:50 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/28] tcg: Split out tcg_region_prologue_set Date: Sun, 2 May 2021 16:18:22 -0700 Message-Id: <20210502231844.1977630-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This has only one user, but will make more sense after some code motion. Always leave the tcg_init_ctx initialized to the first region, in preparation for tcg_prologue_init(). This also requires that we don't re-allocate the region for the first cpu, lest we hit the assertion for total number of regions allocated . Signed-off-by: Richard Henderson --- tcg/tcg.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/tcg.c b/tcg/tcg.c index df78c89673..ee3319e163 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -885,10 +885,26 @@ void tcg_region_init(void) tcg_region_trees_init(); - /* In user-mode we support only one ctx, so do the initial allocation now */ -#ifdef CONFIG_USER_ONLY - tcg_region_initial_alloc__locked(tcg_ctx); -#endif + /* + * Leave the initial context initialized to the first region. + * This will be the context into which we generate the prologue. + * It is also the only context for CONFIG_USER_ONLY. + */ + tcg_region_initial_alloc__locked(&tcg_init_ctx); +} + +static void tcg_region_prologue_set(TCGContext *s) +{ + /* Deduct the prologue from the first region. */ + g_assert(region.start == s->code_gen_buffer); + region.start = s->code_ptr; + + /* Recompute boundaries of the first region. */ + tcg_region_assign(s, 0); + + /* Register the balance of the buffer with gdb. */ + tcg_register_jit(tcg_splitwx_to_rx(region.start), + region.end - region.start); } #ifdef CONFIG_DEBUG_TCG @@ -968,10 +984,10 @@ void tcg_register_thread(void) if (n > 0) { alloc_tcg_plugin_context(s); + tcg_region_initial_alloc(s); } tcg_ctx = s; - tcg_region_initial_alloc(s); } #endif /* !CONFIG_USER_ONLY */ @@ -1211,8 +1227,6 @@ void tcg_prologue_init(TCGContext *s) { size_t prologue_size; - /* Put the prologue at the beginning of code_gen_buffer. */ - tcg_region_assign(s, 0); s->code_ptr = s->code_gen_ptr; s->code_buf = s->code_gen_ptr; s->data_gen_ptr = NULL; @@ -1244,14 +1258,7 @@ void tcg_prologue_init(TCGContext *s) (uintptr_t)s->code_buf, prologue_size); #endif - /* Deduct the prologue from the first region. */ - region.start = s->code_ptr; - - /* Recompute boundaries of the first region. */ - tcg_region_assign(s, 0); - - tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.end - region.start); + tcg_region_prologue_set(s); #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { From patchwork Sun May 2 23:18:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430478 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1227530ejc; Sun, 2 May 2021 16:31:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw8TdHOosiNeoxtaFIn2W7kHrEWM6B7gLSnaQ7uB0OjWsZc4tCgB52D35rUlXoDaXTbsJcr X-Received: by 2002:a05:6e02:4c4:: with SMTP id f4mr13679042ils.272.1619998281122; Sun, 02 May 2021 16:31:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998281; cv=none; d=google.com; s=arc-20160816; b=SWjH9xV6mB4CDjGG1XAC0NKq6oVRSzMXUmOTPazIiM8pgVM+UZ514Xoo/xY1gPx79V vzFkg3H7GKyqmQNJJlcdFL6IfjR93xSasQO4gknJ2W3Lvk1a+OF/tiVK0+Kvr9BYs1fw iaYcPlMdkWoAgVth+8IW+rMZdOB/6Ibibun1huF7tUXSUcMJcP2o72bXSG1VIoLVEtY2 n+2qb4x8fLo4i40f2LFfPY33bC8S0athKHxD02nMDgJzCI62dS4CZNR3PpxpWRa4UcZL zI1rhSyuXfsH+LN7gAWTu6c70kiix2GpKwGHrMp4e61FAsWdMjieJkJcuIALc2A4RsZA 5KzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=RG5hll6d3Z+rOlSTjQDQlSL4v8tj2OIfzaOlqk1Ic44=; b=A6HgocUU8KVnrSDv9AB7h2tIQOo/IaJyWjFxn9SC9n4iZ43DJK9wSTBajCQoSaP8F1 SK97/I+dE8h7e1WSACElUcy1evvy8NRWZoFaNgIlbhsBBKlZ08SZwbVFkuI9ZfmKJIY1 ZOosFdoEn+ntXWIApglzCPvinzwDKEBjsU41VTTP6HihE99kuvqBU13AImT5UAwtyanI 6cO/+7Y4QYP8BZoaBll1iXt7qGyc5qEDDeIh9Qd6XFsX5YMA+kUocuGBtdd0O4khQun8 o+VeWKw2Lvvvk1uBXDvv7japR0ZXONAQxT5WulA26puZ4AnaPCzFLCjFzqZSQfoEgkgo jxrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cUJJKrn4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Sun, 02 May 2021 16:18:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 07/28] tcg: Split out region.c Date: Sun, 2 May 2021 16:18:23 -0700 Message-Id: <20210502231844.1977630-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tcg/internal.h | 37 ++++ tcg/region.c | 572 ++++++++++++++++++++++++++++++++++++++++++++++++ tcg/tcg.c | 547 +-------------------------------------------- tcg/meson.build | 1 + 4 files changed, 613 insertions(+), 544 deletions(-) create mode 100644 tcg/internal.h create mode 100644 tcg/region.c -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/internal.h b/tcg/internal.h new file mode 100644 index 0000000000..b1dda343c2 --- /dev/null +++ b/tcg/internal.h @@ -0,0 +1,37 @@ +/* + * Internal declarations for Tiny Code Generator for QEMU + * + * Copyright (c) 2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef TCG_INTERNAL_H +#define TCG_INTERNAL_H 1 + +#define TCG_HIGHWATER 1024 + +extern TCGContext **tcg_ctxs; +extern unsigned int n_tcg_ctxs; + +bool tcg_region_alloc(TCGContext *s); +void tcg_region_initial_alloc(TCGContext *s); +void tcg_region_prologue_set(TCGContext *s); + +#endif /* TCG_INTERNAL_H */ diff --git a/tcg/region.c b/tcg/region.c new file mode 100644 index 0000000000..ba3677f474 --- /dev/null +++ b/tcg/region.c @@ -0,0 +1,572 @@ +/* + * Memory region management for Tiny Code Generator for QEMU + * + * Copyright (c) 2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "exec/exec-all.h" +#include "tcg/tcg.h" +#if !defined(CONFIG_USER_ONLY) +#include "hw/boards.h" +#endif +#include "internal.h" + + +struct tcg_region_tree { + QemuMutex lock; + GTree *tree; + /* padding to avoid false sharing is computed at run-time */ +}; + +/* + * We divide code_gen_buffer into equally-sized "regions" that TCG threads + * dynamically allocate from as demand dictates. Given appropriate region + * sizing, this minimizes flushes even when some TCG threads generate a lot + * more code than others. + */ +struct tcg_region_state { + QemuMutex lock; + + /* fields set at init time */ + void *start; + void *start_aligned; + void *end; + size_t n; + size_t size; /* size of one region */ + size_t stride; /* .size + guard size */ + + /* fields protected by the lock */ + size_t current; /* current region index */ + size_t agg_size_full; /* aggregate size of full regions */ +}; + +static struct tcg_region_state region; + +/* + * This is an array of struct tcg_region_tree's, with padding. + * We use void * to simplify the computation of region_trees[i]; each + * struct is found every tree_size bytes. + */ +static void *region_trees; +static size_t tree_size; + +/* compare a pointer @ptr and a tb_tc @s */ +static int ptr_cmp_tb_tc(const void *ptr, const struct tb_tc *s) +{ + if (ptr >= s->ptr + s->size) { + return 1; + } else if (ptr < s->ptr) { + return -1; + } + return 0; +} + +static gint tb_tc_cmp(gconstpointer ap, gconstpointer bp) +{ + const struct tb_tc *a = ap; + const struct tb_tc *b = bp; + + /* + * When both sizes are set, we know this isn't a lookup. + * This is the most likely case: every TB must be inserted; lookups + * are a lot less frequent. + */ + if (likely(a->size && b->size)) { + if (a->ptr > b->ptr) { + return 1; + } else if (a->ptr < b->ptr) { + return -1; + } + /* a->ptr == b->ptr should happen only on deletions */ + g_assert(a->size == b->size); + return 0; + } + /* + * All lookups have either .size field set to 0. + * From the glib sources we see that @ap is always the lookup key. However + * the docs provide no guarantee, so we just mark this case as likely. + */ + if (likely(a->size == 0)) { + return ptr_cmp_tb_tc(a->ptr, b); + } + return ptr_cmp_tb_tc(b->ptr, a); +} + +static void tcg_region_trees_init(void) +{ + size_t i; + + tree_size = ROUND_UP(sizeof(struct tcg_region_tree), qemu_dcache_linesize); + region_trees = qemu_memalign(qemu_dcache_linesize, region.n * tree_size); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + qemu_mutex_init(&rt->lock); + rt->tree = g_tree_new(tb_tc_cmp); + } +} + +static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p) +{ + size_t region_idx; + + /* + * Like tcg_splitwx_to_rw, with no assert. The pc may come from + * a signal handler over which the caller has no control. + */ + if (!in_code_gen_buffer(p)) { + p -= tcg_splitwx_diff; + if (!in_code_gen_buffer(p)) { + return NULL; + } + } + + if (p < region.start_aligned) { + region_idx = 0; + } else { + ptrdiff_t offset = p - region.start_aligned; + + if (offset > region.stride * (region.n - 1)) { + region_idx = region.n - 1; + } else { + region_idx = offset / region.stride; + } + } + return region_trees + region_idx * tree_size; +} + +void tcg_tb_insert(TranslationBlock *tb) +{ + struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); + + g_assert(rt != NULL); + qemu_mutex_lock(&rt->lock); + g_tree_insert(rt->tree, &tb->tc, tb); + qemu_mutex_unlock(&rt->lock); +} + +void tcg_tb_remove(TranslationBlock *tb) +{ + struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); + + g_assert(rt != NULL); + qemu_mutex_lock(&rt->lock); + g_tree_remove(rt->tree, &tb->tc); + qemu_mutex_unlock(&rt->lock); +} + +/* + * Find the TB 'tb' such that + * tb->tc.ptr <= tc_ptr < tb->tc.ptr + tb->tc.size + * Return NULL if not found. + */ +TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr) +{ + struct tcg_region_tree *rt = tc_ptr_to_region_tree((void *)tc_ptr); + TranslationBlock *tb; + struct tb_tc s = { .ptr = (void *)tc_ptr }; + + if (rt == NULL) { + return NULL; + } + + qemu_mutex_lock(&rt->lock); + tb = g_tree_lookup(rt->tree, &s); + qemu_mutex_unlock(&rt->lock); + return tb; +} + +static void tcg_region_tree_lock_all(void) +{ + size_t i; + + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + qemu_mutex_lock(&rt->lock); + } +} + +static void tcg_region_tree_unlock_all(void) +{ + size_t i; + + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + qemu_mutex_unlock(&rt->lock); + } +} + +void tcg_tb_foreach(GTraverseFunc func, gpointer user_data) +{ + size_t i; + + tcg_region_tree_lock_all(); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + g_tree_foreach(rt->tree, func, user_data); + } + tcg_region_tree_unlock_all(); +} + +size_t tcg_nb_tbs(void) +{ + size_t nb_tbs = 0; + size_t i; + + tcg_region_tree_lock_all(); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + nb_tbs += g_tree_nnodes(rt->tree); + } + tcg_region_tree_unlock_all(); + return nb_tbs; +} + +static gboolean tcg_region_tree_traverse(gpointer k, gpointer v, gpointer data) +{ + TranslationBlock *tb = v; + + tb_destroy(tb); + return FALSE; +} + +static void tcg_region_tree_reset_all(void) +{ + size_t i; + + tcg_region_tree_lock_all(); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + g_tree_foreach(rt->tree, tcg_region_tree_traverse, NULL); + /* Increment the refcount first so that destroy acts as a reset */ + g_tree_ref(rt->tree); + g_tree_destroy(rt->tree); + } + tcg_region_tree_unlock_all(); +} + +static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) +{ + void *start, *end; + + start = region.start_aligned + curr_region * region.stride; + end = start + region.size; + + if (curr_region == 0) { + start = region.start; + } + if (curr_region == region.n - 1) { + end = region.end; + } + + *pstart = start; + *pend = end; +} + +static void tcg_region_assign(TCGContext *s, size_t curr_region) +{ + void *start, *end; + + tcg_region_bounds(curr_region, &start, &end); + + s->code_gen_buffer = start; + s->code_gen_ptr = start; + s->code_gen_buffer_size = end - start; + s->code_gen_highwater = end - TCG_HIGHWATER; +} + +static bool tcg_region_alloc__locked(TCGContext *s) +{ + if (region.current == region.n) { + return true; + } + tcg_region_assign(s, region.current); + region.current++; + return false; +} + +/* + * Request a new region once the one in use has filled up. + * Returns true on error. + */ +bool tcg_region_alloc(TCGContext *s) +{ + bool err; + /* read the region size now; alloc__locked will overwrite it on success */ + size_t size_full = s->code_gen_buffer_size; + + qemu_mutex_lock(®ion.lock); + err = tcg_region_alloc__locked(s); + if (!err) { + region.agg_size_full += size_full - TCG_HIGHWATER; + } + qemu_mutex_unlock(®ion.lock); + return err; +} + +/* + * Perform a context's first region allocation. + * This function does _not_ increment region.agg_size_full. + */ +static void tcg_region_initial_alloc__locked(TCGContext *s) +{ + bool err = tcg_region_alloc__locked(s); + g_assert(!err); +} + +void tcg_region_initial_alloc(TCGContext *s) +{ + qemu_mutex_lock(®ion.lock); + tcg_region_initial_alloc__locked(s); + qemu_mutex_unlock(®ion.lock); +} + +/* Call from a safe-work context */ +void tcg_region_reset_all(void) +{ + unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int i; + + qemu_mutex_lock(®ion.lock); + region.current = 0; + region.agg_size_full = 0; + + for (i = 0; i < n_ctxs; i++) { + TCGContext *s = qatomic_read(&tcg_ctxs[i]); + tcg_region_initial_alloc__locked(s); + } + qemu_mutex_unlock(®ion.lock); + + tcg_region_tree_reset_all(); +} + +#ifdef CONFIG_USER_ONLY +static size_t tcg_n_regions(void) +{ + return 1; +} +#else +/* + * It is likely that some vCPUs will translate more code than others, so we + * first try to set more regions than max_cpus, with those regions being of + * reasonable size. If that's not possible we make do by evenly dividing + * the code_gen_buffer among the vCPUs. + */ +static size_t tcg_n_regions(void) +{ + size_t i; + + /* Use a single region if all we have is one vCPU thread */ +#if !defined(CONFIG_USER_ONLY) + MachineState *ms = MACHINE(qdev_get_machine()); + unsigned int max_cpus = ms->smp.max_cpus; +#endif + if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { + return 1; + } + + /* Try to have more regions than max_cpus, with each region being >= 2 MB */ + for (i = 8; i > 0; i--) { + size_t regions_per_thread = i; + size_t region_size; + + region_size = tcg_init_ctx.code_gen_buffer_size; + region_size /= max_cpus * regions_per_thread; + + if (region_size >= 2 * 1024u * 1024) { + return max_cpus * regions_per_thread; + } + } + /* If we can't, then just allocate one region per vCPU thread */ + return max_cpus; +} +#endif + +/* + * Initializes region partitioning. + * + * Called at init time from the parent thread (i.e. the one calling + * tcg_context_init), after the target's TCG globals have been set. + * + * Region partitioning works by splitting code_gen_buffer into separate regions, + * and then assigning regions to TCG threads so that the threads can translate + * code in parallel without synchronization. + * + * In softmmu the number of TCG threads is bounded by max_cpus, so we use at + * least max_cpus regions in MTTCG. In !MTTCG we use a single region. + * Note that the TCG options from the command-line (i.e. -accel accel=tcg,[...]) + * must have been parsed before calling this function, since it calls + * qemu_tcg_mttcg_enabled(). + * + * In user-mode we use a single region. Having multiple regions in user-mode + * is not supported, because the number of vCPU threads (recall that each thread + * spawned by the guest corresponds to a vCPU thread) is only bounded by the + * OS, and usually this number is huge (tens of thousands is not uncommon). + * Thus, given this large bound on the number of vCPU threads and the fact + * that code_gen_buffer is allocated at compile-time, we cannot guarantee + * that the availability of at least one region per vCPU thread. + * + * However, this user-mode limitation is unlikely to be a significant problem + * in practice. Multi-threaded guests share most if not all of their translated + * code, which makes parallel code generation less appealing than in softmmu. + */ +void tcg_region_init(void) +{ + void *buf = tcg_init_ctx.code_gen_buffer; + void *aligned; + size_t size = tcg_init_ctx.code_gen_buffer_size; + size_t page_size = qemu_real_host_page_size; + size_t region_size; + size_t n_regions; + size_t i; + + n_regions = tcg_n_regions(); + + /* The first region will be 'aligned - buf' bytes larger than the others */ + aligned = QEMU_ALIGN_PTR_UP(buf, page_size); + g_assert(aligned < tcg_init_ctx.code_gen_buffer + size); + /* + * Make region_size a multiple of page_size, using aligned as the start. + * As a result of this we might end up with a few extra pages at the end of + * the buffer; we will assign those to the last region. + */ + region_size = (size - (aligned - buf)) / n_regions; + region_size = QEMU_ALIGN_DOWN(region_size, page_size); + + /* A region must have at least 2 pages; one code, one guard */ + g_assert(region_size >= 2 * page_size); + + /* init the region struct */ + qemu_mutex_init(®ion.lock); + region.n = n_regions; + region.size = region_size - page_size; + region.stride = region_size; + region.start = buf; + region.start_aligned = aligned; + /* page-align the end, since its last page will be a guard page */ + region.end = QEMU_ALIGN_PTR_DOWN(buf + size, page_size); + /* account for that last guard page */ + region.end -= page_size; + + /* + * Set guard pages in the rw buffer, as that's the one into which + * buffer overruns could occur. Do not set guard pages in the rx + * buffer -- let that one use hugepages throughout. + */ + for (i = 0; i < region.n; i++) { + void *start, *end; + + tcg_region_bounds(i, &start, &end); + + /* + * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect + * rejects a permission change from RWX -> NONE. Guard pages are + * nice for bug detection but are not essential; ignore any failure. + */ + (void)qemu_mprotect_none(end, page_size); + } + + tcg_region_trees_init(); + + /* + * Leave the initial context initialized to the first region. + * This will be the context into which we generate the prologue. + * It is also the only context for CONFIG_USER_ONLY. + */ + tcg_region_initial_alloc__locked(&tcg_init_ctx); +} + +void tcg_region_prologue_set(TCGContext *s) +{ + /* Deduct the prologue from the first region. */ + g_assert(region.start == s->code_gen_buffer); + region.start = s->code_ptr; + + /* Recompute boundaries of the first region. */ + tcg_region_assign(s, 0); + + /* Register the balance of the buffer with gdb. */ + tcg_register_jit(tcg_splitwx_to_rx(region.start), + region.end - region.start); +} + +/* + * Returns the size (in bytes) of all translated code (i.e. from all regions) + * currently in the cache. + * See also: tcg_code_capacity() + * Do not confuse with tcg_current_code_size(); that one applies to a single + * TCG context. + */ +size_t tcg_code_size(void) +{ + unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int i; + size_t total; + + qemu_mutex_lock(®ion.lock); + total = region.agg_size_full; + for (i = 0; i < n_ctxs; i++) { + const TCGContext *s = qatomic_read(&tcg_ctxs[i]); + size_t size; + + size = qatomic_read(&s->code_gen_ptr) - s->code_gen_buffer; + g_assert(size <= s->code_gen_buffer_size); + total += size; + } + qemu_mutex_unlock(®ion.lock); + return total; +} + +/* + * Returns the code capacity (in bytes) of the entire cache, i.e. including all + * regions. + * See also: tcg_code_size() + */ +size_t tcg_code_capacity(void) +{ + size_t guard_size, capacity; + + /* no need for synchronization; these variables are set at init time */ + guard_size = region.stride - region.size; + capacity = region.end + guard_size - region.start; + capacity -= region.n * (guard_size + TCG_HIGHWATER); + return capacity; +} + +size_t tcg_tb_phys_invalidate_count(void) +{ + unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int i; + size_t total = 0; + + for (i = 0; i < n_ctxs; i++) { + const TCGContext *s = qatomic_read(&tcg_ctxs[i]); + + total += qatomic_read(&s->tb_phys_invalidate_count); + } + return total; +} diff --git a/tcg/tcg.c b/tcg/tcg.c index ee3319e163..26eeed05d9 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -65,6 +65,7 @@ #include "elf.h" #include "exec/log.h" #include "sysemu/sysemu.h" +#include "internal.h" /* Forward declarations for functions declared in tcg-target.c.inc and used here. */ @@ -156,10 +157,8 @@ static int tcg_target_const_match(tcg_target_long val, TCGType type, static int tcg_out_ldst_finalize(TCGContext *s); #endif -#define TCG_HIGHWATER 1024 - -static TCGContext **tcg_ctxs; -static unsigned int n_tcg_ctxs; +TCGContext **tcg_ctxs; +unsigned int n_tcg_ctxs; TCGv_env cpu_env = 0; const void *tcg_code_gen_epilogue; uintptr_t tcg_splitwx_diff; @@ -168,42 +167,6 @@ uintptr_t tcg_splitwx_diff; tcg_prologue_fn *tcg_qemu_tb_exec; #endif -struct tcg_region_tree { - QemuMutex lock; - GTree *tree; - /* padding to avoid false sharing is computed at run-time */ -}; - -/* - * We divide code_gen_buffer into equally-sized "regions" that TCG threads - * dynamically allocate from as demand dictates. Given appropriate region - * sizing, this minimizes flushes even when some TCG threads generate a lot - * more code than others. - */ -struct tcg_region_state { - QemuMutex lock; - - /* fields set at init time */ - void *start; - void *start_aligned; - void *end; - size_t n; - size_t size; /* size of one region */ - size_t stride; /* .size + guard size */ - - /* fields protected by the lock */ - size_t current; /* current region index */ - size_t agg_size_full; /* aggregate size of full regions */ -}; - -static struct tcg_region_state region; -/* - * This is an array of struct tcg_region_tree's, with padding. - * We use void * to simplify the computation of region_trees[i]; each - * struct is found every tree_size bytes. - */ -static void *region_trees; -static size_t tree_size; static TCGRegSet tcg_target_available_regs[TCG_TYPE_COUNT]; static TCGRegSet tcg_target_call_clobber_regs; @@ -460,453 +423,6 @@ static const TCGTargetOpDef constraint_sets[] = { #include "tcg-target.c.inc" -/* compare a pointer @ptr and a tb_tc @s */ -static int ptr_cmp_tb_tc(const void *ptr, const struct tb_tc *s) -{ - if (ptr >= s->ptr + s->size) { - return 1; - } else if (ptr < s->ptr) { - return -1; - } - return 0; -} - -static gint tb_tc_cmp(gconstpointer ap, gconstpointer bp) -{ - const struct tb_tc *a = ap; - const struct tb_tc *b = bp; - - /* - * When both sizes are set, we know this isn't a lookup. - * This is the most likely case: every TB must be inserted; lookups - * are a lot less frequent. - */ - if (likely(a->size && b->size)) { - if (a->ptr > b->ptr) { - return 1; - } else if (a->ptr < b->ptr) { - return -1; - } - /* a->ptr == b->ptr should happen only on deletions */ - g_assert(a->size == b->size); - return 0; - } - /* - * All lookups have either .size field set to 0. - * From the glib sources we see that @ap is always the lookup key. However - * the docs provide no guarantee, so we just mark this case as likely. - */ - if (likely(a->size == 0)) { - return ptr_cmp_tb_tc(a->ptr, b); - } - return ptr_cmp_tb_tc(b->ptr, a); -} - -static void tcg_region_trees_init(void) -{ - size_t i; - - tree_size = ROUND_UP(sizeof(struct tcg_region_tree), qemu_dcache_linesize); - region_trees = qemu_memalign(qemu_dcache_linesize, region.n * tree_size); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - qemu_mutex_init(&rt->lock); - rt->tree = g_tree_new(tb_tc_cmp); - } -} - -static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p) -{ - size_t region_idx; - - /* - * Like tcg_splitwx_to_rw, with no assert. The pc may come from - * a signal handler over which the caller has no control. - */ - if (!in_code_gen_buffer(p)) { - p -= tcg_splitwx_diff; - if (!in_code_gen_buffer(p)) { - return NULL; - } - } - - if (p < region.start_aligned) { - region_idx = 0; - } else { - ptrdiff_t offset = p - region.start_aligned; - - if (offset > region.stride * (region.n - 1)) { - region_idx = region.n - 1; - } else { - region_idx = offset / region.stride; - } - } - return region_trees + region_idx * tree_size; -} - -void tcg_tb_insert(TranslationBlock *tb) -{ - struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); - - g_assert(rt != NULL); - qemu_mutex_lock(&rt->lock); - g_tree_insert(rt->tree, &tb->tc, tb); - qemu_mutex_unlock(&rt->lock); -} - -void tcg_tb_remove(TranslationBlock *tb) -{ - struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); - - g_assert(rt != NULL); - qemu_mutex_lock(&rt->lock); - g_tree_remove(rt->tree, &tb->tc); - qemu_mutex_unlock(&rt->lock); -} - -/* - * Find the TB 'tb' such that - * tb->tc.ptr <= tc_ptr < tb->tc.ptr + tb->tc.size - * Return NULL if not found. - */ -TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr) -{ - struct tcg_region_tree *rt = tc_ptr_to_region_tree((void *)tc_ptr); - TranslationBlock *tb; - struct tb_tc s = { .ptr = (void *)tc_ptr }; - - if (rt == NULL) { - return NULL; - } - - qemu_mutex_lock(&rt->lock); - tb = g_tree_lookup(rt->tree, &s); - qemu_mutex_unlock(&rt->lock); - return tb; -} - -static void tcg_region_tree_lock_all(void) -{ - size_t i; - - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - qemu_mutex_lock(&rt->lock); - } -} - -static void tcg_region_tree_unlock_all(void) -{ - size_t i; - - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - qemu_mutex_unlock(&rt->lock); - } -} - -void tcg_tb_foreach(GTraverseFunc func, gpointer user_data) -{ - size_t i; - - tcg_region_tree_lock_all(); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - g_tree_foreach(rt->tree, func, user_data); - } - tcg_region_tree_unlock_all(); -} - -size_t tcg_nb_tbs(void) -{ - size_t nb_tbs = 0; - size_t i; - - tcg_region_tree_lock_all(); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - nb_tbs += g_tree_nnodes(rt->tree); - } - tcg_region_tree_unlock_all(); - return nb_tbs; -} - -static gboolean tcg_region_tree_traverse(gpointer k, gpointer v, gpointer data) -{ - TranslationBlock *tb = v; - - tb_destroy(tb); - return FALSE; -} - -static void tcg_region_tree_reset_all(void) -{ - size_t i; - - tcg_region_tree_lock_all(); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - g_tree_foreach(rt->tree, tcg_region_tree_traverse, NULL); - /* Increment the refcount first so that destroy acts as a reset */ - g_tree_ref(rt->tree); - g_tree_destroy(rt->tree); - } - tcg_region_tree_unlock_all(); -} - -static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) -{ - void *start, *end; - - start = region.start_aligned + curr_region * region.stride; - end = start + region.size; - - if (curr_region == 0) { - start = region.start; - } - if (curr_region == region.n - 1) { - end = region.end; - } - - *pstart = start; - *pend = end; -} - -static void tcg_region_assign(TCGContext *s, size_t curr_region) -{ - void *start, *end; - - tcg_region_bounds(curr_region, &start, &end); - - s->code_gen_buffer = start; - s->code_gen_ptr = start; - s->code_gen_buffer_size = end - start; - s->code_gen_highwater = end - TCG_HIGHWATER; -} - -static bool tcg_region_alloc__locked(TCGContext *s) -{ - if (region.current == region.n) { - return true; - } - tcg_region_assign(s, region.current); - region.current++; - return false; -} - -/* - * Request a new region once the one in use has filled up. - * Returns true on error. - */ -static bool tcg_region_alloc(TCGContext *s) -{ - bool err; - /* read the region size now; alloc__locked will overwrite it on success */ - size_t size_full = s->code_gen_buffer_size; - - qemu_mutex_lock(®ion.lock); - err = tcg_region_alloc__locked(s); - if (!err) { - region.agg_size_full += size_full - TCG_HIGHWATER; - } - qemu_mutex_unlock(®ion.lock); - return err; -} - -/* - * Perform a context's first region allocation. - * This function does _not_ increment region.agg_size_full. - */ -static void tcg_region_initial_alloc__locked(TCGContext *s) -{ - bool err = tcg_region_alloc__locked(s); - g_assert(!err); -} - -#ifndef CONFIG_USER_ONLY -static void tcg_region_initial_alloc(TCGContext *s) -{ - qemu_mutex_lock(®ion.lock); - tcg_region_initial_alloc__locked(s); - qemu_mutex_unlock(®ion.lock); -} -#endif - -/* Call from a safe-work context */ -void tcg_region_reset_all(void) -{ - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); - unsigned int i; - - qemu_mutex_lock(®ion.lock); - region.current = 0; - region.agg_size_full = 0; - - for (i = 0; i < n_ctxs; i++) { - TCGContext *s = qatomic_read(&tcg_ctxs[i]); - tcg_region_initial_alloc__locked(s); - } - qemu_mutex_unlock(®ion.lock); - - tcg_region_tree_reset_all(); -} - -#ifdef CONFIG_USER_ONLY -static size_t tcg_n_regions(void) -{ - return 1; -} -#else -/* - * It is likely that some vCPUs will translate more code than others, so we - * first try to set more regions than max_cpus, with those regions being of - * reasonable size. If that's not possible we make do by evenly dividing - * the code_gen_buffer among the vCPUs. - */ -static size_t tcg_n_regions(void) -{ - size_t i; - - /* Use a single region if all we have is one vCPU thread */ -#if !defined(CONFIG_USER_ONLY) - MachineState *ms = MACHINE(qdev_get_machine()); - unsigned int max_cpus = ms->smp.max_cpus; -#endif - if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { - return 1; - } - - /* Try to have more regions than max_cpus, with each region being >= 2 MB */ - for (i = 8; i > 0; i--) { - size_t regions_per_thread = i; - size_t region_size; - - region_size = tcg_init_ctx.code_gen_buffer_size; - region_size /= max_cpus * regions_per_thread; - - if (region_size >= 2 * 1024u * 1024) { - return max_cpus * regions_per_thread; - } - } - /* If we can't, then just allocate one region per vCPU thread */ - return max_cpus; -} -#endif - -/* - * Initializes region partitioning. - * - * Called at init time from the parent thread (i.e. the one calling - * tcg_context_init), after the target's TCG globals have been set. - * - * Region partitioning works by splitting code_gen_buffer into separate regions, - * and then assigning regions to TCG threads so that the threads can translate - * code in parallel without synchronization. - * - * In softmmu the number of TCG threads is bounded by max_cpus, so we use at - * least max_cpus regions in MTTCG. In !MTTCG we use a single region. - * Note that the TCG options from the command-line (i.e. -accel accel=tcg,[...]) - * must have been parsed before calling this function, since it calls - * qemu_tcg_mttcg_enabled(). - * - * In user-mode we use a single region. Having multiple regions in user-mode - * is not supported, because the number of vCPU threads (recall that each thread - * spawned by the guest corresponds to a vCPU thread) is only bounded by the - * OS, and usually this number is huge (tens of thousands is not uncommon). - * Thus, given this large bound on the number of vCPU threads and the fact - * that code_gen_buffer is allocated at compile-time, we cannot guarantee - * that the availability of at least one region per vCPU thread. - * - * However, this user-mode limitation is unlikely to be a significant problem - * in practice. Multi-threaded guests share most if not all of their translated - * code, which makes parallel code generation less appealing than in softmmu. - */ -void tcg_region_init(void) -{ - void *buf = tcg_init_ctx.code_gen_buffer; - void *aligned; - size_t size = tcg_init_ctx.code_gen_buffer_size; - size_t page_size = qemu_real_host_page_size; - size_t region_size; - size_t n_regions; - size_t i; - - n_regions = tcg_n_regions(); - - /* The first region will be 'aligned - buf' bytes larger than the others */ - aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + size); - /* - * Make region_size a multiple of page_size, using aligned as the start. - * As a result of this we might end up with a few extra pages at the end of - * the buffer; we will assign those to the last region. - */ - region_size = (size - (aligned - buf)) / n_regions; - region_size = QEMU_ALIGN_DOWN(region_size, page_size); - - /* A region must have at least 2 pages; one code, one guard */ - g_assert(region_size >= 2 * page_size); - - /* init the region struct */ - qemu_mutex_init(®ion.lock); - region.n = n_regions; - region.size = region_size - page_size; - region.stride = region_size; - region.start = buf; - region.start_aligned = aligned; - /* page-align the end, since its last page will be a guard page */ - region.end = QEMU_ALIGN_PTR_DOWN(buf + size, page_size); - /* account for that last guard page */ - region.end -= page_size; - - /* - * Set guard pages in the rw buffer, as that's the one into which - * buffer overruns could occur. Do not set guard pages in the rx - * buffer -- let that one use hugepages throughout. - */ - for (i = 0; i < region.n; i++) { - void *start, *end; - - tcg_region_bounds(i, &start, &end); - - /* - * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect - * rejects a permission change from RWX -> NONE. Guard pages are - * nice for bug detection but are not essential; ignore any failure. - */ - (void)qemu_mprotect_none(end, page_size); - } - - tcg_region_trees_init(); - - /* - * Leave the initial context initialized to the first region. - * This will be the context into which we generate the prologue. - * It is also the only context for CONFIG_USER_ONLY. - */ - tcg_region_initial_alloc__locked(&tcg_init_ctx); -} - -static void tcg_region_prologue_set(TCGContext *s) -{ - /* Deduct the prologue from the first region. */ - g_assert(region.start == s->code_gen_buffer); - region.start = s->code_ptr; - - /* Recompute boundaries of the first region. */ - tcg_region_assign(s, 0); - - /* Register the balance of the buffer with gdb. */ - tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.end - region.start); -} - #ifdef CONFIG_DEBUG_TCG const void *tcg_splitwx_to_rx(void *rw) { @@ -991,63 +507,6 @@ void tcg_register_thread(void) } #endif /* !CONFIG_USER_ONLY */ -/* - * Returns the size (in bytes) of all translated code (i.e. from all regions) - * currently in the cache. - * See also: tcg_code_capacity() - * Do not confuse with tcg_current_code_size(); that one applies to a single - * TCG context. - */ -size_t tcg_code_size(void) -{ - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); - unsigned int i; - size_t total; - - qemu_mutex_lock(®ion.lock); - total = region.agg_size_full; - for (i = 0; i < n_ctxs; i++) { - const TCGContext *s = qatomic_read(&tcg_ctxs[i]); - size_t size; - - size = qatomic_read(&s->code_gen_ptr) - s->code_gen_buffer; - g_assert(size <= s->code_gen_buffer_size); - total += size; - } - qemu_mutex_unlock(®ion.lock); - return total; -} - -/* - * Returns the code capacity (in bytes) of the entire cache, i.e. including all - * regions. - * See also: tcg_code_size() - */ -size_t tcg_code_capacity(void) -{ - size_t guard_size, capacity; - - /* no need for synchronization; these variables are set at init time */ - guard_size = region.stride - region.size; - capacity = region.end + guard_size - region.start; - capacity -= region.n * (guard_size + TCG_HIGHWATER); - return capacity; -} - -size_t tcg_tb_phys_invalidate_count(void) -{ - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); - unsigned int i; - size_t total = 0; - - for (i = 0; i < n_ctxs; i++) { - const TCGContext *s = qatomic_read(&tcg_ctxs[i]); - - total += qatomic_read(&s->tb_phys_invalidate_count); - } - return total; -} - /* pool based memory allocation */ void *tcg_malloc_internal(TCGContext *s, int size) { diff --git a/tcg/meson.build b/tcg/meson.build index 84064a341e..5be3915529 100644 --- a/tcg/meson.build +++ b/tcg/meson.build @@ -2,6 +2,7 @@ tcg_ss = ss.source_set() tcg_ss.add(files( 'optimize.c', + 'region.c', 'tcg.c', 'tcg-common.c', 'tcg-op.c', From patchwork Sun May 2 23:18:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430474 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1226167ejc; Sun, 2 May 2021 16:28:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyi7Cqri+pVBFx0Si+1VnI/mLoJJxeal6AghcC6/y0ALQ72yjq/trFox39GqjORZa4EYFd0 X-Received: by 2002:a6b:b8c3:: with SMTP id i186mr9321227iof.38.1619998137129; Sun, 02 May 2021 16:28:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998137; cv=none; d=google.com; s=arc-20160816; b=NAy86zXqJ0YY+LX7nNNFqxO9MJN2WMqbddcMzmgfHsNP/gKzJIuyKBZBYWzL8jJR9L ti+FqG9D8MQnIS3syxY1CivzU00T8lpHRuOm6+llQi4b4U1tGyabKElDCcMEmE8Wtwd4 MIrzNU8dkOx0y29U143UPPvqo432QBXcCjt5uTVE0hZraILESIMWgarf2GRFh+BzTO8p eEjDBA5rOmye4cQ4Z+Vh5DxAT167be2ws9G4cbwo8K0gajES8r9PqIx9L8d+g8RU6LTt BOyl9SoWj+nicU7lVi3d7POpx/DGBwzS4gk60qQ+WjWXygJ8XYMMymiKeNdJZy3pK2ND qXFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=d8CBczrHncTC7jkXzgGz+cyQf3ESCXlA91ntw2lzZG8=; b=yMDcEqiIKZ4ZsyL3L+g0oFkSaMsPd0hB1+Arc7Ex/wa8fileFqcNClr2Sbai0OV6t+ MVCetMI3OalIb26Wskql1yt4LTdr2Lyiiz4NFG9H3G0g1KZEucq7+HdQ9N3nZyiX5OyB kMSfRZpN6YLigNvxF/Vjyi0/dH17UEVIs+lfB4S+UiIGrCC7+UesJET25OgVqQS6loVc X2AN4IwcEXRaRciFerU2zZuq/HC6/87wBcSeCvKSaK1efqXJWPgbsZmf08fqY/InLKNd amOAp9ptZJNJEjidI95hy47cA0fd0TwkxM5JsteprqzW8BtfRQ4AvJai4M5ra44aLWq/ OSxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E+rva+qJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i9si10560903ilr.157.2021.05.02.16.28.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:28:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E+rva+qJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:37110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLWC-0005da-Fm for patch@linaro.org; Sun, 02 May 2021 19:28:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36902) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMV-0008EZ-56 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:55 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]:36512) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMT-0002tC-Gx for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:54 -0400 Received: by mail-pl1-x630.google.com with SMTP id a11so1869772plh.3 for ; Sun, 02 May 2021 16:18:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d8CBczrHncTC7jkXzgGz+cyQf3ESCXlA91ntw2lzZG8=; b=E+rva+qJrH5ryjX/w0DsX04yeyndYJamgacOvmFmRACHYpAs0grm6ePy18ilacQAsA xr4WDjYfbs+tphG5T/95j8JjFoIZWoqnlIBy7bM4zmHOqh5lxHMQLWdPeIPmPLXgcy7E Rfc28rHjHfuhdvSDpBDoKqfRQnI365+Fz1t8qM7vQRzXDbotddOL7cIhuDHk+p0aXw4x OpXQVYLXxGki1aAaJhF+AElbz5ZX14NAYnYwFV4iWLfGWvNdy2xq/5HfG0udX395MwNm /CD18DqC+6/+tbH57860V7mhuwzVI+abWLIHx7L4zS5LZ9B93TJS/06d9hmSS1tZZb5v qV0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d8CBczrHncTC7jkXzgGz+cyQf3ESCXlA91ntw2lzZG8=; b=hrx+tox4vmEuide3fV88h/PC+5S7ovCJF0fpTVWDwNLa0OJZMaZwFRmEgWLGOEOmuA qU6kzH/qLervf5EFp5MGybOJYKdeyFSTMV3uNVg2mJ+pAAlFDbEchInuzCpUIdquQgyP zPrDZJFjukrOsLJDJ1Jj/X8FPXZ/0ZF/fU/WmfId1EcU7pztdnNouK3Z+oOCJua0aHG0 wHaxsJWcIpW0gjSIv7un1+9445vVu/F3j6VHhQmzBAiMxKEaJfCIzsZ77D0xZ38Q/CLD MGyuwpNf/tfMTU3Ms3nOAEtqqp62mihqkslxs+ZwfLFop5OPS0xrWASp014YDrbOPm3F 5+cg== X-Gm-Message-State: AOAM5334R2EIlxJN05BJ2VvPdAa2CBKfnK11ZbiO3C7JEtbuXKJJolMv Z9a1u6Fu1Uw8SHFHSx5dkhe1IPF7Ycmo3w== X-Received: by 2002:a17:90a:d17:: with SMTP id t23mr5025999pja.163.1619997532215; Sun, 02 May 2021 16:18:52 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/28] accel/tcg: Inline cpu_gen_init Date: Sun, 2 May 2021 16:18:24 -0700 Message-Id: <20210502231844.1977630-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It consists of one function call and has only one caller. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 9841eb3fb6..d55ecbe195 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -245,11 +245,6 @@ static void page_table_config_init(void) assert(v_l2_levels >= 0); } -static void cpu_gen_init(void) -{ - tcg_context_init(&tcg_init_ctx); -} - /* Encode VAL as a signed leb128 sequence at P. Return P incremented past the encoded value. */ static uint8_t *encode_sleb128(uint8_t *p, target_long val) @@ -1331,7 +1326,7 @@ void tcg_exec_init(unsigned long tb_size, int splitwx) bool ok; tcg_allowed = true; - cpu_gen_init(); + tcg_context_init(&tcg_init_ctx); page_init(); tb_htable_init(); From patchwork Sun May 2 23:18:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430479 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1228396ejc; Sun, 2 May 2021 16:33:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyknLtsRJBDO7as4XPe+fyWOAV6JDHD2xIF8y7KbW4V/8RRfyEaPVAQEhj3PLGP7gjwYcYz X-Received: by 2002:a37:486:: with SMTP id 128mr12603269qke.23.1619998383702; Sun, 02 May 2021 16:33:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998383; cv=none; d=google.com; s=arc-20160816; b=YfNdpRvKf29LG1K+NI6Vd5EVUMI9L7Cu2fbrjMnkMMCt9x96UdmKIZtBBBHUEfPL2n e4gPgmmW1OR2yKq9b3nvsz21eeK48Ghg6+ZjsmEryIj7ndDn07H3nbj9pFhMiPtpUqrQ 9jYLvuCL1zUWgQjIFKaqJsJCfNv7sMmT7Z8Oy7qj+dmUCID8SxdLrLkF7b0l9sKFtETq X38AX0IDDcDevFOUpjx8Iy9CHpj228K5wQkwSVeiNCdlqh4Mkg2VpClVC/NGDC6SlgXl Lwy4Khrbg4ZRF9ftyIX4s+2TLYOMcpXjzMiDJVJBGhxq9LnmTaba4ocx0FfCy0PB6vuN zyVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=iPIiSqY/IHv8pgYAcnIhbyeSmMZl5W5sie6hTUGBiUc=; b=fqvuoSLcwl3HdI5MWrWjtWM5aDrcYnhWXijtSWbpuHE87/CxVf6ZfpXMk5Ibh2ZXA7 BlucVEGiX2M4p6vF/DTk2qWzne9GAb9SiWBAFDFamrWLael0/gpXrRyM1stJOqJ1I6Mv VE748tXEJHfY2DL0YwOUmbsuF2pDRQwyvTvm8/S/b1h5MYpiD0vEgYIFNbb0p26lf8gf 0fC5e5/EMMc7si/X98auXusRgXyq+i06LwK5XhZcu+xFRHip3Q2n/nPMesh3uI/QKIq/ /FUNW2BsJCJKpbL7oFyjplYMqxInUG3/yd4dfgDnchBP8LJiStJTVEA3DSxUZqAY9XFP KeCA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MyTZ8t0o; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r14si8555494qvh.70.2021.05.02.16.33.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:33:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MyTZ8t0o; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49704 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLaA-0002Pt-M0 for patch@linaro.org; Sun, 02 May 2021 19:33:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36964) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMY-0008Jf-51 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:58 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]:34406) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMU-0002u3-J4 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:57 -0400 Received: by mail-pg1-x530.google.com with SMTP id z16so2470214pga.1 for ; Sun, 02 May 2021 16:18:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=iPIiSqY/IHv8pgYAcnIhbyeSmMZl5W5sie6hTUGBiUc=; b=MyTZ8t0oETSa4tvENMkA/eXOV1YwRX+ilFvX6yKB8QNmP0doDojQPxMbNyKbA0Da/D flme2yEN3B5m1l6jE1L/BfkhvX3gBMrehaitdDCT4MrPPQFR01LWZ7ykyBM32XL/vct+ aHMywk3UGROjpBOo7i59rSdxKRSIJRXYp0hOI0evbG9TU/5Wff0F/SByjejyKeQgDpgC 8E5O88GkI+BfQWief7BOraQeCLiSxx2aMaBU6ArAEhNqa0z7TdMIbPssqteZNSKNNvPs yPBqbUNDkPiFMXp/E8g3DwDKCzbR3PyiVIOXIZnMJZIRTeBycCiMVgs4SoC+nGNYbt9w Ssog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iPIiSqY/IHv8pgYAcnIhbyeSmMZl5W5sie6hTUGBiUc=; b=iFLsHzI3ONe10H/uEVXyFzwRu41/4g2gwJBbukXs809UZD8kL/X3/wYL/4bW5zDPhJ SZQZS6v4L2KPvJWEaKy0cOQsjuXMfYPZXYf6kbD0JPCslvQ7BeUclWZKrjotqFmtmMa9 Jzw35Mvua3v3sAkGDywlFDuJTd9XB6tmqJ6dscmXurJk375ae7YKyuCXORv2Qb4UsHf6 0gVKAg7uVTNwHvcWwr9TRk0NaCx3xu4aKXyktIgKB1d0rhW3poxnwhNwM3FYlW3cTK4/ 1nMhE7FCnHYC6caEfloIfuI9P219U0cwVxF4nrj9awMDGlSAiTP9wgdiQgJbzlU4MRVC 30Rg== X-Gm-Message-State: AOAM532mmUjsM5pbgBJdEEYemqOfPOqwJaJPcbSmHsemQCxZHAZmLgbv Fkh1QT78XSkv9jAtwhZeqrKqfoZlNpVi3Q== X-Received: by 2002:a63:5b23:: with SMTP id p35mr15446019pgb.352.1619997533016; Sun, 02 May 2021 16:18:53 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/28] accel/tcg: Move alloc_code_gen_buffer to tcg/region.c Date: Sun, 2 May 2021 16:18:25 -0700 Message-Id: <20210502231844.1977630-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Buffer management is integral to tcg. Do not leave the allocation to code outside of tcg/. This is code movement, with further cleanups to follow. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 2 +- accel/tcg/translate-all.c | 414 +------------------------------------ tcg/region.c | 421 +++++++++++++++++++++++++++++++++++++- 3 files changed, 418 insertions(+), 419 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 0f0695e90d..7a435bf807 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -874,7 +874,7 @@ void *tcg_malloc_internal(TCGContext *s, int size); void tcg_pool_reset(TCGContext *s); TranslationBlock *tcg_tb_alloc(TCGContext *s); -void tcg_region_init(void); +void tcg_region_init(size_t tb_size, int splitwx); void tb_destroy(TranslationBlock *tb); void tcg_region_reset_all(void); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index d55ecbe195..e481f23ac2 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -18,7 +18,6 @@ */ #include "qemu/osdep.h" -#include "qemu/units.h" #include "qemu-common.h" #define NO_CPU_IO_DEFS @@ -51,7 +50,6 @@ #include "exec/tb-hash.h" #include "exec/translate-all.h" #include "qemu/bitmap.h" -#include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "qemu/timer.h" #include "qemu/main-loop.h" @@ -895,408 +893,6 @@ static void page_lock_pair(PageDesc **ret_p1, tb_page_addr_t phys1, } } -/* Minimum size of the code gen buffer. This number is randomly chosen, - but not so small that we can't have a fair number of TB's live. */ -#define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB) - -/* Maximum size of the code gen buffer we'd like to use. Unless otherwise - indicated, this is constrained by the range of direct branches on the - host cpu, as used by the TCG implementation of goto_tb. */ -#if defined(__x86_64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__sparc__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc__) -# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) -#elif defined(__aarch64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__s390x__) - /* We have a +- 4GB range on the branches; leave some slop. */ -# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) -#elif defined(__mips__) - /* We have a 256MB branch region, but leave room to make sure the - main executable is also within that region. */ -# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) -#else -# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) -#endif - -#if TCG_TARGET_REG_BITS == 32 -#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB) -#ifdef CONFIG_USER_ONLY -/* - * For user mode on smaller 32 bit systems we may run into trouble - * allocating big chunks of data in the right place. On these systems - * we utilise a static code generation buffer directly in the binary. - */ -#define USE_STATIC_CODE_GEN_BUFFER -#endif -#else /* TCG_TARGET_REG_BITS == 64 */ -#ifdef CONFIG_USER_ONLY -/* - * As user-mode emulation typically means running multiple instances - * of the translator don't go too nuts with our default code gen - * buffer lest we make things too hard for the OS. - */ -#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (128 * MiB) -#else -/* - * We expect most system emulation to run one or two guests per host. - * Users running large scale system emulation may want to tweak their - * runtime setup via the tb-size control on the command line. - */ -#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (1 * GiB) -#endif -#endif - -#define DEFAULT_CODE_GEN_BUFFER_SIZE \ - (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \ - ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE) - -static size_t size_code_gen_buffer(size_t tb_size) -{ - /* Size the buffer. */ - if (tb_size == 0) { - size_t phys_mem = qemu_get_host_physmem(); - if (phys_mem == 0) { - tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; - } else { - tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); - } - } - if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { - tb_size = MIN_CODE_GEN_BUFFER_SIZE; - } - if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { - tb_size = MAX_CODE_GEN_BUFFER_SIZE; - } - return tb_size; -} - -#ifdef __mips__ -/* In order to use J and JAL within the code_gen_buffer, we require - that the buffer not cross a 256MB boundary. */ -static inline bool cross_256mb(void *addr, size_t size) -{ - return ((uintptr_t)addr ^ ((uintptr_t)addr + size)) & ~0x0ffffffful; -} - -/* We weren't able to allocate a buffer without crossing that boundary, - so make do with the larger portion of the buffer that doesn't cross. - Returns the new base of the buffer, and adjusts code_gen_buffer_size. */ -static inline void *split_cross_256mb(void *buf1, size_t size1) -{ - void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful); - size_t size2 = buf1 + size1 - buf2; - - size1 = buf2 - buf1; - if (size1 < size2) { - size1 = size2; - buf1 = buf2; - } - - tcg_ctx->code_gen_buffer_size = size1; - return buf1; -} -#endif - -#ifdef USE_STATIC_CODE_GEN_BUFFER -static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE] - __attribute__((aligned(CODE_GEN_ALIGN))); - -static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) -{ - void *buf, *end; - size_t size; - - if (splitwx > 0) { - error_setg(errp, "jit split-wx not supported"); - return false; - } - - /* page-align the beginning and end of the buffer */ - buf = static_code_gen_buffer; - end = static_code_gen_buffer + sizeof(static_code_gen_buffer); - buf = QEMU_ALIGN_PTR_UP(buf, qemu_real_host_page_size); - end = QEMU_ALIGN_PTR_DOWN(end, qemu_real_host_page_size); - - size = end - buf; - - /* Honor a command-line option limiting the size of the buffer. */ - if (size > tb_size) { - size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size); - } - tcg_ctx->code_gen_buffer_size = size; - -#ifdef __mips__ - if (cross_256mb(buf, size)) { - buf = split_cross_256mb(buf, size); - size = tcg_ctx->code_gen_buffer_size; - } -#endif - - if (qemu_mprotect_rwx(buf, size)) { - error_setg_errno(errp, errno, "mprotect of jit buffer"); - return false; - } - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - - tcg_ctx->code_gen_buffer = buf; - return true; -} -#elif defined(_WIN32) -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) -{ - void *buf; - - if (splitwx > 0) { - error_setg(errp, "jit split-wx not supported"); - return false; - } - - buf = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, - PAGE_EXECUTE_READWRITE); - if (buf == NULL) { - error_setg_win32(errp, GetLastError(), - "allocate %zu bytes for jit buffer", size); - return false; - } - - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; - return true; -} -#else -static bool alloc_code_gen_buffer_anon(size_t size, int prot, - int flags, Error **errp) -{ - void *buf; - - buf = mmap(NULL, size, prot, flags, -1, 0); - if (buf == MAP_FAILED) { - error_setg_errno(errp, errno, - "allocate %zu bytes for jit buffer", size); - return false; - } - tcg_ctx->code_gen_buffer_size = size; - -#ifdef __mips__ - if (cross_256mb(buf, size)) { - /* - * Try again, with the original still mapped, to avoid re-acquiring - * the same 256mb crossing. - */ - size_t size2; - void *buf2 = mmap(NULL, size, prot, flags, -1, 0); - switch ((int)(buf2 != MAP_FAILED)) { - case 1: - if (!cross_256mb(buf2, size)) { - /* Success! Use the new buffer. */ - munmap(buf, size); - break; - } - /* Failure. Work with what we had. */ - munmap(buf2, size); - /* fallthru */ - default: - /* Split the original buffer. Free the smaller half. */ - buf2 = split_cross_256mb(buf, size); - size2 = tcg_ctx->code_gen_buffer_size; - if (buf == buf2) { - munmap(buf + size2, size - size2); - } else { - munmap(buf, size - size2); - } - size = size2; - break; - } - buf = buf2; - } -#endif - - /* Request large pages for the buffer. */ - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - - tcg_ctx->code_gen_buffer = buf; - return true; -} - -#ifndef CONFIG_TCG_INTERPRETER -#ifdef CONFIG_POSIX -#include "qemu/memfd.h" - -static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) -{ - void *buf_rw = NULL, *buf_rx = MAP_FAILED; - int fd = -1; - -#ifdef __mips__ - /* Find space for the RX mapping, vs the 256MiB regions. */ - if (!alloc_code_gen_buffer_anon(size, PROT_NONE, - MAP_PRIVATE | MAP_ANONYMOUS | - MAP_NORESERVE, errp)) { - return false; - } - /* The size of the mapping may have been adjusted. */ - size = tcg_ctx->code_gen_buffer_size; - buf_rx = tcg_ctx->code_gen_buffer; -#endif - - buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); - if (buf_rw == NULL) { - goto fail; - } - -#ifdef __mips__ - void *tmp = mmap(buf_rx, size, PROT_READ | PROT_EXEC, - MAP_SHARED | MAP_FIXED, fd, 0); - if (tmp != buf_rx) { - goto fail_rx; - } -#else - buf_rx = mmap(NULL, size, PROT_READ | PROT_EXEC, MAP_SHARED, fd, 0); - if (buf_rx == MAP_FAILED) { - goto fail_rx; - } -#endif - - close(fd); - tcg_ctx->code_gen_buffer = buf_rw; - tcg_ctx->code_gen_buffer_size = size; - tcg_splitwx_diff = buf_rx - buf_rw; - - /* Request large pages for the buffer and the splitwx. */ - qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); - qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); - return true; - - fail_rx: - error_setg_errno(errp, errno, "failed to map shared memory for execute"); - fail: - if (buf_rx != MAP_FAILED) { - munmap(buf_rx, size); - } - if (buf_rw) { - munmap(buf_rw, size); - } - if (fd >= 0) { - close(fd); - } - return false; -} -#endif /* CONFIG_POSIX */ - -#ifdef CONFIG_DARWIN -#include - -extern kern_return_t mach_vm_remap(vm_map_t target_task, - mach_vm_address_t *target_address, - mach_vm_size_t size, - mach_vm_offset_t mask, - int flags, - vm_map_t src_task, - mach_vm_address_t src_address, - boolean_t copy, - vm_prot_t *cur_protection, - vm_prot_t *max_protection, - vm_inherit_t inheritance); - -static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) -{ - kern_return_t ret; - mach_vm_address_t buf_rw, buf_rx; - vm_prot_t cur_prot, max_prot; - - /* Map the read-write portion via normal anon memory. */ - if (!alloc_code_gen_buffer_anon(size, PROT_READ | PROT_WRITE, - MAP_PRIVATE | MAP_ANONYMOUS, errp)) { - return false; - } - - buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; - buf_rx = 0; - ret = mach_vm_remap(mach_task_self(), - &buf_rx, - size, - 0, - VM_FLAGS_ANYWHERE, - mach_task_self(), - buf_rw, - false, - &cur_prot, - &max_prot, - VM_INHERIT_NONE); - if (ret != KERN_SUCCESS) { - /* TODO: Convert "ret" to a human readable error message. */ - error_setg(errp, "vm_remap for jit splitwx failed"); - munmap((void *)buf_rw, size); - return false; - } - - if (mprotect((void *)buf_rx, size, PROT_READ | PROT_EXEC) != 0) { - error_setg_errno(errp, errno, "mprotect for jit splitwx"); - munmap((void *)buf_rx, size); - munmap((void *)buf_rw, size); - return false; - } - - tcg_splitwx_diff = buf_rx - buf_rw; - return true; -} -#endif /* CONFIG_DARWIN */ -#endif /* CONFIG_TCG_INTERPRETER */ - -static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) -{ -#ifndef CONFIG_TCG_INTERPRETER -# ifdef CONFIG_DARWIN - return alloc_code_gen_buffer_splitwx_vmremap(size, errp); -# endif -# ifdef CONFIG_POSIX - return alloc_code_gen_buffer_splitwx_memfd(size, errp); -# endif -#endif - error_setg(errp, "jit split-wx not supported"); - return false; -} - -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) -{ - ERRP_GUARD(); - int prot, flags; - - if (splitwx) { - if (alloc_code_gen_buffer_splitwx(size, errp)) { - return true; - } - /* - * If splitwx force-on (1), fail; - * if splitwx default-on (-1), fall through to splitwx off. - */ - if (splitwx > 0) { - return false; - } - error_free_or_abort(errp); - } - - prot = PROT_READ | PROT_WRITE | PROT_EXEC; - flags = MAP_PRIVATE | MAP_ANONYMOUS; -#ifdef CONFIG_TCG_INTERPRETER - /* The tcg interpreter does not need execute permission. */ - prot = PROT_READ | PROT_WRITE; -#elif defined(CONFIG_DARWIN) - /* Applicable to both iOS and macOS (Apple Silicon). */ - if (!splitwx) { - flags |= MAP_JIT; - } -#endif - - return alloc_code_gen_buffer_anon(size, prot, flags, errp); -} -#endif /* USE_STATIC_CODE_GEN_BUFFER, WIN32, POSIX */ - static bool tb_cmp(const void *ap, const void *bp) { const TranslationBlock *a = ap; @@ -1323,19 +919,11 @@ static void tb_htable_init(void) size. */ void tcg_exec_init(unsigned long tb_size, int splitwx) { - bool ok; - tcg_allowed = true; tcg_context_init(&tcg_init_ctx); page_init(); tb_htable_init(); - - ok = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), - splitwx, &error_fatal); - assert(ok); - - /* TODO: allocating regions is hand-in-glove with code_gen_buffer. */ - tcg_region_init(); + tcg_region_init(tb_size, splitwx); #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and diff --git a/tcg/region.c b/tcg/region.c index ba3677f474..ddcbf7113e 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -23,6 +23,8 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" +#include "qapi/error.h" #include "exec/exec-all.h" #include "tcg/tcg.h" #if !defined(CONFIG_USER_ONLY) @@ -406,6 +408,408 @@ static size_t tcg_n_regions(void) } #endif +/* Minimum size of the code gen buffer. This number is randomly chosen, + but not so small that we can't have a fair number of TB's live. */ +#define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB) + +/* Maximum size of the code gen buffer we'd like to use. Unless otherwise + indicated, this is constrained by the range of direct branches on the + host cpu, as used by the TCG implementation of goto_tb. */ +#if defined(__x86_64__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__sparc__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__powerpc64__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__powerpc__) +# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) +#elif defined(__aarch64__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__s390x__) + /* We have a +- 4GB range on the branches; leave some slop. */ +# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) +#elif defined(__mips__) + /* We have a 256MB branch region, but leave room to make sure the + main executable is also within that region. */ +# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) +#else +# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) +#endif + +#if TCG_TARGET_REG_BITS == 32 +#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB) +#ifdef CONFIG_USER_ONLY +/* + * For user mode on smaller 32 bit systems we may run into trouble + * allocating big chunks of data in the right place. On these systems + * we utilise a static code generation buffer directly in the binary. + */ +#define USE_STATIC_CODE_GEN_BUFFER +#endif +#else /* TCG_TARGET_REG_BITS == 64 */ +#ifdef CONFIG_USER_ONLY +/* + * As user-mode emulation typically means running multiple instances + * of the translator don't go too nuts with our default code gen + * buffer lest we make things too hard for the OS. + */ +#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (128 * MiB) +#else +/* + * We expect most system emulation to run one or two guests per host. + * Users running large scale system emulation may want to tweak their + * runtime setup via the tb-size control on the command line. + */ +#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (1 * GiB) +#endif +#endif + +#define DEFAULT_CODE_GEN_BUFFER_SIZE \ + (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \ + ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE) + +static size_t size_code_gen_buffer(size_t tb_size) +{ + /* Size the buffer. */ + if (tb_size == 0) { + size_t phys_mem = qemu_get_host_physmem(); + if (phys_mem == 0) { + tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; + } else { + tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); + } + } + if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { + tb_size = MIN_CODE_GEN_BUFFER_SIZE; + } + if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { + tb_size = MAX_CODE_GEN_BUFFER_SIZE; + } + return tb_size; +} + +#ifdef __mips__ +/* In order to use J and JAL within the code_gen_buffer, we require + that the buffer not cross a 256MB boundary. */ +static inline bool cross_256mb(void *addr, size_t size) +{ + return ((uintptr_t)addr ^ ((uintptr_t)addr + size)) & ~0x0ffffffful; +} + +/* We weren't able to allocate a buffer without crossing that boundary, + so make do with the larger portion of the buffer that doesn't cross. + Returns the new base of the buffer, and adjusts code_gen_buffer_size. */ +static inline void *split_cross_256mb(void *buf1, size_t size1) +{ + void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful); + size_t size2 = buf1 + size1 - buf2; + + size1 = buf2 - buf1; + if (size1 < size2) { + size1 = size2; + buf1 = buf2; + } + + tcg_ctx->code_gen_buffer_size = size1; + return buf1; +} +#endif + +#ifdef USE_STATIC_CODE_GEN_BUFFER +static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE] + __attribute__((aligned(CODE_GEN_ALIGN))); + +static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) +{ + void *buf, *end; + size_t size; + + if (splitwx > 0) { + error_setg(errp, "jit split-wx not supported"); + return false; + } + + /* page-align the beginning and end of the buffer */ + buf = static_code_gen_buffer; + end = static_code_gen_buffer + sizeof(static_code_gen_buffer); + buf = QEMU_ALIGN_PTR_UP(buf, qemu_real_host_page_size); + end = QEMU_ALIGN_PTR_DOWN(end, qemu_real_host_page_size); + + size = end - buf; + + /* Honor a command-line option limiting the size of the buffer. */ + if (size > tb_size) { + size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size); + } + tcg_ctx->code_gen_buffer_size = size; + +#ifdef __mips__ + if (cross_256mb(buf, size)) { + buf = split_cross_256mb(buf, size); + size = tcg_ctx->code_gen_buffer_size; + } +#endif + + if (qemu_mprotect_rwx(buf, size)) { + error_setg_errno(errp, errno, "mprotect of jit buffer"); + return false; + } + qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); + + tcg_ctx->code_gen_buffer = buf; + return true; +} +#elif defined(_WIN32) +static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +{ + void *buf; + + if (splitwx > 0) { + error_setg(errp, "jit split-wx not supported"); + return false; + } + + buf = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, + PAGE_EXECUTE_READWRITE); + if (buf == NULL) { + error_setg_win32(errp, GetLastError(), + "allocate %zu bytes for jit buffer", size); + return false; + } + + tcg_ctx->code_gen_buffer = buf; + tcg_ctx->code_gen_buffer_size = size; + return true; +} +#else +static bool alloc_code_gen_buffer_anon(size_t size, int prot, + int flags, Error **errp) +{ + void *buf; + + buf = mmap(NULL, size, prot, flags, -1, 0); + if (buf == MAP_FAILED) { + error_setg_errno(errp, errno, + "allocate %zu bytes for jit buffer", size); + return false; + } + tcg_ctx->code_gen_buffer_size = size; + +#ifdef __mips__ + if (cross_256mb(buf, size)) { + /* + * Try again, with the original still mapped, to avoid re-acquiring + * the same 256mb crossing. + */ + size_t size2; + void *buf2 = mmap(NULL, size, prot, flags, -1, 0); + switch ((int)(buf2 != MAP_FAILED)) { + case 1: + if (!cross_256mb(buf2, size)) { + /* Success! Use the new buffer. */ + munmap(buf, size); + break; + } + /* Failure. Work with what we had. */ + munmap(buf2, size); + /* fallthru */ + default: + /* Split the original buffer. Free the smaller half. */ + buf2 = split_cross_256mb(buf, size); + size2 = tcg_ctx->code_gen_buffer_size; + if (buf == buf2) { + munmap(buf + size2, size - size2); + } else { + munmap(buf, size - size2); + } + size = size2; + break; + } + buf = buf2; + } +#endif + + /* Request large pages for the buffer. */ + qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); + + tcg_ctx->code_gen_buffer = buf; + return true; +} + +#ifndef CONFIG_TCG_INTERPRETER +#ifdef CONFIG_POSIX +#include "qemu/memfd.h" + +static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) +{ + void *buf_rw = NULL, *buf_rx = MAP_FAILED; + int fd = -1; + +#ifdef __mips__ + /* Find space for the RX mapping, vs the 256MiB regions. */ + if (!alloc_code_gen_buffer_anon(size, PROT_NONE, + MAP_PRIVATE | MAP_ANONYMOUS | + MAP_NORESERVE, errp)) { + return false; + } + /* The size of the mapping may have been adjusted. */ + size = tcg_ctx->code_gen_buffer_size; + buf_rx = tcg_ctx->code_gen_buffer; +#endif + + buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); + if (buf_rw == NULL) { + goto fail; + } + +#ifdef __mips__ + void *tmp = mmap(buf_rx, size, PROT_READ | PROT_EXEC, + MAP_SHARED | MAP_FIXED, fd, 0); + if (tmp != buf_rx) { + goto fail_rx; + } +#else + buf_rx = mmap(NULL, size, PROT_READ | PROT_EXEC, MAP_SHARED, fd, 0); + if (buf_rx == MAP_FAILED) { + goto fail_rx; + } +#endif + + close(fd); + tcg_ctx->code_gen_buffer = buf_rw; + tcg_ctx->code_gen_buffer_size = size; + tcg_splitwx_diff = buf_rx - buf_rw; + + /* Request large pages for the buffer and the splitwx. */ + qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); + qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); + return true; + + fail_rx: + error_setg_errno(errp, errno, "failed to map shared memory for execute"); + fail: + if (buf_rx != MAP_FAILED) { + munmap(buf_rx, size); + } + if (buf_rw) { + munmap(buf_rw, size); + } + if (fd >= 0) { + close(fd); + } + return false; +} +#endif /* CONFIG_POSIX */ + +#ifdef CONFIG_DARWIN +#include + +extern kern_return_t mach_vm_remap(vm_map_t target_task, + mach_vm_address_t *target_address, + mach_vm_size_t size, + mach_vm_offset_t mask, + int flags, + vm_map_t src_task, + mach_vm_address_t src_address, + boolean_t copy, + vm_prot_t *cur_protection, + vm_prot_t *max_protection, + vm_inherit_t inheritance); + +static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) +{ + kern_return_t ret; + mach_vm_address_t buf_rw, buf_rx; + vm_prot_t cur_prot, max_prot; + + /* Map the read-write portion via normal anon memory. */ + if (!alloc_code_gen_buffer_anon(size, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, errp)) { + return false; + } + + buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; + buf_rx = 0; + ret = mach_vm_remap(mach_task_self(), + &buf_rx, + size, + 0, + VM_FLAGS_ANYWHERE, + mach_task_self(), + buf_rw, + false, + &cur_prot, + &max_prot, + VM_INHERIT_NONE); + if (ret != KERN_SUCCESS) { + /* TODO: Convert "ret" to a human readable error message. */ + error_setg(errp, "vm_remap for jit splitwx failed"); + munmap((void *)buf_rw, size); + return false; + } + + if (mprotect((void *)buf_rx, size, PROT_READ | PROT_EXEC) != 0) { + error_setg_errno(errp, errno, "mprotect for jit splitwx"); + munmap((void *)buf_rx, size); + munmap((void *)buf_rw, size); + return false; + } + + tcg_splitwx_diff = buf_rx - buf_rw; + return true; +} +#endif /* CONFIG_DARWIN */ +#endif /* CONFIG_TCG_INTERPRETER */ + +static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) +{ +#ifndef CONFIG_TCG_INTERPRETER +# ifdef CONFIG_DARWIN + return alloc_code_gen_buffer_splitwx_vmremap(size, errp); +# endif +# ifdef CONFIG_POSIX + return alloc_code_gen_buffer_splitwx_memfd(size, errp); +# endif +#endif + error_setg(errp, "jit split-wx not supported"); + return false; +} + +static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +{ + ERRP_GUARD(); + int prot, flags; + + if (splitwx) { + if (alloc_code_gen_buffer_splitwx(size, errp)) { + return true; + } + /* + * If splitwx force-on (1), fail; + * if splitwx default-on (-1), fall through to splitwx off. + */ + if (splitwx > 0) { + return false; + } + error_free_or_abort(errp); + } + + prot = PROT_READ | PROT_WRITE | PROT_EXEC; + flags = MAP_PRIVATE | MAP_ANONYMOUS; +#ifdef CONFIG_TCG_INTERPRETER + /* The tcg interpreter does not need execute permission. */ + prot = PROT_READ | PROT_WRITE; +#elif defined(CONFIG_DARWIN) + /* Applicable to both iOS and macOS (Apple Silicon). */ + if (!splitwx) { + flags |= MAP_JIT; + } +#endif + + return alloc_code_gen_buffer_anon(size, prot, flags, errp); +} +#endif /* USE_STATIC_CODE_GEN_BUFFER, WIN32, POSIX */ + /* * Initializes region partitioning. * @@ -434,16 +838,23 @@ static size_t tcg_n_regions(void) * in practice. Multi-threaded guests share most if not all of their translated * code, which makes parallel code generation less appealing than in softmmu. */ -void tcg_region_init(void) +void tcg_region_init(size_t tb_size, int splitwx) { - void *buf = tcg_init_ctx.code_gen_buffer; - void *aligned; - size_t size = tcg_init_ctx.code_gen_buffer_size; - size_t page_size = qemu_real_host_page_size; + void *buf, *aligned; + size_t size; + size_t page_size; size_t region_size; size_t n_regions; size_t i; + bool ok; + ok = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), + splitwx, &error_fatal); + assert(ok); + + buf = tcg_init_ctx.code_gen_buffer; + size = tcg_init_ctx.code_gen_buffer_size; + page_size = qemu_real_host_page_size; n_regions = tcg_n_regions(); /* The first region will be 'aligned - buf' bytes larger than the others */ From patchwork Sun May 2 23:18:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430463 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1223208ejc; Sun, 2 May 2021 16:22:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyxmhX4/LVv0loLOG8pj5oPZlpdkWvqhbSISn31U/+xgOG9e/NoEgxHRI99DcwXnD8PD6a4 X-Received: by 2002:a02:308e:: with SMTP id q136mr15889136jaq.47.1619997775635; Sun, 02 May 2021 16:22:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997775; cv=none; d=google.com; s=arc-20160816; b=KhosXLyflWZL1HKDCg4Pztvdbp99FIK8zn7EFTM56eY85QsqzBThIGoNouKGVx+0ji Cj13NS7WsgmfhcTqqJqwRFQHUwzQ1/9MsjAgBJMnxRRNfOY++y7Od+P2CCPXXWW2XjsW PWpC8y1tEepEZZjh87QgDQ0N2nHCQdEsfLnI7joL1Xt3gEGt10jwMiD6LTbHvpnTdSJl aArhIznfg32QE5WutB0+m8q2dXduScrtJqDmBS6w7LH7W7Vp+2IrKu6TJLPGcihFKeZ/ DoO1oZlt9TC3uzmVrtNT16wBbm2EdcXz5IJRwSXzbsngPX9NjkyPC2+ZZ6Y+sVZF1tAM buSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=M+GW/FjdFE0LjCNjl+PKpujGwHht+vUuynWRRTNqZ50=; b=zZfjVYp0RbTgAqKPVsypnr42qdI2ceYEFDGZC8zS8Oc9IRoko6rKZ72/4hpwk9UhuH nz1DbH1iTaUKr/PZ5OJ/UZyGl0m7NMyTTmErdWg21umhxQAsQoNA5UpahXhMJ7VCTaaq BLBvL02mCYVnvm6ohGRgvqCOEkmnbc9D0/cHIHdw7WIMY4wQDf3umFH57CeSYrQasrzx 5PowsOLYpnqLhix49v7KaL1QbwFYDIqPIa6eNK6XiF3mTSEyq7pPZsg5J2tiztIualSX sKUCV9VkUEpUJZM/qlqt5cttkN7z94XTg/JuJ0PsrhnEd2mpaT/ADmI61bsC+aguhFEz CFoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ynpYBzhT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z11si15102057ioq.81.2021.05.02.16.22.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:22:55 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ynpYBzhT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39408 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLQM-0003Td-Vv for patch@linaro.org; Sun, 02 May 2021 19:22:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36922) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMW-0008HQ-DN for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:56 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]:39652) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMU-0002uO-Nm for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:56 -0400 Received: by mail-pg1-x530.google.com with SMTP id s22so2452477pgk.6 for ; Sun, 02 May 2021 16:18:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=M+GW/FjdFE0LjCNjl+PKpujGwHht+vUuynWRRTNqZ50=; b=ynpYBzhTcxaiE3SUl1tIz4geQnWN7S21LcTW9hRgX/HtOuKvCHnyPHfF4fnrDCClmA eU36oVGpjgwNvXYrE10NF2//9R8jFYJ6sSR/AQ6UPXAA+lJgjj7L5Bu7NcdCANfbQFT8 yjSUJbJo8y/YS4zbVmJYBusFRTcCQTXEXOva9Zgc4W2EjojvrtK1JWhhFiFY4b3k4tSH mnCl4AWWd15909oiI2vZcmdJh+KDT3ft82u8kuEmcEunEJWFTsf3sGEireQ4aHNic4Vv EoyEp2+03CFFOy6pr/wfVqgo2c9kNL60dRpXs+8rg/ydmUUtkXW4jFvvB/JdAMvEsAYi LBaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M+GW/FjdFE0LjCNjl+PKpujGwHht+vUuynWRRTNqZ50=; b=N3G2GIbKI4tERc3s3rnrkax61mTCdY14W2UjMCGIWJvlvkXyLnvtYWGiNUoAvBBdtE nJXsckdg6vvkC636rS5rhCr0740vtl97P9CZugcfWyvwcuqCk4YsVSLReqkDxQaH1M4y 4L9uw8u5o1bQ8/RFJQTYx9Ei9/2tWyt2T/YmwytZj8z8M6Gb+6mOvsH06u4AnPRWohWx 9/IN/b0YlLtFDBomyJ6WUinY/h1JD+p1CkGrLDKpwDp0hLVN9/C6/Rwrhq8z+rFpTJnF PoklAfXbLabADYJ6zuEBAXlpwg+n44zCIBq3pOm6cl6M0g1c0RAHiSMgs6NKNosDEaKe FhGg== X-Gm-Message-State: AOAM532hQy7gCnahWeyCNa/q5019xhTL1+tDt50TkLE5JrhJPhZTtqG+ jImRkpqls+EgIEUF8cGTc2O8jOwW8vqffw== X-Received: by 2002:a63:f90d:: with SMTP id h13mr15712450pgi.18.1619997533531; Sun, 02 May 2021 16:18:53 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/28] accel/tcg: Rename tcg_init to tcg_init_machine Date: Sun, 2 May 2021 16:18:26 -0700 Message-Id: <20210502231844.1977630-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We shortly want to use tcg_init for something else. Since the hook is called init_machine, match that. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index f132033999..30d81ff7f5 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -105,7 +105,7 @@ static void tcg_accel_instance_init(Object *obj) bool mttcg_enabled; -static int tcg_init(MachineState *ms) +static int tcg_init_machine(MachineState *ms) { TCGState *s = TCG_STATE(current_accel()); @@ -189,7 +189,7 @@ static void tcg_accel_class_init(ObjectClass *oc, void *data) { AccelClass *ac = ACCEL_CLASS(oc); ac->name = "tcg"; - ac->init_machine = tcg_init; + ac->init_machine = tcg_init_machine; ac->allowed = &tcg_allowed; object_class_property_add_str(oc, "thread", From patchwork Sun May 2 23:18:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430465 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1223233ejc; Sun, 2 May 2021 16:22:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwqK+6UmieD+IkMYoTPVxmnNmF7GoxNZIRD8KQUUHMO7OvoiY15DVxqiW2cfrnmBkqSlonO X-Received: by 2002:a05:6e02:1002:: with SMTP id n2mr3489427ilj.260.1619997779081; Sun, 02 May 2021 16:22:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997779; cv=none; d=google.com; s=arc-20160816; b=MyjLeYcCZSsHMQhMuBb3PpAjDdwhVbr56x7KfrNrbzz9jGLTZfc+Ub20kqt7sAeCpN umZWkrstUOuWfUfqKDGfyWCtZp1eOfazwTBm7q1AaK2c4ja6Y+NP8uwHCkApULpHLJfE s21o8wYvOVK2fK/8qQbu83Jx6xOU/vXlYUkirTDMkFxdSLgBojnGroyz53z3WT4/V9Jc h6lw+UX6vMKaz/8YtV+jizX1utmOZqe89zqdk5Uow4yrS37WU2Jhr1HcaAeVYRkUy4Qn nx2s+8qd6JAgtlrRH7kBtoIrUD5ykVqP/ewsOdyjh0IdXdA1OFOEL+h3Qnpv8npEui4j tatg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=GXOmKXszIGwBckjBN7CglCgbQXtrKK9pBKMuXQiqDTI=; b=VxmFIHf9T4l/rc9aaly4u7jL8isNDq268nyOMCZbCfSmYJY/Njrt9NWLVBunOj2Qot yyuyC1qlJW5SXTKJa3Fi046w+p3idqnaj7Cbn06WfIn4h7rc9xmG/HImNWHs2/oWzxs1 l284C+8u/fll8eyCFMvRSE17UnwauusA2FRYiG3s6XP6TYkaozMqtU59C7U+LkQI2YhO CHxMKl/EaH7W/kOSjnbVGYXzwbMEu1GWRztiCD/EBZLa9JmSlsd5EkRdZnEo71pyCJ4A WJB2LyEIdyAAo31ToWXUHMYq1NqiLTdPHPMex7qcO/6EswnAi7yJSIZ3hM8lK+c26sUM HXBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n10v2TV3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l1si12080385jaj.50.2021.05.02.16.22.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:22:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n10v2TV3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39788 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLQQ-0003d6-B3 for patch@linaro.org; Sun, 02 May 2021 19:22:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36984) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMZ-0008K9-4W for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:00 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]:55915) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMV-0002ue-LI for qemu-devel@nongnu.org; Sun, 02 May 2021 19:18:58 -0400 Received: by mail-pj1-x102a.google.com with SMTP id gj14so2044804pjb.5 for ; Sun, 02 May 2021 16:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=GXOmKXszIGwBckjBN7CglCgbQXtrKK9pBKMuXQiqDTI=; b=n10v2TV3GGT1QuaQkkC+yCWivJ8tX4HMofBOTk7bmUwNDmXeZnaoCLNUxW86su884n LaHUyZCNhIy253y0LMrnXoiWnYWEwrPBubRFFbNnA0XoQcjahg8WAWsnJ5Fpx3mxytHd blpxKAuhRwsgU1hCg+paqbb2I62VDcF2VC5+fjB1WAHFX1ldixb02B/+W9efJuHnmnE6 vOvLjfkPzGtf9vTthz4Jfo8zOR3FnWXxxjTCLWO2YKnan5d/htry/vAm4C30QXDm+mon Gk9UC31wfkDQC12WMNvLUwBuScqOYI7En2E61W3QqQa6Q7m+cH4uVNULbrQbBGJLqhrB LyuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GXOmKXszIGwBckjBN7CglCgbQXtrKK9pBKMuXQiqDTI=; b=pUm42E1CPvpdx4VHkkBIjo+uRqXNpBcSA1zhmq1QGb9ouECxG80asIx/82qszKrd0o +937n3kH3ClQ2SoY4V1yFvG/PgEXfPz8JZ6cG8LpsKgjuPjz515aQGOSIknMncmdS9Q4 Q9V/w+jCZcAaE2X9+SIlYnIo7DXFI+WZ7MEK+0stcZqvMv6AvUFVYuPPVHRuzsRaBhZL fx3o2QNapWZJ8mViQhEKwNh/+KOX76xPLRKVea+MNTc/Tuny3cTMEE4Fk8vAbnk6iXIb nMkgtVQuWHi51ZnIWx5NFP3lTrVUjdqj1P9+Rr8truJjR4LWMMiK1RWhaX6iwybFeOzU efWw== X-Gm-Message-State: AOAM530Kz1+MO6txebuXYBMkoKergKqLAJqdMEGD8UJYBdTh6NxVk0nx Ws7zx8FKoBjewLAkcAoY+H8vRop7OdiA6A== X-Received: by 2002:a17:90a:4b0e:: with SMTP id g14mr15679052pjh.48.1619997534324; Sun, 02 May 2021 16:18:54 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/28] tcg: Create tcg_init Date: Sun, 2 May 2021 16:18:27 -0700 Message-Id: <20210502231844.1977630-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Perform both tcg_context_init and tcg_region_init. Do not leave this split to the caller. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 3 +-- tcg/internal.h | 1 + accel/tcg/translate-all.c | 3 +-- tcg/tcg.c | 9 ++++++++- 4 files changed, 11 insertions(+), 5 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 7a435bf807..3ad77ec34d 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -874,7 +874,6 @@ void *tcg_malloc_internal(TCGContext *s, int size); void tcg_pool_reset(TCGContext *s); TranslationBlock *tcg_tb_alloc(TCGContext *s); -void tcg_region_init(size_t tb_size, int splitwx); void tb_destroy(TranslationBlock *tb); void tcg_region_reset_all(void); @@ -907,7 +906,7 @@ static inline void *tcg_malloc(int size) } } -void tcg_context_init(TCGContext *s); +void tcg_init(size_t tb_size, int splitwx); void tcg_register_thread(void); void tcg_prologue_init(TCGContext *s); void tcg_func_start(TCGContext *s); diff --git a/tcg/internal.h b/tcg/internal.h index b1dda343c2..f13c564d9b 100644 --- a/tcg/internal.h +++ b/tcg/internal.h @@ -30,6 +30,7 @@ extern TCGContext **tcg_ctxs; extern unsigned int n_tcg_ctxs; +void tcg_region_init(size_t tb_size, int splitwx); bool tcg_region_alloc(TCGContext *s); void tcg_region_initial_alloc(TCGContext *s); void tcg_region_prologue_set(TCGContext *s); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index e481f23ac2..bebb3366c0 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -920,10 +920,9 @@ static void tb_htable_init(void) void tcg_exec_init(unsigned long tb_size, int splitwx) { tcg_allowed = true; - tcg_context_init(&tcg_init_ctx); page_init(); tb_htable_init(); - tcg_region_init(tb_size, splitwx); + tcg_init(tb_size, splitwx); #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and diff --git a/tcg/tcg.c b/tcg/tcg.c index 26eeed05d9..92749a2f8b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -579,8 +579,9 @@ static void process_op_defs(TCGContext *s); static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, TCGReg reg, const char *name); -void tcg_context_init(TCGContext *s) +static void tcg_context_init(void) { + TCGContext *s = &tcg_init_ctx; int op, total_args, n, i; TCGOpDef *def; TCGArgConstraint *args_ct; @@ -657,6 +658,12 @@ void tcg_context_init(TCGContext *s) cpu_env = temp_tcgv_ptr(ts); } +void tcg_init(size_t tb_size, int splitwx) +{ + tcg_context_init(); + tcg_region_init(tb_size, splitwx); +} + /* * Allocate TBs right before their corresponding translated code, making * sure that TBs and code are on different cache lines. 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[209.51.188.17]) by mx.google.com with ESMTPS id m21si11271844ioy.78.2021.05.02.16.24.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:24:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BxYNy4Pl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:48394 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLS4-00079e-Pb for patch@linaro.org; Sun, 02 May 2021 19:24:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37038) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMc-0008Ki-88 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:02 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]:41855) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMW-0002vJ-Ao for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:01 -0400 Received: by mail-pj1-x1035.google.com with SMTP id x7-20020a17090a5307b02901589d39576eso170895pjh.0 for ; Sun, 02 May 2021 16:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=2nk/Vuj2SdpJZ1YLzrc/VRv2Wt05fw7xVDCD8BqAg9c=; b=BxYNy4PlDmNZzBWOeGz1kIKFJLqs7yN4ayJ1KwfKvBvPPXRwWGWAXq4Pus0C+mv19q R6F3qEJe3SGgwnPLendiYid0A+5iu2QQ/JOfj3DT8P8/iiY26dNwgSRmAFunatCvJXLX UVjEUSXm1GwrzAcH/PM+dkur91kEa9rAkrReVl3i8YX31zDX7t9qVdZgRuhiW5BJtQeU DlcAeK5sNeMm3KIj8ccXY4eqnbXj/ZlVXegCW6JI0yNraDYAI7pA5wo6Sb7ZhWF8G+0s xJdCxRqNrvGMOqW4qj/Aqt/PT+aqouvgHFXZ6BA0qyDPoEao9ppdSeN1p3z3DQtcWhw7 TYWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2nk/Vuj2SdpJZ1YLzrc/VRv2Wt05fw7xVDCD8BqAg9c=; b=i9ePDCRJDx6Gdm4whXIG0ZUg5nhwcpW741XU8tjlGw080WjB+L5U55M32lDhdnZsgr GB4XYbHBH8aPtOZj0ujbYEiljqGTo0Z2JncVQYSQxSGX3rSKwfqzlK6KtOBW6iHn4ZXe cU17Jpe83xetSgTHtIK8Cedu1KTPhULqK4eQHgCj1uhwWdweOJxzTKI34h0uTCDG3Xpi 3kM5OboTQZOtHlY24J0x3bmBrYBk/bb7f1gKQ7rPt1nhjacemVeWif6bHuKFLa/gZGQI zbuHttjkNoibA/jhH9A32iRP4GHK0GNZ35dSZyrIHzfl1KI7qk56VLpVxT3xaT2gAuEs +leA== X-Gm-Message-State: AOAM531E89X2EGCTbMnF6qniXZrNuyQgvZFozM6VA3q/TbhDSP5EfuWZ DUDojY+2613sdAyFxN9jonTbLqR5D2XE3A== X-Received: by 2002:a17:902:dccc:b029:ed:32ed:e7d0 with SMTP id t12-20020a170902dcccb02900ed32ede7d0mr17415097pll.79.1619997534926; Sun, 02 May 2021 16:18:54 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 12/28] accel/tcg: Merge tcg_exec_init into tcg_init_machine Date: Sun, 2 May 2021 16:18:28 -0700 Message-Id: <20210502231844.1977630-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There is only one caller, and shortly we will need access to the MachineState, which tcg_init_machine already has. Signed-off-by: Richard Henderson --- accel/tcg/internal.h | 2 ++ include/sysemu/tcg.h | 2 -- accel/tcg/tcg-all.c | 14 +++++++++++++- accel/tcg/translate-all.c | 21 ++------------------- 4 files changed, 17 insertions(+), 22 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index e9c145e0fb..881bc1ede0 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -16,5 +16,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, int cflags); void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); +void page_init(void); +void tb_htable_init(void); #endif /* ACCEL_TCG_INTERNAL_H */ diff --git a/include/sysemu/tcg.h b/include/sysemu/tcg.h index 00349fb18a..53352450ff 100644 --- a/include/sysemu/tcg.h +++ b/include/sysemu/tcg.h @@ -8,8 +8,6 @@ #ifndef SYSEMU_TCG_H #define SYSEMU_TCG_H -void tcg_exec_init(unsigned long tb_size, int splitwx); - #ifdef CONFIG_TCG extern bool tcg_allowed; #define tcg_enabled() (tcg_allowed) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 30d81ff7f5..0e83acbfe5 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "qemu/accel.h" #include "qapi/qapi-builtin-visit.h" +#include "internal.h" struct TCGState { AccelState parent_obj; @@ -109,8 +110,19 @@ static int tcg_init_machine(MachineState *ms) { TCGState *s = TCG_STATE(current_accel()); - tcg_exec_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); + tcg_allowed = true; mttcg_enabled = s->mttcg_enabled; + + page_init(); + tb_htable_init(); + tcg_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); + +#if defined(CONFIG_SOFTMMU) + /* There's no guest base to take into account, so go ahead and + initialize the prologue now. */ + tcg_prologue_init(tcg_ctx); +#endif + return 0; } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index bebb3366c0..0c818c3618 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -408,7 +408,7 @@ bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit) return false; } -static void page_init(void) +void page_init(void) { page_size_init(); page_table_config_init(); @@ -907,30 +907,13 @@ static bool tb_cmp(const void *ap, const void *bp) a->page_addr[1] == b->page_addr[1]; } -static void tb_htable_init(void) +void tb_htable_init(void) { unsigned int mode = QHT_MODE_AUTO_RESIZE; qht_init(&tb_ctx.htable, tb_cmp, CODE_GEN_HTABLE_SIZE, mode); } -/* Must be called before using the QEMU cpus. 'tb_size' is the size - (in bytes) allocated to the translation buffer. Zero means default - size. */ -void tcg_exec_init(unsigned long tb_size, int splitwx) -{ - tcg_allowed = true; - page_init(); - tb_htable_init(); - tcg_init(tb_size, splitwx); - -#if defined(CONFIG_SOFTMMU) - /* There's no guest base to take into account, so go ahead and - initialize the prologue now. */ - tcg_prologue_init(tcg_ctx); -#endif -} - /* call with @p->lock held */ static inline void invalidate_page_bitmap(PageDesc *p) { From patchwork Sun May 2 23:18:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430469 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1224289ejc; Sun, 2 May 2021 16:25:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxxbXgcFIr2r6IIGre+y3BxCkG/xHHLdmBBylEJVrsfIdPreJY7Ym3+qaj1qKHnXAEwayXX X-Received: by 2002:a05:6638:f0b:: with SMTP id h11mr135431jas.95.1619997904726; Sun, 02 May 2021 16:25:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997904; cv=none; d=google.com; s=arc-20160816; b=AAHEfZpgZsVGs3CrZBUkSTtz6l1X4+cUWIQrzGj00NgBMB9AkPdrFXrw3wXhDxcqrk BnCNaK7JY3IWfCGH1TryoUXT/WSLQszulBXCS90ik13STWMyV4HWuzUIzTkl1u4Gv4WM rBYXIg/FOFgMyU6I9A/vW2DBh5riOMHxb1VL2ZPsD0mWrJBlcYhNBLSmiQ5Feln4ORaS qtwzv3BlkZCRdzS9OzHigZCNAIYk0DRm5Yk9paKp/WkF33KtnxG80wjpKOmf8qn0qXy+ pc8KaWT8hgvIH4AFyQ4IyN6zlIFHHz+AOx8jEDezRB8vld3qMnMSplGXnvbk5+jZxdmN 6CmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=iojAJu7Pxy1uH4OTAeQ4zSPiG2hYAgOBc04Nh+PmbfI=; b=TaK2hoPuhK9ZF/8qDmOYvBW/QOEwYphXKmPewMIVC5hLR3nvtnNyVIOxwuBDVkZ/er 9oLUbjnO7miRhhuPlkHdAUJhBdif1xqshd53bJKNC0eCUxu6LdKiEjymdXU82sYbN5cC Z6kfI82XoRqPl8YRLd99xJnDA1sGMc+aRTXIX1Wt2BSPXMRp+QY7y4YozhtJDho1EUdo 08w4m34vg/qKWCbZyyMX/y6GbTLyihF1xx90CyaAfg9jKX5RxGmfbv/vTiM/7FJXGwBq di1CYdB0XMtexTHBUCa3VkgxFBYg40YmV8glDTBc2kk9dgV3Zo+dLztsgQNg1oHKS76Z nFcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gYDbIlFG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Pass down the max_cpus value from tcg_init_machine, where we have the MachineState already. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 2 +- tcg/internal.h | 2 +- accel/tcg/tcg-all.c | 10 +++++++++- tcg/region.c | 32 +++++++++++--------------------- tcg/tcg.c | 10 ++++------ 5 files changed, 26 insertions(+), 30 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 3ad77ec34d..a0122c0dd3 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -906,7 +906,7 @@ static inline void *tcg_malloc(int size) } } -void tcg_init(size_t tb_size, int splitwx); +void tcg_init(size_t tb_size, int splitwx, unsigned max_cpus); void tcg_register_thread(void); void tcg_prologue_init(TCGContext *s); void tcg_func_start(TCGContext *s); diff --git a/tcg/internal.h b/tcg/internal.h index f13c564d9b..fcfeca232f 100644 --- a/tcg/internal.h +++ b/tcg/internal.h @@ -30,7 +30,7 @@ extern TCGContext **tcg_ctxs; extern unsigned int n_tcg_ctxs; -void tcg_region_init(size_t tb_size, int splitwx); +void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus); bool tcg_region_alloc(TCGContext *s); void tcg_region_initial_alloc(TCGContext *s); void tcg_region_prologue_set(TCGContext *s); diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 0e83acbfe5..d2f2ddb844 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -32,6 +32,9 @@ #include "qemu/error-report.h" #include "qemu/accel.h" #include "qapi/qapi-builtin-visit.h" +#if !defined(CONFIG_USER_ONLY) +#include "hw/boards.h" +#endif #include "internal.h" struct TCGState { @@ -109,13 +112,18 @@ bool mttcg_enabled; static int tcg_init_machine(MachineState *ms) { TCGState *s = TCG_STATE(current_accel()); +#ifdef CONFIG_USER_ONLY + unsigned max_cpus = 1; +#else + unsigned max_cpus = ms->smp.max_cpus; +#endif tcg_allowed = true; mttcg_enabled = s->mttcg_enabled; page_init(); tb_htable_init(); - tcg_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); + tcg_init(s->tb_size * 1024 * 1024, s->splitwx_enabled, max_cpus); #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and diff --git a/tcg/region.c b/tcg/region.c index ddcbf7113e..f9e93e85b3 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -27,9 +27,6 @@ #include "qapi/error.h" #include "exec/exec-all.h" #include "tcg/tcg.h" -#if !defined(CONFIG_USER_ONLY) -#include "hw/boards.h" -#endif #include "internal.h" @@ -366,27 +363,20 @@ void tcg_region_reset_all(void) tcg_region_tree_reset_all(); } +static size_t tcg_n_regions(unsigned max_cpus) +{ #ifdef CONFIG_USER_ONLY -static size_t tcg_n_regions(void) -{ return 1; -} #else -/* - * It is likely that some vCPUs will translate more code than others, so we - * first try to set more regions than max_cpus, with those regions being of - * reasonable size. If that's not possible we make do by evenly dividing - * the code_gen_buffer among the vCPUs. - */ -static size_t tcg_n_regions(void) -{ + /* + * It is likely that some vCPUs will translate more code than others, + * so we first try to set more regions than max_cpus, with those regions + * being of reasonable size. If that's not possible we make do by evenly + * dividing the code_gen_buffer among the vCPUs. + */ size_t i; /* Use a single region if all we have is one vCPU thread */ -#if !defined(CONFIG_USER_ONLY) - MachineState *ms = MACHINE(qdev_get_machine()); - unsigned int max_cpus = ms->smp.max_cpus; -#endif if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { return 1; } @@ -405,8 +395,8 @@ static size_t tcg_n_regions(void) } /* If we can't, then just allocate one region per vCPU thread */ return max_cpus; -} #endif +} /* Minimum size of the code gen buffer. This number is randomly chosen, but not so small that we can't have a fair number of TB's live. */ @@ -838,7 +828,7 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) * in practice. Multi-threaded guests share most if not all of their translated * code, which makes parallel code generation less appealing than in softmmu. */ -void tcg_region_init(size_t tb_size, int splitwx) +void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { void *buf, *aligned; size_t size; @@ -855,7 +845,7 @@ void tcg_region_init(size_t tb_size, int splitwx) buf = tcg_init_ctx.code_gen_buffer; size = tcg_init_ctx.code_gen_buffer_size; page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(); + n_regions = tcg_n_regions(max_cpus); /* The first region will be 'aligned - buf' bytes larger than the others */ aligned = QEMU_ALIGN_PTR_UP(buf, page_size); diff --git a/tcg/tcg.c b/tcg/tcg.c index 92749a2f8b..5af51d41ee 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -579,7 +579,7 @@ static void process_op_defs(TCGContext *s); static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, TCGReg reg, const char *name); -static void tcg_context_init(void) +static void tcg_context_init(unsigned max_cpus) { TCGContext *s = &tcg_init_ctx; int op, total_args, n, i; @@ -648,8 +648,6 @@ static void tcg_context_init(void) tcg_ctxs = &tcg_ctx; n_tcg_ctxs = 1; #else - MachineState *ms = MACHINE(qdev_get_machine()); - unsigned int max_cpus = ms->smp.max_cpus; tcg_ctxs = g_new(TCGContext *, max_cpus); #endif @@ -658,10 +656,10 @@ static void tcg_context_init(void) cpu_env = temp_tcgv_ptr(ts); } -void tcg_init(size_t tb_size, int splitwx) +void tcg_init(size_t tb_size, int splitwx, unsigned max_cpus) { - tcg_context_init(); - tcg_region_init(tb_size, splitwx); + tcg_context_init(max_cpus); + tcg_region_init(tb_size, splitwx, max_cpus); } /* From patchwork Sun May 2 23:18:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430471 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1225282ejc; Sun, 2 May 2021 16:27:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzk2e54Zv7+6tkJvqGmQjPlhFtTpeghDU5n1CxVwJH7tpvs9Zd9Ghj111yApXkyRxhoWvu0 X-Received: by 2002:a02:a619:: with SMTP id c25mr15403091jam.101.1619998022456; Sun, 02 May 2021 16:27:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998022; cv=none; d=google.com; s=arc-20160816; b=Eq3V8PfsVYrxuBoRZsB6kCbPeNFR73eAvVjw+Cx+yVjHd4HFDRPORVjWEmHX3N0Oqa 9c7RF7fPBovCVxPCUnAhye+jgYjj4+oVMYgIhnkjvtBOCxnS0M15ASi5CscM8pqS8yzw mKTri11rC26jL0xMtQUdwz0/28tYXR4iV/slVJQ5iLobHJopV49A8q+Tx4OXSGAANo5J UAJnw34ouxlEqCew6mA4gir2rcGuu1XdzFgK5b135WVAw80we4z29RT2Jxz24AnWAvQ5 cP2wbmSwP10VnFPlEMnPwx4SDbt2TwFrojtB6gG11hTpQCSVZ0+DeudVXnEpR9rbEa5c xYpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=mRgvCIDFvA5UlQTj7r2nU69wxLSUlzYCUC/NBBipjpc=; b=wcr/OBllbR3djcWcq3+l1YoM7Kb7tEhMG8yhcdnCrD6DEUuRXNQi52HLxZd71vcL7f 87n2YB12Gh9M3NI6dasmnM/t5hLmkthwycMYSTmxX/g/bOdcVK8EX43SYfWeGtXCyo9Z OvbjIllVIg1Wy9Spy7rLd031kVnAYwmgreuqMdWVT3Rd6SyVd5I7QzsIDPjPizYvMl7g OCiUFLORc6otlQJEZCvN9jPTaD17x51TIVMQdfcjrh5p9ZNkG8PBUdQG+to8cGFLqVH5 /U7hzONqtsoDBj7yyhHQIvUbIew26M0+yZ+YrjSsvk8RdZGIj5tzusoJPNgeQSCd9Ezz 2P/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="x453Sr/G"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z13si10001464ilz.147.2021.05.02.16.27.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:27:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="x453Sr/G"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56836 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLUL-0002D9-Q1 for patch@linaro.org; Sun, 02 May 2021 19:27:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMc-0008Ls-TC for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:05 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]:40794) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMX-0002wM-RS for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:02 -0400 Received: by mail-pl1-x62c.google.com with SMTP id n16so1776686plf.7 for ; Sun, 02 May 2021 16:18:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mRgvCIDFvA5UlQTj7r2nU69wxLSUlzYCUC/NBBipjpc=; b=x453Sr/GcQsuehPBG/uN+gTmEmu8uS66nhghLnkTlSS7+87vLcAkqxPVY7BMev+Xx1 RI2EIBuUXagRc6QHCVnP5Izf5oTBk2Y/yma2naaPmcFhT8UE3G8+Y7ZzDElHZRAg8Jxt hMWcvZ68yzI9FW/kGozXO98Ye4PWNiV0K+vhRLsAnbvCfvFZQE1r3Q3xmAN2OXhKDCt8 D/8fArF2HVAIUPnLijooWp9zRgrKztD862K7gp3RBwPbQVO4FNb87r3X1ZA/xSoUwP0w IpSGuAmYWHNtsPgj6SwD0zykRdVjyJwWFYEfkWDJnZycBy9W4RBMOItm10RIb80tKlvq gdzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mRgvCIDFvA5UlQTj7r2nU69wxLSUlzYCUC/NBBipjpc=; b=gC9AiXPuG0N7SKiLEix09PeQ2kKqc/oSNvOkcd3BxQLfgaWAshfy9r9f/FQL0E/iII YQSwV1ayTPW6Rs7i6FjQ+fsIQv38t+e7tJbJ08+g8P+ptYSgGjrZ9PSiPvfUw8yxuVU6 WaapocSHwryJNSCQTBOUPLIi0pBeGjgrfTQNF6aNzyTyoIHEhyh5sIs+xxM1o6zB0c/0 hahYKIInOf1QsgBPUAQ1TunaN4Y7koTHTbXsha+CbTNmPFzOU1I4QVkQUbcWYqlL5tSN iiaXGvEBSS5vyWamVLCUKqJm/+6GzjFJyVw4QK9UTEYc45pbtUXGrgK8+n39oo0h3jS0 f2MA== X-Gm-Message-State: AOAM531QfJD9hGi3mdHG6bTUn22pckGOe0QLt+Z0xofuGBf4bE00r7j8 EK+BRCrSnTWGo26VICeQRFVM4UJ/p3nGbw== X-Received: by 2002:a17:90a:e615:: with SMTP id j21mr27513347pjy.43.1619997536566; Sun, 02 May 2021 16:18:56 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.18.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:18:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 14/28] tcg: Introduce tcg_max_ctxs Date: Sun, 2 May 2021 16:18:30 -0700 Message-Id: <20210502231844.1977630-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Finish the divorce of tcg/ from hw/, and do not take the max cpu value from MachineState; just remember what we were passed in tcg_init. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/internal.h | 3 ++- tcg/region.c | 6 +++--- tcg/tcg.c | 23 ++++++++++------------- 3 files changed, 15 insertions(+), 17 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/internal.h b/tcg/internal.h index fcfeca232f..f9906523da 100644 --- a/tcg/internal.h +++ b/tcg/internal.h @@ -28,7 +28,8 @@ #define TCG_HIGHWATER 1024 extern TCGContext **tcg_ctxs; -extern unsigned int n_tcg_ctxs; +extern unsigned int tcg_cur_ctxs; +extern unsigned int tcg_max_ctxs; void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus); bool tcg_region_alloc(TCGContext *s); diff --git a/tcg/region.c b/tcg/region.c index f9e93e85b3..142b27276b 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -347,7 +347,7 @@ void tcg_region_initial_alloc(TCGContext *s) /* Call from a safe-work context */ void tcg_region_reset_all(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; qemu_mutex_lock(®ion.lock); @@ -924,7 +924,7 @@ void tcg_region_prologue_set(TCGContext *s) */ size_t tcg_code_size(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; size_t total; @@ -960,7 +960,7 @@ size_t tcg_code_capacity(void) size_t tcg_tb_phys_invalidate_count(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; size_t total = 0; diff --git a/tcg/tcg.c b/tcg/tcg.c index 5af51d41ee..0926454845 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -44,11 +44,6 @@ #include "cpu.h" #include "exec/exec-all.h" - -#if !defined(CONFIG_USER_ONLY) -#include "hw/boards.h" -#endif - #include "tcg/tcg-op.h" #if UINTPTR_MAX == UINT32_MAX @@ -158,7 +153,8 @@ static int tcg_out_ldst_finalize(TCGContext *s); #endif TCGContext **tcg_ctxs; -unsigned int n_tcg_ctxs; +unsigned int tcg_cur_ctxs; +unsigned int tcg_max_ctxs; TCGv_env cpu_env = 0; const void *tcg_code_gen_epilogue; uintptr_t tcg_splitwx_diff; @@ -478,7 +474,6 @@ void tcg_register_thread(void) #else void tcg_register_thread(void) { - MachineState *ms = MACHINE(qdev_get_machine()); TCGContext *s = g_malloc(sizeof(*s)); unsigned int i, n; @@ -494,8 +489,8 @@ void tcg_register_thread(void) } /* Claim an entry in tcg_ctxs */ - n = qatomic_fetch_inc(&n_tcg_ctxs); - g_assert(n < ms->smp.max_cpus); + n = qatomic_fetch_inc(&tcg_cur_ctxs); + g_assert(n < tcg_max_ctxs); qatomic_set(&tcg_ctxs[n], s); if (n > 0) { @@ -646,9 +641,11 @@ static void tcg_context_init(unsigned max_cpus) */ #ifdef CONFIG_USER_ONLY tcg_ctxs = &tcg_ctx; - n_tcg_ctxs = 1; + tcg_cur_ctxs = 1; + tcg_max_ctxs = 1; #else - tcg_ctxs = g_new(TCGContext *, max_cpus); + tcg_max_ctxs = max_cpus; + tcg_ctxs = g_new0(TCGContext *, max_cpus); #endif tcg_debug_assert(!tcg_regset_test_reg(s->reserved_regs, TCG_AREG0)); @@ -3940,7 +3937,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) static inline void tcg_profile_snapshot(TCGProfile *prof, bool counters, bool table) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; for (i = 0; i < n_ctxs; i++) { @@ -4003,7 +4000,7 @@ void tcg_dump_op_count(void) int64_t tcg_cpu_exec_time(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; int64_t ret = 0; From patchwork Sun May 2 23:18:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430461 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1222091ejc; Sun, 2 May 2021 16:20:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwLp8ZFjkBkUUmStG2wTdWbTayHjvgRr0Ljg/CB5rAvYMnoueLcjVUSeWsy6cSfdA7Ig0dD X-Received: by 2002:a05:6602:140c:: with SMTP id t12mr11817697iov.169.1619997636518; Sun, 02 May 2021 16:20:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997636; cv=none; d=google.com; s=arc-20160816; b=M/qUjNvM//VxN79A3ftjDiLG/8ankOZ4CLno1Yfx65i3Gm/SlrcC0P7dfmHYErU+Yf iZwDFgDyXAq5vxfKyH4izaxoZYzc3eZaW05xr9NjLO12W4OwD6US8GWePSO+0+Pg+ZE0 axzg9eaFFsuxQJ+MOtPi2z3bgXJYbBN1fstkikemvLknVbJfFahidla5v/uxrctqzJ2Y 2IyI25hf/QTMEBsgzKEoub0lNZFQKC4QQrFd8jlLpDE2oWa2LkbZWRyvXKcHQ65HaqDX /9+zSeoukC0O04ya96rldvdqhpcU/z3/cR58Ze/oOdF7attcrxM328eMtC8ViLMCBUuJ 6GHg== ARC-Message-Signature: i=1; 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Signed-off-by: Richard Henderson --- v2: Retain comment about M_C_G_B_S constraint (balaton) --- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 2 ++ tcg/mips/tcg-target.h | 6 ++++++ tcg/ppc/tcg-target.h | 2 ++ tcg/riscv/tcg-target.h | 1 + tcg/s390/tcg-target.h | 3 +++ tcg/sparc/tcg-target.h | 1 + tcg/tci/tcg-target.h | 1 + tcg/region.c | 35 +++++++++-------------------------- 10 files changed, 27 insertions(+), 26 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 5ec30dba25..ef55f7c185 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -15,6 +15,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24 +#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #undef TCG_TARGET_STACK_GROWSUP typedef enum { diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 8d1fee6327..b9a85d0f83 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -60,6 +60,7 @@ extern int arm_arch; #undef TCG_TARGET_STACK_GROWSUP #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 +#define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX typedef enum { TCG_REG_R0 = 0, diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index b693d3692d..ac10066c3e 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -31,9 +31,11 @@ #ifdef __x86_64__ # define TCG_TARGET_REG_BITS 64 # define TCG_TARGET_NB_REGS 32 +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #else # define TCG_TARGET_REG_BITS 32 # define TCG_TARGET_NB_REGS 24 +# define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX #endif typedef enum { diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index c2c32fb38f..e81e824cab 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -39,6 +39,12 @@ #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 #define TCG_TARGET_NB_REGS 32 +/* + * We have a 256MB branch region, but leave room to make sure the + * main executable is also within that region. + */ +#define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) + typedef enum { TCG_REG_ZERO = 0, TCG_REG_AT, diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index d1339afc66..c13ed5640a 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -27,8 +27,10 @@ #ifdef _ARCH_PPC64 # define TCG_TARGET_REG_BITS 64 +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #else # define TCG_TARGET_REG_BITS 32 +# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) #endif #define TCG_TARGET_NB_REGS 64 diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 727c8df418..87ea94666b 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -34,6 +34,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 20 #define TCG_TARGET_NB_REGS 32 +#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) typedef enum { TCG_REG_ZERO, diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 641464eea4..b04b72b7eb 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -28,6 +28,9 @@ #define TCG_TARGET_INSN_UNIT_SIZE 2 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19 +/* We have a +- 4GB range on the branches; leave some slop. */ +#define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) + typedef enum TCGReg { TCG_REG_R0 = 0, TCG_REG_R1, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index f66f5d07dc..86bb9a2d39 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -30,6 +30,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 #define TCG_TARGET_NB_REGS 32 +#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) typedef enum { TCG_REG_G0 = 0, diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 52af6d8bc5..d0b5f3fa64 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -43,6 +43,7 @@ #define TCG_TARGET_INTERPRETER 1 #define TCG_TARGET_INSN_UNIT_SIZE 1 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 +#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #if UINTPTR_MAX == UINT32_MAX # define TCG_TARGET_REG_BITS 32 diff --git a/tcg/region.c b/tcg/region.c index 142b27276b..9a1e039824 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -398,34 +398,17 @@ static size_t tcg_n_regions(unsigned max_cpus) #endif } -/* Minimum size of the code gen buffer. This number is randomly chosen, - but not so small that we can't have a fair number of TB's live. */ +/* + * Minimum size of the code gen buffer. This number is randomly chosen, + * but not so small that we can't have a fair number of TB's live. + * + * Maximum size, MAX_CODE_GEN_BUFFER_SIZE, is defined in tcg-target.h. + * Unless otherwise indicated, this is constrained by the range of + * direct branches on the host cpu, as used by the TCG implementation + * of goto_tb. + */ #define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB) -/* Maximum size of the code gen buffer we'd like to use. Unless otherwise - indicated, this is constrained by the range of direct branches on the - host cpu, as used by the TCG implementation of goto_tb. */ -#if defined(__x86_64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__sparc__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc__) -# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) -#elif defined(__aarch64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__s390x__) - /* We have a +- 4GB range on the branches; leave some slop. */ -# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) -#elif defined(__mips__) - /* We have a 256MB branch region, but leave room to make sure the - main executable is also within that region. */ -# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) -#else -# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) -#endif - #if TCG_TARGET_REG_BITS == 32 #define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB) #ifdef CONFIG_USER_ONLY From patchwork Sun May 2 23:18:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430483 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1230268ejc; Sun, 2 May 2021 16:36:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzWEklhQImwKvdxJs0OnKtYRExsR00wI1XWb8FBaFH0XsZ9drYN+QruVXN74xLLss4H1/5i X-Received: by 2002:a6b:7c0b:: with SMTP id m11mr12543624iok.9.1619998605197; Sun, 02 May 2021 16:36:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998605; cv=none; d=google.com; s=arc-20160816; b=DeHvN9qDoFxVM7Tcz+CMZxIa2lMqjLXcmEah7yZjoOW/L+AXGHTJc6lNE1O8+SCi7/ w08FnLn42BOwBrE5IRFhUdh3ISTKN50JadGtsVIYWkiOhyYEG468E+3juV3B0RhUbxM6 ch9CItBbqDdbvOjtwQc4fGeC4KP9aAjHkHMXi6gMjOmfBvrOPDR59NF+ObI0OP0n3uoo SOdJVEnKM2sSQUGT/rlDEpuQJffQgVeLBunPWWnsMCFg0eiWYWQU3vJHyA0Ddm1m+lpC vjx+I7uM/8Z9sdufbJyQlLhVE1UGXmwAPvAY6YVy/XYfnjWcKbrq/CRrG12a0y1pGRUF 2aEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xx8tRHMyHl5/LaDMF0obGZKdN5Jc9YJNwYigENo1M50=; b=kXKcE7mEjQpV++r/faEc1iKTFAR3ANe+3K3WtSKRnh9wFOzG+mgF05tQTTnwrOTqMO ymbfTIZ6gWdOvljwgUclwOYcvBj7Hc1K0Np/7BoQfkb+ObQx3hiKwg3rY5bSEURw8BLg q8oCywRKdpmKaz7EgWd307QEhFCV+voKVaMLPx9TVeB6iNWGbYMuvAvEg31dyqLyxikW 7rSpconWoa6AhdsTGuOsQMAudxk62nmpsM+7Vflb7710s0STZfvi0VDrYxnbS9tQTGvI cVZmotMtelQ+nwuGd93u8vTrxeNDaZkPda5eZXaPBp+Mn2hTT4ah85wob+dZ7AIaF9zf WVOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f9q+M7uK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- tcg/region.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index 9a1e039824..a17f342f38 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -48,7 +48,7 @@ struct tcg_region_state { /* fields set at init time */ void *start; void *start_aligned; - void *end; + size_t total_size; /* size of entire buffer */ size_t n; size_t size; /* size of one region */ size_t stride; /* .size + guard size */ @@ -279,7 +279,7 @@ static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) start = region.start; } if (curr_region == region.n - 1) { - end = region.end; + end = region.start_aligned + region.total_size; } *pstart = start; @@ -813,8 +813,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - void *buf, *aligned; - size_t size; + void *buf, *aligned, *end; + size_t total_size; size_t page_size; size_t region_size; size_t n_regions; @@ -826,19 +826,20 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) assert(ok); buf = tcg_init_ctx.code_gen_buffer; - size = tcg_init_ctx.code_gen_buffer_size; + total_size = tcg_init_ctx.code_gen_buffer_size; page_size = qemu_real_host_page_size; n_regions = tcg_n_regions(max_cpus); /* The first region will be 'aligned - buf' bytes larger than the others */ aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + size); + g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size); + /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region_size = (size - (aligned - buf)) / n_regions; + region_size = (total_size - (aligned - buf)) / n_regions; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ @@ -852,9 +853,11 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) region.start = buf; region.start_aligned = aligned; /* page-align the end, since its last page will be a guard page */ - region.end = QEMU_ALIGN_PTR_DOWN(buf + size, page_size); + end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); /* account for that last guard page */ - region.end -= page_size; + end -= page_size; + total_size = end - aligned; + region.total_size = total_size; /* * Set guard pages in the rw buffer, as that's the one into which @@ -895,7 +898,7 @@ void tcg_region_prologue_set(TCGContext *s) /* Register the balance of the buffer with gdb. */ tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.end - region.start); + region.start_aligned + region.total_size - region.start); } /* @@ -936,8 +939,10 @@ size_t tcg_code_capacity(void) /* no need for synchronization; these variables are set at init time */ guard_size = region.stride - region.size; - capacity = region.end + guard_size - region.start; - capacity -= region.n * (guard_size + TCG_HIGHWATER); + capacity = region.total_size; + capacity -= (region.n - 1) * guard_size; + capacity -= region.n * TCG_HIGHWATER; + return capacity; } From patchwork Sun May 2 23:18:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430467 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1224213ejc; Sun, 2 May 2021 16:24:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwnIg2aGm4yPOaxWZQzh5ikj+V2DjyDagQOACkRMQ2ys9nUdfl9CgNmhUCr99Ocj8/lc3V0 X-Received: by 2002:a02:660e:: with SMTP id k14mr15624032jac.9.1619997898140; Sun, 02 May 2021 16:24:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619997898; cv=none; d=google.com; s=arc-20160816; b=Saq6lzje8w1n8XAKmvMlbH+/OgNWdW9+GRpXFTecqh3oEf+73yEuaBRtdY7wU5LFqc Oueg7vNrJhsxNfYCdta9LMexGALzs23mMfMnfz/jTpswjUyrGRPBw2ky6QwhEjcXhlqm l4+irQT7Q31Z7AV/fbWjNiyJxwd+kYxsKn1+PqwnR/BJANxEQhR3DMRJDWwNRtDNPqhK sYZtbDMBHZDISTnuQ+2Cep6k+tThe2FLoYTp4FgccONbay0xboqMx9BMBx7Dn948yAN1 A+27ByCQ75jdNT9L+1tncshzAzH0kLDfrj3qDWVCVJHKcTIsTH4gHWxYI3SwF0xJ9MO4 kdBw== ARC-Message-Signature: i=1; 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Signed-off-by: Richard Henderson --- tcg/region.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index a17f342f38..bd81b35359 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -46,8 +46,8 @@ struct tcg_region_state { QemuMutex lock; /* fields set at init time */ - void *start; void *start_aligned; + void *after_prologue; size_t total_size; /* size of entire buffer */ size_t n; size_t size; /* size of one region */ @@ -276,7 +276,7 @@ static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) end = start + region.size; if (curr_region == 0) { - start = region.start; + start = region.after_prologue; } if (curr_region == region.n - 1) { end = region.start_aligned + region.total_size; @@ -850,7 +850,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) region.n = n_regions; region.size = region_size - page_size; region.stride = region_size; - region.start = buf; + region.after_prologue = buf; region.start_aligned = aligned; /* page-align the end, since its last page will be a guard page */ end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); @@ -890,15 +890,16 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) void tcg_region_prologue_set(TCGContext *s) { /* Deduct the prologue from the first region. */ - g_assert(region.start == s->code_gen_buffer); - region.start = s->code_ptr; + g_assert(region.start_aligned == s->code_gen_buffer); + region.after_prologue = s->code_ptr; /* Recompute boundaries of the first region. */ tcg_region_assign(s, 0); /* Register the balance of the buffer with gdb. */ - tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.start_aligned + region.total_size - region.start); + tcg_register_jit(tcg_splitwx_to_rx(region.after_prologue), + region.start_aligned + region.total_size - + region.after_prologue); } /* From patchwork Sun May 2 23:18:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430486 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2382044jao; Sun, 2 May 2021 16:41:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9QvqyD/sEa9+SFvnuIcmNu3lXRKnmXO6uxOo5XnuHF3UVttksyJAGTRgp2jTcwqXacB64 X-Received: by 2002:a92:d3c1:: with SMTP id c1mr13691482ilh.21.1619998912761; Sun, 02 May 2021 16:41:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998912; cv=none; d=google.com; s=arc-20160816; b=z0yNloTW0FllOcPuNoRhrjoqmLEQ9rxreO+YAg4qdTKDWghpfGhslqdpcC2VwbTlMK kF3bNTy4LIIWc7a+SKimJf/M9VcttfNbd8B4XCnVQa3X13gQLYln17vJHxYOyZ/s4/Ma LSzcEXkKQLzWPHF8b/SXF/UFEOE0Y+aP0vogV+31SPmiASu/nxh/XJnXyRMuvqldTY9n VfQF2BaMV01FGR92HBtTEu6meNWDewpbDwae/L5QC6T7N15G8aZFzybKDDLG8IWM4EvD FF2TzqD6KLHwnz94l4qV9nBTrZrEGK5mDZiMcLePgWEl+7SN4ZDpy0haqqct1eoJYC/D wvng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=idNS6LRLDr7PE0vfbI3FZv/MhqMVmpiiFES5YjT5ohE=; b=V6FjHa/acqaew80LuJ0TuFcmxA6wsH4zqzf8VZYnczkbAtHDqDY/++zWbr1qZWpDK3 mnb8dLebjCOAaSXx4kur/+Xynzwkx/NaxTwWBoyHL7AlPedlDL0yW9ddumIdiuO3KuVi 5nQyhoN0A7kqdTQ8PHsbiaiaNmdGAVmAHowdLfbPvQEKRFTmYwEzj3kjPh3qYgmQVJF+ YY2H04adtPL2TIhM9GGKktRNgqWFr2Fuk78rFi06cojzyNij9XnrKQR4ZN6thTZkDs0n ko7SU+0BwagSKwYgLLqikIim8q92XMN0PWpBoASa4GGm+28K/Y++HOnyvD7RWi6yYRiE eOww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tNxOHt39; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Pass in tb_size rather than reading from tcg_init_ctx.code_gen_buffer_size, Signed-off-by: Richard Henderson --- tcg/region.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index bd81b35359..b44246e1aa 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -363,38 +363,33 @@ void tcg_region_reset_all(void) tcg_region_tree_reset_all(); } -static size_t tcg_n_regions(unsigned max_cpus) +static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus) { #ifdef CONFIG_USER_ONLY return 1; #else + size_t n_regions; + /* * It is likely that some vCPUs will translate more code than others, * so we first try to set more regions than max_cpus, with those regions * being of reasonable size. If that's not possible we make do by evenly * dividing the code_gen_buffer among the vCPUs. */ - size_t i; - /* Use a single region if all we have is one vCPU thread */ if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { return 1; } - /* Try to have more regions than max_cpus, with each region being >= 2 MB */ - for (i = 8; i > 0; i--) { - size_t regions_per_thread = i; - size_t region_size; - - region_size = tcg_init_ctx.code_gen_buffer_size; - region_size /= max_cpus * regions_per_thread; - - if (region_size >= 2 * 1024u * 1024) { - return max_cpus * regions_per_thread; - } + /* + * Try to have more regions than max_cpus, with each region being >= 2 MB. + * If we can't, then just allocate one region per vCPU thread. + */ + n_regions = tb_size / (2 * MiB); + if (n_regions <= max_cpus) { + return max_cpus; } - /* If we can't, then just allocate one region per vCPU thread */ - return max_cpus; + return MIN(n_regions, max_cpus * 8); #endif } @@ -828,7 +823,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) buf = tcg_init_ctx.code_gen_buffer; total_size = tcg_init_ctx.code_gen_buffer_size; page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(max_cpus); + n_regions = tcg_n_regions(total_size, max_cpus); /* The first region will be 'aligned - buf' bytes larger than the others */ aligned = QEMU_ALIGN_PTR_UP(buf, page_size); From patchwork Sun May 2 23:18:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430481 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1229781ejc; Sun, 2 May 2021 16:35:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxOxP0DLu8K2ldZrdQpc7oByqiZ5PVUn7xzm+BnFo8bcD0BHEyjhucHjdbDy/LFzI20ErY2 X-Received: by 2002:a02:9505:: with SMTP id y5mr15772951jah.27.1619998551133; Sun, 02 May 2021 16:35:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998551; cv=none; d=google.com; s=arc-20160816; b=L4sVLs9PeUi4dGTUPnAlzBadnwF6OWkfzFtMNkVMNSKWskJiyeAR9SAly8Fm1MVUg2 CHKQiWhop+64jyPf01TGZSkrEtk/fUg3gYRbMs2rq370J9i0Tjhs9/RTEaEBpr06OeaA QccnIteOskDF6MCjrSdXG/LBCS0jtHBNd5g+9zhVMBELqTr8t5nEjorWzfPEdQqvvju1 /nwUzd9YRS6w0Iq8jA/Jt2usYEKUOI8sXAorC5U1N0Kzrc0SsId0yikXVY0QTOiVuOPs KjjXiGlfZh7QydK1e9QhHtGiAOpHq/XdH0bgKESzFBq4KYx8FCZBNa+aZAPev9bNOl05 urZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=+T1+Qy3MoywAjez6Ef0bmMy71JTW9fUaEucN6MXf9Xc=; b=SNw69mPBHaX7i82tUytEMZTjI6Yix1UskNiApc6IItzYQ16PHVIK+Hyx1/jzK98q0Y TJsQO/PL5MP+/7h3doBRlWy8v12dvr5zafKQq4BAuARKCfc2wzv6iNIevhjPC3+mdY39 o5G8VslLHOpMGVyFawYVmsExJAv0o3yablHn17GjbXx9BUtxwPvmqvmzWejkLDhAk0tU ihl+f7IVQnDuf1v/TFWJFxffFeU/41DsRgnlFBTVlT6cMHzFuG/yCyvd1FfwxyNQHK4f sYW104T93ZYit4skkEZfG8a5AQUOm5++iXwKB5PwvByyNdFLsNsjrFgf4gRSeWm6i4Se ZsIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tWBNMCTH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- tcg/region.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index b44246e1aa..652f328d2c 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -467,7 +467,8 @@ static inline bool cross_256mb(void *addr, size_t size) /* We weren't able to allocate a buffer without crossing that boundary, so make do with the larger portion of the buffer that doesn't cross. Returns the new base of the buffer, and adjusts code_gen_buffer_size. */ -static inline void *split_cross_256mb(void *buf1, size_t size1) +static inline void split_cross_256mb(void **obuf, size_t *osize, + void *buf1, size_t size1) { void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful); size_t size2 = buf1 + size1 - buf2; @@ -478,8 +479,8 @@ static inline void *split_cross_256mb(void *buf1, size_t size1) buf1 = buf2; } - tcg_ctx->code_gen_buffer_size = size1; - return buf1; + *obuf = buf1; + *osize = size1; } #endif @@ -509,12 +510,10 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) if (size > tb_size) { size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size); } - tcg_ctx->code_gen_buffer_size = size; #ifdef __mips__ if (cross_256mb(buf, size)) { - buf = split_cross_256mb(buf, size); - size = tcg_ctx->code_gen_buffer_size; + split_cross_256mb(&buf, &size, buf, size); } #endif @@ -525,6 +524,7 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); tcg_ctx->code_gen_buffer = buf; + tcg_ctx->code_gen_buffer_size = size; return true; } #elif defined(_WIN32) @@ -583,8 +583,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, /* fallthru */ default: /* Split the original buffer. Free the smaller half. */ - buf2 = split_cross_256mb(buf, size); - size2 = tcg_ctx->code_gen_buffer_size; + split_cross_256mb(&buf2, &size2, buf, size); if (buf == buf2) { munmap(buf + size2, size - size2); } else { From patchwork Sun May 2 23:18:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430485 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1231057ejc; Sun, 2 May 2021 16:38:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmBJDJqjqZUHi/aSmCspkUATAu4ymNMHjm6pa0Ni9R0X+LAmvVcP4N8JC+CQLgNnQj3xxO X-Received: by 2002:a05:6602:1641:: with SMTP id y1mr12480900iow.54.1619998698885; Sun, 02 May 2021 16:38:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998698; cv=none; d=google.com; s=arc-20160816; b=GgfdD9gaoChtwqUqknh4R5PR5alT/q9VaoEZxXojKe14Wv0lq/Xy76gt+Ya4uV28gc Ible31DCX/jChFgLRqUCI43cGV3aLiU36EbnxL9xJKpFB0K7bGUsJj20/FlWgu/6HFv+ PJqrbvkTzmUIVnBzpMo4D4AZWzKPdl1Sob8M1UmD1R8d4rg8r9XlQLy1Lz6A0j8389vo onhwTVLAdw9Mls3aDHZB1LeI4JXmC8y2QGiT+dmtnPqZtY9o0gCTp/rmpqBSDnCnhTP9 hjV1nFFyK1bXvqgK7BzFTcA18t/qYUp3YZLQBqOxW9hOx0cCCRobbxtqSXsuvwOPGksy 25Ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3+qvAys+bC4iB3oxnM72GbfzF+QWmjj72t2D1jOredk=; b=L+eW8xmBjkI4hhcdr6OgeebN3XOgxblc2lEbPqDC7wKQaM/eXpHjX2LCma2dNQ06eE RMydwJ1PnIzoZFu7kQMzucRPI6Lh486YTNzFyrwA4/BNo05o85x3lvt4/Ipbwxavt+ya tDUroiyzw4bjHKnrUURr6BSYjhhAo70t7zLwuSHp8M6BIvTDRdB2Ah6B/2xfPjgQW22M 98Jfaf373vrDezUDajAtS695G6qAywzTX8ievDG5DSEgnxmD0ujLL68d4kxy0UlAqEm8 HMlZ5lkIdGB3w4NBRvOzSuIoTaV4pjNtD6/0tJlvKrefYW4GC6nGPihyc1a1vaPvb2ts /MgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CY2E5kuv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c188si5819466iof.9.2021.05.02.16.38.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:38:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CY2E5kuv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLfG-0007ye-7u for patch@linaro.org; Sun, 02 May 2021 19:38:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37084) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMg-0008ME-FU for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:06 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]:37501) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMc-0002xR-3m for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:03 -0400 Received: by mail-pj1-x102d.google.com with SMTP id k3-20020a17090ad083b0290155b934a295so4722326pju.2 for ; Sun, 02 May 2021 16:19:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=3+qvAys+bC4iB3oxnM72GbfzF+QWmjj72t2D1jOredk=; b=CY2E5kuv59LbsNiJJrF75ZkCRfFbMPUDod9g3cXTvJRKW/9vNLZLmhinuWeHrjW96q IGSCRlDP12yxLu5VDpJoVTVCSbemuLPxSqHNRx7wUo3SueOToOVFw6oX6T1bIwqky85e oKz+BXHJ7qX4IWkC0C3kI6RAfY0hsa405JvzCLT98O0nGni8ePrwdSp+bYjFKUNEZC0K GRfl6bWhDpaMDAzy8ZjJC6pmsiwlESRQ/EAQfRAB6M86fZfCGcRyr0oMCH5W4qe7hWbx t/M2enqCnaCpo92lpyA+2R+/ohepN1s4Aq/8MHsdFRZNGlZ86SHDxMBo8yvKQs/cnZpT F8yQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3+qvAys+bC4iB3oxnM72GbfzF+QWmjj72t2D1jOredk=; b=kf1iJzH7gWbpIYeXzeesswbiA6Gxac/diAATDdSspFE0ndBxL4TYDogGc95TFLx/Gs 7ZUNVNAq3iDpb4dYcPv4NrGDcwZs8ymMNyshHxcs50nld7NSXhGRPC7zEL8wNVhAWrRM 3xsK1ZS/tDgV4kKWVRaGw9dOnUVuqCMO/Vu146kCOQ7E/t1xw1wKI5fNhrmUWbtQTN2a d7jmvC/GgKMF7VLdcqWLcRt0B7o+b2WrN2rvcCCsnxFiuFZVv0A1AMInWtPOhfWEYOzU TDpAE53URbiyVr9k/6s7+QSoJ59zBcfkcNOtfNge3dvPge6dNz4/cAbA3cf7Wk6c8t1X 051w== X-Gm-Message-State: AOAM533DmMzJyDnQP4b7M90/tIhtYSGfIFNgPQ7gMLEIuR1Aw2BJaR5z wAhmRsIEtbSCeCnAEacLvxkFd6ASk+jgOA== X-Received: by 2002:a17:90a:7063:: with SMTP id f90mr18815835pjk.95.1619997540677; Sun, 02 May 2021 16:19:00 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.19.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:19:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 20/28] tcg: Move in_code_gen_buffer and tests to region.c Date: Sun, 2 May 2021 16:18:36 -0700 Message-Id: <20210502231844.1977630-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Shortly, the full code_gen_buffer will only be visible to region.c, so move in_code_gen_buffer out-of-line. Move the debugging versions of tcg_splitwx_to_{rx,rw} to region.c as well, so that the compiler gets to see the implementation of in_code_gen_buffer. This leaves exactly one use of in_code_gen_buffer outside of region.c, in cpu_restore_state. Which, being on the exception path, is not performance critical. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 11 +---------- tcg/region.c | 34 ++++++++++++++++++++++++++++++++++ tcg/tcg.c | 23 ----------------------- 3 files changed, 35 insertions(+), 33 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index a0122c0dd3..a19deb529f 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -696,16 +696,7 @@ extern const void *tcg_code_gen_epilogue; extern uintptr_t tcg_splitwx_diff; extern TCGv_env cpu_env; -static inline bool in_code_gen_buffer(const void *p) -{ - const TCGContext *s = &tcg_init_ctx; - /* - * Much like it is valid to have a pointer to the byte past the - * end of an array (so long as you don't dereference it), allow - * a pointer to the byte past the end of the code gen buffer. - */ - return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size; -} +bool in_code_gen_buffer(const void *p); #ifdef CONFIG_DEBUG_TCG const void *tcg_splitwx_to_rx(void *rw); diff --git a/tcg/region.c b/tcg/region.c index 652f328d2c..893256f9f4 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -68,6 +68,40 @@ static struct tcg_region_state region; static void *region_trees; static size_t tree_size; +bool in_code_gen_buffer(const void *p) +{ + const TCGContext *s = &tcg_init_ctx; + /* + * Much like it is valid to have a pointer to the byte past the + * end of an array (so long as you don't dereference it), allow + * a pointer to the byte past the end of the code gen buffer. + */ + return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size; +} + +#ifdef CONFIG_DEBUG_TCG +const void *tcg_splitwx_to_rx(void *rw) +{ + /* Pass NULL pointers unchanged. */ + if (rw) { + g_assert(in_code_gen_buffer(rw)); + rw += tcg_splitwx_diff; + } + return rw; +} + +void *tcg_splitwx_to_rw(const void *rx) +{ + /* Pass NULL pointers unchanged. */ + if (rx) { + rx -= tcg_splitwx_diff; + /* Assert that we end with a pointer in the rw region. */ + g_assert(in_code_gen_buffer(rx)); + } + return (void *)rx; +} +#endif /* CONFIG_DEBUG_TCG */ + /* compare a pointer @ptr and a tb_tc @s */ static int ptr_cmp_tb_tc(const void *ptr, const struct tb_tc *s) { diff --git a/tcg/tcg.c b/tcg/tcg.c index 0926454845..212df31622 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -419,29 +419,6 @@ static const TCGTargetOpDef constraint_sets[] = { #include "tcg-target.c.inc" -#ifdef CONFIG_DEBUG_TCG -const void *tcg_splitwx_to_rx(void *rw) -{ - /* Pass NULL pointers unchanged. */ - if (rw) { - g_assert(in_code_gen_buffer(rw)); - rw += tcg_splitwx_diff; - } - return rw; -} - -void *tcg_splitwx_to_rw(const void *rx) -{ - /* Pass NULL pointers unchanged. */ - if (rx) { - rx -= tcg_splitwx_diff; - /* Assert that we end with a pointer in the rw region. */ - g_assert(in_code_gen_buffer(rx)); - } - return (void *)rx; -} -#endif /* CONFIG_DEBUG_TCG */ - static void alloc_tcg_plugin_context(TCGContext *s) { #ifdef CONFIG_PLUGIN From patchwork Sun May 2 23:18:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430470 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1225203ejc; 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[209.51.188.17]) by mx.google.com with ESMTPS id s4si13204170jat.26.2021.05.02.16.26.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:26:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QDwT5swG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:55938 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLUB-0001oc-44 for patch@linaro.org; Sun, 02 May 2021 19:26:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37176) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMm-0008Nf-L0 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:12 -0400 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]:39627) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMd-0002y7-5K for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:12 -0400 Received: by mail-pj1-x102b.google.com with SMTP id z6-20020a17090a1706b0290155e8a752d8so4707105pjd.4 for ; Sun, 02 May 2021 16:19:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=jSOp/9wJhN3jCWwzFvXkuBaSFQqc7XH9WxgSTuRkYOk=; b=QDwT5swGmrYYswcDVsi1NhRzKUSK1KnqwkLVKKPYx3EZTJY8MX7lBKELYMRc9prfCk gIl5Kg79nZ1sFtD2y92nWzIWVXVrLY9yUIKsQvAa1c9sfu8qbDez6sVVYcsDbZvaun6f wPxZQtMRcQBjY2tRzKwCZWUm1IMM5i9cyqsRXb2HTobDEoANBVibs5n9w1MkIfdzF758 bSm+vuSCD1nSpQEIIVW73nX8uWN+pAuqadSFFp9L8vr+wJuLdl3zqxJqEYuFr51Q1vQ5 L98A8AzEzVyU8kd9m8GOojl+pO99W8CnSy5vzQJrpnFycgQ630MpgiLr/gJ9OsjsxH0g GaKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jSOp/9wJhN3jCWwzFvXkuBaSFQqc7XH9WxgSTuRkYOk=; b=oc3/EKpoBMHSSgpyNaRNd4ZOWcaJSz/RcQg7/Q6q7QOdgtRg5xKjLZD3IVBD1LmE+P 16qbaXMnoe2VqPdES58ERrmhuvycWlS5VphIuTiSC3pUSGGwvxgBqO6IP3h6KFMqEiFV Ck/Ygt7nYdY1HqHWFDDN/kYE1mhwCrgw443gmPEzTGWYoOTX55Xxu+3p9bCV1RhPQ8se vtl9AQVZFzeanq6T1ZS0IeT6Nbe7y5noPcf0XnHJAjA+tm2Oonrbg70Rv8kVQZ2gJpMb OVFfavO+Mmkj7K4x+UsbHLvm2E55EJibLrXu0ynPInkXXinn2bdytiFxgF60CrmjWkYY jKew== X-Gm-Message-State: AOAM533+oYV/ACjiwBGiS7kDXAerslsczL61leVk14pOsKruxxi/EgMD WkQSmcDHm63u0Q7xTo0UF5gsiVdTYyXQTA== X-Received: by 2002:a17:90a:d24a:: with SMTP id o10mr27263235pjw.138.1619997541727; Sun, 02 May 2021 16:19:01 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.19.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:19:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 21/28] tcg: Allocate code_gen_buffer into struct tcg_region_state Date: Sun, 2 May 2021 16:18:37 -0700 Message-Id: <20210502231844.1977630-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not mess around with setting values within tcg_init_ctx. Put the values into 'region' directly, which is where they will live for the lifetime of the program. Signed-off-by: Richard Henderson --- tcg/region.c | 64 ++++++++++++++++++++++------------------------------ 1 file changed, 27 insertions(+), 37 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index 893256f9f4..d6499f7d98 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -70,13 +70,12 @@ static size_t tree_size; bool in_code_gen_buffer(const void *p) { - const TCGContext *s = &tcg_init_ctx; /* * Much like it is valid to have a pointer to the byte past the * end of an array (so long as you don't dereference it), allow * a pointer to the byte past the end of the code gen buffer. */ - return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size; + return (size_t)(p - region.start_aligned) <= region.total_size; } #ifdef CONFIG_DEBUG_TCG @@ -557,8 +556,8 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) } qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } #elif defined(_WIN32) @@ -579,8 +578,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) return false; } - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } #else @@ -595,7 +594,6 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, "allocate %zu bytes for jit buffer", size); return false; } - tcg_ctx->code_gen_buffer_size = size; #ifdef __mips__ if (cross_256mb(buf, size)) { @@ -633,7 +631,8 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, /* Request large pages for the buffer. */ qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - tcg_ctx->code_gen_buffer = buf; + region.start_aligned = buf; + region.total_size = size; return true; } @@ -654,8 +653,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) return false; } /* The size of the mapping may have been adjusted. */ - size = tcg_ctx->code_gen_buffer_size; - buf_rx = tcg_ctx->code_gen_buffer; + buf_rx = region.start_aligned; + size = region.total_size; #endif buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); @@ -677,8 +676,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) #endif close(fd); - tcg_ctx->code_gen_buffer = buf_rw; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf_rw; + region.total_size = size; tcg_splitwx_diff = buf_rx - buf_rw; /* Request large pages for the buffer and the splitwx. */ @@ -729,7 +728,7 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) return false; } - buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; + buf_rw = region.start_aligned; buf_rx = 0; ret = mach_vm_remap(mach_task_self(), &buf_rx, @@ -841,11 +840,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - void *buf, *aligned, *end; - size_t total_size; size_t page_size; size_t region_size; - size_t n_regions; size_t i; bool ok; @@ -853,39 +849,33 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) splitwx, &error_fatal); assert(ok); - buf = tcg_init_ctx.code_gen_buffer; - total_size = tcg_init_ctx.code_gen_buffer_size; - page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(total_size, max_cpus); - - /* The first region will be 'aligned - buf' bytes larger than the others */ - aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size); - /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region_size = (total_size - (aligned - buf)) / n_regions; + region.n = tcg_n_regions(region.total_size, max_cpus); + page_size = qemu_real_host_page_size; + region_size = region.total_size / region.n; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ g_assert(region_size >= 2 * page_size); + region.stride = region_size; + + /* Reserve space for guard pages. */ + region.size = region_size - page_size; + region.total_size -= page_size; + + /* + * The first region will be smaller than the others, via the prologue, + * which has yet to be allocated. For now, the first region begins at + * the page boundary. + */ + region.after_prologue = region.start_aligned; /* init the region struct */ qemu_mutex_init(®ion.lock); - region.n = n_regions; - region.size = region_size - page_size; - region.stride = region_size; - region.after_prologue = buf; - region.start_aligned = aligned; - /* page-align the end, since its last page will be a guard page */ - end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); - /* account for that last guard page */ - end -= page_size; - total_size = end - aligned; - region.total_size = total_size; /* * Set guard pages in the rw buffer, as that's the one into which From patchwork Sun May 2 23:18:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430476 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1226735ejc; Sun, 2 May 2021 16:30:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwT8PbLHMUaoxXcHyG3FIdVFwl5wAzbJnHeKk9EWC1WlbUUYozdX1J5X6WiHWc+X7bwoVil X-Received: by 2002:a92:dcc8:: with SMTP id b8mr13405541ilr.286.1619998207584; Sun, 02 May 2021 16:30:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998207; cv=none; d=google.com; s=arc-20160816; b=RcedLUyamsdJIoaGwjyg4t9x/ymbQ06xxjsfek+7oFvajjEA1tvJG1eAd3ZoMQ08nH rpRrCdAo/NY4x2QmUmgOE+sumykA6zcQkhO8a8mtVDdUAdCn0YTscXLqzzJ6z1CCG4Cd Fo580EAptnlPWScSeU6hfNq9aX6tRonl2EPKK+vcBAk3FzKijM1a+qwaarkAcdoDm+ov liBTbVS4u4C0qtqYrQny/JMTHp3RXlN3Qnf9vuTyB1uaMbmdLUqfywi05cWsffgYEeN3 dbNVU2L1YzWGQ0hSGPZIYsOKEqRbxYex1QWD6uMytMLl/XCK2nSo9rMZlbcQpLbgxwcD qlaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=rkNhDFMpzVMqKVs5NC0YHsxzFdT5b1jVWnnYqeqC2n0=; b=bW85mqQ4dbYpaG4EdkLq0oujBE9DxnXKnSfOBs73Ijvmrk1yZr4OHmsQvipD4sF/cH H435clGWdkZ4K4E8wAllc+KLB3hdTcQD7keS20V1QiVE7yDTWE0/oen+usVgy1Z4rdpt oW5JKO39lW3bg+APhWYiD9XRP/2S6ufUq/t0XH1gNFc7aFaA6B375dIXE+n+KVFsdFMN h0IbpoNZIJI9rv21xHSeE6TgUzXMhQsyIu2Qqc/vpP0O4jgyVLibiuvLzGV0Eb2eawGc 5vO7fgwXy0uxY8TspeyP8SZRJihOezLjqiZj6b3SUlQnooRBkArGz0ucM00d7y9Nlm4P hLJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B4CvX3zN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 7si10399796ilz.34.2021.05.02.16.30.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:30:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B4CvX3zN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:37216 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLXK-0005gA-Qs for patch@linaro.org; Sun, 02 May 2021 19:30:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37130) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMi-0008Mu-J7 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:10 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]:54860) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMe-0002yN-LZ for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:08 -0400 Received: by mail-pj1-x1036.google.com with SMTP id g24so1267078pji.4 for ; Sun, 02 May 2021 16:19:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=rkNhDFMpzVMqKVs5NC0YHsxzFdT5b1jVWnnYqeqC2n0=; b=B4CvX3zNFbMW2uvHf3jmOJ7/6REpFl1rwAx9MrwKWrqCImJQIcntcqPZIA6cILLDNh 5644J/TKEFYkR3Pqo+NwQgM+dIrvw0y96BHGsZwk+OSqLfQySqm857gvPbUtNSjfEi0q p2GnWsBfkuvZgIv2Az6Wv4OXczmMuptOP6byoabLnTwH8dOj829gBE9hqswou9YuTkTc Tw8ZVIsDaMTtXHHoOnO/B94p+09Vkls7JoNRF7KMYRB+1PbuYrpBtWJka+BQYLnI+nOC /uhTno5+HKieWiHmocaIxwNLl7MYTKvETk5lEP/UMcqcImYbV6aLelk1oyc9WxIjyLlz 33uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rkNhDFMpzVMqKVs5NC0YHsxzFdT5b1jVWnnYqeqC2n0=; b=FD3z3zHo4PeDk5cAxFusUKVQH3uY6CFOWOEYXIyVeugrXUeckH9I+Bf4dvILZO1URq JbRWsACTIXoO7+IO0ijuaY21MI2+fg4tOXYvTcGUDN4j7mKVnhY/hIe9JtdhTL5yMfp2 uxDRMnEAjkmtCv1vwgILrLVbVXrEF0anivXZVtwff2dQnLYDw7sIebindSfuIvoCoL+O 4aupnkpBVri8mOJkAgM/wM/OIEWHLR1qq8FJfn2LKFyVfMWBbLws84uGuCwFnjknYcuX 27VrO6cAC1rSqSGskExK5dvnK8V7dob81PhOOh07jOZMmwgVBMwHYADzXeYIqNQdCwjw AzWA== X-Gm-Message-State: AOAM530oVrS7cHU2xlhWTLwGwB7mxcAaHXTpviXU0XxZXkTRROspLKOz WARUYb9BKOEgleLMNXOqiRogD231kZq29g== X-Received: by 2002:a17:90b:e95:: with SMTP id fv21mr17884837pjb.107.1619997542545; Sun, 02 May 2021 16:19:02 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.19.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:19:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 22/28] tcg: Return the map protection from alloc_code_gen_buffer Date: Sun, 2 May 2021 16:18:38 -0700 Message-Id: <20210502231844.1977630-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Change the interface from a boolean error indication to a negative error vs a non-negative protection. For the moment this is only interface change, not making use of the new data. Signed-off-by: Richard Henderson --- tcg/region.c | 63 +++++++++++++++++++++++++++------------------------- 1 file changed, 33 insertions(+), 30 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index d6499f7d98..23fe113750 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -521,14 +521,14 @@ static inline void split_cross_256mb(void **obuf, size_t *osize, static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE] __attribute__((aligned(CODE_GEN_ALIGN))); -static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) +static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) { void *buf, *end; size_t size; if (splitwx > 0) { error_setg(errp, "jit split-wx not supported"); - return false; + return -1; } /* page-align the beginning and end of the buffer */ @@ -558,16 +558,17 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) region.start_aligned = buf; region.total_size = size; - return true; + + return PROT_READ | PROT_WRITE; } #elif defined(_WIN32) -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) { void *buf; if (splitwx > 0) { error_setg(errp, "jit split-wx not supported"); - return false; + return -1; } buf = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, @@ -580,11 +581,12 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) region.start_aligned = buf; region.total_size = size; - return true; + + return PAGE_READ | PAGE_WRITE | PAGE_EXEC; } #else -static bool alloc_code_gen_buffer_anon(size_t size, int prot, - int flags, Error **errp) +static int alloc_code_gen_buffer_anon(size_t size, int prot, + int flags, Error **errp) { void *buf; @@ -592,7 +594,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, if (buf == MAP_FAILED) { error_setg_errno(errp, errno, "allocate %zu bytes for jit buffer", size); - return false; + return -1; } #ifdef __mips__ @@ -633,7 +635,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, region.start_aligned = buf; region.total_size = size; - return true; + return prot; } #ifndef CONFIG_TCG_INTERPRETER @@ -647,9 +649,9 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) #ifdef __mips__ /* Find space for the RX mapping, vs the 256MiB regions. */ - if (!alloc_code_gen_buffer_anon(size, PROT_NONE, - MAP_PRIVATE | MAP_ANONYMOUS | - MAP_NORESERVE, errp)) { + if (alloc_code_gen_buffer_anon(size, PROT_NONE, + MAP_PRIVATE | MAP_ANONYMOUS | + MAP_NORESERVE, errp) < 0) { return false; } /* The size of the mapping may have been adjusted. */ @@ -683,7 +685,7 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) /* Request large pages for the buffer and the splitwx. */ qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); - return true; + return PROT_READ | PROT_WRITE; fail_rx: error_setg_errno(errp, errno, "failed to map shared memory for execute"); @@ -697,7 +699,7 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) if (fd >= 0) { close(fd); } - return false; + return -1; } #endif /* CONFIG_POSIX */ @@ -716,7 +718,7 @@ extern kern_return_t mach_vm_remap(vm_map_t target_task, vm_prot_t *max_protection, vm_inherit_t inheritance); -static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) +static int alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) { kern_return_t ret; mach_vm_address_t buf_rw, buf_rx; @@ -725,7 +727,7 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) /* Map the read-write portion via normal anon memory. */ if (!alloc_code_gen_buffer_anon(size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, errp)) { - return false; + return -1; } buf_rw = region.start_aligned; @@ -745,23 +747,23 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) /* TODO: Convert "ret" to a human readable error message. */ error_setg(errp, "vm_remap for jit splitwx failed"); munmap((void *)buf_rw, size); - return false; + return -1; } if (mprotect((void *)buf_rx, size, PROT_READ | PROT_EXEC) != 0) { error_setg_errno(errp, errno, "mprotect for jit splitwx"); munmap((void *)buf_rx, size); munmap((void *)buf_rw, size); - return false; + return -1; } tcg_splitwx_diff = buf_rx - buf_rw; - return true; + return PROT_READ | PROT_WRITE; } #endif /* CONFIG_DARWIN */ #endif /* CONFIG_TCG_INTERPRETER */ -static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) +static int alloc_code_gen_buffer_splitwx(size_t size, Error **errp) { #ifndef CONFIG_TCG_INTERPRETER # ifdef CONFIG_DARWIN @@ -772,24 +774,25 @@ static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) # endif #endif error_setg(errp, "jit split-wx not supported"); - return false; + return -1; } -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) { ERRP_GUARD(); int prot, flags; if (splitwx) { - if (alloc_code_gen_buffer_splitwx(size, errp)) { - return true; + prot = alloc_code_gen_buffer_splitwx(size, errp); + if (prot >= 0) { + return prot; } /* * If splitwx force-on (1), fail; * if splitwx default-on (-1), fall through to splitwx off. */ if (splitwx > 0) { - return false; + return -1; } error_free_or_abort(errp); } @@ -843,11 +846,11 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) size_t page_size; size_t region_size; size_t i; - bool ok; + int have_prot; - ok = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), - splitwx, &error_fatal); - assert(ok); + have_prot = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), + splitwx, &error_fatal); + assert(have_prot >= 0); /* * Make region_size a multiple of page_size, using aligned as the start. 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[209.51.188.17]) by mx.google.com with ESMTPS id y9si11894870iot.80.2021.05.02.16.31.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:31:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cnsPRLgY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:43702 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLYW-0008O2-2n for patch@linaro.org; Sun, 02 May 2021 19:31:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37168) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMm-0008NY-7F for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:12 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:43810) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMg-0002z7-88 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:11 -0400 Received: by mail-pj1-x1032.google.com with SMTP id cl24-20020a17090af698b0290157efd14899so880848pjb.2 for ; Sun, 02 May 2021 16:19:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Y1Xrc8fP8CZ6dZ7PAmDVWqhq2c76R5A8I5Dx2N52iow=; b=cnsPRLgY4Qjco9aukxY9euKEi5w8zIu27OnA5hyAFbpUgh3jprqo34x5gztZOrYkGH etLk47rPNcDnBZCmlurz1c37v2YzfpCR604IERWdRQTQeF2MHASEHVKPj/hiTGLWtl4L waTVVBQ3FyN7d4wV6KPQfH0WjUJPj8YcZO12aaScfQ7eLZLcQvSvGkGfwl5anwacFVwX 2pq9rYrBpxgCDA+rM8b3h7cYt+s7umDOHZQjvs2YCW6Ilhg59E1DH8mSDNAlm9R4YGzx sJTqAAch23eRg+Djr6W+mM+kVT79OFjuQTCfOYIl+rhaTb6Dn6MGLa3M5e8hrpQrY+6a Wwwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y1Xrc8fP8CZ6dZ7PAmDVWqhq2c76R5A8I5Dx2N52iow=; b=VDinwh4R78RkNnze/Dr0bDB+Efr4h1aoG/4wdMfFBOeudqxHRrdE5GXR2IML0zTPOU t2Av6cddHvy+oE02iNHGPYzw2CvOKg5o6xam2VOyE9rcZ8v4JN1a0hZIjQ46GF4vClJ/ 7Cc3cTEHUOsSzVMGufDVu3ABFGA4LcO6C+KA0t8YqzGo4LNVFHOJLv7qkEZj+99M92q/ d4FJFZpPlNSKbKe2yNMuweYpdxp2cnmA6PKUcIND896J13axZpChX8nt1wSRWBL/O0uj rWIyVU4c6WjcxjvEk9Nhq3TBgQoPF8HuXzPjFuLHl+r/oeoQAjpG5v3+VfWSwjQFqpOB TZ5Q== X-Gm-Message-State: AOAM530lG5LYSY/1DpwB7lcCrT21ZKqAROyKHFgQXc36N77ACBTkP7v8 u7D8cACZXyUQImjtkGeEsekjrNjoMJkNGQ== X-Received: by 2002:a17:90b:46c4:: with SMTP id jx4mr13700186pjb.155.1619997543356; Sun, 02 May 2021 16:19:03 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.19.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:19:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 23/28] tcg: Sink qemu_madvise call to common code Date: Sun, 2 May 2021 16:18:39 -0700 Message-Id: <20210502231844.1977630-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Move the call out of the N versions of alloc_code_gen_buffer and into tcg_region_init. Signed-off-by: Richard Henderson --- tcg/region.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index 23fe113750..b3f0b9bda5 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -554,7 +554,6 @@ static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) error_setg_errno(errp, errno, "mprotect of jit buffer"); return false; } - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); region.start_aligned = buf; region.total_size = size; @@ -630,9 +629,6 @@ static int alloc_code_gen_buffer_anon(size_t size, int prot, } #endif - /* Request large pages for the buffer. */ - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - region.start_aligned = buf; region.total_size = size; return prot; @@ -682,9 +678,6 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) region.total_size = size; tcg_splitwx_diff = buf_rx - buf_rw; - /* Request large pages for the buffer and the splitwx. */ - qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); - qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); return PROT_READ | PROT_WRITE; fail_rx: @@ -852,6 +845,13 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) splitwx, &error_fatal); assert(have_prot >= 0); + /* Request large pages for the buffer and the splitwx. */ + qemu_madvise(region.start_aligned, region.total_size, QEMU_MADV_HUGEPAGE); + if (tcg_splitwx_diff) { + qemu_madvise(region.start_aligned + tcg_splitwx_diff, + region.total_size, QEMU_MADV_HUGEPAGE); + } + /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of From patchwork Sun May 2 23:18:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430473 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1225536ejc; Sun, 2 May 2021 16:27:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyU29r+ys6PXhRqvyDt16AaqunhuFb9joNJp/5GYEAV4qMiQcX9XQ8VtQF7HtW7ychQouik X-Received: by 2002:a05:622a:1108:: with SMTP id e8mr14304252qty.177.1619998054997; Sun, 02 May 2021 16:27:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998054; cv=none; d=google.com; s=arc-20160816; b=PJTgUpf+6pqMgVET/ju+lRh8AhYIAqQmzdGE8AScOaeequza+Si/5w0SCd+voAdTkW NvGQIoKDK1VgpB3+uwC3gJt0fkT9c8S3PGhJ/aX8ItNZv5+ylmAuOMVVRGS9s7Jws5f1 OltV+9gR3pByj41wGdr+WS+gp/7XektT13IDKMfKBWhcVCPybW+/ZLfzxaSQQcUlaXCG xpFbqYBkAbKHeA7i42Cab+ZX2tz3gEaXK0KW9XOIv9OkZPueeownLlOu85CIlEqxNs2f kkxE4ga5I/iDB8j3MRE7uStr9jMVMw1gvTm/m6HpSyPixuQ9/yFHS9uVh7ukLq+eCNet 8eww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=j2oZWIWZW+wm4CMCfiCPmwaL+UY6rp5UnrdyXg3UtJs=; b=PmUTyyJVuvylSnipiVbRsI1h5eo6XEgaT0a+5hNpl5Q3Ak5RtuoT+vkzdmjuC8aUeR wrC7+aX76IUUno8hwKSjWSo8sxgeTMdiWnWHfDAf+T3xw/H4ZFuuvYxX1Dzpulu/fxv5 3i8pmvGU+nOkPT1402D0IEE0S0pnabXLU+zt+NAiP9rwPsPdjdKxfNRL7J1n336uwPEO Qj30+Yg5nsiQXdHQKpA03H4CONmvDZgA12PUUd3V9IANsFHjm0+Xkf8Veigdc8eC6yHG FNgiP5L0ITkasIwL50BNvVPJ/HUDcHgZXAOl7UEkVycvTFdQ1Y83snCip2b8A+j3xEAl M4JA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="r/jvyBpz"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/qemu/osdep.h | 1 + util/osdep.c | 9 +++++++++ 2 files changed, 10 insertions(+) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index cb2a07e472..c4a675b9a3 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -512,6 +512,7 @@ void sigaction_invoke(struct sigaction *action, #endif int qemu_madvise(void *addr, size_t len, int advice); +int qemu_mprotect_rw(void *addr, size_t size); int qemu_mprotect_rwx(void *addr, size_t size); int qemu_mprotect_none(void *addr, size_t size); diff --git a/util/osdep.c b/util/osdep.c index 66d01b9160..42a0a4986a 100644 --- a/util/osdep.c +++ b/util/osdep.c @@ -97,6 +97,15 @@ static int qemu_mprotect__osdep(void *addr, size_t size, int prot) #endif } +int qemu_mprotect_rw(void *addr, size_t size) +{ +#ifdef _WIN32 + return qemu_mprotect__osdep(addr, size, PAGE_READWRITE); +#else + return qemu_mprotect__osdep(addr, size, PROT_READ | PROT_WRITE); +#endif +} + int qemu_mprotect_rwx(void *addr, size_t size) { #ifdef _WIN32 From patchwork Sun May 2 23:18:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430480 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1228727ejc; Sun, 2 May 2021 16:33:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJztowMD5BsoLscvqg71I1fDg6CmoTtWDnegynb/oKtXbYQxsOXClmR06Seyhv/878Ko6SJh X-Received: by 2002:a02:85c8:: with SMTP id d66mr896160jai.127.1619998419473; Sun, 02 May 2021 16:33:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998419; cv=none; d=google.com; s=arc-20160816; b=nubQVrEnbE2fg1k0xGDsYvWKhsvFjZ6HSM0EZPmfRkuJqeWWbK6b7ypBAN6wn+7Xfh zkLSJjUAgM179lToIvZGJoXpRL4n8xgEkxcVwHE3hmAlquL63U6wv3jC9Zjfn5ITaB1O hxoJ622T68rOOn1r7/1g4+byRLFW2lUNhSD+EYtMr5T1btJPggQl5trslsDjIjK8F0h7 VrPZdCtKBfffBldKP9NhT5A90SHyLf4b2F961RmD5iBmI2/BccMJh4VV+NpkrngNO+a3 Drv9j0+rVvw+zE6lmjHIAzgNvwqtp2aaEzFj1G9ZKh63/iUDmW7fe/WAksSn86ugAl6G pM5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=euZbMSCAnJ/aSruzU2XNeMy2K5psC8+GIr707J2MLks=; b=qRdDCkm2G4VtaxkxPsiXUQwcBrEPD1k84JKgXgyFiILtekc26Keys4YcIRfI1bQEqA ySyWPPh7KdEB2hr7VO41cc41oXWYA5fPNagZrnS4g5SITgN1beGNr0rQzlCgUKLobDEG 8i9LRWQ9Tp4wpAULvvS27KD/CYVTZCXe6JZCbQuSKbiywnZuS3fIOe45gr4qHWVQ7wSx GkQC5+W25QD4SeqRYUzuzjYUl8aGW+zpeh871uHeVoOHaow+DUWsq7OCWqRj0t7p4xw+ HogLSioxifm+bxO7J45wdefoUMSlbYB2TxLZltTUZeRQtNzfVs7fsU+xTIK2K/brpzsV u1Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TGIP86FW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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The following was observed on a gitlab runner: ERROR qtest-arm/boot-serial-test - Bail out! ERROR:../util/osdep.c:80:qemu_mprotect__osdep: \ assertion failed: (!(size & ~qemu_real_host_page_mask)) Signed-off-by: Richard Henderson --- tcg/region.c | 47 +++++++++++++++++++++-------------------------- 1 file changed, 21 insertions(+), 26 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index b3f0b9bda5..49764b40dc 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -469,26 +469,6 @@ static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus) (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \ ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE) -static size_t size_code_gen_buffer(size_t tb_size) -{ - /* Size the buffer. */ - if (tb_size == 0) { - size_t phys_mem = qemu_get_host_physmem(); - if (phys_mem == 0) { - tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; - } else { - tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); - } - } - if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { - tb_size = MIN_CODE_GEN_BUFFER_SIZE; - } - if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { - tb_size = MAX_CODE_GEN_BUFFER_SIZE; - } - return tb_size; -} - #ifdef __mips__ /* In order to use J and JAL within the code_gen_buffer, we require that the buffer not cross a 256MB boundary. */ @@ -836,13 +816,29 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - size_t page_size; + const size_t page_size = qemu_real_host_page_size; size_t region_size; size_t i; int have_prot; - have_prot = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), - splitwx, &error_fatal); + /* Size the buffer. */ + if (tb_size == 0) { + size_t phys_mem = qemu_get_host_physmem(); + if (phys_mem == 0) { + tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; + } else { + tb_size = QEMU_ALIGN_DOWN(phys_mem / 8, page_size); + tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, tb_size); + } + } + if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { + tb_size = MIN_CODE_GEN_BUFFER_SIZE; + } + if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { + tb_size = MAX_CODE_GEN_BUFFER_SIZE; + } + + have_prot = alloc_code_gen_buffer(tb_size, splitwx, &error_fatal); assert(have_prot >= 0); /* Request large pages for the buffer and the splitwx. */ @@ -857,9 +853,8 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region.n = tcg_n_regions(region.total_size, max_cpus); - page_size = qemu_real_host_page_size; - region_size = region.total_size / region.n; + region.n = tcg_n_regions(tb_size, max_cpus); + region_size = tb_size / region.n; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ From patchwork Sun May 2 23:18:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430482 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1229991ejc; Sun, 2 May 2021 16:36:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxyrdU3c0RKsNpPsp1TzqHSYEuDBgDtLcsEQZuYYV8Gc0a1P/NFXAJ5OYZWxKpwGqAQ77Ny X-Received: by 2002:a05:6e02:156c:: with SMTP id k12mr13639815ilu.49.1619998572452; Sun, 02 May 2021 16:36:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998572; cv=none; d=google.com; s=arc-20160816; b=F5x+JPpfnz1399ze7WDivPHM76DqkpEFTaWn/uF1AArAs8crxI+upIRAFsLXmh54PP l3vcgeV6AXQZ1cuXQ/gx0QgcdoikqYu7y5AkMKnjUSiKK9817BXgccuqVrAn5IRkcHDN GE+rA7SYphQbv65SATSSJ7/CBnpGGUvbarV3fbYp05OiNWtvaQ2blSqz/1FRzu96klZ1 HrJ5QdKaNJ2ob7b8n41MsjqmW53taoqXy1uF/GLw/nUp5qrVz1KHOH1JAiFnZnC6KfkG HpGkCYp5KJ95YiQbnJCd8U89IIMQ4SxVDP4i67Zt2LamH+G3/69jTc9NNwJiS9P/aYOF 7hHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=5l4dTEQ+iJa2jxENce/P7jthFYg4uP2TXzJ1O/jGZ+Y=; b=XhEb7xhyup+UPwdeeDJChYLSjyCqegGoU1G5TVA7kW3DzH5zoSBpwszaqn2fwodX7q TFlm4q2KOoWHDzeWLDjzGskJ1GdfTwJ7UxSTl6u3+LOWMRsXVkC+nSpWtnGRD9gn2qOe slOEhrz4HcjvKxvPM/xOpaV49cyEjKqsz1aPH7HrMzlkdQNI1N9fuU/fauh6JocVVkTl Y356NWkERltS1Lsz6E0BSqf/I+WPbxmKm7NQ+yeItUL8TpsghN7ONylR/Sa0O4onsgms kqFCvmwwTYAC4uxWgYtkbNcREHlP60NJl2H0eLxv/u10WwQTuXmJWpkadTAaFZ3O0OGa o3hw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oWB3YD69; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- tcg/region.c | 45 +++++++++++++++++++++++++++++++-------------- 1 file changed, 31 insertions(+), 14 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index 49764b40dc..604530b902 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -530,11 +530,6 @@ static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) } #endif - if (qemu_mprotect_rwx(buf, size)) { - error_setg_errno(errp, errno, "mprotect of jit buffer"); - return false; - } - region.start_aligned = buf; region.total_size = size; @@ -818,8 +813,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { const size_t page_size = qemu_real_host_page_size; size_t region_size; - size_t i; - int have_prot; + int have_prot, need_prot; /* Size the buffer. */ if (tb_size == 0) { @@ -879,18 +873,41 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) * Set guard pages in the rw buffer, as that's the one into which * buffer overruns could occur. Do not set guard pages in the rx * buffer -- let that one use hugepages throughout. + * Work with the page protections set up with the initial mapping. */ - for (i = 0; i < region.n; i++) { + need_prot = PAGE_READ | PAGE_WRITE; +#ifndef CONFIG_TCG_INTERPRETER + if (tcg_splitwx_diff == 0) { + need_prot |= PAGE_EXEC; + } +#endif + for (size_t i = 0, n = region.n; i < n; i++) { void *start, *end; tcg_region_bounds(i, &start, &end); + if (have_prot != need_prot) { + int rc; - /* - * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect - * rejects a permission change from RWX -> NONE. Guard pages are - * nice for bug detection but are not essential; ignore any failure. - */ - (void)qemu_mprotect_none(end, page_size); + if (need_prot == (PAGE_READ | PAGE_WRITE | PAGE_EXEC)) { + rc = qemu_mprotect_rwx(start, end - start); + } else if (need_prot == (PAGE_READ | PAGE_WRITE)) { + rc = qemu_mprotect_rw(start, end - start); + } else { + g_assert_not_reached(); + } + if (rc) { + error_setg_errno(&error_fatal, errno, + "mprotect of jit buffer"); + } + } + if (have_prot != 0) { + /* + * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect + * rejects a permission change from RWX -> NONE. Guard pages are + * nice for bug detection but are not essential; ignore any failure. + */ + (void)qemu_mprotect_none(end, page_size); + } } tcg_region_trees_init(); From patchwork Sun May 2 23:18:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430484 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1230413ejc; Sun, 2 May 2021 16:37:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwNayTGp1K2GerYKEvHeKchmq0idkNHIsIz+2lfP08lgi3nbwO06WyXruIZr59sCQR5wn78 X-Received: by 2002:a92:2a12:: with SMTP id r18mr7793043ile.170.1619998622112; Sun, 02 May 2021 16:37:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998622; cv=none; d=google.com; s=arc-20160816; b=wwbkMYmjSesqYgucCovlV0JvrvodCkomvZXKLVscEuY0Ikot/C8HCroCFTc3firK5J hUVYqez4RQ4YCmaEKsx7m5BpGHwqFOOzIlnZkK/vWAutskdhWPMssh2x+SaO7zQXKdmp Qxw6zHYtRo8kfezKeKfayAV69epCnggPuKBjDKpym/R0091Z7Jbc2b2hNWuugGu8kLjF 3vqml73kpjazs76wiVRZm+txJRqEnCP7UMvVsIPHGEJxYnT6Q7+lBgcqbRnL6Mm2MtTV zTwAlYoG8l6bl0J4WnFSmW3gMnLkNq2c0CE5unwU44uZO+R3kuGO2pno1c66IxubAOm+ mUpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=IMH7OG6KjuztYAF/Ih9G+wS1HMzIPcW7GkKKX50tasw=; b=ncv1Bcjgd5yfhUIy2car/p2mwjS2G8Fh4sFgyJLzr4Ck4Daj2mXilXXpz13kYKJhrL CQf42qcG+1E68laR+D37DLjNSJPJ0XBP+Put+WicbMAWBlf5MJ/lBo+c0vJ/L/6HwOvK WXYr0ihsTK8PbviyDJrCAKkpZdBzDMn66nq7nojyRzrmkARt0LC9bmgqtkcNUDoEy/r5 aLmkiVl0tqbNRc4Uqme/jX1/i8mzOhDIUpcantWS/lzTf6L98TLccFuq/NZzGpHlLcVu TUvJi/FLadjGjNPG8m5xQ6/2zLJDrLHUVRixx5Fj7GECCYf+0DoeTMu8F+UlphzsujbY BA+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yQRkuLRQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x19si11519944jat.51.2021.05.02.16.37.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:37:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yQRkuLRQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59546 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLe1-0006Vm-FE for patch@linaro.org; Sun, 02 May 2021 19:37:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37208) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMp-0008QV-Jd for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:15 -0400 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:37642) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMh-0002zc-IQ for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:15 -0400 Received: by mail-pf1-x429.google.com with SMTP id b15so2955826pfl.4 for ; Sun, 02 May 2021 16:19:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=IMH7OG6KjuztYAF/Ih9G+wS1HMzIPcW7GkKKX50tasw=; b=yQRkuLRQB3qzWS6HhVFazYf0EL9goICi5FTd4Lym+MSO2KwgNeslFEdq45AHh6jH/E CVYQwIyZz+10ja4mqTYB5UfckV1vccACUyKcZQ2vDiMK94MUF1AF36mDsyV7NYd0B57q TVdL6Tt0/nR7HZoc6R7p9gRZa9iHRnnQFLhFGxQZiO2bmExKw9VeWh2erzbuzZTVyznp isxZzhRMDCSoxDigJBQ8kMr+eIGzxEpL1LeNmSOE44OW0MiQT0vJOUYV9D50CPokDiL+ llX/EDPuQWw+oqNYTsoZvlGOkicmC83pr3xWRzer/HJL3ggs2hsuVAmxDYQRM2P2QPXV HjeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IMH7OG6KjuztYAF/Ih9G+wS1HMzIPcW7GkKKX50tasw=; b=jpO75RIofoHLQaaPeE7L0vprKrgtXMwI41uRv2pJhpw8jtofro2IzbAcV3+PijZz6N gu0l2emKrcp2Zx8enp3/sZWtFj/7GZSna8uHXio2aJfHPdoFDq2leZYT/MVfMie2a9Mw o1LC2+KVJmLR/71hrwzTrnBqyGyUkuD/xZlpoAfQAs3f23KEBLnx7BagiekMnYAdkHHy eYODOCrFERqHnMtYH7ico2dycnbHYCPC/OeFXal5LQxnjSxD4Cl5ymiMM+MAghtRgHrF GPY9iDsNkblJcwZiQlgCB6Eci2kIAFFK0bKqlahhnr7o2S/sGXHMLrHctJzHC1CwlJMr 84dw== X-Gm-Message-State: AOAM5313qZ++oPR9C6TiLSNBfakKMDcI6VaknpWbu/XWYdPqiV+gM8N9 8ytNTIfDXUCSlFSMzN+Djc1CEFF2g1wfwg== X-Received: by 2002:a62:ed0f:0:b029:257:7278:e72b with SMTP id u15-20020a62ed0f0000b02902577278e72bmr16172218pfh.17.1619997546077; Sun, 02 May 2021 16:19:06 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.19.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:19:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 27/28] tcg: When allocating for !splitwx, begin with PROT_NONE Date: Sun, 2 May 2021 16:18:43 -0700 Message-Id: <20210502231844.1977630-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There's a change in mprotect() behaviour [1] in the latest macOS on M1 and it's not yet clear if it's going to be fixed by Apple. In this case, instead of changing permissions of N guard pages, we change permissions of N rwx regions. The same number of syscalls are required either way. [1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f Signed-off-by: Richard Henderson --- tcg/region.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) -- 2.25.1 Reviewed-by: Luis Pires diff --git a/tcg/region.c b/tcg/region.c index 604530b902..5e00db4cfb 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -765,12 +765,15 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) error_free_or_abort(errp); } - prot = PROT_READ | PROT_WRITE | PROT_EXEC; + /* + * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect + * rejects a permission change from RWX -> NONE when reserving the + * guard pages later. We can go the other way with the same number + * of syscalls, so always begin with PROT_NONE. + */ + prot = PROT_NONE; flags = MAP_PRIVATE | MAP_ANONYMOUS; -#ifdef CONFIG_TCG_INTERPRETER - /* The tcg interpreter does not need execute permission. */ - prot = PROT_READ | PROT_WRITE; -#elif defined(CONFIG_DARWIN) +#ifdef CONFIG_DARWIN /* Applicable to both iOS and macOS (Apple Silicon). */ if (!splitwx) { flags |= MAP_JIT; @@ -901,11 +904,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) } } if (have_prot != 0) { - /* - * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect - * rejects a permission change from RWX -> NONE. Guard pages are - * nice for bug detection but are not essential; ignore any failure. - */ + /* Guard pages are nice for bug detection but are not essential. */ (void)qemu_mprotect_none(end, page_size); } } From patchwork Sun May 2 23:18:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 430475 Delivered-To: patch@linaro.org Received: by 2002:a17:907:764d:0:0:0:0 with SMTP id kj13csp1226523ejc; Sun, 2 May 2021 16:29:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwLS2ztdlRmM8mjiy2stPVEg12Ni5Wa/0YP3xZGgU2vnL2/TXNR63akMwo2ZyxZLDdng/nk X-Received: by 2002:a6b:7944:: with SMTP id j4mr8869232iop.60.1619998180241; Sun, 02 May 2021 16:29:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619998180; cv=none; d=google.com; s=arc-20160816; b=i2clbX0zE5TGlmGWj4t3H1qmWLiJJiGf0rYskoBPPUjbZf++tm51+q7PRnGrnXTJM1 ZGdKMaccxZVNKPqo0idY7n4Ey+5AtoojOUG2laUA8sMZHIb9z1tfDldCiGKPs1KLM/tm p5vJTK7GsTaFcVog9x7MlJhPFUQ+GG9F7viyWrXXnq6wkHbEAGs45Dv9QxT3HijmEtr4 NHo0FqDgk27ZlFYzWUKdZ4F4dTx3oB1EZ8G+iSOFVIK1998AA9lKZp36TesJ1zQNKiTi /r2pSgtgWtOVJWd4eENQSpG7NWGqwUeHJo3rNQCmr1AXdCk0x/wCg16Oy8MKcWynqrN6 ouXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pRV7mqfMaKb7/SwKxjrezlXdNmvbN1KHw2x4aibLFRI=; b=UzDu2SaQ8pLqiVtpx/IBOXI5lAsTgAKLmz2Fdfgh6+cKm7JcUTan23XJIIPs1PZWC/ X2uzm/pVxsoSf27Jf4+5iBxMKDCj5M2ZOQ7+9tZm47jS5DJWzzuN0ixUokubpgmkkDET OON9K0HoFBYlnmATJex0ZfwE2XE211PmQFCQmbxNvlQ2WfzhgqqQVR7wfo3wOaGThpCQ NJejZ+wMYWp4SwE6kDEdPqk8VVcH8M6Tm3NgJ13CpZ0vQSXoltWiIx8iK+V/QMMK1p9S iMl7QCD+TRSmSaL4oA4sf2aW1BsMtm4I8LLh/MA4QJL+6Q6tZtjrawCEeQT1qXy+/kNa CrsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LGoDDHlB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s4si13211774jat.26.2021.05.02.16.29.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 02 May 2021 16:29:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LGoDDHlB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36380 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldLWt-0005M6-JA for patch@linaro.org; Sun, 02 May 2021 19:29:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37220) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldLMr-0008T0-SE for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:17 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]:46057) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ldLMi-00030Z-80 for qemu-devel@nongnu.org; Sun, 02 May 2021 19:19:17 -0400 Received: by mail-pl1-x62c.google.com with SMTP id p17so1846662plf.12 for ; Sun, 02 May 2021 16:19:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pRV7mqfMaKb7/SwKxjrezlXdNmvbN1KHw2x4aibLFRI=; b=LGoDDHlBUINnmZ/r7a4AdBl7Rwi4Su7NL7d5vWZtSpdGH8R/fyqO+3Alrp5WfMAJvQ abONDHENv5r6AXGF8MwSOF+S1pHcRnilYvJceJ5PZWXMtriayhe0RyY4YsKM1suijQvr /PPQum04pIIdJTcqDIqBYi1A7HNKyKLibCChPeubLW1vajLNmuzGdbViw353EKKg7RLg E+aMyA6phtImcRAKbmOcsYFQxq/lFL+xJKkZNQ1hEw1QG+n0qUDiPMKBM26skqGF4ui+ fGQ9XNRgJw7DUkYskaWoWcOt0qpAIaaCfKDlZd2yJI8iGBZTVi6vBYIgll4rtvd5AhAF cwdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pRV7mqfMaKb7/SwKxjrezlXdNmvbN1KHw2x4aibLFRI=; b=ahgBfRF7NKEzz4aZl8b2hWSqE0tY4bRCzwM9whoUQxBx4S0Johlamlc6mhDuGLSPRw /LEZ8pFotsy52slKMxArgheKLxksbSoncUz17Fp+33wqBbHJgIphmHpv6O+lw0MxjER9 2olKMJODrB83DbXS45657+ATThj044Zzi93J92pexnmu2zdb6TsmzvReh/4D7FSuro+M FAq47RbrQnpUwkX07K8pFxooLwkvExa5y3kxbkZhwj04iRVI1hIaasEZD1ZnQHlVmaA1 CLcSoNIHuBIbvoqEp5Nlg6OIGEcYzlyM1OERIUyrewNo2xAJ32byZqIZnGZ3Bz08/e+5 ewgw== X-Gm-Message-State: AOAM531JGy0XkIX1syHZq9/+QPaQ3+pBr3YuAGhs5KmvhLc6f5vNr+x+ Np9y5/8RcsXM6Cw27pn3/YIYHnedDbpsZw== X-Received: by 2002:a17:902:dac2:b029:ec:7fcb:1088 with SMTP id q2-20020a170902dac2b02900ec7fcb1088mr17509675plx.65.1619997547008; Sun, 02 May 2021 16:19:07 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id k17sm7146236pfa.68.2021.05.02.16.19.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:19:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 28/28] tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ Date: Sun, 2 May 2021 16:18:44 -0700 Message-Id: <20210502231844.1977630-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210502231844.1977630-1-richard.henderson@linaro.org> References: <20210502231844.1977630-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These variables belong to the jit side, not the user side. Since tcg_init_ctx is no longer used outside of tcg/, move the declaration to tcg/internal.h. Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 1 - tcg/internal.h | 1 + accel/tcg/translate-all.c | 3 --- tcg/tcg.c | 3 +++ 4 files changed, 4 insertions(+), 4 deletions(-) -- 2.25.1 Reviewed-by: Alex Bennée Reviewed-by: Luis Pires diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index a19deb529f..eef8857cca 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -690,7 +690,6 @@ static inline bool temp_readonly(TCGTemp *ts) return ts->kind >= TEMP_FIXED; } -extern TCGContext tcg_init_ctx; extern __thread TCGContext *tcg_ctx; extern const void *tcg_code_gen_epilogue; extern uintptr_t tcg_splitwx_diff; diff --git a/tcg/internal.h b/tcg/internal.h index f9906523da..181f86507a 100644 --- a/tcg/internal.h +++ b/tcg/internal.h @@ -27,6 +27,7 @@ #define TCG_HIGHWATER 1024 +extern TCGContext tcg_init_ctx; extern TCGContext **tcg_ctxs; extern unsigned int tcg_cur_ctxs; extern unsigned int tcg_max_ctxs; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 0c818c3618..25f5be1c4f 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -218,9 +218,6 @@ static int v_l2_levels; static void *l1_map[V_L1_MAX_SIZE]; -/* code generation context */ -TCGContext tcg_init_ctx; -__thread TCGContext *tcg_ctx; TBContext tb_ctx; static void page_table_config_init(void) diff --git a/tcg/tcg.c b/tcg/tcg.c index 212df31622..e4e2985276 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -152,6 +152,9 @@ static int tcg_target_const_match(tcg_target_long val, TCGType type, static int tcg_out_ldst_finalize(TCGContext *s); #endif +TCGContext tcg_init_ctx; +__thread TCGContext *tcg_ctx; + TCGContext **tcg_ctxs; unsigned int tcg_cur_ctxs; unsigned int tcg_max_ctxs;