From patchwork Fri Apr 30 03:19:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 429981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D302C433ED for ; Fri, 30 Apr 2021 03:19:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CC438613C1 for ; Fri, 30 Apr 2021 03:19:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229615AbhD3DUI (ORCPT ); Thu, 29 Apr 2021 23:20:08 -0400 Received: from new2-smtp.messagingengine.com ([66.111.4.224]:57607 "EHLO new2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229577AbhD3DUD (ORCPT ); Thu, 29 Apr 2021 23:20:03 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailnew.nyi.internal (Postfix) with ESMTP id 958CC5809A8; Thu, 29 Apr 2021 23:19:15 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Thu, 29 Apr 2021 23:19:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm2; bh=zsgS/p6h6LoM1 J8DV/As4w6mpp5Hjtcaqy0MGncfGb0=; b=IVsYgx6Erbps3DgoGNfDzo/Dnv+W7 sX5dHISsksPYcGH8ivoGx0d37/qXrbx4dN2E9pMrSfWk156r1MjXW+PL2AkoYwpL gamy1ihTjJAvFO7V8QHuf1YGlt2vj5va4P6f/hXR+v4sXxi3n0fpXF/0rKIVHFGF Q21OZw4lYHlG7/DMPZHW9XgLSuX2nNIDcuZA4SCd3HtDbochEMAlksxcsRA9lz/q AyyF0QDLkKCBRA42ccZcoCU21kk3TFI4aLRsS0oRW379U2jMEZ7kbL6H0HBwCyJ2 Lx4n3Xqssv2f7dzcibMzdD1cdzd+8WuHI1tHWGoyuv+/Tn7UjlaUiBOPw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=zsgS/p6h6LoM1J8DV/As4w6mpp5Hjtcaqy0MGncfGb0=; b=cNpNOlW3 AuctOc5lh4O+sPjFtMK1RMY968PFYAz7eSWZbjlBu6Lau8lCjrZyx37CAwKzeimQ FWcVe4FooA9Bfd6xhZccFK90XH9oKWonQzLqce1ao5iRZ7gPrEgqJg8s7Udc/2PG JJ5iZrROaVgXo9bF6hT9mnmLdsZX9h58wUu4T+i+qd218gvwBOfWJfRFlFKkUjz7 AcpAu5yhUvRYvTd073ME2qESj9owFvADP7kvBy8QXnb8tufzZ9EKmhPvbCK9/Os4 lkqUrfW+RkPD6ylOAlcxwszxRmyJ7LEdZFNu2oH/pFLVMCUR29KsaC1ZVXs7v+gP c93znQ4HxEO5Ig== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvddvhedgieelucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucggtf frrghtthgvrhhnpeelueelgeettdfggfeuffevkefhuddtteeigfevhfdtffdtjefgteeg leeggedvudenucffohhmrghinhepuggvvhhitggvthhrvggvrdhorhhgnecukfhppeejtd drudefhedrudegkedrudehudenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhep mhgrihhlfhhrohhmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Received: from titanium.stl.sholland.net (70-135-148-151.lightspeed.stlsmo.sbcglobal.net [70.135.148.151]) by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 29 Apr 2021 23:19:14 -0400 (EDT) From: Samuel Holland To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Felipe Balbi , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v2 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue Date: Thu, 29 Apr 2021 22:19:11 -0500 Message-Id: <20210430031912.42252-2-samuel@sholland.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210430031912.42252-1-samuel@sholland.org> References: <20210430031912.42252-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the USB3 PHY. This suggests the reset line controls the USB3 IP as a whole. Represent this by attaching the reset line to a glue layer device. Signed-off-by: Samuel Holland --- .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml new file mode 100644 index 000000000000..936b5c74043f --- /dev/null +++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner H6 DWC3 USB controller + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + compatible: + const: allwinner,sun50i-h6-dwc3 + + "#address-cells": true + + "#size-cells": true + + ranges: true + + resets: + maxItems: 1 + +# Required child node: + +patternProperties: + "^phy@[0-9a-f]+$": + $ref: ../phy/allwinner,sun50i-h6-usb3-phy.yaml# + + "^usb@[0-9a-f]+$": + $ref: snps,dwc3.yaml# + +required: + - compatible + - ranges + - resets + +additionalProperties: false + +examples: + - | + #include + #include + #include + + usb3: usb@5200000 { + compatible = "allwinner,sun50i-h6-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + resets = <&ccu RST_BUS_XHCI>; + + dwc3: usb@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_BUS_XHCI>, + <&ccu CLK_BUS_XHCI>, + <&rtc 0>; + clock-names = "ref", "bus_early", "suspend"; + dr_mode = "host"; + phys = <&usb3phy>; + phy-names = "usb3-phy"; + }; + + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + }; + }; From patchwork Fri Apr 30 03:19:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 429980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23F8AC43461 for ; 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Thu, 29 Apr 2021 23:19:15 -0400 (EDT) From: Samuel Holland To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Felipe Balbi , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v2 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer Date: Thu, 29 Apr 2021 22:19:12 -0500 Message-Id: <20210430031912.42252-3-samuel@sholland.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210430031912.42252-1-samuel@sholland.org> References: <20210430031912.42252-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The USB3 IP in the H6 is organized such that the reset line affects both the DWC3 core and the PHY. To model that, following the example of several other platforms, wrap those nodes in a glue layer node. The inner nodes no longer need to be disabled, since the glue layer is disabled by default to keep it in reset. Signed-off-by: Samuel Holland --- .../dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 +- .../dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +- .../dts/allwinner/sun50i-h6-tanix-tx6.dts | 6 +- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++--------- 4 files changed, 36 insertions(+), 42 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts index b5808047d6e4..5f6292db808c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts @@ -86,10 +86,6 @@ &de { status = "okay"; }; -&dwc3 { - status = "okay"; -}; - &ehci0 { status = "okay"; }; @@ -309,6 +305,6 @@ &usb2phy { status = "okay"; }; -&usb3phy { +&usb3 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts index 7e83f6146f8a..ae3c24584f65 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -101,10 +101,6 @@ &de { status = "okay"; }; -&dwc3 { - status = "okay"; -}; - &ehci0 { status = "okay"; }; @@ -340,6 +336,6 @@ &usb2phy { status = "okay"; }; -&usb3phy { +&usb3 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts index be81330db14f..8cb06df231ab 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts @@ -55,10 +55,6 @@ &de { status = "okay"; }; -&dwc3 { - status = "okay"; -}; - &ehci0 { status = "okay"; }; @@ -119,6 +115,6 @@ &usb2phy { status = "okay"; }; -&usb3phy { +&usb3 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index af8b7d0ef750..b4ce5eff2822 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -700,36 +700,42 @@ ohci0: usb@5101400 { status = "disabled"; }; - dwc3: usb@5200000 { - compatible = "snps,dwc3"; - reg = <0x05200000 0x10000>; - interrupts = ; - clocks = <&ccu CLK_BUS_XHCI>, - <&ccu CLK_BUS_XHCI>, - <&rtc 0>; - clock-names = "ref", "bus_early", "suspend"; + usb3: usb@5200000 { + compatible = "allwinner,sun50i-h6-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; resets = <&ccu RST_BUS_XHCI>; - /* - * The datasheet of the chip doesn't declare the - * peripheral function, and there's no boards known - * to have a USB Type-B port routed to the port. - * In addition, no one has tested the peripheral - * function yet. - * So set the dr_mode to "host" in the DTSI file. - */ - dr_mode = "host"; - phys = <&usb3phy>; - phy-names = "usb3-phy"; status = "disabled"; - }; - usb3phy: phy@5210000 { - compatible = "allwinner,sun50i-h6-usb3-phy"; - reg = <0x5210000 0x10000>; - clocks = <&ccu CLK_USB_PHY1>; - resets = <&ccu RST_USB_PHY1>; - #phy-cells = <0>; - status = "disabled"; + dwc3: usb@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_BUS_XHCI>, + <&ccu CLK_BUS_XHCI>, + <&rtc 0>; + clock-names = "ref", "bus_early", "suspend"; + /* + * The datasheet of the chip doesn't declare the + * peripheral function, and there's no boards known + * to have a USB Type-B port routed to the port. + * In addition, no one has tested the peripheral + * function yet. + * So set the dr_mode to "host" in the DTSI file. + */ + dr_mode = "host"; + phys = <&usb3phy>; + phy-names = "usb3-phy"; + }; + + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + }; }; ehci3: usb@5311000 {