From patchwork Sun Apr 25 09:42:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cl X-Patchwork-Id: 427415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 100FDC43618 for ; Sun, 25 Apr 2021 09:42:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E969D613BE for ; Sun, 25 Apr 2021 09:42:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229954AbhDYJnR (ORCPT ); Sun, 25 Apr 2021 05:43:17 -0400 Received: from lucky1.263xmail.com ([211.157.147.130]:32958 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229559AbhDYJnP (ORCPT ); Sun, 25 Apr 2021 05:43:15 -0400 Received: from localhost (unknown [192.168.167.225]) by lucky1.263xmail.com (Postfix) with ESMTP id 9B4D8D188D; Sun, 25 Apr 2021 17:42:26 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P3565T140663333058304S1619343740259115_; Sun, 25 Apr 2021 17:42:25 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <0283a0a77b3882e71481c7371a03fe2b> X-RL-SENDER: cl@rock-chips.com X-SENDER: cl@rock-chips.com X-LOGIN-NAME: cl@rock-chips.com X-FST-TO: heiko@sntech.de X-RCPT-COUNT: 29 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: To: heiko@sntech.de Cc: robh+dt@kernel.org, jagan@amarulasolutions.com, wens@csie.org, uwe@kleine-koenig.org, mail@david-bauer.net, jbx6244@gmail.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, jensenhuang@friendlyarm.com, michael@amarulasolutions.com, cnsztl@gmail.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, gregkh@linuxfoundation.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, jay.xu@rock-chips.com, shawn.lin@rock-chips.com, david.wu@rock-chips.com, zhangqing@rock-chips.com, huangtao@rock-chips.com, cl@rock-chips.com, wim@linux-watchdog.org, linux@roeck-us.net, jamie@jamieiles.com, linux-watchdog@vger.kernel.org Subject: [PATCH v2 2/7] dt-bindings: serial: snps-dw-apb-uart: add description for rk3568 Date: Sun, 25 Apr 2021 17:42:11 +0800 Message-Id: <20210425094216.25724-3-cl@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210425094216.25724-1-cl@rock-chips.com> References: <20210425094216.25724-1-cl@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Liang Chen add "rockchip,rk3568-uart", "snps,dw-apb-uart" for uart nodes on a rk3568 platform to snps-dw-apb-uart.yaml. Signed-off-by: Liang Chen --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 87ef1e218152..97debbf68748 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -31,6 +31,7 @@ properties: - rockchip,rk3328-uart - rockchip,rk3368-uart - rockchip,rk3399-uart + - rockchip,rk3568-uart - rockchip,rv1108-uart - const: snps,dw-apb-uart - items: From patchwork Sun Apr 25 09:42:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cl X-Patchwork-Id: 427416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15BC5C43600 for ; Sun, 25 Apr 2021 09:42:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D9B5D613C3 for ; Sun, 25 Apr 2021 09:42:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229912AbhDYJnQ (ORCPT ); Sun, 25 Apr 2021 05:43:16 -0400 Received: from lucky1.263xmail.com ([211.157.147.131]:35250 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229668AbhDYJnO (ORCPT ); Sun, 25 Apr 2021 05:43:14 -0400 Received: from localhost (unknown [192.168.167.225]) by lucky1.263xmail.com (Postfix) with ESMTP id D1686BA17D; Sun, 25 Apr 2021 17:42:29 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P3565T140663333058304S1619343740259115_; Sun, 25 Apr 2021 17:42:29 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: cl@rock-chips.com X-SENDER: cl@rock-chips.com X-LOGIN-NAME: cl@rock-chips.com X-FST-TO: heiko@sntech.de X-RCPT-COUNT: 29 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: To: heiko@sntech.de Cc: robh+dt@kernel.org, jagan@amarulasolutions.com, wens@csie.org, uwe@kleine-koenig.org, mail@david-bauer.net, jbx6244@gmail.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, jensenhuang@friendlyarm.com, michael@amarulasolutions.com, cnsztl@gmail.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, gregkh@linuxfoundation.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, jay.xu@rock-chips.com, shawn.lin@rock-chips.com, david.wu@rock-chips.com, zhangqing@rock-chips.com, huangtao@rock-chips.com, cl@rock-chips.com, wim@linux-watchdog.org, linux@roeck-us.net, jamie@jamieiles.com, linux-watchdog@vger.kernel.org Subject: [PATCH v2 4/7] dt-bindings: watchdog: dw-wdt: add description for rk3568 Date: Sun, 25 Apr 2021 17:42:13 +0800 Message-Id: <20210425094216.25724-5-cl@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210425094216.25724-1-cl@rock-chips.com> References: <20210425094216.25724-1-cl@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Liang Chen add "rockchip,rk3568-wdt", "snps,dw-wdt" for watchdog nodes on a rk3568 platform to snps,dw-wdt.yaml. Signed-off-by: Liang Chen --- Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml b/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml index b58596b1831d..6461eb4f4a27 100644 --- a/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml @@ -27,6 +27,7 @@ properties: - rockchip,rk3328-wdt - rockchip,rk3368-wdt - rockchip,rk3399-wdt + - rockchip,rk3568-wdt - rockchip,rv1108-wdt - const: snps,dw-wdt From patchwork Sun Apr 25 09:44:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cl X-Patchwork-Id: 427414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23CC7C43460 for ; Sun, 25 Apr 2021 09:44:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 06F1F61103 for ; Sun, 25 Apr 2021 09:44:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229906AbhDYJpI (ORCPT ); Sun, 25 Apr 2021 05:45:08 -0400 Received: from lucky1.263xmail.com ([211.157.147.132]:33566 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229688AbhDYJpG (ORCPT ); Sun, 25 Apr 2021 05:45:06 -0400 Received: from localhost (unknown [192.168.167.235]) by lucky1.263xmail.com (Postfix) with ESMTP id 52F51F3494; Sun, 25 Apr 2021 17:44:25 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P2750T140649399834368S1619343862971609_; Sun, 25 Apr 2021 17:44:25 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: cl@rock-chips.com X-SENDER: cl@rock-chips.com X-LOGIN-NAME: cl@rock-chips.com X-FST-TO: heiko@sntech.de X-RCPT-COUNT: 29 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: To: heiko@sntech.de Cc: robh+dt@kernel.org, jagan@amarulasolutions.com, wens@csie.org, uwe@kleine-koenig.org, mail@david-bauer.net, jbx6244@gmail.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, jensenhuang@friendlyarm.com, michael@amarulasolutions.com, cnsztl@gmail.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, gregkh@linuxfoundation.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, jay.xu@rock-chips.com, shawn.lin@rock-chips.com, david.wu@rock-chips.com, zhangqing@rock-chips.com, huangtao@rock-chips.com, cl@rock-chips.com, wim@linux-watchdog.org, linux@roeck-us.net, jamie@jamieiles.com, linux-watchdog@vger.kernel.org Subject: [PATCH v2 5/7] arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs Date: Sun, 25 Apr 2021 17:44:21 +0800 Message-Id: <20210425094421.25838-1-cl@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210425094216.25724-1-cl@rock-chips.com> References: <20210425094216.25724-1-cl@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Liang Chen The pinconfig settings for Rockchip SoCs are pretty similar on all socs, so move them to a shared dtsi to be included, instead of redefining them for each soc. Signed-off-by: Liang Chen --- .../boot/dts/rockchip/rockchip-pinconf.dtsi | 345 ++++++++++++++++++ 1 file changed, 345 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi b/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi new file mode 100644 index 000000000000..da67e72fbfec --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi @@ -0,0 +1,345 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + */ + +&pinctrl { + /omit-if-no-ref/ + pcfg_pull_up: pcfg-pull-up { + bias-pull-up; + }; + + /omit-if-no-ref/ + pcfg_pull_down: pcfg-pull-down { + bias-pull-down; + }; + + /omit-if-no-ref/ + pcfg_pull_none: pcfg-pull-none { + bias-disable; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_0: pcfg-pull-none-drv-level-0 { + bias-disable; + drive-strength = <0>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_1: pcfg-pull-none-drv-level-1 { + bias-disable; + drive-strength = <1>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_2: pcfg-pull-none-drv-level-2 { + bias-disable; + drive-strength = <2>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_3: pcfg-pull-none-drv-level-3 { + bias-disable; + drive-strength = <3>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_4: pcfg-pull-none-drv-level-4 { + bias-disable; + drive-strength = <4>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_5: pcfg-pull-none-drv-level-5 { + bias-disable; + drive-strength = <5>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_6: pcfg-pull-none-drv-level-6 { + bias-disable; + drive-strength = <6>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_7: pcfg-pull-none-drv-level-7 { + bias-disable; + drive-strength = <7>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_8: pcfg-pull-none-drv-level-8 { + bias-disable; + drive-strength = <8>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_9: pcfg-pull-none-drv-level-9 { + bias-disable; + drive-strength = <9>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_10: pcfg-pull-none-drv-level-10 { + bias-disable; + drive-strength = <10>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_11: pcfg-pull-none-drv-level-11 { + bias-disable; + drive-strength = <11>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_12: pcfg-pull-none-drv-level-12 { + bias-disable; + drive-strength = <12>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_13: pcfg-pull-none-drv-level-13 { + bias-disable; + drive-strength = <13>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_14: pcfg-pull-none-drv-level-14 { + bias-disable; + drive-strength = <14>; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_15: pcfg-pull-none-drv-level-15 { + bias-disable; + drive-strength = <15>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_0: pcfg-pull-up-drv-level-0 { + bias-pull-up; + drive-strength = <0>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_1: pcfg-pull-up-drv-level-1 { + bias-pull-up; + drive-strength = <1>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_2: pcfg-pull-up-drv-level-2 { + bias-pull-up; + drive-strength = <2>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_3: pcfg-pull-up-drv-level-3 { + bias-pull-up; + drive-strength = <3>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_4: pcfg-pull-up-drv-level-4 { + bias-pull-up; + drive-strength = <4>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_5: pcfg-pull-up-drv-level-5 { + bias-pull-up; + drive-strength = <5>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_6: pcfg-pull-up-drv-level-6 { + bias-pull-up; + drive-strength = <6>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_7: pcfg-pull-up-drv-level-7 { + bias-pull-up; + drive-strength = <7>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_8: pcfg-pull-up-drv-level-8 { + bias-pull-up; + drive-strength = <8>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_9: pcfg-pull-up-drv-level-9 { + bias-pull-up; + drive-strength = <9>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_10: pcfg-pull-up-drv-level-10 { + bias-pull-up; + drive-strength = <10>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_11: pcfg-pull-up-drv-level-11 { + bias-pull-up; + drive-strength = <11>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_12: pcfg-pull-up-drv-level-12 { + bias-pull-up; + drive-strength = <12>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_13: pcfg-pull-up-drv-level-13 { + bias-pull-up; + drive-strength = <13>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_14: pcfg-pull-up-drv-level-14 { + bias-pull-up; + drive-strength = <14>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_drv_level_15: pcfg-pull-up-drv-level-15 { + bias-pull-up; + drive-strength = <15>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_0: pcfg-pull-down-drv-level-0 { + bias-pull-down; + drive-strength = <0>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_1: pcfg-pull-down-drv-level-1 { + bias-pull-down; + drive-strength = <1>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_2: pcfg-pull-down-drv-level-2 { + bias-pull-down; + drive-strength = <2>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_3: pcfg-pull-down-drv-level-3 { + bias-pull-down; + drive-strength = <3>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_4: pcfg-pull-down-drv-level-4 { + bias-pull-down; + drive-strength = <4>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_5: pcfg-pull-down-drv-level-5 { + bias-pull-down; + drive-strength = <5>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_6: pcfg-pull-down-drv-level-6 { + bias-pull-down; + drive-strength = <6>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_7: pcfg-pull-down-drv-level-7 { + bias-pull-down; + drive-strength = <7>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_8: pcfg-pull-down-drv-level-8 { + bias-pull-down; + drive-strength = <8>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_9: pcfg-pull-down-drv-level-9 { + bias-pull-down; + drive-strength = <9>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_10: pcfg-pull-down-drv-level-10 { + bias-pull-down; + drive-strength = <10>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_11: pcfg-pull-down-drv-level-11 { + bias-pull-down; + drive-strength = <11>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_12: pcfg-pull-down-drv-level-12 { + bias-pull-down; + drive-strength = <12>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_13: pcfg-pull-down-drv-level-13 { + bias-pull-down; + drive-strength = <13>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_14: pcfg-pull-down-drv-level-14 { + bias-pull-down; + drive-strength = <14>; + }; + + /omit-if-no-ref/ + pcfg_pull_down_drv_level_15: pcfg-pull-down-drv-level-15 { + bias-pull-down; + drive-strength = <15>; + }; + + /omit-if-no-ref/ + pcfg_pull_up_smt: pcfg-pull-up-smt { + bias-pull-up; + input-schmitt-enable; + }; + + /omit-if-no-ref/ + pcfg_pull_down_smt: pcfg-pull-down-smt { + bias-pull-down; + input-schmitt-enable; + }; + + /omit-if-no-ref/ + pcfg_pull_none_smt: pcfg-pull-none-smt { + bias-disable; + input-schmitt-enable; + }; + + /omit-if-no-ref/ + pcfg_pull_none_drv_level_0_smt: pcfg-pull-none-drv-level-0-smt { + bias-disable; + drive-strength = <0>; + input-schmitt-enable; + }; + + /omit-if-no-ref/ + pcfg_output_high: pcfg-output-high { + output-high; + }; + + /omit-if-no-ref/ + pcfg_output_low: pcfg-output-low { + output-low; + }; +}; + From patchwork Sun Apr 25 09:44:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cl X-Patchwork-Id: 427413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4A2BC433B4 for ; Sun, 25 Apr 2021 09:45:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AEAF6611BD for ; Sun, 25 Apr 2021 09:45:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229916AbhDYJpn (ORCPT ); Sun, 25 Apr 2021 05:45:43 -0400 Received: from lucky1.263xmail.com ([211.157.147.133]:58812 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229912AbhDYJpm (ORCPT ); Sun, 25 Apr 2021 05:45:42 -0400 Received: from localhost (unknown [192.168.167.235]) by lucky1.263xmail.com (Postfix) with ESMTP id E1636CD535; Sun, 25 Apr 2021 17:44:59 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P2750T140649399834368S1619343897431850_; Sun, 25 Apr 2021 17:44:59 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: cl@rock-chips.com X-SENDER: cl@rock-chips.com X-LOGIN-NAME: cl@rock-chips.com X-FST-TO: heiko@sntech.de X-RCPT-COUNT: 29 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: To: heiko@sntech.de Cc: robh+dt@kernel.org, jagan@amarulasolutions.com, wens@csie.org, uwe@kleine-koenig.org, mail@david-bauer.net, jbx6244@gmail.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, jensenhuang@friendlyarm.com, michael@amarulasolutions.com, cnsztl@gmail.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, gregkh@linuxfoundation.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, jay.xu@rock-chips.com, shawn.lin@rock-chips.com, david.wu@rock-chips.com, zhangqing@rock-chips.com, huangtao@rock-chips.com, cl@rock-chips.com, wim@linux-watchdog.org, linux@roeck-us.net, jamie@jamieiles.com, linux-watchdog@vger.kernel.org Subject: [PATCH v2 7/7] arm64: dts: rockchip: add basic dts for RK3568 EVB Date: Sun, 25 Apr 2021 17:44:55 +0800 Message-Id: <20210425094455.25949-1-cl@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210425094216.25724-1-cl@rock-chips.com> References: <20210425094216.25724-1-cl@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Liang Chen This patch add rk3568-evb1-v10.dts for RK3568 evaluation board. add uart/emmc/i2c/rk809 node for basic function. Signed-off-by: Liang Chen --- .../devicetree/bindings/arm/rockchip.yaml | 5 ++ arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-evb1-v10.dts | 80 +++++++++++++++++++ 3 files changed, 86 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 4a6f772c1043..95ab9714af44 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -565,6 +565,11 @@ properties: - const: rockchip,rk3399-evb - const: rockchip,rk3399 + - description: Rockchip RK3568 Evaluation board + items: + - const: rockchip,rk3568-evb1-v10 + - const: rockchip,rk3568 + - description: Rockchip RK3399 Sapphire standalone items: - const: rockchip,rk3399-sapphire diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index c3e00c0e2db7..7fdb41de01ec 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -51,3 +51,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts new file mode 100644 index 000000000000..33a97ce03c84 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; +#include +#include +#include "rk3568.dtsi" + +/ { + model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; + compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568"; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc3v3_lcd0_n: vcc3v3-lcd0-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd0_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_lcd1_n: vcc3v3-lcd1-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd1_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + rockchip,txclk-tapnum = <0x8>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +};