From patchwork Sun Apr 25 15:57:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427270 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2995464jao; Sun, 25 Apr 2021 08:58:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwr48Km9b2h9L9/WhxpfztRDdHEvXzdMxU0MGnoln5DZmzzZxXxZZKFd/dZw86s95L0Oe7m X-Received: by 2002:a02:3f08:: with SMTP id d8mr11949492jaa.141.1619366290766; Sun, 25 Apr 2021 08:58:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619366290; cv=none; d=google.com; s=arc-20160816; b=M0Ue2nZM2bkJnGa9r2Slpm6Xc5zZRa/rhSvx2L1Mit8EfQQj1DEeBCA46fH1KxcvNS 96Aajoj5KO76GYTZT1yNRX7C6CgujdSHUUyFAGKf3A1hqw3T2FXsMpvvMnfKNLfnT+3T miZJRqaGuqvuGcqaFEqqM08HppKLIUy+qHiiHBmMJetgPqfwsUo/rubTzcyAct6Mbwfg IG5g0LbICcZ2P/eWE8rczPXtqGMaBZ8xaOOkWlGNH8r5B5ZeuI91iD3TBBXX/pCIpUYr RcvSJopIJhJNKjnwZcwDFW8tdoKQpME+Iu3TlKjoNQXlIgsQuNxxKCJ4Ei8bBHwE7m/G kMIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=m1XPgsGFLSBeMhD9gxrYKvEpAYHWWlmlzUSgBmaIZRg=; b=IbnYWr4HQ79gqgFiwejyhoVI8pBQygwvBTQaLI4cvDpBOWt1sqeO4e/6LoKoCSy0bc qwCOOzbnPYMNFfdF18lVSNfakKZTKA112MPr0VI0fhzRqBplKXHwe+OGvYMD6jMTzbm7 pVks0ZpR7QzcSy2QvB8bHryrbZ9sVlv8XmG67Niy6Ty0i8DOXsTcEEj0ZshgiyycUIM6 kh1D40akDUZWlagc2mjkg9o/sA8pWMXmfNDSUpjXEFvg3ETW4oHaHvK7iX8UuHwI6UjL PhQdI7xqS+0e67wO45ndsvJ63c+yAWerciuKjGcwC9DV5aMHFVOYbaZyyB27xnVfQ67C Py8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qguwD2Ut; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f2si12628617iow.82.2021.04.25.08.58.10 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 08:58:10 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qguwD2Ut; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46304 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lah98-0007sV-3k for patch@linaro.org; Sun, 25 Apr 2021 11:58:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48470) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8v-0007qx-Ot for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:57 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]:39505) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8q-00039o-P6 for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:57 -0400 Received: by mail-pj1-x1036.google.com with SMTP id gq23-20020a17090b1057b0290151869af68bso3743370pjb.4 for ; Sun, 25 Apr 2021 08:57:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=m1XPgsGFLSBeMhD9gxrYKvEpAYHWWlmlzUSgBmaIZRg=; b=qguwD2UtgcGxcKg8kqD3Vxq96DRc1jEMFm2hNGZRma9Vx1BARHi78swrHbA1z3GOl2 SvE5auHnnyxcLw6MhSxzbZdo8oEAYv+o0e12rfkqCDlhULp2B63PpLIxgpP8ybceTgGq dKRhf4cHN0Th5WlgoENfpgF3SZe6/FCkG4rZZFnxrp+BT52rw86RN7Dpf4bt2q6uTUYg XzjDis/rXJQFxh5tJP6DIzmWxQPBG0rzAr+GYCK+uixx2/FOxjv2V5j0OraFZlOh7FIR MFbrhlcmOrkyGzxsIRUNW5MEFPDk69C/Rg8nHQQidS8DZHKJEfJ7M8VhoiKE2lrfv7sb FSww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m1XPgsGFLSBeMhD9gxrYKvEpAYHWWlmlzUSgBmaIZRg=; b=N8DjElZu/SFDN54lKiQJO9lW0QxyHWrRl3rigex+WJbFD8w35F3tKazy3BgqRAgpQ2 e2KZiXLR4d14brxbJOGRjOp/emQGtUViUwb7PDnw3L4uHeoSRlCoKplOTj1F50dJ92eo 10Bu5AqLf4IMPFZU1PkGFke2xueidZZNDlyTUQGQVhei/+ZG08oXj6wfFD5BVLsInkZc gFrla3GR9Yq4dp0XnAt5/DrS89CGzJJcoklAgYPtPeOtAT4EJNjy1qbCepFY+xPuT6H/ HFJqmogv/oW/cF4tuR0QNJYyTxjF7jMhfKDRUGkD/9t2eKaQC6VgxNwgUVTD4/0Q8fev M6nw== X-Gm-Message-State: AOAM533j/ipGYl1z+lAZ6IeVmZ6b53xMl2KPqnE0ODylfX7S8aOMd5oI oVCx8TwxLS1eIO1o8lTH0rdYhXCaxQdRTg== X-Received: by 2002:a17:902:6946:b029:e9:4dcc:9966 with SMTP id k6-20020a1709026946b02900e94dcc9966mr13940772plt.6.1619366271420; Sun, 25 Apr 2021 08:57:51 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 1/8] linux-user: Split out target_restore_altstack Date: Sun, 25 Apr 2021 08:57:42 -0700 Message-Id: <20210425155749.896330-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to match target_save_altstack. Fix some style and unlock issues in do_sigaltstack. Signed-off-by: Richard Henderson --- linux-user/signal-common.h | 1 + linux-user/signal.c | 115 +++++++++++++++++++++---------------- 2 files changed, 66 insertions(+), 50 deletions(-) -- 2.25.1 diff --git a/linux-user/signal-common.h b/linux-user/signal-common.h index 1df1068552..34b963af9a 100644 --- a/linux-user/signal-common.h +++ b/linux-user/signal-common.h @@ -24,6 +24,7 @@ int on_sig_stack(unsigned long sp); int sas_ss_flags(unsigned long sp); abi_ulong target_sigsp(abi_ulong sp, struct target_sigaction *ka); void target_save_altstack(target_stack_t *uss, CPUArchState *env); +abi_long target_restore_altstack(target_stack_t *uss, abi_ulong sp); static inline void target_sigemptyset(target_sigset_t *set) { diff --git a/linux-user/signal.c b/linux-user/signal.c index 44a5012930..306f3edec5 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -297,6 +297,50 @@ void target_save_altstack(target_stack_t *uss, CPUArchState *env) __put_user(ts->sigaltstack_used.ss_size, &uss->ss_size); } +abi_long target_restore_altstack(target_stack_t *uss, abi_ulong sp) +{ + TaskState *ts = (TaskState *)thread_cpu->opaque; + size_t minstacksize = TARGET_MINSIGSTKSZ; + target_stack_t ss; + +#if defined(TARGET_PPC64) + /* ELF V2 for PPC64 has a 4K minimum stack size for signal handlers */ + struct image_info *image = ts->info; + if (get_ppc64_abi(image) > 1) { + minstacksize = 4096; + } +#endif + + __get_user(ss.ss_sp, &uss->ss_sp); + __get_user(ss.ss_size, &uss->ss_size); + __get_user(ss.ss_flags, &uss->ss_flags); + + if (on_sig_stack(sp)) { + return -TARGET_EPERM; + } + + switch (ss.ss_flags) { + default: + return -TARGET_EINVAL; + + case TARGET_SS_DISABLE: + ss.ss_size = 0; + ss.ss_sp = 0; + break; + + case TARGET_SS_ONSTACK: + case 0: + if (ss.ss_size < minstacksize) { + return -TARGET_ENOMEM; + } + break; + } + + ts->sigaltstack_used.ss_sp = ss.ss_sp; + ts->sigaltstack_used.ss_size = ss.ss_size; + return 0; +} + /* siginfo conversion */ static inline void host_to_target_siginfo_noswap(target_siginfo_t *tinfo, @@ -758,73 +802,44 @@ static void host_signal_handler(int host_signum, siginfo_t *info, /* compare linux/kernel/signal.c:do_sigaltstack() */ abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp) { - int ret; - struct target_sigaltstack oss; - TaskState *ts = (TaskState *)thread_cpu->opaque; + target_stack_t oss, *uoss = NULL; + abi_long ret = -TARGET_EFAULT; - /* XXX: test errors */ - if(uoss_addr) - { + if (uoss_addr) { + TaskState *ts = (TaskState *)thread_cpu->opaque; + + /* Verify writability now, but do not alter user memory yet. */ + if (!lock_user_struct(VERIFY_WRITE, uoss, uoss_addr, 0)) { + goto out; + } __put_user(ts->sigaltstack_used.ss_sp, &oss.ss_sp); __put_user(ts->sigaltstack_used.ss_size, &oss.ss_size); __put_user(sas_ss_flags(sp), &oss.ss_flags); } - if(uss_addr) - { - struct target_sigaltstack *uss; - struct target_sigaltstack ss; - size_t minstacksize = TARGET_MINSIGSTKSZ; + if (uss_addr) { + target_stack_t *uss; -#if defined(TARGET_PPC64) - /* ELF V2 for PPC64 has a 4K minimum stack size for signal handlers */ - struct image_info *image = ((TaskState *)thread_cpu->opaque)->info; - if (get_ppc64_abi(image) > 1) { - minstacksize = 4096; - } -#endif - - ret = -TARGET_EFAULT; if (!lock_user_struct(VERIFY_READ, uss, uss_addr, 1)) { goto out; } - __get_user(ss.ss_sp, &uss->ss_sp); - __get_user(ss.ss_size, &uss->ss_size); - __get_user(ss.ss_flags, &uss->ss_flags); - unlock_user_struct(uss, uss_addr, 0); - - ret = -TARGET_EPERM; - if (on_sig_stack(sp)) + ret = target_restore_altstack(uss, sp); + if (ret) { goto out; - - ret = -TARGET_EINVAL; - if (ss.ss_flags != TARGET_SS_DISABLE - && ss.ss_flags != TARGET_SS_ONSTACK - && ss.ss_flags != 0) - goto out; - - if (ss.ss_flags == TARGET_SS_DISABLE) { - ss.ss_size = 0; - ss.ss_sp = 0; - } else { - ret = -TARGET_ENOMEM; - if (ss.ss_size < minstacksize) { - goto out; - } } - - ts->sigaltstack_used.ss_sp = ss.ss_sp; - ts->sigaltstack_used.ss_size = ss.ss_size; } if (uoss_addr) { - ret = -TARGET_EFAULT; - if (copy_to_user(uoss_addr, &oss, sizeof(oss))) - goto out; + memcpy(uoss, &oss, sizeof(oss)); + unlock_user_struct(uoss, uoss_addr, 1); + uoss = NULL; } - ret = 0; -out: + + out: + if (uoss) { + unlock_user_struct(uoss, uoss_addr, 0); + } return ret; } From patchwork Sun Apr 25 15:57:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427274 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2997788jao; Sun, 25 Apr 2021 09:01:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy370/GkGBWNg53m7l6eNSNU897SZ8Yj9SzSsn1f3oR4jKr3ZcPIRbV+5tURD/fhGJq5BuM X-Received: by 2002:a05:6402:a4a:: with SMTP id bt10mr16111012edb.39.1619366512066; Sun, 25 Apr 2021 09:01:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619366512; cv=none; d=google.com; s=arc-20160816; b=nXF2OFHCjlajYjdh7uPYrOnsQ3/r+o1W7LvrGpr41wKON6lFfLW+VRijQ/vSPteQDS Vl4nxIPlUASpa2ERvAideDvo5okOjAk2Ty8CAs0q9RXz07tjK9INF8p9AhtMNrQdDC1x RzTe0/wI3Y3iaM/fdVFpOxInu37MNDjXnJM5SU7yeXGqEr9wuF7f9OerqevVTA6J5SZs 0cS4Q+knQJWfL9ojnhh90dBGyKARlRHFb6mfqJLPso7+InHO8blpj0cgnsJ8O/DXSD6P Iwg1d5Exib72hGdwTMfIKfIRUQnYNtVZ62J6+namjRySpslqC6my3YFKWHQOPFgsCZB6 0hLQ== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id rp20si10849011ejb.524.2021.04.25.09.01.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 09:01:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FTPqJv8v; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52862 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lahCg-0002Qy-VE for patch@linaro.org; Sun, 25 Apr 2021 12:01:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8x-0007s9-8m for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:59 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]:47015) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8r-0003AF-EO for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:59 -0400 Received: by mail-pg1-x52c.google.com with SMTP id 31so6562661pgn.13 for ; Sun, 25 Apr 2021 08:57:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=I/QSpFJojVKD9zlGg6U9x9sUX8bwKBgn7ApEGuKeRY8=; b=FTPqJv8vRnySxsYyn4LMKtD/S53jeay05YLnEBHoC22yoTBwZ2nrWdNpcrffT+diOo 676unh6QwP+qo9VsmxIWibZ++7tnj/no4tDWDrAjfFUL6cjSRttk5mQQ/hsW1m1Zq9Pa xmvZjddG4NE55YWyCHkDj97zmDGgy/rl6CDLchHcVVlEhLMbVCryYpaKXJNEFh0lCcjh rm1XhdiZPYaNtt8tkl7TEVW/BqT9PrSHjoyoIRnj2HSohj9r7zVgDRuc9yaZa87RGuxD hqB38WZuQz6+8PB5X2F5+Mz3WxBeV/jamto/uVbmntORpcdUNVVtuKtg+iEL+YkG2SSQ C13g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I/QSpFJojVKD9zlGg6U9x9sUX8bwKBgn7ApEGuKeRY8=; b=huAO3yX2SwoWMxi7Pz1W1kB576BBOwrkKCavL0mmldqZ5GEirEdoPGNNZUGqTLXDAd wDY58f9Dg8wy1RLHAq+6q7UAMY/lxEqU0tbwYOZf4aItmwLDoR98tPVFi11gxRoMAE9w Hetn0tSIXST+ewedSpt9wxe4oJRAj0CiI9dalRDAUBctR+jtTjAaUwobxNzFpstoCy/Z CwoslMJRljNsMaNiTLtWLn98Sls94CNZNV17BlWoMdmx0MsCUwDJyUpcKaG9dEQM4ueS +7HI/8AMY+QoIypXvy2uV8f/4MdhxYRpQkhgUiVrcwyc05hvqEiF0ireabLLl7dbqBwK 9kxw== X-Gm-Message-State: AOAM533BZnRwK+MVrowG2fkM2sYNFRAnoYovT8Wrc718F83ArVCVxeiS G5ajmuSkNYaANRDv9UGiVg3rtERNzl5r7Q== X-Received: by 2002:a62:7d07:0:b029:21b:d1bc:f6c8 with SMTP id y7-20020a627d070000b029021bd1bcf6c8mr13604322pfc.45.1619366272051; Sun, 25 Apr 2021 08:57:52 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 2/8] linux-user: Use target_restore_altstack in all sigreturn Date: Sun, 25 Apr 2021 08:57:43 -0700 Message-Id: <20210425155749.896330-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Note that target_restore_altstack uses the host memory pointer that we have already verified, so TARGET_EFAULT is not a possible return value. Note that using -EFAULT was a bug. Signed-off-by: Richard Henderson --- linux-user/aarch64/signal.c | 6 +----- linux-user/alpha/signal.c | 6 +----- linux-user/arm/signal.c | 9 ++------- linux-user/hexagon/signal.c | 6 +----- linux-user/hppa/signal.c | 8 +------- linux-user/i386/signal.c | 5 +---- linux-user/m68k/signal.c | 5 +---- linux-user/microblaze/signal.c | 6 +----- linux-user/mips/signal.c | 6 +----- linux-user/nios2/signal.c | 8 +------- linux-user/openrisc/signal.c | 5 +---- linux-user/ppc/signal.c | 4 +--- linux-user/riscv/signal.c | 6 +----- linux-user/s390x/signal.c | 6 ++---- linux-user/sh4/signal.c | 7 +------ linux-user/xtensa/signal.c | 6 +----- 16 files changed, 18 insertions(+), 81 deletions(-) -- 2.25.1 diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index b591790c22..2a1b7dbcdc 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -561,11 +561,7 @@ long do_rt_sigreturn(CPUARMState *env) goto badframe; } - if (do_sigaltstack(frame_addr + - offsetof(struct target_rt_sigframe, uc.tuc_stack), - 0, get_sp_from_cpustate(env)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/alpha/signal.c b/linux-user/alpha/signal.c index 3aa4b339a4..011da0a53b 100644 --- a/linux-user/alpha/signal.c +++ b/linux-user/alpha/signal.c @@ -257,11 +257,7 @@ long do_rt_sigreturn(CPUAlphaState *env) set_sigmask(&set); restore_sigcontext(env, &frame->uc.tuc_mcontext); - if (do_sigaltstack(frame_addr + offsetof(struct target_rt_sigframe, - uc.tuc_stack), - 0, env->ir[IR_SP]) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, env->ir[IR_SP]); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/arm/signal.c b/linux-user/arm/signal.c index f21d1535e4..b7a772302f 100644 --- a/linux-user/arm/signal.c +++ b/linux-user/arm/signal.c @@ -685,11 +685,7 @@ static int do_sigframe_return_v2(CPUARMState *env, } } - if (do_sigaltstack(context_addr - + offsetof(struct target_ucontext_v2, tuc_stack), - 0, get_sp_from_cpustate(env)) == -EFAULT) { - return 1; - } + target_restore_altstack(&uc->tuc_stack, get_sp_from_cpustate(env)); #if 0 /* Send SIGTRAP if we're single-stepping */ @@ -773,8 +769,7 @@ static long do_rt_sigreturn_v1(CPUARMState *env) goto badframe; } - if (do_sigaltstack(frame_addr + offsetof(struct rt_sigframe_v1, uc.tuc_stack), 0, get_sp_from_cpustate(env)) == -EFAULT) - goto badframe; + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); #if 0 /* Send SIGTRAP if we're single-stepping */ diff --git a/linux-user/hexagon/signal.c b/linux-user/hexagon/signal.c index fde8dc93b7..3854eb4709 100644 --- a/linux-user/hexagon/signal.c +++ b/linux-user/hexagon/signal.c @@ -260,11 +260,7 @@ long do_rt_sigreturn(CPUHexagonState *env) } restore_ucontext(env, &frame->uc); - - if (do_sigaltstack(frame_addr + offsetof(struct target_rt_sigframe, - uc.uc_stack), 0, get_sp_from_cpustate(env)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.uc_stack, get_sp_from_cpustate(env)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/hppa/signal.c b/linux-user/hppa/signal.c index d1a58feeb3..578874cf27 100644 --- a/linux-user/hppa/signal.c +++ b/linux-user/hppa/signal.c @@ -187,13 +187,7 @@ long do_rt_sigreturn(CPUArchState *env) set_sigmask(&set); restore_sigcontext(env, &frame->uc.tuc_mcontext); - unlock_user_struct(frame, frame_addr, 0); - - if (do_sigaltstack(frame_addr + offsetof(struct target_rt_sigframe, - uc.tuc_stack), - 0, env->gr[30]) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, env->gr[30]); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index 9320e1d472..3a0a1546a6 100644 --- a/linux-user/i386/signal.c +++ b/linux-user/i386/signal.c @@ -581,10 +581,7 @@ long do_rt_sigreturn(CPUX86State *env) goto badframe; } - if (do_sigaltstack(frame_addr + offsetof(struct rt_sigframe, uc.tuc_stack), 0, - get_sp_from_cpustate(env)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/m68k/signal.c b/linux-user/m68k/signal.c index 49ff87c77b..004b59fb61 100644 --- a/linux-user/m68k/signal.c +++ b/linux-user/m68k/signal.c @@ -400,10 +400,7 @@ long do_rt_sigreturn(CPUM68KState *env) if (target_rt_restore_ucontext(env, &frame->uc)) goto badframe; - if (do_sigaltstack(frame_addr + - offsetof(struct target_rt_sigframe, uc.tuc_stack), - 0, get_sp_from_cpustate(env)) == -EFAULT) - goto badframe; + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/microblaze/signal.c b/linux-user/microblaze/signal.c index cf0707b556..f59a1faf47 100644 --- a/linux-user/microblaze/signal.c +++ b/linux-user/microblaze/signal.c @@ -209,11 +209,7 @@ long do_rt_sigreturn(CPUMBState *env) restore_sigcontext(&frame->uc.tuc_mcontext, env); - if (do_sigaltstack(frame_addr + - offsetof(struct target_rt_sigframe, uc.tuc_stack), - 0, get_sp_from_cpustate(env)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/mips/signal.c b/linux-user/mips/signal.c index 455a8a229a..456fa64f41 100644 --- a/linux-user/mips/signal.c +++ b/linux-user/mips/signal.c @@ -368,11 +368,7 @@ long do_rt_sigreturn(CPUMIPSState *env) set_sigmask(&blocked); restore_sigcontext(env, &frame->rs_uc.tuc_mcontext); - - if (do_sigaltstack(frame_addr + - offsetof(struct target_rt_sigframe, rs_uc.tuc_stack), - 0, get_sp_from_cpustate(env)) == -EFAULT) - goto badframe; + target_restore_altstack(&frame->rs_uc.tuc_stack, get_sp_from_cpustate(env)); env->active_tc.PC = env->CP0_EPC; mips_set_hflags_isa_mode_from_pc(env); diff --git a/linux-user/nios2/signal.c b/linux-user/nios2/signal.c index 7d535065ed..751ea88811 100644 --- a/linux-user/nios2/signal.c +++ b/linux-user/nios2/signal.c @@ -82,9 +82,7 @@ static int rt_restore_ucontext(CPUNios2State *env, struct target_ucontext *uc, int *pr2) { int temp; - abi_ulong off, frame_addr = env->regs[R_SP]; unsigned long *gregs = uc->tuc_mcontext.gregs; - int err; /* Always make any pending restarted system calls return -EINTR */ /* current->restart_block.fn = do_no_restart_syscall; */ @@ -130,11 +128,7 @@ static int rt_restore_ucontext(CPUNios2State *env, struct target_ucontext *uc, __get_user(env->regs[R_RA], &gregs[23]); __get_user(env->regs[R_SP], &gregs[28]); - off = offsetof(struct target_rt_sigframe, uc.tuc_stack); - err = do_sigaltstack(frame_addr + off, 0, get_sp_from_cpustate(env)); - if (err == -EFAULT) { - return 1; - } + target_restore_altstack(&uc->tuc_stack, get_sp_from_cpustate(env)); *pr2 = env->regs[2]; return 0; diff --git a/linux-user/openrisc/signal.c b/linux-user/openrisc/signal.c index 232ad82b98..86f94d7f76 100644 --- a/linux-user/openrisc/signal.c +++ b/linux-user/openrisc/signal.c @@ -158,10 +158,7 @@ long do_rt_sigreturn(CPUOpenRISCState *env) set_sigmask(&set); restore_sigcontext(env, &frame->uc.tuc_mcontext); - if (do_sigaltstack(frame_addr + offsetof(target_rt_sigframe, uc.tuc_stack), - 0, frame_addr) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, frame_addr); unlock_user_struct(frame, frame_addr, 0); return cpu_get_gpr(env, 11); diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c index b78613f7c8..79f265f82e 100644 --- a/linux-user/ppc/signal.c +++ b/linux-user/ppc/signal.c @@ -656,9 +656,7 @@ long do_rt_sigreturn(CPUPPCState *env) if (do_setcontext(&rt_sf->uc, env, 1)) goto sigsegv; - do_sigaltstack(rt_sf_addr - + offsetof(struct target_rt_sigframe, uc.tuc_stack), - 0, env->gpr[1]); + target_restore_altstack(&rt_sf->uc.tuc_stack, env->gpr[1]); unlock_user_struct(rt_sf, rt_sf_addr, 1); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/riscv/signal.c b/linux-user/riscv/signal.c index 67a95dbc7b..81d1129da3 100644 --- a/linux-user/riscv/signal.c +++ b/linux-user/riscv/signal.c @@ -192,11 +192,7 @@ long do_rt_sigreturn(CPURISCVState *env) } restore_ucontext(env, &frame->uc); - - if (do_sigaltstack(frame_addr + offsetof(struct target_rt_sigframe, - uc.uc_stack), 0, get_sp_from_cpustate(env)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.uc_stack, get_sp_from_cpustate(env)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/s390x/signal.c b/linux-user/s390x/signal.c index 7107c5fb53..73806f5472 100644 --- a/linux-user/s390x/signal.c +++ b/linux-user/s390x/signal.c @@ -307,10 +307,8 @@ long do_rt_sigreturn(CPUS390XState *env) goto badframe; } - if (do_sigaltstack(frame_addr + offsetof(rt_sigframe, uc.tuc_stack), 0, - get_sp_from_cpustate(env)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/sh4/signal.c b/linux-user/sh4/signal.c index 29c1ee30e6..684f18da58 100644 --- a/linux-user/sh4/signal.c +++ b/linux-user/sh4/signal.c @@ -323,12 +323,7 @@ long do_rt_sigreturn(CPUSH4State *regs) set_sigmask(&blocked); restore_sigcontext(regs, &frame->uc.tuc_mcontext); - - if (do_sigaltstack(frame_addr + - offsetof(struct target_rt_sigframe, uc.tuc_stack), - 0, get_sp_from_cpustate(regs)) == -EFAULT) { - goto badframe; - } + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(regs)); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/xtensa/signal.c b/linux-user/xtensa/signal.c index 590f0313ff..22ec6cdeb9 100644 --- a/linux-user/xtensa/signal.c +++ b/linux-user/xtensa/signal.c @@ -253,12 +253,8 @@ long do_rt_sigreturn(CPUXtensaState *env) set_sigmask(&set); restore_sigcontext(env, frame); + target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); - if (do_sigaltstack(frame_addr + - offsetof(struct target_rt_sigframe, uc.tuc_stack), - 0, get_sp_from_cpustate(env)) == -TARGET_EFAULT) { - goto badframe; - } unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; From patchwork Sun Apr 25 15:57:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427271 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2995475jao; 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[209.51.188.17]) by mx.google.com with ESMTPS id g5si13845238ild.106.2021.04.25.08.58.11 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 08:58:11 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jPPreAgj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46328 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lah99-0007td-0x for patch@linaro.org; Sun, 25 Apr 2021 11:58:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48504) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8w-0007re-LO for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:58 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]:46666) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8r-0003AM-UP for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:58 -0400 Received: by mail-pl1-x634.google.com with SMTP id s20so11791073plr.13 for ; Sun, 25 Apr 2021 08:57:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=IgvkexELK5GJ0O4GQCm7etvF50WdinqYZI5Hh6LxDP8=; b=jPPreAgjHdgMos9T0ha5KnqW+/CZp2iVeATt9rtPLncqW1SEb6p9v7zD4rj1H46cgW LvRKAAOAEDB8lgDPS/sJPCDT43P8PvZ5AoIn/WmuM3a+gJvpOfNLW4U/vQr0taqD2b1c BOXkLkwqXkDRjB0ZcQ5nA+JvTHc9z77CSAoTZctOd/UCk1X2ZufpDY9n9bkmr8mK4ph1 JvddAcxhNavI16/nQhQAq32SbNsDUXoMq39P2sNt/Ka1swOjKqrH5xxCBZ8iGH5xSVC4 7guDA9kA2USLbANDfRZOp8kg7FBMY9ec0Rr/jZ3kvOT4uyekILghcT9eNeYQdB3TMO9C KnIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IgvkexELK5GJ0O4GQCm7etvF50WdinqYZI5Hh6LxDP8=; b=T+zjpkJ067AfOvyg2hptyZ482/OAZQvN8lV8WJEJKLDdFoDMLu5xa+cvwvslDr8C6i QVIo0BrBsj1+LojsHzMHz3hSXH1I6KK84jPfrfmr/YmCdgG7mxwzjcTKPe3krp5z7xkZ Yb7oTUDyOGsKOFY+cJ+c2PAX9IWlcKwDiDd5+g7odiwTJdkfpNCCPw5HkDVlI2yPXJNA v4Aoi7z563RSvLFHTF+s/sWIaS8QRvr/C7nBRe89U1gy18FOWGHjrhLEv4u8p4FppaQ6 8d/CLvo4X7QLO7GxBSXLllsapNo8/cz3Z9kBvvqH4Ynj2hDdf2JSsv/rDe1XKFvFa101 WfCw== X-Gm-Message-State: AOAM533CBxOhzg62cWQkTBouhCzjJ06kAbc/W/itH/n5/eDWyKJdnPJQ M+7l7bGw5LgLBqxyVlGRtJk4/x1iF1xAAg== X-Received: by 2002:a17:90b:88d:: with SMTP id bj13mr9555545pjb.192.1619366272598; Sun, 25 Apr 2021 08:57:52 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 3/8] linux-user: Pass CPUArchState to do_sigaltstack Date: Sun, 25 Apr 2021 08:57:44 -0700 Message-Id: <20210425155749.896330-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that we have exactly one call, it's easy to pass in env instead of passing in the sp value. Use target_save_altstack, which required env. Signed-off-by: Richard Henderson --- linux-user/qemu.h | 3 ++- linux-user/signal.c | 11 ++++------- linux-user/syscall.c | 3 +-- 3 files changed, 7 insertions(+), 10 deletions(-) -- 2.25.1 diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 74e06e7121..3b0b6b75fe 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -432,7 +432,8 @@ int target_to_host_signal(int sig); int host_to_target_signal(int sig); long do_sigreturn(CPUArchState *env); long do_rt_sigreturn(CPUArchState *env); -abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp); +abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, + CPUArchState *env); int do_sigprocmask(int how, const sigset_t *set, sigset_t *oldset); abi_long do_swapcontext(CPUArchState *env, abi_ulong uold_ctx, abi_ulong unew_ctx, abi_long ctx_size); diff --git a/linux-user/signal.c b/linux-user/signal.c index 306f3edec5..83891f7c47 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -800,21 +800,18 @@ static void host_signal_handler(int host_signum, siginfo_t *info, /* do_sigaltstack() returns target values and errnos. */ /* compare linux/kernel/signal.c:do_sigaltstack() */ -abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp) +abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, + CPUArchState *env) { target_stack_t oss, *uoss = NULL; abi_long ret = -TARGET_EFAULT; if (uoss_addr) { - TaskState *ts = (TaskState *)thread_cpu->opaque; - /* Verify writability now, but do not alter user memory yet. */ if (!lock_user_struct(VERIFY_WRITE, uoss, uoss_addr, 0)) { goto out; } - __put_user(ts->sigaltstack_used.ss_sp, &oss.ss_sp); - __put_user(ts->sigaltstack_used.ss_size, &oss.ss_size); - __put_user(sas_ss_flags(sp), &oss.ss_flags); + target_save_altstack(&oss, env); } if (uss_addr) { @@ -823,7 +820,7 @@ abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp) if (!lock_user_struct(VERIFY_READ, uss, uss_addr, 1)) { goto out; } - ret = target_restore_altstack(uss, sp); + ret = target_restore_altstack(uss, get_sp_from_cpustate(env)); if (ret) { goto out; } diff --git a/linux-user/syscall.c b/linux-user/syscall.c index c7c3257f40..32a41c1387 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -11140,8 +11140,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, return ret; } case TARGET_NR_sigaltstack: - return do_sigaltstack(arg1, arg2, - get_sp_from_cpustate((CPUArchState *)cpu_env)); + return do_sigaltstack(arg1, arg2, cpu_env); #ifdef CONFIG_SENDFILE #ifdef TARGET_NR_sendfile From patchwork Sun Apr 25 15:57:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427278 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp3001827jao; Sun, 25 Apr 2021 09:07:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyriHZwR6VYN1tsrDVpUOQK4jomvGlQJRJ+xi9DwcRYlFA3EVSsDuSSgaGgDtuZJ7HyZYpC X-Received: by 2002:ab0:4e16:: with SMTP id g22mr9794551uah.40.1619366845746; Sun, 25 Apr 2021 09:07:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619366845; cv=none; d=google.com; s=arc-20160816; b=MPktJQ1Gy/IuhQ/huB5jHqANkkhDNq4DqAsGW636z1Ubmqr+oD6sBK9IO9+RsQxcoS EC3vABKfpKqkonr74KOctV9aY5QTS6azysz9rU3/wXsh78PTUnZ5XO4n4B1pi4jJ/VSJ K/Q0fR94vLkA31MyGnrft0UvrmyQHRL/9mndlCTTBzjLIVuiSNWouWFiG1QQZRZk5bYQ 7rIB/0YASNoAajRzsNvbg5M318QSA/dSOGBhK2LkVe/ChfyGDf0n7woMLJDbfxpkbpBT lZMmM5CBVAt7J0pJSo+VqLVZv9yEIl2d4Zdy9Xmt75Sm0Ayt9SNCYweY0uLOz6Y4I0o3 FwBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=/U/fXqVt3lh/pIHwlJV9yBNaNzKgC/XqrDdH1ymUOvA=; b=lUlNwA2VjmPrazQfX8xDlkX5jwsTuCkI5DdmFHRZ4U9/Ytjqym7SvCFn2Auo05f4XY TcVtEgRpKStDrQQc6Uuvl21Ro5zZv2V9LlhB6WEgrQr1bvgkDG4sYb0DJ6rpZzVYPY0l Od8lesLVek5ok6tHe2QW8uzKlPyRcfsCkg2J36EdGoKkSqLlBZ7HchbzjseYRsH3goM2 hyfEUI9P3fZY8VdNh5D3Uzk0WTFA+q+DbF/1NcBcJdO3yvju/FE3IGTo5Xw8EBLBeGYM yFRzGZ0wwd96wsUfy8lJZEK9YsqJRVKUGQmaQ9ddamszXCl0joXhi6zI8lKwM2dBjV+D wcLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x3DpYWSF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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In other cases, we were passing a local variable which already contained the same value. In the rest of the cases, we were passing the stack pointer out of env directly. Signed-off-by: Richard Henderson --- linux-user/signal-common.h | 2 +- linux-user/aarch64/signal.c | 2 +- linux-user/alpha/signal.c | 2 +- linux-user/arm/signal.c | 4 ++-- linux-user/hexagon/signal.c | 2 +- linux-user/hppa/signal.c | 2 +- linux-user/i386/signal.c | 2 +- linux-user/m68k/signal.c | 2 +- linux-user/microblaze/signal.c | 2 +- linux-user/mips/signal.c | 2 +- linux-user/nios2/signal.c | 2 +- linux-user/openrisc/signal.c | 2 +- linux-user/ppc/signal.c | 2 +- linux-user/riscv/signal.c | 2 +- linux-user/s390x/signal.c | 2 +- linux-user/sh4/signal.c | 2 +- linux-user/signal.c | 6 +++--- linux-user/xtensa/signal.c | 2 +- 18 files changed, 21 insertions(+), 21 deletions(-) -- 2.25.1 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/linux-user/signal-common.h b/linux-user/signal-common.h index 34b963af9a..ea86328b28 100644 --- a/linux-user/signal-common.h +++ b/linux-user/signal-common.h @@ -24,7 +24,7 @@ int on_sig_stack(unsigned long sp); int sas_ss_flags(unsigned long sp); abi_ulong target_sigsp(abi_ulong sp, struct target_sigaction *ka); void target_save_altstack(target_stack_t *uss, CPUArchState *env); -abi_long target_restore_altstack(target_stack_t *uss, abi_ulong sp); +abi_long target_restore_altstack(target_stack_t *uss, CPUArchState *env); static inline void target_sigemptyset(target_sigset_t *set) { diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index 2a1b7dbcdc..662bcd1c4e 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -561,7 +561,7 @@ long do_rt_sigreturn(CPUARMState *env) goto badframe; } - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/alpha/signal.c b/linux-user/alpha/signal.c index 011da0a53b..1129ffeea1 100644 --- a/linux-user/alpha/signal.c +++ b/linux-user/alpha/signal.c @@ -257,7 +257,7 @@ long do_rt_sigreturn(CPUAlphaState *env) set_sigmask(&set); restore_sigcontext(env, &frame->uc.tuc_mcontext); - target_restore_altstack(&frame->uc.tuc_stack, env->ir[IR_SP]); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/arm/signal.c b/linux-user/arm/signal.c index b7a772302f..32b68ee302 100644 --- a/linux-user/arm/signal.c +++ b/linux-user/arm/signal.c @@ -685,7 +685,7 @@ static int do_sigframe_return_v2(CPUARMState *env, } } - target_restore_altstack(&uc->tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&uc->tuc_stack, env); #if 0 /* Send SIGTRAP if we're single-stepping */ @@ -769,7 +769,7 @@ static long do_rt_sigreturn_v1(CPUARMState *env) goto badframe; } - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); #if 0 /* Send SIGTRAP if we're single-stepping */ diff --git a/linux-user/hexagon/signal.c b/linux-user/hexagon/signal.c index 3854eb4709..85eab5e943 100644 --- a/linux-user/hexagon/signal.c +++ b/linux-user/hexagon/signal.c @@ -260,7 +260,7 @@ long do_rt_sigreturn(CPUHexagonState *env) } restore_ucontext(env, &frame->uc); - target_restore_altstack(&frame->uc.uc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.uc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/hppa/signal.c b/linux-user/hppa/signal.c index 578874cf27..0e266f472d 100644 --- a/linux-user/hppa/signal.c +++ b/linux-user/hppa/signal.c @@ -187,7 +187,7 @@ long do_rt_sigreturn(CPUArchState *env) set_sigmask(&set); restore_sigcontext(env, &frame->uc.tuc_mcontext); - target_restore_altstack(&frame->uc.tuc_stack, env->gr[30]); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index 3a0a1546a6..8701774e37 100644 --- a/linux-user/i386/signal.c +++ b/linux-user/i386/signal.c @@ -581,7 +581,7 @@ long do_rt_sigreturn(CPUX86State *env) goto badframe; } - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/m68k/signal.c b/linux-user/m68k/signal.c index 004b59fb61..d06230655e 100644 --- a/linux-user/m68k/signal.c +++ b/linux-user/m68k/signal.c @@ -400,7 +400,7 @@ long do_rt_sigreturn(CPUM68KState *env) if (target_rt_restore_ucontext(env, &frame->uc)) goto badframe; - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/microblaze/signal.c b/linux-user/microblaze/signal.c index f59a1faf47..4c483bd8c6 100644 --- a/linux-user/microblaze/signal.c +++ b/linux-user/microblaze/signal.c @@ -209,7 +209,7 @@ long do_rt_sigreturn(CPUMBState *env) restore_sigcontext(&frame->uc.tuc_mcontext, env); - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/mips/signal.c b/linux-user/mips/signal.c index 456fa64f41..e6be807a81 100644 --- a/linux-user/mips/signal.c +++ b/linux-user/mips/signal.c @@ -368,7 +368,7 @@ long do_rt_sigreturn(CPUMIPSState *env) set_sigmask(&blocked); restore_sigcontext(env, &frame->rs_uc.tuc_mcontext); - target_restore_altstack(&frame->rs_uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->rs_uc.tuc_stack, env); env->active_tc.PC = env->CP0_EPC; mips_set_hflags_isa_mode_from_pc(env); diff --git a/linux-user/nios2/signal.c b/linux-user/nios2/signal.c index 751ea88811..cc3872f11d 100644 --- a/linux-user/nios2/signal.c +++ b/linux-user/nios2/signal.c @@ -128,7 +128,7 @@ static int rt_restore_ucontext(CPUNios2State *env, struct target_ucontext *uc, __get_user(env->regs[R_RA], &gregs[23]); __get_user(env->regs[R_SP], &gregs[28]); - target_restore_altstack(&uc->tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&uc->tuc_stack, env); *pr2 = env->regs[2]; return 0; diff --git a/linux-user/openrisc/signal.c b/linux-user/openrisc/signal.c index 86f94d7f76..5c5640a284 100644 --- a/linux-user/openrisc/signal.c +++ b/linux-user/openrisc/signal.c @@ -158,7 +158,7 @@ long do_rt_sigreturn(CPUOpenRISCState *env) set_sigmask(&set); restore_sigcontext(env, &frame->uc.tuc_mcontext); - target_restore_altstack(&frame->uc.tuc_stack, frame_addr); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return cpu_get_gpr(env, 11); diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c index 79f265f82e..8e1e642807 100644 --- a/linux-user/ppc/signal.c +++ b/linux-user/ppc/signal.c @@ -656,7 +656,7 @@ long do_rt_sigreturn(CPUPPCState *env) if (do_setcontext(&rt_sf->uc, env, 1)) goto sigsegv; - target_restore_altstack(&rt_sf->uc.tuc_stack, env->gpr[1]); + target_restore_altstack(&rt_sf->uc.tuc_stack, env); unlock_user_struct(rt_sf, rt_sf_addr, 1); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/riscv/signal.c b/linux-user/riscv/signal.c index 81d1129da3..9405c7fd9a 100644 --- a/linux-user/riscv/signal.c +++ b/linux-user/riscv/signal.c @@ -192,7 +192,7 @@ long do_rt_sigreturn(CPURISCVState *env) } restore_ucontext(env, &frame->uc); - target_restore_altstack(&frame->uc.uc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.uc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/s390x/signal.c b/linux-user/s390x/signal.c index 73806f5472..b68b44ae7e 100644 --- a/linux-user/s390x/signal.c +++ b/linux-user/s390x/signal.c @@ -307,7 +307,7 @@ long do_rt_sigreturn(CPUS390XState *env) goto badframe; } - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/sh4/signal.c b/linux-user/sh4/signal.c index 684f18da58..0451e65806 100644 --- a/linux-user/sh4/signal.c +++ b/linux-user/sh4/signal.c @@ -323,7 +323,7 @@ long do_rt_sigreturn(CPUSH4State *regs) set_sigmask(&blocked); restore_sigcontext(regs, &frame->uc.tuc_mcontext); - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(regs)); + target_restore_altstack(&frame->uc.tuc_stack, regs); unlock_user_struct(frame, frame_addr, 0); return -TARGET_QEMU_ESIGRETURN; diff --git a/linux-user/signal.c b/linux-user/signal.c index 83891f7c47..9016896dcd 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -297,7 +297,7 @@ void target_save_altstack(target_stack_t *uss, CPUArchState *env) __put_user(ts->sigaltstack_used.ss_size, &uss->ss_size); } -abi_long target_restore_altstack(target_stack_t *uss, abi_ulong sp) +abi_long target_restore_altstack(target_stack_t *uss, CPUArchState *env) { TaskState *ts = (TaskState *)thread_cpu->opaque; size_t minstacksize = TARGET_MINSIGSTKSZ; @@ -315,7 +315,7 @@ abi_long target_restore_altstack(target_stack_t *uss, abi_ulong sp) __get_user(ss.ss_size, &uss->ss_size); __get_user(ss.ss_flags, &uss->ss_flags); - if (on_sig_stack(sp)) { + if (on_sig_stack(get_sp_from_cpustate(env))) { return -TARGET_EPERM; } @@ -820,7 +820,7 @@ abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, if (!lock_user_struct(VERIFY_READ, uss, uss_addr, 1)) { goto out; } - ret = target_restore_altstack(uss, get_sp_from_cpustate(env)); + ret = target_restore_altstack(uss, env); if (ret) { goto out; } diff --git a/linux-user/xtensa/signal.c b/linux-user/xtensa/signal.c index 22ec6cdeb9..72771e1294 100644 --- a/linux-user/xtensa/signal.c +++ b/linux-user/xtensa/signal.c @@ -253,7 +253,7 @@ long do_rt_sigreturn(CPUXtensaState *env) set_sigmask(&set); restore_sigcontext(env, frame); - target_restore_altstack(&frame->uc.tuc_stack, get_sp_from_cpustate(env)); + target_restore_altstack(&frame->uc.tuc_stack, env); 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[209.51.188.17]) by mx.google.com with ESMTPS id j21si10839670ejx.157.2021.04.25.09.03.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 09:03:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z+pcVd8X; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:55324 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lahEI-0003cj-9O for patch@linaro.org; Sun, 25 Apr 2021 12:03:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48568) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8y-0007up-J3 for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:58:00 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]:33572) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8t-0003Bn-Hj for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:58:00 -0400 Received: by mail-pj1-x1031.google.com with SMTP id kb13-20020a17090ae7cdb02901503d67f0beso6545817pjb.0 for ; Sun, 25 Apr 2021 08:57:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=mKuRfL1+RzVTvK6FRkv9AXoAH3HIKU24PAMWq7TOkX8=; b=Z+pcVd8XOPhkFaDZSISJhRCYYvuOlZRAio5PQkuX1TtqMIHYs8o2FD0RKpQc3JIYZy k23NoqJLbdnuAI6PjvPW3VdzwW/wub4x0zoFU3dUN3l9mBeMN+OovUOV2v12qJvggjlI d50WgqTthkDKyL3wCgBgoZ+2iCBSKuEimXn8Vb2MF6/7rbbUl4ZYzOkKoNCHInOHBMFy CjIjQlsQudqcKzBv3yt+oK+ym9i8152Z/C3yz7dTiM+CxN6nkKdcGarBUOmLj9VInoMH ohtObDuvapk5XRvyQt0kSmrglUtvF+fcRDaAO9Yw3LyIjIRk19zpNknLdn5cFg2fILPI 6FbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mKuRfL1+RzVTvK6FRkv9AXoAH3HIKU24PAMWq7TOkX8=; b=NH2uwNmNSoYoWx6QeQzX3ilDgpb3ZWx6vXW2k1itTm9/7rnvnUjZyzTG8QApfsqjLO MqSlUUdISaekCw3pLwlPmS9lKQFFcF+qWkrRoWjEi42bkl3Asx3Tp/wgGca6kQ85ubki jZI4NiBmUgCoPiyqiG8wSKUO8aAiAre0CLw+sknIqoqNDN8QqaeUN9XM8I2q951jg8tZ ITn0l0l2uEFJyqExGH3LBoXix0d3VVw2/k6ApcOrpTGdgV21GdNbJ6J5YGRuULrvXnNO 8BGyHPMVpytq/51ftHfV2fKfno5Zlnd/IFWGf6ycG5UrKhPuXQEoQYfrtHa1rjT742rq hMFg== X-Gm-Message-State: AOAM532BUr35jMDMdZHztZebLvJgiA1QkO4bZ1sjEEUQyvz7ZL4bkfLq Mh0RJYOEYHb2n16KIwlfG4eIQ2mWG6zGxQ== X-Received: by 2002:a17:90b:2394:: with SMTP id mr20mr7283866pjb.167.1619366273921; Sun, 25 Apr 2021 08:57:53 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 5/8] linux-user/sparc64: Move sparc64 code out of sparc32 signal.c Date: Sun, 25 Apr 2021 08:57:46 -0700 Message-Id: <20210425155749.896330-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The bulk of the code goes to sparc64/signal.c, with TARGET_SPARC_BIAS going to target_cpu.h, as we will shortly need this define beyond signal.c. Signed-off-by: Richard Henderson --- linux-user/sparc/target_cpu.h | 6 + linux-user/sparc/signal.c | 280 ---------------------------------- linux-user/sparc64/signal.c | 278 +++++++++++++++++++++++++++++++++ 3 files changed, 284 insertions(+), 280 deletions(-) -- 2.25.1 Reviewed-by: Warner Losh Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 1fa1011775..37f6a1d62b 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -20,6 +20,12 @@ #ifndef SPARC_TARGET_CPU_H #define SPARC_TARGET_CPU_H +#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) +# define TARGET_STACK_BIAS 2047 +#else +# define TARGET_STACK_BIAS 0 +#endif + static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, unsigned flags) { diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index d27b7a3af7..756d983af2 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -322,283 +322,3 @@ long do_rt_sigreturn(CPUSPARCState *env) qemu_log_mask(LOG_UNIMP, "do_rt_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } - -#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) -#define SPARC_MC_TSTATE 0 -#define SPARC_MC_PC 1 -#define SPARC_MC_NPC 2 -#define SPARC_MC_Y 3 -#define SPARC_MC_G1 4 -#define SPARC_MC_G2 5 -#define SPARC_MC_G3 6 -#define SPARC_MC_G4 7 -#define SPARC_MC_G5 8 -#define SPARC_MC_G6 9 -#define SPARC_MC_G7 10 -#define SPARC_MC_O0 11 -#define SPARC_MC_O1 12 -#define SPARC_MC_O2 13 -#define SPARC_MC_O3 14 -#define SPARC_MC_O4 15 -#define SPARC_MC_O5 16 -#define SPARC_MC_O6 17 -#define SPARC_MC_O7 18 -#define SPARC_MC_NGREG 19 - -typedef abi_ulong target_mc_greg_t; -typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG]; - -struct target_mc_fq { - abi_ulong mcfq_addr; - uint32_t mcfq_insn; -}; - -/* - * Note the manual 16-alignment; the kernel gets this because it - * includes a "long double qregs[16]" in the mcpu_fregs union, - * which we can't do. - */ -struct target_mc_fpu { - union { - uint32_t sregs[32]; - uint64_t dregs[32]; - //uint128_t qregs[16]; - } mcfpu_fregs; - abi_ulong mcfpu_fsr; - abi_ulong mcfpu_fprs; - abi_ulong mcfpu_gsr; - abi_ulong mcfpu_fq; - unsigned char mcfpu_qcnt; - unsigned char mcfpu_qentsz; - unsigned char mcfpu_enab; -} __attribute__((aligned(16))); -typedef struct target_mc_fpu target_mc_fpu_t; - -typedef struct { - target_mc_gregset_t mc_gregs; - target_mc_greg_t mc_fp; - target_mc_greg_t mc_i7; - target_mc_fpu_t mc_fpregs; -} target_mcontext_t; - -struct target_ucontext { - abi_ulong tuc_link; - abi_ulong tuc_flags; - target_sigset_t tuc_sigmask; - target_mcontext_t tuc_mcontext; -}; - -/* A V9 register window */ -struct target_reg_window { - abi_ulong locals[8]; - abi_ulong ins[8]; -}; - -#define TARGET_STACK_BIAS 2047 - -/* {set, get}context() needed for 64-bit SparcLinux userland. */ -void sparc64_set_context(CPUSPARCState *env) -{ - abi_ulong ucp_addr; - struct target_ucontext *ucp; - target_mc_gregset_t *grp; - target_mc_fpu_t *fpup; - abi_ulong pc, npc, tstate; - unsigned int i; - unsigned char fenab; - - ucp_addr = env->regwptr[WREG_O0]; - if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { - goto do_sigsegv; - } - grp = &ucp->tuc_mcontext.mc_gregs; - __get_user(pc, &((*grp)[SPARC_MC_PC])); - __get_user(npc, &((*grp)[SPARC_MC_NPC])); - if ((pc | npc) & 3) { - goto do_sigsegv; - } - if (env->regwptr[WREG_O1]) { - target_sigset_t target_set; - sigset_t set; - - if (TARGET_NSIG_WORDS == 1) { - __get_user(target_set.sig[0], &ucp->tuc_sigmask.sig[0]); - } else { - abi_ulong *src, *dst; - src = ucp->tuc_sigmask.sig; - dst = target_set.sig; - for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { - __get_user(*dst, src); - } - } - target_to_host_sigset_internal(&set, &target_set); - set_sigmask(&set); - } - env->pc = pc; - env->npc = npc; - __get_user(env->y, &((*grp)[SPARC_MC_Y])); - __get_user(tstate, &((*grp)[SPARC_MC_TSTATE])); - /* Honour TSTATE_ASI, TSTATE_ICC and TSTATE_XCC only */ - env->asi = (tstate >> 24) & 0xff; - cpu_put_ccr(env, (tstate >> 32) & 0xff); - __get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1])); - __get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2])); - __get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3])); - __get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4])); - __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); - __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); - /* Skip g7 as that's the thread register in userspace */ - - /* - * Note that unlike the kernel, we didn't need to mess with the - * guest register window state to save it into a pt_regs to run - * the kernel. So for us the guest's O regs are still in WREG_O* - * (unlike the kernel which has put them in UREG_I* in a pt_regs) - * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't - * need to be written back to userspace memory. - */ - __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); - __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); - __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); - __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); - __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); - __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); - __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); - __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); - - __get_user(env->regwptr[WREG_FP], &(ucp->tuc_mcontext.mc_fp)); - __get_user(env->regwptr[WREG_I7], &(ucp->tuc_mcontext.mc_i7)); - - fpup = &ucp->tuc_mcontext.mc_fpregs; - - __get_user(fenab, &(fpup->mcfpu_enab)); - if (fenab) { - abi_ulong fprs; - - /* - * We use the FPRS from the guest only in deciding whether - * to restore the upper, lower, or both banks of the FPU regs. - * The kernel here writes the FPU register data into the - * process's current_thread_info state and unconditionally - * clears FPRS and TSTATE_PEF: this disables the FPU so that the - * next FPU-disabled trap will copy the data out of - * current_thread_info and into the real FPU registers. - * QEMU doesn't need to handle lazy-FPU-state-restoring like that, - * so we always load the data directly into the FPU registers - * and leave FPRS and TSTATE_PEF alone (so the FPU stays enabled). - * Note that because we (and the kernel) always write zeroes for - * the fenab and fprs in sparc64_get_context() none of this code - * will execute unless the guest manually constructed or changed - * the context structure. - */ - __get_user(fprs, &(fpup->mcfpu_fprs)); - if (fprs & FPRS_DL) { - for (i = 0; i < 16; i++) { - __get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i])); - } - } - if (fprs & FPRS_DU) { - for (i = 16; i < 32; i++) { - __get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i])); - } - } - __get_user(env->fsr, &(fpup->mcfpu_fsr)); - __get_user(env->gsr, &(fpup->mcfpu_gsr)); - } - unlock_user_struct(ucp, ucp_addr, 0); - return; -do_sigsegv: - unlock_user_struct(ucp, ucp_addr, 0); - force_sig(TARGET_SIGSEGV); -} - -void sparc64_get_context(CPUSPARCState *env) -{ - abi_ulong ucp_addr; - struct target_ucontext *ucp; - target_mc_gregset_t *grp; - target_mcontext_t *mcp; - int err; - unsigned int i; - target_sigset_t target_set; - sigset_t set; - - ucp_addr = env->regwptr[WREG_O0]; - if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { - goto do_sigsegv; - } - - memset(ucp, 0, sizeof(*ucp)); - - mcp = &ucp->tuc_mcontext; - grp = &mcp->mc_gregs; - - /* Skip over the trap instruction, first. */ - env->pc = env->npc; - env->npc += 4; - - /* If we're only reading the signal mask then do_sigprocmask() - * is guaranteed not to fail, which is important because we don't - * have any way to signal a failure or restart this operation since - * this is not a normal syscall. - */ - err = do_sigprocmask(0, NULL, &set); - assert(err == 0); - host_to_target_sigset_internal(&target_set, &set); - if (TARGET_NSIG_WORDS == 1) { - __put_user(target_set.sig[0], - (abi_ulong *)&ucp->tuc_sigmask); - } else { - abi_ulong *src, *dst; - src = target_set.sig; - dst = ucp->tuc_sigmask.sig; - for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { - __put_user(*src, dst); - } - } - - __put_user(sparc64_tstate(env), &((*grp)[SPARC_MC_TSTATE])); - __put_user(env->pc, &((*grp)[SPARC_MC_PC])); - __put_user(env->npc, &((*grp)[SPARC_MC_NPC])); - __put_user(env->y, &((*grp)[SPARC_MC_Y])); - __put_user(env->gregs[1], &((*grp)[SPARC_MC_G1])); - __put_user(env->gregs[2], &((*grp)[SPARC_MC_G2])); - __put_user(env->gregs[3], &((*grp)[SPARC_MC_G3])); - __put_user(env->gregs[4], &((*grp)[SPARC_MC_G4])); - __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); - __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); - __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); - - /* - * Note that unlike the kernel, we didn't need to mess with the - * guest register window state to save it into a pt_regs to run - * the kernel. So for us the guest's O regs are still in WREG_O* - * (unlike the kernel which has put them in UREG_I* in a pt_regs) - * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't - * need to be fished out of userspace memory. - */ - __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); - __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); - __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); - __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); - __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); - __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); - __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); - __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); - - __put_user(env->regwptr[WREG_FP], &(mcp->mc_fp)); - __put_user(env->regwptr[WREG_I7], &(mcp->mc_i7)); - - /* - * We don't write out the FPU state. This matches the kernel's - * implementation (which has the code for doing this but - * hidden behind an "if (fenab)" where fenab is always 0). - */ - - unlock_user_struct(ucp, ucp_addr, 1); - return; -do_sigsegv: - unlock_user_struct(ucp, ucp_addr, 1); - force_sig(TARGET_SIGSEGV); -} -#endif diff --git a/linux-user/sparc64/signal.c b/linux-user/sparc64/signal.c index 170ebac232..d27e049c2a 100644 --- a/linux-user/sparc64/signal.c +++ b/linux-user/sparc64/signal.c @@ -16,4 +16,282 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, see . */ + #include "../sparc/signal.c" + +#define SPARC_MC_TSTATE 0 +#define SPARC_MC_PC 1 +#define SPARC_MC_NPC 2 +#define SPARC_MC_Y 3 +#define SPARC_MC_G1 4 +#define SPARC_MC_G2 5 +#define SPARC_MC_G3 6 +#define SPARC_MC_G4 7 +#define SPARC_MC_G5 8 +#define SPARC_MC_G6 9 +#define SPARC_MC_G7 10 +#define SPARC_MC_O0 11 +#define SPARC_MC_O1 12 +#define SPARC_MC_O2 13 +#define SPARC_MC_O3 14 +#define SPARC_MC_O4 15 +#define SPARC_MC_O5 16 +#define SPARC_MC_O6 17 +#define SPARC_MC_O7 18 +#define SPARC_MC_NGREG 19 + +typedef abi_ulong target_mc_greg_t; +typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG]; + +struct target_mc_fq { + abi_ulong mcfq_addr; + uint32_t mcfq_insn; +}; + +/* + * Note the manual 16-alignment; the kernel gets this because it + * includes a "long double qregs[16]" in the mcpu_fregs union, + * which we can't do. + */ +struct target_mc_fpu { + union { + uint32_t sregs[32]; + uint64_t dregs[32]; + } mcfpu_fregs; + abi_ulong mcfpu_fsr; + abi_ulong mcfpu_fprs; + abi_ulong mcfpu_gsr; + abi_ulong mcfpu_fq; + unsigned char mcfpu_qcnt; + unsigned char mcfpu_qentsz; + unsigned char mcfpu_enab; +} __attribute__((aligned(16))); +typedef struct target_mc_fpu target_mc_fpu_t; + +typedef struct { + target_mc_gregset_t mc_gregs; + target_mc_greg_t mc_fp; + target_mc_greg_t mc_i7; + target_mc_fpu_t mc_fpregs; +} target_mcontext_t; + +struct target_ucontext { + abi_ulong tuc_link; + abi_ulong tuc_flags; + target_sigset_t tuc_sigmask; + target_mcontext_t tuc_mcontext; +}; + +/* A V9 register window */ +struct target_reg_window { + abi_ulong locals[8]; + abi_ulong ins[8]; +}; + +/* {set, get}context() needed for 64-bit SparcLinux userland. */ +void sparc64_set_context(CPUSPARCState *env) +{ + abi_ulong ucp_addr; + struct target_ucontext *ucp; + target_mc_gregset_t *grp; + target_mc_fpu_t *fpup; + abi_ulong pc, npc, tstate; + unsigned int i; + unsigned char fenab; + + ucp_addr = env->regwptr[WREG_O0]; + if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { + goto do_sigsegv; + } + grp = &ucp->tuc_mcontext.mc_gregs; + __get_user(pc, &((*grp)[SPARC_MC_PC])); + __get_user(npc, &((*grp)[SPARC_MC_NPC])); + if ((pc | npc) & 3) { + goto do_sigsegv; + } + if (env->regwptr[WREG_O1]) { + target_sigset_t target_set; + sigset_t set; + + if (TARGET_NSIG_WORDS == 1) { + __get_user(target_set.sig[0], &ucp->tuc_sigmask.sig[0]); + } else { + abi_ulong *src, *dst; + src = ucp->tuc_sigmask.sig; + dst = target_set.sig; + for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { + __get_user(*dst, src); + } + } + target_to_host_sigset_internal(&set, &target_set); + set_sigmask(&set); + } + env->pc = pc; + env->npc = npc; + __get_user(env->y, &((*grp)[SPARC_MC_Y])); + __get_user(tstate, &((*grp)[SPARC_MC_TSTATE])); + /* Honour TSTATE_ASI, TSTATE_ICC and TSTATE_XCC only */ + env->asi = (tstate >> 24) & 0xff; + cpu_put_ccr(env, (tstate >> 32) & 0xff); + __get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1])); + __get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2])); + __get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3])); + __get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4])); + __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); + __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); + /* Skip g7 as that's the thread register in userspace */ + + /* + * Note that unlike the kernel, we didn't need to mess with the + * guest register window state to save it into a pt_regs to run + * the kernel. So for us the guest's O regs are still in WREG_O* + * (unlike the kernel which has put them in UREG_I* in a pt_regs) + * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't + * need to be written back to userspace memory. + */ + __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); + __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); + __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); + __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); + __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); + __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); + __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); + __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); + + __get_user(env->regwptr[WREG_FP], &(ucp->tuc_mcontext.mc_fp)); + __get_user(env->regwptr[WREG_I7], &(ucp->tuc_mcontext.mc_i7)); + + fpup = &ucp->tuc_mcontext.mc_fpregs; + + __get_user(fenab, &(fpup->mcfpu_enab)); + if (fenab) { + abi_ulong fprs; + + /* + * We use the FPRS from the guest only in deciding whether + * to restore the upper, lower, or both banks of the FPU regs. + * The kernel here writes the FPU register data into the + * process's current_thread_info state and unconditionally + * clears FPRS and TSTATE_PEF: this disables the FPU so that the + * next FPU-disabled trap will copy the data out of + * current_thread_info and into the real FPU registers. + * QEMU doesn't need to handle lazy-FPU-state-restoring like that, + * so we always load the data directly into the FPU registers + * and leave FPRS and TSTATE_PEF alone (so the FPU stays enabled). + * Note that because we (and the kernel) always write zeroes for + * the fenab and fprs in sparc64_get_context() none of this code + * will execute unless the guest manually constructed or changed + * the context structure. + */ + __get_user(fprs, &(fpup->mcfpu_fprs)); + if (fprs & FPRS_DL) { + for (i = 0; i < 16; i++) { + __get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i])); + } + } + if (fprs & FPRS_DU) { + for (i = 16; i < 32; i++) { + __get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i])); + } + } + __get_user(env->fsr, &(fpup->mcfpu_fsr)); + __get_user(env->gsr, &(fpup->mcfpu_gsr)); + } + unlock_user_struct(ucp, ucp_addr, 0); + return; + + do_sigsegv: + unlock_user_struct(ucp, ucp_addr, 0); + force_sig(TARGET_SIGSEGV); +} + +void sparc64_get_context(CPUSPARCState *env) +{ + abi_ulong ucp_addr; + struct target_ucontext *ucp; + target_mc_gregset_t *grp; + target_mcontext_t *mcp; + int err; + unsigned int i; + target_sigset_t target_set; + sigset_t set; + + ucp_addr = env->regwptr[WREG_O0]; + if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { + goto do_sigsegv; + } + + memset(ucp, 0, sizeof(*ucp)); + + mcp = &ucp->tuc_mcontext; + grp = &mcp->mc_gregs; + + /* Skip over the trap instruction, first. */ + env->pc = env->npc; + env->npc += 4; + + /* + * If we're only reading the signal mask then do_sigprocmask() + * is guaranteed not to fail, which is important because we don't + * have any way to signal a failure or restart this operation since + * this is not a normal syscall. + */ + err = do_sigprocmask(0, NULL, &set); + assert(err == 0); + host_to_target_sigset_internal(&target_set, &set); + if (TARGET_NSIG_WORDS == 1) { + __put_user(target_set.sig[0], (abi_ulong *)&ucp->tuc_sigmask); + } else { + abi_ulong *src, *dst; + src = target_set.sig; + dst = ucp->tuc_sigmask.sig; + for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { + __put_user(*src, dst); + } + } + + __put_user(sparc64_tstate(env), &((*grp)[SPARC_MC_TSTATE])); + __put_user(env->pc, &((*grp)[SPARC_MC_PC])); + __put_user(env->npc, &((*grp)[SPARC_MC_NPC])); + __put_user(env->y, &((*grp)[SPARC_MC_Y])); + __put_user(env->gregs[1], &((*grp)[SPARC_MC_G1])); + __put_user(env->gregs[2], &((*grp)[SPARC_MC_G2])); + __put_user(env->gregs[3], &((*grp)[SPARC_MC_G3])); + __put_user(env->gregs[4], &((*grp)[SPARC_MC_G4])); + __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); + __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); + __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); + + /* + * Note that unlike the kernel, we didn't need to mess with the + * guest register window state to save it into a pt_regs to run + * the kernel. So for us the guest's O regs are still in WREG_O* + * (unlike the kernel which has put them in UREG_I* in a pt_regs) + * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't + * need to be fished out of userspace memory. + */ + __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); + __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); + __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); + __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); + __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); + __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); + __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); + __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); + + __put_user(env->regwptr[WREG_FP], &(mcp->mc_fp)); + __put_user(env->regwptr[WREG_I7], &(mcp->mc_i7)); + + /* + * We don't write out the FPU state. This matches the kernel's + * implementation (which has the code for doing this but + * hidden behind an "if (fenab)" where fenab is always 0). + */ + + unlock_user_struct(ucp, ucp_addr, 1); + return; + + do_sigsegv: + unlock_user_struct(ucp, ucp_addr, 1); + force_sig(TARGET_SIGSEGV); +} From patchwork Sun Apr 25 15:57:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427273 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2996365jao; Sun, 25 Apr 2021 08:59:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz66Ruyh38Djujscv9W6yFTbTkRY81OxPfoBxGYfMar6l74kt967mqdh7uDc8xMEq3deHbn X-Received: by 2002:a02:ac9a:: with SMTP id x26mr12511842jan.89.1619366399401; Sun, 25 Apr 2021 08:59:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619366399; cv=none; d=google.com; s=arc-20160816; b=TAtTun4224V3EDeW+dJzjSuwsFQhPPauGpGGCRYJMqdqP+T+AMpBC5a2SyY+vQs/0f 8nSTJBkn7FLJ0FZ2IyBL2t/LUeoN4rjePFdine1avxCCHWqer0rJtZQD7BWRZ1AUCi+T dYGDXxytI+1FSKfKkH1yWx+EgI6+KxsDkawPO8xE5xnan9hIRhCTlKu9CyJCxiMY9A7s aIw2GugrK2wNek5adV8B9KdpaLw8flLgenp3Kc5wX5HqvyC2w6Z1sG1AvFHCNWE5ffE8 BbKhj4yKhXbjJ3TOx+nrjTMmXbPBCU8MdEBfjgMP6lEU6EGkBIHkmhSGzGrJpmXTG4eo /EBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KAt4KJIdZ2Rn7oZ7gMKlRXoCjHm7a4NbLhrIC4Pyqtg=; b=UOOkcASQoQUnkMOjwKmBoQpqPSLb1HX64nLv04MG1h4dCSW+RCIZiRf6wNk5qXJJ+k WE2VAoSD/gELR31uBlrhDUjQit3m7jWZqGrVp7TgBCdXiCXTiQ4+7Sh2FQd3bZVmWk/E Psp9lqQTDTcSnMA70nvYGeGFRejCXw/MS7R6ltB5FSVGi/zpN8IhPYqavc9tuyU2IopH kvKJmGxhBf5L4Ol5Zw2rcnZZceNROLIASr8KEgF7X079353RrcT/cXhNbGgMCGqcaiRD 9buqj501IZC/HM42IIiPZw+Nus3bZ00LyXiyAVupvadFK479vAc2OeCSgOGVSs8CR56P ovCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UWxhOvA8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z30si12376454iow.85.2021.04.25.08.59.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 08:59:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UWxhOvA8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52778 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lahAs-0002OV-Pp for patch@linaro.org; Sun, 25 Apr 2021 11:59:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48534) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8x-0007sL-Df for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:59 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]:40651) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8t-0003C2-NT for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:59 -0400 Received: by mail-pg1-x52f.google.com with SMTP id b17so1471167pgh.7 for ; Sun, 25 Apr 2021 08:57:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=KAt4KJIdZ2Rn7oZ7gMKlRXoCjHm7a4NbLhrIC4Pyqtg=; b=UWxhOvA8OCBF5EmNxAuMWGwQDQxgPCUd5EoGG1vWuagNKaGnDWH7/79qc4ilClffV+ 1y+U/XAQ5SMP4XuwQL7KxanOgyud/ouPu8y15ku47SlBhuLNgxHKz4yNJ44T8n0hR3ZL VWaJNBgvioRk17mHkXXu5nuagJG7jH/mgEHhBVKJ3i5cC0F8TzNoqV5J0+ZLdrVlU9cc W6KXwPViqyZwCFr7nukf2QmlRhYglXlFguQ1eAU5RvGFsNgu8ZryK4dgjwuNlMOMKvVM ItcmG4iyhUN5Z247gPFeRcgqwpPlJbgCWg3qHcCcrUg2EqwIcU+yRb4RtSK275waYqX6 2b8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KAt4KJIdZ2Rn7oZ7gMKlRXoCjHm7a4NbLhrIC4Pyqtg=; b=ZsSY/UKeNNRP4JPTWWsPgUHxLYQGk+CY9rEwuH0QIbU+xZ3LVXl1olPCIQgiZDPjGE 7pw2zQ2jUKrg4adZoP2cvBAkaWtLQyyCF87Z7yjbs75TBRZ1bcX18U1/mxtr+woZV24P k4MfUbB9pids8l6yhe16dkv4FLmOYC5/fy0MQDYb4SFJxFmZiagsr3ZVq5kRJvjaaOah /WnbpTY1PmTHwZJ5mgguRFQuQ0xaQjLe16kXiSfc0c+CNQHGYQdE3G/Y3Jl1VHegwT/Z zAIY7C7uFlZqCiMPd+deWlvfcNo3iXsdSMfSO6xSq77Hb/MsJzzntY73qZp05egU6mb+ rmYQ== X-Gm-Message-State: AOAM533DjLGL6EtPFg1sJr8vXXnTKQvz8DHRMvK8on6dsVGNN0v/nOKe 4XguUsNLNinDwpN0A1i/nvnmkNyM9CVk7w== X-Received: by 2002:a63:344:: with SMTP id 65mr12948598pgd.24.1619366274508; Sun, 25 Apr 2021 08:57:54 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 6/8] linux-user/sparc: Clean up init_thread Date: Sun, 25 Apr 2021 08:57:47 -0700 Message-Id: <20210425155749.896330-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Share code between sparc32 and sparc64, removing a bit of pointless difference wrt psr/tstate. Use sizeof(abi_ulong) for allocating initial register window. Use TARGET_STACK_BIAS. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 33 +++++---------------------------- 1 file changed, 5 insertions(+), 28 deletions(-) -- 2.25.1 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index c6731013fd..cd8b81103f 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -663,48 +663,25 @@ static uint32_t get_elf_hwcap2(void) #define ELF_CLASS ELFCLASS64 #define ELF_ARCH EM_SPARCV9 - -#define STACK_BIAS 2047 - -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ -#ifndef TARGET_ABI32 - regs->tstate = 0; -#endif - regs->pc = infop->entry; - regs->npc = regs->pc + 4; - regs->y = 0; -#ifdef TARGET_ABI32 - regs->u_regs[14] = infop->start_stack - 16 * 4; -#else - if (personality(infop->personality) == PER_LINUX32) - regs->u_regs[14] = infop->start_stack - 16 * 4; - else - regs->u_regs[14] = infop->start_stack - 16 * 8 - STACK_BIAS; -#endif -} - #else #define ELF_START_MMAP 0x80000000 #define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | HWCAP_SPARC_SWAP \ | HWCAP_SPARC_MULDIV) - #define ELF_CLASS ELFCLASS32 #define ELF_ARCH EM_SPARC +#endif /* TARGET_SPARC64 */ static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { - regs->psr = 0; + /* Note that target_cpu_copy_regs does not read psr/tstate. */ regs->pc = infop->entry; regs->npc = regs->pc + 4; regs->y = 0; - regs->u_regs[14] = infop->start_stack - 16 * 4; + regs->u_regs[14] = (infop->start_stack - 16 * sizeof(abi_ulong) + - TARGET_STACK_BIAS); } - -#endif -#endif +#endif /* TARGET_SPARC */ #ifdef TARGET_PPC From patchwork Sun Apr 25 15:57:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427276 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp2999810jao; Sun, 25 Apr 2021 09:04:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwSSNAJ4UjLoVT6hW//Zw6YPRzxEChgQSYicdXfSkIAt7xtOuWV4gIJmHgbCAfcVPWLpJNo X-Received: by 2002:a05:6402:c1b:: with SMTP id co27mr16429780edb.61.1619366674134; Sun, 25 Apr 2021 09:04:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619366674; cv=none; d=google.com; s=arc-20160816; b=T5o2YLZgdfV3Z9ap5BEUuBJYe855xc/QX0Azdd9G2/0A7v18XoNHUjKJXenBUcQa8f u9z6xUD11PFAHTA9aTen6KK7IeBzZ42bykVO7HHLsgAXsdo3FQIXZ+mwldXMMcYXTF+0 Q2t/4b6Gc60t6Mjr5dpl6TwvDvw3JQR1jwLUmcI5J1Mlvd7Ssk4XH9Q/nil6CS3ScHAD wXzvLqHggGxtQUTJPSspotfbVh9QoeU3+eulFngc20+uhYvbKg+lUdxRgyBbAXbsw2ek uFUI4meRkf+heVTbRK8hgMjo9mVdnSnTvqTnb3bTz1o0P5cy5UsM1RcDCXv+UeU1tnb7 s1vQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=u30xwcxCy80ZK6dyM8pP2MsdoEwOxGc5lWNn0kKyZ7Y=; b=p5lThcjgnrZ1eQ9ImCXE3ouhV2PL98BDBE8TtWISYh/dMjHTU0HdVXn4o4KDiyRLFN qRYlqefRA9JMwJJ7bFDR63Rn+w/YpIdCCgB0AVA2MvnVrdjojaL5oL+A5tqoNP41MgJc luyTXSJ+0uveVk3NjPeV3I8sn1Pv+o9aQJfyi5pLcWxMEIz+bOWp6U0vnqMiQE0U8Qlu oMkr3CfQ5OCV5r2TJfnFL6Tt1nmee5gL07G5Bz8tfWNxwe2DGAo6pVk9NE27RFCBtYbv vMNb7/NQhhf+yDiNA4dKJWdAkebn4GFGTI+Xb8LWUMKWzsTGeS6kW/wXb1uKHwA0G2eE FlHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m9CQoiLD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k9si13318244eje.366.2021.04.25.09.04.34 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 09:04:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m9CQoiLD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60938 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lahFJ-0006Du-4y for patch@linaro.org; Sun, 25 Apr 2021 12:04:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48550) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8x-0007tY-Vw for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:58:00 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]:54824) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8u-0003CD-6L for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:57:59 -0400 Received: by mail-pj1-x1031.google.com with SMTP id t13so1533769pji.4 for ; Sun, 25 Apr 2021 08:57:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=u30xwcxCy80ZK6dyM8pP2MsdoEwOxGc5lWNn0kKyZ7Y=; b=m9CQoiLD4uDA4FJghKpyCBIm7sBX73p8hx43Wu56hgU2Joz607/5W8YwUC6uP2tYTU cnMKTGjZjdvWctkFta1b6e39DzqFwhyQxcBSVjNtUPWPx7dVh0+o7Yhr2JZcgEYez5+L ICcSYCT8fy/EukgcdqzcYbIRPT6ij8ukbmL6NV40qvbt2eJmrmvDRL7E9besB3FBjXzp tSZEUl+9hsZTDF8xZAdP3eKPgagcobGzW2f0rgZYJSvTKcaSuVRGgtEUuIozT6VbEsRD FPY8Hjc5M3bC/q72B3UU4Gw17atKS36Ef+ipfXrtJ8mlSg9P/zZ2MCI0msec6uosE6iZ lMvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=u30xwcxCy80ZK6dyM8pP2MsdoEwOxGc5lWNn0kKyZ7Y=; b=o/uTzf/VnCDzOQk1cOGBJZEv+7PlYAniexlB5nBmnHXwL12gTkIc0PNZGpj3oyWoRK JDXqIjlkooXz4ZfKNlWYFuzluD9lITzrR+LCGAf+iF4wv/t0gL5Yeak5EoOJT4A1rt0h uKvry2uKgVTiKa4sXmEfCT9h6lSe7tnnP0A4BRgCegZubwhoF4p7wKJT1+JOz4c9wyZ7 0w3cfjghmwLGOTlNJFsvgQ9F7drgdWi3sDRROo+mexQEPWpGxthG26aPylqgWY+V/o4Y VRaDIAOsg54Zs0WYbE719WkRwi5DoFYE8Hz/vrPBEfGso9TZ1VVqcsFLmJIh5ktph0ud Awhg== X-Gm-Message-State: AOAM532CMn5b8uWRppXl6EvnpUa3Svqo8ZEQHGm8uFcZvRxBVkIUx1I6 nJtWLn2+t1fcp4kg9a5fCtymRGrEXnAH8g== X-Received: by 2002:a17:90a:a389:: with SMTP id x9mr17135362pjp.232.1619366274954; Sun, 25 Apr 2021 08:57:54 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 7/8] linux-user/sparc64: Include TARGET_STACK_BIAS in get_sp_from_cpustate Date: Sun, 25 Apr 2021 08:57:48 -0700 Message-Id: <20210425155749.896330-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Generic code cares about the logical stack pointer, not the physical one that has a bias applied for sparc64. Signed-off-by: Richard Henderson --- linux-user/sparc/target_cpu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 37f6a1d62b..1f4bed50f4 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -46,6 +46,7 @@ static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, #endif /* ??? The kernel appears to copy one stack frame to the new stack. */ /* ??? The kernel force aligns the new stack. */ + /* Userspace provides a biased stack pointer value. */ env->regwptr[WREG_SP] = newsp; } @@ -83,7 +84,7 @@ static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) static inline abi_ulong get_sp_from_cpustate(CPUSPARCState *state) { - return state->regwptr[WREG_SP]; + return state->regwptr[WREG_SP] + TARGET_STACK_BIAS; } #endif From patchwork Sun Apr 25 15:57:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 427277 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp3000753jao; Sun, 25 Apr 2021 09:05:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz+OUWjYvxPWUoVE/zGtM+2KnWTn/CMyZNDCxb18Mj0GkcTyYK0dFXzqL41bfrxBKPV/iRA X-Received: by 2002:ab0:12a:: with SMTP id 39mr9346073uak.19.1619366752923; Sun, 25 Apr 2021 09:05:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619366752; cv=none; d=google.com; s=arc-20160816; b=VwwDJNDrWWHS9K6lvYgflcjF7m5TI/U1AyVbvbWpWbyTyEH0TxU2Zc7mvAQGpZy9sG a2F11xjcXVBLoWACcmtPL5FibH2mLRsYjg2kCAw+DCNI08ViH2desQDvk6zgCTxFF62J kPJY7ECjTnc6Rmxk4lnVuwGH5LtBw4fDdHBVJwaryFwVYkTlhQZGhLdulSToThJ6oldg Z4mEos+ZlSMP2aPFrUsfYdieKo/ADvjQyMXjuw6G5MDUKiB/yr66PJiJjnNzXgusEnI0 FLsGbDOfeh+OLxOQepw7TTEAumZXgqGXvSZcXs1AcmgMbQOTEMA39LhQyDE+hVQws7wt T5yQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=DKxGWYw3ADKuWB18lhyYVJwm1dNkTUIYY08wHRcIwcI=; b=HSrFJ9ucEbG7M0mzSnZtgf1gdwkIX/yOxvrqVunddZhjHC23ema0X8F2OYg8Jj532p yzcpjzcWHvYzNDzRXA5tXhfs5bNXG1Tt0w3OruLNt7DLyHyVbiG3pGut2FQT5GDkCRHY 9rS2F4hpWOE34kK01dZR4M49bmxdGYoOi+1E+BHuWZLv23mHVd7dN2cDozcdXoGmKVHi it/YRAWq6PajI1rpa0W2jRzOKRGSLi/AU/GnbnDNgeSEufgoba/BCHa2g6kfqHZc9lsf wf49Gj3WXSmFOCg8S4mEB07hk0DGWJpvqvzC/ZyrKHhGFoSXhsErGLQX/XJ5ng+HuAuf hTJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=teXZ7QcL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k16si1369615uan.49.2021.04.25.09.05.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 25 Apr 2021 09:05:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=teXZ7QcL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:35214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lahGa-0007PJ-7t for patch@linaro.org; Sun, 25 Apr 2021 12:05:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48590) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lah8z-0007wp-Au for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:58:01 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]:36438) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lah8v-0003Cq-3C for qemu-devel@nongnu.org; Sun, 25 Apr 2021 11:58:01 -0400 Received: by mail-pf1-x432.google.com with SMTP id c3so18557644pfo.3 for ; Sun, 25 Apr 2021 08:57:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=DKxGWYw3ADKuWB18lhyYVJwm1dNkTUIYY08wHRcIwcI=; b=teXZ7QcLMJYiOjvVuBT4Wk9Sp4beLXzC5nqmP/ISJY9HqQULZHJFodubMoHkE3khjG xTbNH0As2uuhEbxuF0l6XJQGd1dWJxbSxUASB9N80IRnQZxEO5677VJTy1mow6WQ30vA 4YCMgaoiV5sf1JP1lePYhhSF1Fhov8mK3FKDqH8bciR5R27V3pagVfVtLhIh3S5cKett pgBT88rpje8JBnnC59WK+6ouPBc3mIR71NREOJy2IgnEl9MBiaUCiZhR+GpDeY/Q8ApC x88s3GYWoSG/niMPH+YznBVe19rcdYbvrFqrk258L4RDl4CFW6Xpk2dUvCQGNgAtuPYb 4nsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DKxGWYw3ADKuWB18lhyYVJwm1dNkTUIYY08wHRcIwcI=; b=Pb8acq7c7kV2NBqanwcZogwsGqyL30ZRj6j+xhjM/05k15fnbMHD10TMfSqMEsvSf5 q/g7vp/Nw/VdqbVCnT9Zj4Bo7b7Yk6O8ta/UCtdLR3jxFTu5IpBGjWkdjyTxiZHo7s8q 6/tnnpj0fpwN/xKgPe5xgUuc1ZT+/ZHk9N2BVpMI+887gWnGW728Ff33pR8HsM8lysWO j3CpopPFuiCvDw6O2dJ1B4SpU/wz6/36ODs3NCHJaSOzB6ToCRC4n2XBVX1x0xxMbG1p DD+BLSSc1J4bLn3d1HT442f7hHcHoklw75hSKQYIFteF2iujnndk6Bk5WKMs3IJVV4oU l8sg== X-Gm-Message-State: AOAM530wuwMnPeIHpOSJn734n0DBQMDzUVR0dMManQHWvfFnI/zdHL7Y gMc22rxR7mEgOQV/McoAaafcqu77fVsT1w== X-Received: by 2002:a63:5d18:: with SMTP id r24mr13429550pgb.94.1619366275647; Sun, 25 Apr 2021 08:57:55 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id u21sm8594717pfm.89.2021.04.25.08.57.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 08:57:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 8/8] linux-user/sparc64: Implement signals Date: Sun, 25 Apr 2021 08:57:49 -0700 Message-Id: <20210425155749.896330-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210425155749.896330-1-richard.henderson@linaro.org> References: <20210425155749.896330-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We've been using the 32-bit sparc abi for 64-bit signals. There's a surprising amount of difference, beginning with the fact that 64-bit always uses rt signal frames. Signed-off-by: Richard Henderson --- linux-user/sparc/target_signal.h | 2 + linux-user/sparc64/target_syscall.h | 14 +- linux-user/sparc64/signal.c | 245 +++++++++++++++++++++++++++- 3 files changed, 254 insertions(+), 7 deletions(-) -- 2.25.1 diff --git a/linux-user/sparc/target_signal.h b/linux-user/sparc/target_signal.h index 911a3f5af5..651320ab8d 100644 --- a/linux-user/sparc/target_signal.h +++ b/linux-user/sparc/target_signal.h @@ -67,7 +67,9 @@ typedef struct target_sigaltstack { #define TARGET_MINSIGSTKSZ 4096 #define TARGET_SIGSTKSZ 16384 +#if !defined(TARGET_SPARC64) || defined(TARGET_ABI32) #define TARGET_ARCH_HAS_SETUP_FRAME +#endif /* bit-flags */ #define TARGET_SS_AUTODISARM (1U << 31) /* disable sas during sighandling */ diff --git a/linux-user/sparc64/target_syscall.h b/linux-user/sparc64/target_syscall.h index 696a68b1ed..fcc71db16e 100644 --- a/linux-user/sparc64/target_syscall.h +++ b/linux-user/sparc64/target_syscall.h @@ -4,14 +4,16 @@ #include "../sparc/target_errno.h" struct target_pt_regs { - abi_ulong u_regs[16]; - abi_ulong tstate; - abi_ulong pc; - abi_ulong npc; - abi_ulong y; - abi_ulong fprs; + abi_ulong u_regs[16]; + abi_ulong tstate; + abi_ulong pc; + abi_ulong npc; + uint32_t y; + uint32_t magic; }; +#define TARGET_PT_REGS_MAGIC 0x57ac6c00 + #define UNAME_MACHINE "sparc64" #define UNAME_MINIMUM_RELEASE "2.6.32" diff --git a/linux-user/sparc64/signal.c b/linux-user/sparc64/signal.c index d27e049c2a..7ba811d342 100644 --- a/linux-user/sparc64/signal.c +++ b/linux-user/sparc64/signal.c @@ -17,7 +17,10 @@ * along with this program; if not, see . */ -#include "../sparc/signal.c" +#include "qemu/osdep.h" +#include "qemu.h" +#include "signal-common.h" +#include "linux-user/trace.h" #define SPARC_MC_TSTATE 0 #define SPARC_MC_PC 1 @@ -295,3 +298,243 @@ void sparc64_get_context(CPUSPARCState *env) unlock_user_struct(ucp, ucp_addr, 1); force_sig(TARGET_SIGSEGV); } + +struct target_sparc_stackf { + struct target_reg_window win; + uint64_t xargs[8]; +}; + +struct target_siginfo_fpu_t { + uint64_t dregs[32]; + uint64_t fsr; + uint64_t gsr; + uint64_t fprs; +}; + +struct target_sigcontext { + target_siginfo_t info; + struct target_pt_regs regs; + uint64_t fpu_save; + target_stack_t stack; + target_sigset_t mask; + uint64_t rwin_save; +}; + +struct target_rt_sigframe { + struct target_sparc_stackf ss; + struct target_sigcontext sc; + struct target_siginfo_fpu_t fpu; +}; + +static abi_ulong get_sigframe(struct target_sigaction *sa, + CPUSPARCState *env, int framesize) +{ + abi_ulong sp = target_sigsp(get_sp_from_cpustate(env), sa); + return (sp - framesize) & -16; +} + +static void save_pt_regs(struct target_pt_regs *regs, CPUSPARCState *env) +{ + int i; + + for (i = 0; i < 8; i++) { + __put_user(env->gregs[i], ®s->u_regs[i]); + } + for (i = 0; i < 8; i++) { + __put_user(env->regwptr[WREG_O0 + i], ®s->u_regs[i + 8]); + } + __put_user(sparc64_tstate(env), ®s->tstate); + __put_user(env->pc, ®s->pc); + __put_user(env->npc, ®s->npc); + __put_user(env->y, ®s->y); + __put_user(TARGET_PT_REGS_MAGIC, ®s->magic); +} + +static void restore_pt_regs(struct target_pt_regs *regs, CPUSPARCState *env) +{ + uint64_t tstate; + int i; + + for (i = 0; i < 8; i++) { + __get_user(env->gregs[i], ®s->u_regs[i]); + } + for (i = 0; i < 8; i++) { + __get_user(env->regwptr[WREG_O0 + i], ®s->u_regs[i + 8]); + } + + __get_user(env->y, ®s->y); + __get_user(tstate, ®s->tstate); + + /* User can only change condition codes and %asi in tstate. */ + cpu_put_ccr(env, tstate >> 32); + env->asi = extract64(tstate, 24, 8); +} + +static void save_fpu_state(struct target_siginfo_fpu_t *regs, + CPUSPARCState *env) +{ + int i; + + /* QEMU does not lazy fpu saving. Save the entire fp register bank. */ + for (i = 0; i < 32; ++i) { + __put_user(env->fpr[i].ll, ®s->dregs[i]); + } + __put_user(env->fsr, ®s->fsr); + __put_user(env->gsr, ®s->gsr); + __put_user(env->fprs, ®s->fprs); +} + +static void restore_fpu_state(struct target_siginfo_fpu_t *regs, + CPUSPARCState *env) +{ + uint64_t fprs; + int i; + + /* In case the user mucks about with FPRS, restore as directed. */ + __get_user(fprs, ®s->fprs); + if (fprs & FPRS_DL) { + for (i = 0; i < 16; ++i) { + __get_user(env->fpr[i].ll, ®s->dregs[i]); + } + } + if (fprs & FPRS_DU) { + for (i = 16; i < 32; ++i) { + __get_user(env->fpr[i].ll, ®s->dregs[i]); + } + } + __get_user(env->fsr, ®s->fsr); + __get_user(env->gsr, ®s->gsr); + env->fprs |= fprs; +} + +void setup_rt_frame(int sig, struct target_sigaction *ka, + target_siginfo_t *info, + target_sigset_t *set, CPUSPARCState *env) +{ + abi_ulong sf_addr, sp; + struct target_rt_sigframe *sf = NULL; + void *window; + + sf_addr = get_sigframe(ka, env, sizeof(*sf)); + trace_user_setup_rt_frame(env, sf_addr); + if (!lock_user_struct(VERIFY_WRITE, sf, sf_addr, 0)) { + goto do_sigsegv; + } + + /* 2. Save the current process state */ + save_pt_regs(&sf->sc.regs, env); + save_fpu_state(&sf->fpu, env); + __put_user(sf_addr + offsetof(struct target_rt_sigframe, fpu), + &sf->sc.fpu_save); + __put_user(0, &sf->sc.rwin_save); /* TODO: save_rwin_state */ + + /* + * Copy one register window from the top-of-stack into the signal frame. + * The balance of the sparc_stackf struct is for the callee --- the call + * abi requires the space for spilling argument registers. + */ + sp = get_sp_from_cpustate(env); + window = lock_user(VERIFY_READ, sp, sizeof(struct target_reg_window), 1); + if (!window) { + goto do_sigsegv; + } + memcpy(sf, window, sizeof(struct target_reg_window)); + unlock_user(window, sp, 0); + + target_save_altstack(&sf->sc.stack, env); + for (int i = 0; i < TARGET_NSIG_WORDS; ++i) { + __put_user(set->sig[i], &sf->sc.mask.sig[i]); + } + + unlock_user(sf, sf_addr, sizeof(*sf)); + + /* 3. signal handler back-trampoline and parameters */ + env->regwptr[WREG_SP] = sf_addr - TARGET_STACK_BIAS; + env->regwptr[WREG_O0] = sig; + env->regwptr[WREG_O1] = sf_addr + offsetof(struct target_rt_sigframe, sc); + env->regwptr[WREG_O2] = sf_addr + offsetof(struct target_rt_sigframe, sc); + + /* 4. return to kernel instructions */ + env->regwptr[WREG_O7] = ka->ka_restorer; + + /* 5. signal handler */ + env->pc = ka->_sa_handler; + env->npc = env->pc + 4; + return; + + do_sigsegv: + unlock_user(sf, sf_addr, 0); + force_sigsegv(sig); +} + +/* + * __NR_sigreturn still exists for backward compatiblity, + * but it is set to sys_nis_syscall for sparc64. + */ +long do_sigreturn(CPUSPARCState *env) +{ + return -TARGET_ENOSYS; +} + +long do_rt_sigreturn(CPUSPARCState *env) +{ + abi_ulong sf_addr, sc_addr, tpc, tnpc, ptr; + struct target_sigcontext *sc = NULL; + sigset_t set; + + sf_addr = get_sp_from_cpustate(env); + trace_user_do_rt_sigreturn(env, sf_addr); + + if (sf_addr & 15) { + goto do_sigsegv; + } + sc_addr = sf_addr + offsetof(struct target_rt_sigframe, sc); + if (!lock_user_struct(VERIFY_READ, sc, sc_addr, 1)) { + goto do_sigsegv; + } + + /* Validate SP alignment. */ + __get_user(ptr, &sc->regs.u_regs[8 + WREG_SP]); + if ((ptr + TARGET_STACK_BIAS) & 7) { + goto do_sigsegv; + } + + /* Validate PC and NPC alignment. */ + __get_user(tpc, &sc->regs.pc); + __get_user(tnpc, &sc->regs.npc); + if ((tpc | tnpc) & 3) { + goto do_sigsegv; + } + + restore_pt_regs(&sc->regs, env); + + __get_user(ptr, &sc->fpu_save); + if (ptr) { + struct target_siginfo_fpu_t *fpu; + if ((ptr & 7) || !lock_user_struct(VERIFY_READ, fpu, ptr, 1)) { + goto do_sigsegv; + } + restore_fpu_state(fpu, env); + unlock_user_struct(fpu, ptr, 0); + } + + __get_user(ptr, &sc->rwin_save); + if (ptr) { + goto do_sigsegv; /* TODO: restore_rwin_state */ + } + + target_to_host_sigset(&set, &sc->mask); + set_sigmask(&set); + target_restore_altstack(&sc->stack, env); + + env->pc = tpc; + env->npc = tnpc; + + unlock_user_struct(sc, sc_addr, 0); + return -TARGET_QEMU_ESIGRETURN; + + do_sigsegv: + unlock_user_struct(sc, sc_addr, 0); + force_sig(TARGET_SIGSEGV); + return -TARGET_QEMU_ESIGRETURN; +}