From patchwork Thu Apr 22 13:08:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 425864 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp343592jao; Thu, 22 Apr 2021 06:08:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzUQ26NJVfQj1LoOr+5+p2VNBQ/jY3L/zxW7EKTi1iVe2xn4cZ10JQz28AdZmLf5Z9s58eC X-Received: by 2002:a17:90b:400a:: with SMTP id ie10mr3907343pjb.210.1619096896339; Thu, 22 Apr 2021 06:08:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619096896; cv=none; d=google.com; s=arc-20160816; b=VDuoo+q82zrvPQYo1ylP1jE11028tY9X0Q8jPmhJeJb1ebJCbfPmpbeXThehKN0GNI pmbpq8Gjokcs69kTEMgTWdfskvDbFPA0EKWoWtKCrgcCnLalaawzWaWsixie7wmH2COB Am62cgfd5Y5NcQ0rRx2sXgyWkyXIn2NkmHnDcg5nZsGsd9xBZj3ZMT3Js1p2bTbaQbUP BjNhpsEDK9pEZ6GIG8msb6kspuZ1VQuNEPmhWJnG1dhQz+2lIecpBKHpU5SK8FnNfO+4 8cHtlAvqGxaEezRNACmB2a42X7DYX5gas12hjvowqEmnmvxfJHlVGegAkpzy44qVUQaf 2n5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8RrnYzPcnRoTVyWZ1bmaY2T+MMirnbRU50Mn0AXIh4M=; b=vfk+sFJEXzSMgSSKWPBhKVoJ4+fvxKM2+tSLyA/jn5Nm6HWh75xDXZuYyp5x9N47KG z8dXxV7hyQK8YwfwWrpsauJO84OmkWT5ta2Qx6w1GL4F5HORenuSI/mrpgkdUeJr8xaY mgHoj+MK1aR6kXErwpILuBVRfJlTfpKddozsYYEksYwZsGJCpdNuP2FmzsbDOaKsREky X0bPsESimMH+j49HEFixp/Ki41sAe918+QgIT6KuuRpMqjyIY+n2Pz69qDXm7o0fIdYy bFYOW2o1kBR+429y8I7Q2W1/KEa/owKjV+SNL/0PMxpKTCWOEv8aP2HqLt8ywhxZ+V/u iqtg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fEa1YSDG; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n20si3328867pgk.389.2021.04.22.06.08.16; Thu, 22 Apr 2021 06:08:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fEa1YSDG; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236428AbhDVNIt (ORCPT + 17 others); Thu, 22 Apr 2021 09:08:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236448AbhDVNIq (ORCPT ); Thu, 22 Apr 2021 09:08:46 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97885C06138B for ; Thu, 22 Apr 2021 06:08:09 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id q22so9588845lfu.8 for ; Thu, 22 Apr 2021 06:08:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8RrnYzPcnRoTVyWZ1bmaY2T+MMirnbRU50Mn0AXIh4M=; b=fEa1YSDGSjU5CQ/wjNT1VZVInqdDOTZsQf7qm9YjXNySQOchiQyp8AFaS9zW9OMHdx IlhmiNFITWOBz6yLDykSvQdV3hkgT3AxYDKSMvnowj15caiBKU6FkAj/PUtdXJg1uWl+ vdbWI1LjWWSwrb996RUqNf0i2F8nZ5Fy3EfNCWe9Bo6LRSlumghY52qoUZJS8PAYP/hB Xs+x3/tZU2aUAatSaNKq4DTMbxHF11RAtZXzYIBude3tUFwFS1PwA5lytvO/B2FHLNv7 j0LcKwUluM+mAREerS2S2kiL+GMsZv9azee6/J62AL92kNYA3PloxFiOeIN6zPu56VQL rpZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8RrnYzPcnRoTVyWZ1bmaY2T+MMirnbRU50Mn0AXIh4M=; b=iwUCWCSZNb5WiGQKaoN7/9f4x+9f2rfBk7b/FufLkhEvpy8faarEON9ipEJmUFouxh o45VmYRGQzbahVnwmn89l8X3acHnAtClSLUMPH7OXf41EtZtJrGLXPSWhE4ay9TuzIHW +qheHZf+N77dxL/W5iKyQHqZ37ULesuaohV9ROCA30ZdakOkczu+Y2RfC7JmyO6ZUcrN Yn2Y5TSlzzvWro5YkoXEXhbUQMSMoLcCZ7nNxsOFhMCQDw7uMzrWBqEsPJcwIE3qj/v5 ZGIUx7xDe5NY0CMlpWmFmOr2iyTiQc1dCBidkY7cjtO8/+5QMEgS9Esx4iG2OhNCe5f/ 5aQw== X-Gm-Message-State: AOAM5302b3aXzMEDi18eQnNOtCjrpmTAMVryxM0dtmjWwClXpVsFThpU suonLKeX1J6UdPm4nmqLGm+SSA== X-Received: by 2002:ac2:551a:: with SMTP id j26mr2431118lfk.61.1619096887988; Thu, 22 Apr 2021 06:08:07 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v17sm259833lfr.35.2021.04.22.06.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Apr 2021 06:08:07 -0700 (PDT) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Jonathan Marek , Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 1/3] drm/msm/dpu: remove unused dpu_hw_blk features Date: Thu, 22 Apr 2021 16:08:02 +0300 Message-Id: <20210422130804.825030-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210422130804.825030-1-dmitry.baryshkov@linaro.org> References: <20210422130804.825030-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Remove all unused dpu_hw_blk features and functions: - dpu_hw_blk_get()/_put() and respective refcounting, - global list of all dpu_hw_blk instances, - dpu_hw_blk_ops and empty implementation inside each hw_blk subdriver. This leaves dpu_hw_blk as a placeholder with just type and index. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 104 +----------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 19 +--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 4 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 4 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 4 +- 10 files changed, 10 insertions(+), 145 deletions(-) -- 2.30.2 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c index 819b26e660b9..abad043f35f5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c @@ -11,33 +11,16 @@ #include "dpu_hw_mdss.h" #include "dpu_hw_blk.h" -/* Serialization lock for dpu_hw_blk_list */ -static DEFINE_MUTEX(dpu_hw_blk_lock); - -/* List of all hw block objects */ -static LIST_HEAD(dpu_hw_blk_list); - /** * dpu_hw_blk_init - initialize hw block object * @hw_blk: pointer to hw block object * @type: hw block type - enum dpu_hw_blk_type * @id: instance id of the hw block - * @ops: Pointer to block operations */ -void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id, - struct dpu_hw_blk_ops *ops) +void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id) { - INIT_LIST_HEAD(&hw_blk->list); hw_blk->type = type; hw_blk->id = id; - atomic_set(&hw_blk->refcount, 0); - - if (ops) - hw_blk->ops = *ops; - - mutex_lock(&dpu_hw_blk_lock); - list_add(&hw_blk->list, &dpu_hw_blk_list); - mutex_unlock(&dpu_hw_blk_lock); } /** @@ -51,89 +34,4 @@ void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk) pr_err("invalid parameters\n"); return; } - - if (atomic_read(&hw_blk->refcount)) - pr_err("hw_blk:%d.%d invalid refcount\n", hw_blk->type, - hw_blk->id); - - mutex_lock(&dpu_hw_blk_lock); - list_del(&hw_blk->list); - mutex_unlock(&dpu_hw_blk_lock); -} - -/** - * dpu_hw_blk_get - get hw_blk from free pool - * @hw_blk: if specified, increment reference count only - * @type: if hw_blk is not specified, allocate the next available of this type - * @id: if specified (>= 0), allocate the given instance of the above type - * return: pointer to hw block object - */ -struct dpu_hw_blk *dpu_hw_blk_get(struct dpu_hw_blk *hw_blk, u32 type, int id) -{ - struct dpu_hw_blk *curr; - int rc, refcount; - - if (!hw_blk) { - mutex_lock(&dpu_hw_blk_lock); - list_for_each_entry(curr, &dpu_hw_blk_list, list) { - if ((curr->type != type) || - (id >= 0 && curr->id != id) || - (id < 0 && - atomic_read(&curr->refcount))) - continue; - - hw_blk = curr; - break; - } - mutex_unlock(&dpu_hw_blk_lock); - } - - if (!hw_blk) { - pr_debug("no hw_blk:%d\n", type); - return NULL; - } - - refcount = atomic_inc_return(&hw_blk->refcount); - - if (refcount == 1 && hw_blk->ops.start) { - rc = hw_blk->ops.start(hw_blk); - if (rc) { - pr_err("failed to start hw_blk:%d rc:%d\n", type, rc); - goto error_start; - } - } - - pr_debug("hw_blk:%d.%d refcount:%d\n", hw_blk->type, - hw_blk->id, refcount); - return hw_blk; - -error_start: - dpu_hw_blk_put(hw_blk); - return ERR_PTR(rc); -} - -/** - * dpu_hw_blk_put - put hw_blk to free pool if decremented refcount is zero - * @hw_blk: hw block to be freed - */ -void dpu_hw_blk_put(struct dpu_hw_blk *hw_blk) -{ - if (!hw_blk) { - pr_err("invalid parameters\n"); - return; - } - - pr_debug("hw_blk:%d.%d refcount:%d\n", hw_blk->type, hw_blk->id, - atomic_read(&hw_blk->refcount)); - - if (!atomic_read(&hw_blk->refcount)) { - pr_err("hw_blk:%d.%d invalid put\n", hw_blk->type, hw_blk->id); - return; - } - - if (atomic_dec_return(&hw_blk->refcount)) - return; - - if (hw_blk->ops.stop) - hw_blk->ops.stop(hw_blk); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h index 2bf737f8dd1b..fb3be9a36a50 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h @@ -7,19 +7,9 @@ #include #include -#include struct dpu_hw_blk; -/** - * struct dpu_hw_blk_ops - common hardware block operations - * @start: start operation on first get - * @stop: stop operation on last put - */ -struct dpu_hw_blk_ops { - int (*start)(struct dpu_hw_blk *); - void (*stop)(struct dpu_hw_blk *); -}; /** * struct dpu_hw_blk - definition of hardware block object @@ -29,17 +19,10 @@ struct dpu_hw_blk_ops { * @refcount: reference/usage count */ struct dpu_hw_blk { - struct list_head list; u32 type; int id; - atomic_t refcount; - struct dpu_hw_blk_ops ops; }; -void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id, - struct dpu_hw_blk_ops *ops); +void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id); void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk); - -struct dpu_hw_blk *dpu_hw_blk_get(struct dpu_hw_blk *hw_blk, u32 type, int id); -void dpu_hw_blk_put(struct dpu_hw_blk *hw_blk); #endif /*_DPU_HW_BLK_H */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 2d4645e01ebf..04a2c4b9a357 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -589,8 +589,6 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops, ops->set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active; }; -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -615,7 +613,7 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx, c->mixer_count = m->mixer_count; c->mixer_hw_caps = m->mixer; - dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops); + dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx); return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c index e42f901a7de5..d2f1045a736a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c @@ -85,8 +85,6 @@ static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp, return ERR_PTR(-EINVAL); } -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -112,7 +110,7 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx, c->cap = cfg; _setup_dspp_ops(c, c->cap->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_DSPP, idx, &dpu_hw_ops); + dpu_hw_blk_init(&c->base, DPU_HW_BLK_DSPP, idx); return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index 1599e3f49a4f..6ffe97601716 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -299,8 +299,6 @@ static void _setup_intf_ops(struct dpu_hw_intf_ops *ops, ops->bind_pingpong_blk = dpu_hw_intf_bind_pingpong_blk; } -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -327,7 +325,7 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx, c->mdss = m; _setup_intf_ops(&c->ops, c->cap->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops); + dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx); return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c index 6ac0b5a0e057..554bb881de3a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c @@ -160,8 +160,6 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m, ops->setup_border_color = dpu_hw_lm_setup_border_color; } -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -184,7 +182,7 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, c->cap = cfg; _setup_mixer_ops(m, &c->ops, c->cap->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops); + dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx); return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c index 720813e5a8ae..863229dd0140 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c @@ -58,8 +58,6 @@ static void _setup_merge_3d_ops(struct dpu_hw_merge_3d *c, c->ops.setup_3d_mode = dpu_hw_merge_3d_setup_3d_mode; }; -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -81,7 +79,7 @@ struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx, c->caps = cfg; _setup_merge_3d_ops(c, c->caps->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_MERGE_3D, idx, &dpu_hw_ops); + dpu_hw_blk_init(&c->base, DPU_HW_BLK_MERGE_3D, idx); return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index 245a7a62b5c6..334d5b28f533 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -261,8 +261,6 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c, c->ops.setup_dither = dpu_hw_pp_setup_dither; }; -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -284,7 +282,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx, c->caps = cfg; _setup_pingpong_ops(c, c->caps->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops); + dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx); return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 34d81aa16041..ceb2488ea270 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -706,8 +706,6 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp, return ERR_PTR(-ENOMEM); } -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, void __iomem *addr, struct dpu_mdss_cfg *catalog, bool is_virtual_pipe) @@ -735,7 +733,7 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, hw_pipe->cap = cfg; _setup_layer_ops(hw_pipe, hw_pipe->cap->features); - dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops); + dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx); return hw_pipe; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c index 01b76766a9a8..5d2c33ec1de7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -295,8 +295,6 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp, return ERR_PTR(-EINVAL); } -static struct dpu_hw_blk_ops dpu_hw_ops; - struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx, void __iomem *addr, const struct dpu_mdss_cfg *m) @@ -324,7 +322,7 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx, mdp->caps = cfg; _setup_mdp_ops(&mdp->ops, mdp->caps->features); - dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops); + dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx); return mdp; } From patchwork Thu Apr 22 13:08:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 425862 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp343562jao; Thu, 22 Apr 2021 06:08:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz0p2GUG0bNvVWMZckeI//X/4sh2eZn086+Vra70Ma40Wo7l1OCGQPxnbbKUZSqF9b9c41S X-Received: by 2002:a65:6856:: with SMTP id q22mr3514505pgt.5.1619096894304; Thu, 22 Apr 2021 06:08:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619096894; cv=none; d=google.com; s=arc-20160816; b=p57/mu7vPdXxSmkssf73iyOonARcx+dbgiV6IH44FFKPlNu8WelYMpSteH8mzOxWR5 L94gc+huBESIQd3X2UTbxbvmzQcCj6Hno+Hz9q07u+TgHKf9xMVpiNh2GhrXDI3WEec7 U3lqEu5BPhLnIxpyxQedbOQoM09V94d5en8HFnNwjpWfw/DmdeEgFqgDrNVQjWudESAg G/G1dSNIuJlwXKZk/6nZ2xe8gBaRMLFwRnv1ANPuByzd8Ah3Rz3RTP7RqrS2iaRdQo/5 oZ6ViEfk0Rghky9VJXw9hwkQShQ7btrdWPsoNmBuLmwOagAjlhA8/l8y18m1RjlgZAKd nduw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pmJr7udGenhHroV8BhxM4TWBA/MGEM7jtLhmDnAa3/I=; b=E/QeFnhVY1msRorjoH2mk0vbBzFdH0P41PVV1yYGGwQoIc9GO65sH/IIDrFeN3Paj3 5C2DIW2QFF//vL6vP7TxIBVRNsJGE/Hj+OQ3v54kPE3W1TrcYRJNAbzVugcNCx6eEJkk Yih8Cy+FKQqQW6pv75YVYa2D3PsQ46WLi3AOmon70Hlw8VrKPcxU5uYqAyFuf4IctF3i nBoCwx637MZ+/UakuC0ESQJ5E3Fr5EhqWYl4TRMCSCkkEdXjjcuQBKbNSxUqVYnA4wJH YzWrXoDlLwAAEb4GRRpY65RwmUCsONGhNSoeIxa8hCV/5nl+9a+BthEPtAxceXApTRB6 wEhg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B82wHNuO; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n20si3328867pgk.389.2021.04.22.06.08.14; Thu, 22 Apr 2021 06:08:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B82wHNuO; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236310AbhDVNIr (ORCPT + 17 others); Thu, 22 Apr 2021 09:08:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236428AbhDVNIp (ORCPT ); Thu, 22 Apr 2021 09:08:45 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F683C06138C for ; Thu, 22 Apr 2021 06:08:10 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id j18so72087834lfg.5 for ; Thu, 22 Apr 2021 06:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pmJr7udGenhHroV8BhxM4TWBA/MGEM7jtLhmDnAa3/I=; b=B82wHNuOrWtj5la07YYsokjzmWjjddXcJL0ZPdRbyg3D5rjKdeDkdmMf1mKKu1LgzW ZcTD3ed/+WqlYzGxXJs+C7tGAcnt7FSTm/2p4QAP3VH2R6R1eqN4+J/OTTPnH76o7Vbt XtDWEcnqD0jBEnVd0191uIiAnu/xE87XTZQgEaF4Low+w3Xj+9JITy2dGrwngEh2rRWI ShrXcUbSTitJpMOPbVVztfm1uPCMgzHPKFX1NhM8mFL6PRDN7Yt9oXMN4LUTgIyFGqUL zC0orFtAXzTKPoXKmY0p5K/L5b7DuyORUg5N+MnNw5E0rDi4o0UvirNSKFsT9nYR9xWv kegQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pmJr7udGenhHroV8BhxM4TWBA/MGEM7jtLhmDnAa3/I=; b=HL86VCbqQ/4Yy900UYfr8ynUHHqg/87ryfG9GFUFKNF7sxwgaqWHd/YqBElcptc9PJ YTID0JXRzgqMhF59vFK6r170giQ71Lyi7sD7BBcu6jpKr9IIF5YadVkKO64yKSEv4e77 1gdcHje+BPDbF5V9nKslWRTa1vqLxdGp06NmZ5iGilKp5Jms3hchrEWb7MvrdqkFSH00 VyzmwNb3hIKGbaDwCA2k0Nh1HDAvCtG0d56u00ZT74gDy9DSkitPsfd75ZYjNgyLqG/g syhoe7oZauvhExKNjYfbMZr+7cQJK6p80PSP6odoVkw8ilcgrvWEsiMjaMK9jXwOzAW2 X7Uw== X-Gm-Message-State: AOAM530/tALnOw5QcB+fAZREckumaz6WY4kG0Qd7qBPrjF/1T/dz6qX7 lPuiSpCszkRmR825R9yQDkT2fw== X-Received: by 2002:ac2:5299:: with SMTP id q25mr2604475lfm.594.1619096888722; Thu, 22 Apr 2021 06:08:08 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v17sm259833lfr.35.2021.04.22.06.08.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Apr 2021 06:08:08 -0700 (PDT) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Jonathan Marek , Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 2/3] drm/msm/dpu: drop dpu_hw_blk_destroy function Date: Thu, 22 Apr 2021 16:08:03 +0300 Message-Id: <20210422130804.825030-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210422130804.825030-1-dmitry.baryshkov@linaro.org> References: <20210422130804.825030-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The dpu_hw_blk_destroy() function is empty, so we can drop it now. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 13 ------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 3 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 2 -- 10 files changed, 31 deletions(-) -- 2.30.2 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c index abad043f35f5..1f2b74b9eb65 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c @@ -22,16 +22,3 @@ void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id) hw_blk->type = type; hw_blk->id = id; } - -/** - * dpu_hw_blk_destroy - destroy hw block object. - * @hw_blk: pointer to hw block object - * return: none - */ -void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk) -{ - if (!hw_blk) { - pr_err("invalid parameters\n"); - return; - } -} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h index fb3be9a36a50..7768694b558a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h @@ -24,5 +24,4 @@ struct dpu_hw_blk { }; void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id); -void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk); #endif /*_DPU_HW_BLK_H */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 04a2c4b9a357..441f66a4fb37 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -620,7 +620,5 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx, void dpu_hw_ctl_destroy(struct dpu_hw_ctl *ctx) { - if (ctx) - dpu_hw_blk_destroy(&ctx->base); kfree(ctx); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c index d2f1045a736a..977b25968f34 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c @@ -117,9 +117,6 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx, void dpu_hw_dspp_destroy(struct dpu_hw_dspp *dspp) { - if (dspp) - dpu_hw_blk_destroy(&dspp->base); - kfree(dspp); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index 6ffe97601716..17224556d5a8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -332,8 +332,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx, void dpu_hw_intf_destroy(struct dpu_hw_intf *intf) { - if (intf) - dpu_hw_blk_destroy(&intf->base); kfree(intf); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c index 554bb881de3a..76f8b8f75b82 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c @@ -189,7 +189,5 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm) { - if (lm) - dpu_hw_blk_destroy(&lm->base); kfree(lm); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c index 863229dd0140..406ba950a066 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c @@ -86,7 +86,5 @@ struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx, void dpu_hw_merge_3d_destroy(struct dpu_hw_merge_3d *hw) { - if (hw) - dpu_hw_blk_destroy(&hw->base); kfree(hw); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index 334d5b28f533..92cd724263ce 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -289,7 +289,5 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx, void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp) { - if (pp) - dpu_hw_blk_destroy(&pp->base); kfree(pp); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index ceb2488ea270..8734a47040aa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -740,8 +740,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx) { - if (ctx) - dpu_hw_blk_destroy(&ctx->base); kfree(ctx); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c index 5d2c33ec1de7..dae77d9c2c74 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -329,8 +329,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx, void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp) { - if (mdp) - dpu_hw_blk_destroy(&mdp->base); kfree(mdp); } From patchwork Thu Apr 22 13:08:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 425863 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp343587jao; Thu, 22 Apr 2021 06:08:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzEvhU69Z/mALnBKE4Dixw4CsG9dmG+rGXPhHsuLHXHg/r09kDFAQmCPjyJCfmrGHFRLzT8 X-Received: by 2002:a17:902:be02:b029:e6:bb0d:6c1e with SMTP id r2-20020a170902be02b02900e6bb0d6c1emr3390722pls.77.1619096895306; Thu, 22 Apr 2021 06:08:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619096895; cv=none; d=google.com; s=arc-20160816; b=o+zxrUqKbz8k9wPanNdXvgp2Oup1TgWBqcAwHd5kN15VRsBDkBSGVS2sAkAVGbggbG ROucYKUdnI5DZ6CzzOxx2d9UcPeXVWaguI2o7ixA6DXzEjAAHMrIySpO3jPz2Vq78bAb 7LP3/pA2WcKsQrOUb6IcZRN1V0dEsklLD46wGDd1ZsuUEUf2LkctJySaopK6n7MCGkIW XRR1oG6Aa/N5/rZOjt0ZulTroQ/dLUQ9QeZH970OpnfHR7EXtRfeYnrXvAj8GSGhioC3 TpdM3lEd8Lekh5+sKimSB7dscx6DMv2tl2CdKAHay5G9NEf0CCaFzKe1gZMBqTfNWgLX 3Pbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5DDTBrdtIX5m2n+pKNngs7kA+ovZXf2j+7G44yMR1F4=; b=Ip+shI4DjVe2kz+Vkj9hn9HB9ViN6mgPTwWd7MEZu4WeKpeEC/KCoyJO5OULWjNTGc 5WcVA0cY6hLXxfi+cCsQz1CmBpitXtpMRzctCx2orvAeeVapTPMhn76eHd2cDvYnfDbd Ra4jXnDNUT6Cgh3K+TF2wOFNN2MXtR0BMMqWBrosAbmYxAdoConfWtxZLCWYiIlY4VYz JOoJfBcj573sxGfCxJzHjwqSZzwzrWVJAPHKSSV572IEHqZTXitKedPv+kKWDYgk2F+G WMVg5XApafAkzsiuEQW4k7YCdf/WP+xbJjcrWQlmyAGYYuasaS17+xkBNr2kUl3wb8Eg 1D1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lOY5CDyy; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n20si3328867pgk.389.2021.04.22.06.08.15; Thu, 22 Apr 2021 06:08:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lOY5CDyy; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236424AbhDVNIs (ORCPT + 17 others); Thu, 22 Apr 2021 09:08:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236440AbhDVNIq (ORCPT ); Thu, 22 Apr 2021 09:08:46 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECE62C06138D for ; Thu, 22 Apr 2021 06:08:10 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id t14so14912319lfe.1 for ; Thu, 22 Apr 2021 06:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5DDTBrdtIX5m2n+pKNngs7kA+ovZXf2j+7G44yMR1F4=; b=lOY5CDyysiP6wLc9ELU69DbdSH9wkTPe4+Hze7Nn9mUVjFUwywus4/n/kzwp1W6LSX ZtTd/GTMOhTyurRUgyif8XQks5heuDWG3YOXTFkAfBG+IKv7Tl8xxeQxRzVgpVzjwS+A gnGHQPxu17xrlX26Fd6RTdiQo7tbztHX3cGjZklwxFFSaoXm7y89t4mBxCh4QBDdo/rX 8zVCpWFjVPyImIi7hN52nPQs3rKo++7c2JDn6BXhylEW9954s/AuXvdkNf2dIewTioTV 6UN9c/364nG/TUBS2Xo8K4lSHz2Z/YRymwkcd3gCbGJk27geXiJN2A7OIAAx9L+UODWk FffA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5DDTBrdtIX5m2n+pKNngs7kA+ovZXf2j+7G44yMR1F4=; b=hATYiPHrnXRXZRSYGVqlKNdHBj1AQGW4SI8e5CLUwu7vbamCVkwuArGHPHPzf4x2Qv TDNfsOvy1L+tX1b5tB7aqp3U9d9E1rGZWZRF5/wsCmWUJjX6O11p7m91C8eipU7soPya 3cd0UsuQkgzKl/f2Joo2Q9fRONTGfUB2ZW+7B8qeo/PDzTtkokbnv21Koj2j164WuSS8 0krKO+FDKJ62dtgJflzxADTztKIAhb+psZax+hz8sLHOi3yrp3AB1Rh2zM7jKTuED5Xj lw4cwMtkFMmVn2rKC8U1Hi9TodptObtjD7hMUBGkJiOmZeFc1eISet8RnYl4tfyZACLg YkpA== X-Gm-Message-State: AOAM5315m+Qk+caFKA+4IynCbkF5gv6h64iT1GepTl8a5JRCKnWXTOem U5zuicODyHtdwHAT3mDvV8/ysw== X-Received: by 2002:a05:6512:985:: with SMTP id w5mr2465933lft.122.1619096889476; Thu, 22 Apr 2021 06:08:09 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v17sm259833lfr.35.2021.04.22.06.08.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Apr 2021 06:08:09 -0700 (PDT) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Jonathan Marek , Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 3/3] drm/msm/dpu: hw_blk: make dpu_hw_blk empty opaque structure Date: Thu, 22 Apr 2021 16:08:04 +0300 Message-Id: <20210422130804.825030-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210422130804.825030-1-dmitry.baryshkov@linaro.org> References: <20210422130804.825030-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The code does not really use dpu_hw_blk fields, so drop them, making dpu_hw_blk empty structure. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 24 ------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 4 +--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 2 -- .../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 2 -- .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +- 12 files changed, 2 insertions(+), 45 deletions(-) delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c -- 2.30.2 Reported-by: kernel test robot diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 610d630326bb..55dbde30c2a2 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -58,7 +58,6 @@ msm-y := \ disp/dpu1/dpu_encoder_phys_cmd.o \ disp/dpu1/dpu_encoder_phys_vid.o \ disp/dpu1/dpu_formats.o \ - disp/dpu1/dpu_hw_blk.o \ disp/dpu1/dpu_hw_catalog.o \ disp/dpu1/dpu_hw_ctl.o \ disp/dpu1/dpu_hw_interrupts.o \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c deleted file mode 100644 index 1f2b74b9eb65..000000000000 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. - */ - -#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__ - -#include -#include -#include - -#include "dpu_hw_mdss.h" -#include "dpu_hw_blk.h" - -/** - * dpu_hw_blk_init - initialize hw block object - * @hw_blk: pointer to hw block object - * @type: hw block type - enum dpu_hw_blk_type - * @id: instance id of the hw block - */ -void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id) -{ - hw_blk->type = type; - hw_blk->id = id; -} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h index 7768694b558a..52e92f37eda4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h @@ -19,9 +19,7 @@ struct dpu_hw_blk; * @refcount: reference/usage count */ struct dpu_hw_blk { - u32 type; - int id; + /* opaque */ }; -void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id); #endif /*_DPU_HW_BLK_H */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 441f66a4fb37..f8a74f6cdc4c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -613,8 +613,6 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx, c->mixer_count = m->mixer_count; c->mixer_hw_caps = m->mixer; - dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx); - return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c index 977b25968f34..a98e964c3b6f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c @@ -110,8 +110,6 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx, c->cap = cfg; _setup_dspp_ops(c, c->cap->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_DSPP, idx); - return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index 17224556d5a8..116e2b5b1a90 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -325,8 +325,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx, c->mdss = m; _setup_intf_ops(&c->ops, c->cap->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx); - return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c index 76f8b8f75b82..cb6bb7a22c15 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c @@ -182,8 +182,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, c->cap = cfg; _setup_mixer_ops(m, &c->ops, c->cap->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx); - return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c index 406ba950a066..c06d595d5df0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c @@ -79,8 +79,6 @@ struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx, c->caps = cfg; _setup_merge_3d_ops(c, c->caps->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_MERGE_3D, idx); - return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c index 92cd724263ce..55766c97c4c8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -282,8 +282,6 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx, c->caps = cfg; _setup_pingpong_ops(c, c->caps->features); - dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx); - return c; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 8734a47040aa..69eed7932486 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -733,8 +733,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, hw_pipe->cap = cfg; _setup_layer_ops(hw_pipe, hw_pipe->cap->features); - dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx); - return hw_pipe; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c index dae77d9c2c74..282e3c6c6d48 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -322,8 +322,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx, mdp->caps = cfg; _setup_mdp_ops(&mdp->ops, mdp->caps->features); - dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx); - return mdp; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index fd2d104f0a91..5afdfceeaa6e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -428,7 +428,7 @@ static int _dpu_rm_reserve_ctls( features = ctl->caps->features; has_split_display = BIT(DPU_CTL_SPLIT_DISPLAY) & features; - DPU_DEBUG("ctl %d caps 0x%lX\n", rm->ctl_blks[j]->id, features); + DPU_DEBUG("ctl %d caps 0x%lX\n", j + CTL_0, features); if (needs_split_display != has_split_display) continue;