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Wed, 21 Apr 2021 10:15:40 +0000 From: Dong Aisheng To: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: dongas86@gmail.com, kernel@pengutronix.de, shawnguo@kernel.org, linux-imx@nxp.com, ulf.hansson@linaro.org, abel.vesa@nxp.com, Dong Aisheng Subject: [PATCH 1/3] firmware: imx: pd: fix img-jpegdec pd names Date: Wed, 21 Apr 2021 18:14:30 +0800 Message-Id: <20210421101432.2043310-1-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.25.1 X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: HK2PR02CA0213.apcprd02.prod.outlook.com (2603:1096:201:20::25) To AM6PR04MB4966.eurprd04.prod.outlook.com (2603:10a6:20b:2::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by HK2PR02CA0213.apcprd02.prod.outlook.com (2603:1096:201:20::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4042.16 via Frontend Transport; Wed, 21 Apr 2021 10:15:37 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a9ebc99d-829c-410b-0aa5-08d904ae6a07 X-MS-TrafficTypeDiagnostic: AS8PR04MB7687: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:93; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: xtUHzQj84MLqxPCLxCKV7ux8JCamKIzBbLBb0JhYpxl7IK8WWNWExO22YbRodVQRi3PSehQyi0ihqbOqWMDPWUXEvdpLaXyiE/HYGjMX1KxESwcoN+PvtkEAdaBlEvx1mIV+28uRQKhTj2+IFCe/BC3wMC2+PkSX+d8cyMd4nuyUZ6zKTUXJQIknIVaZ7rYhb3Qr8gq72ENu6pRyj7D/DqzFxyw5SM/FJ3YOvyDY71vOIfROhD4iwjNKEW/zE48Jdi6cgkUD0QjtTl5KqmirzMEe3L4X3ju9T7cVLice0JIGaFIRqSoS26HCjPe+EKiE8ZbyDLbXSOPwfJSBa2WTwyrHZigz6w71i/o66fvVwGnhzz1tNXCW6XXE31wh9x5NSGAr7r37HArdva/KgnId3I27h06xMy3D7y15tSSOZlZXEZUzcJdLfi5/4jdd2ZZffZp6dMvdOkumcfaAMexS11ymL4lKY1ljNwwvWePmUiZvnrjAYbKrrLpBME5CYapU3kX7Wl3B9xeZs4WFbD9Y7+a2vYKEHtZ/G2cEmFbV78LwUW/8hcnyDOBqSwsbM8cnr2Q8yMN4Cy1w5YM+Z1LVAaZ+vzQD9aOzntdVuNwkgJfKPgXCSPpS0yUchDJ4Wf71tLTgneGL+ECEwKSXHA9s588cGy8riBOet9+EhZs+xdH+lgsxJD3/tPvBWEWvtyPYXfkCEV6Vt3+MVu0U+EMzBvn0P8fmhDznQrB3vN8oamViRkzTrnkl+lI2293MxM+GlEw4seap45oVkJdaFv2+dYFuVAwjRUUCgO0NYTE91hq2kfCPdDUsPW5Cb1JUhk3JjVISW9857hi0qWd60r44Lj1dotbuYBS5Dyw58uIfCU5J2Tsav/VnU9GhxkxVeh0NTN5UxMdL4sGpha9+ycCt5GS2mADmfwfsFDYAKafPHUW2E/UsZeQ5N074TQ7HHD2Tspf3kamSE9vvHN9H6xvFV1T6zLJz1j6Ly7231/xWKfv1TDCrtbyHBTQCUw4aDGhBRKlhbn5IAu/TLxK/Fq8Xjjl49domfNk01TdV9KsN24Y7rv5e5vm6685y2XGAQSYdIReUHd8KfJEoV09pqrM+W7As99jwqU5LVHDxjIgv/VT/J8OnRJoMI42zD8LREDo8hqXRU55yfNLAC0q7SiQ4hJj43wdwInQwTCttSoWSX0O+cV31h2qRGA08fDAKThP/QzhPy1dItYysw8KM+KOMZ1sXS6eChKAxEM2ouJ3q5XlDu/GLmV/ozoP9wm5pKs9sHsg8vbhvEk7foerS1zHR8gWvbeI9f+56hrg7QM6VJb4o4b/Aa/hUNmtqeG6nclQr X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a9ebc99d-829c-410b-0aa5-08d904ae6a07 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4966.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2021 10:15:40.2940 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 8BeHULQfUfZxCjnSclRJNIwuOnqkP2gFkBYHhqZe5vVHIdLIuuVnKg2AvCjIiTFHJf0lchy3y1csvEoJ3XfbIQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7687 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Changed as follows to align with HW better: img-jpegdec-s00 -> img-jpegdec-s0 img-jpegdec-s01 -> img-jpegdec-s1 Signed-off-by: Dong Aisheng --- drivers/firmware/imx/scu-pd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index ff6569c4a53b..a7589cc5ac23 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -198,9 +198,9 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* IMAGE SS */ { "img-jpegdec-mp", IMX_SC_R_MJPEG_DEC_MP, 1, false, 0 }, - { "img-jpegdec-s0", IMX_SC_R_MJPEG_DEC_S0, 4, true, 0 }, + { "img-jpegdec-s", IMX_SC_R_MJPEG_DEC_S0, 4, true, 0 }, { "img-jpegenc-mp", IMX_SC_R_MJPEG_ENC_MP, 1, false, 0 }, - { "img-jpegenc-s0", IMX_SC_R_MJPEG_ENC_S0, 4, true, 0 }, + { "img-jpegenc-s", IMX_SC_R_MJPEG_ENC_S0, 4, true, 0 }, }; static const struct imx_sc_pd_soc imx8qxp_scu_pd = { From patchwork Wed Apr 21 10:14:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aisheng Dong X-Patchwork-Id: 426070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99430C433B4 for ; Wed, 21 Apr 2021 10:15:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 63FBB6143B for ; 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vger.kernel.org; dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4966.eurprd04.prod.outlook.com (2603:10a6:20b:2::14) by AS8PR04MB7687.eurprd04.prod.outlook.com (2603:10a6:20b:291::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4042.21; Wed, 21 Apr 2021 10:15:43 +0000 Received: from AM6PR04MB4966.eurprd04.prod.outlook.com ([fe80::b10a:ad0:a6f5:db9b]) by AM6PR04MB4966.eurprd04.prod.outlook.com ([fe80::b10a:ad0:a6f5:db9b%2]) with mapi id 15.20.4042.024; Wed, 21 Apr 2021 10:15:43 +0000 From: Dong Aisheng To: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: dongas86@gmail.com, kernel@pengutronix.de, shawnguo@kernel.org, linux-imx@nxp.com, ulf.hansson@linaro.org, abel.vesa@nxp.com, Dong Aisheng Subject: [PATCH 2/3] firmware: imx: pd: add missing power domains Date: Wed, 21 Apr 2021 18:14:31 +0800 Message-Id: <20210421101432.2043310-2-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210421101432.2043310-1-aisheng.dong@nxp.com> References: <20210421101432.2043310-1-aisheng.dong@nxp.com> X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: HK2PR02CA0213.apcprd02.prod.outlook.com (2603:1096:201:20::25) To AM6PR04MB4966.eurprd04.prod.outlook.com (2603:10a6:20b:2::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by HK2PR02CA0213.apcprd02.prod.outlook.com (2603:1096:201:20::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4042.16 via Frontend Transport; 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Add them for driver users. Signed-off-by: Dong Aisheng --- drivers/firmware/imx/scu-pd.c | 69 +++++++++++++++++++++++++++++++++-- 1 file changed, 66 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index a7589cc5ac23..446a4f9f0ec9 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -120,12 +120,17 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 }, { "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 }, { "audio-clk-1", IMX_SC_R_AUDIO_CLK_1, 1, false, 0 }, - { "dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 }, + { "dma0-ch", IMX_SC_R_DMA_0_CH0, 32, true, 0 }, { "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 }, { "dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 }, + { "dma2-ch", IMX_SC_R_DMA_2_CH5, 27, true, 5 }, + { "dma3-ch", IMX_SC_R_DMA_3_CH0, 32, true, 0 }, { "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 }, { "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 }, { "esai0", IMX_SC_R_ESAI_0, 1, false, 0 }, + { "esai1", IMX_SC_R_ESAI_1, 1, false, 0 }, + { "mclk-out-0", IMX_SC_R_MCLK_OUT_0, 1, false, 0 }, + { "mclk-out-1", IMX_SC_R_MCLK_OUT_1, 1, false, 0 }, { "spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 }, { "spdif1", IMX_SC_R_SPDIF_1, 1, false, 0 }, { "sai", IMX_SC_R_SAI_0, 3, true, 0 }, @@ -142,11 +147,13 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* DMA SS */ { "can", IMX_SC_R_CAN_0, 3, true, 0 }, { "ftm", IMX_SC_R_FTM_0, 2, true, 0 }, - { "lpi2c", IMX_SC_R_I2C_0, 4, true, 0 }, + { "lpi2c", IMX_SC_R_I2C_0, 5, true, 0 }, { "adc", IMX_SC_R_ADC_0, 2, true, 0 }, { "lcd", IMX_SC_R_LCD_0, 1, true, 0 }, + { "lcd-pll", IMX_SC_R_ELCDIF_PLL, 1, true, 0 }, { "lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 }, - { "lpuart", IMX_SC_R_UART_0, 4, true, 0 }, + { "lpuart", IMX_SC_R_UART_0, 5, true, 0 }, + { "sim", IMX_SC_R_EMVSIM_0, 2, true, 0 }, { "lpspi", IMX_SC_R_SPI_0, 4, true, 0 }, { "irqstr_dsp", IMX_SC_R_IRQSTR_DSP, 1, false, 0 }, @@ -155,13 +162,21 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 }, { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 }, { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false, 0 }, + { "vpu-enc1", IMX_SC_R_VPU_ENC_1, 1, false, 0 }, + { "vpu-mu0", IMX_SC_R_VPU_MU_0, 1, false, 0 }, + { "vpu-mu1", IMX_SC_R_VPU_MU_1, 1, false, 0 }, + { "vpu-mu2", IMX_SC_R_VPU_MU_2, 1, false, 0 }, /* GPU SS */ { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 }, + { "gpu1-pid", IMX_SC_R_GPU_1_PID0, 4, true, 0 }, /* HSIO SS */ + { "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 }, + { "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 }, { "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 }, { "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 }, + { "sata-0", IMX_SC_R_SATA_0, 1, false, 0 }, { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 }, /* MIPI SS */ @@ -175,13 +190,21 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* LVDS SS */ { "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 }, + { "lvds0-pwm", IMX_SC_R_LVDS_0_PWM_0, 1, false, 0 }, + { "lvds0-lpi2c", IMX_SC_R_LVDS_0_I2C_0, 2, true, 0 }, { "lvds1", IMX_SC_R_LVDS_1, 1, false, 0 }, + { "lvds1-pwm", IMX_SC_R_LVDS_1_PWM_0, 1, false, 0 }, + { "lvds1-lpi2c", IMX_SC_R_LVDS_1_I2C_0, 2, true, 0 }, /* DC SS */ { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 }, { "dc0-video", IMX_SC_R_DC_0_VIDEO0, 2, true, 0 }, + { "dc1", IMX_SC_R_DC_1, 1, false, 0 }, + { "dc1-pll", IMX_SC_R_DC_1_PLL_0, 2, true, 0 }, + { "dc1-video", IMX_SC_R_DC_1_VIDEO0, 2, true, 0 }, + /* CM40 SS */ { "cm40-i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 }, { "cm40-intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 }, @@ -196,11 +219,51 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0}, { "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0}, + /* CM41 SS */ + { "cm41_i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 }, + { "cm41_intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 }, + + /* DB SS */ + { "perf", IMX_SC_R_PERF, 1, false, 0}, + /* IMAGE SS */ { "img-jpegdec-mp", IMX_SC_R_MJPEG_DEC_MP, 1, false, 0 }, { "img-jpegdec-s", IMX_SC_R_MJPEG_DEC_S0, 4, true, 0 }, { "img-jpegenc-mp", IMX_SC_R_MJPEG_ENC_MP, 1, false, 0 }, { "img-jpegenc-s", IMX_SC_R_MJPEG_ENC_S0, 4, true, 0 }, + { "img-pdma", IMX_SC_R_ISI_CH0, 8, true, 0 }, + { "img-csi0", IMX_SC_R_CSI_0, 1, false, 0 }, + { "img-csi0-i2c0", IMX_SC_R_CSI_0_I2C_0, 1, false, 0 }, + { "img-csi0-pwm0", IMX_SC_R_CSI_0_PWM_0, 1, false, 0 }, + { "img-csi1", IMX_SC_R_CSI_1, 1, false, 0 }, + { "img-csi1-i2c0", IMX_SC_R_CSI_1_I2C_0, 1, false, 0 }, + { "img-csi1-pwm0", IMX_SC_R_CSI_1_PWM_0, 1, false, 0 }, + { "img-parallel", IMX_SC_R_PI_0, 1, false, 0 }, + { "img-parallel-i2c0", IMX_SC_R_PI_0_I2C_0, 1, false, 0 }, + { "img-parallel-pwm", IMX_SC_R_PI_0_PWM_0, 2, true, 0 }, + { "img-parallel-pll", IMX_SC_R_PI_0_PLL, 1, false, 0 }, + + /* SECO SS */ + { "seco_mu", IMX_SC_R_SECO_MU_2, 3, true, 2}, + + /* HDMI TX SS */ + { "hdmi-tx", IMX_SC_R_HDMI, 1, false, 0}, + { "hdmi-tx-i2s", IMX_SC_R_HDMI_I2S, 1, false, 0}, + { "hdmi-tx-i2c0", IMX_SC_R_HDMI_I2C_0, 1, false, 0}, + { "hdmi-tx-pll0", IMX_SC_R_HDMI_PLL_0, 1, false, 0}, + { "hdmi-tx-pll1", IMX_SC_R_HDMI_PLL_1, 1, false, 0}, + + /* HDMI RX SS */ + { "hdmi-rx", IMX_SC_R_HDMI_RX, 1, false, 0}, + { "hdmi-rx-pwm0", IMX_SC_R_HDMI_RX_PWM_0, 1, false, 0}, + { "hdmi-rx-i2c0", IMX_SC_R_HDMI_RX_I2C_0, 1, false, 0}, + { "hdmi-rx-bypass", IMX_SC_R_HDMI_RX_BYPASS, 1, false, 0}, + + /* SECURITY SS */ + { "sec-jr", IMX_SC_R_CAAM_JR2, 2, true, 2}, + + /* BOARD SS */ + { "board", IMX_SC_R_BOARD_R0, 8, true, 0}, }; static const struct imx_sc_pd_soc imx8qxp_scu_pd = { From patchwork Wed Apr 21 10:14:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aisheng Dong X-Patchwork-Id: 425548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 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2Wpgtnl+BEQVyG0jEE5Xaq+VaB9nBFWDzNn1dbKQowCbzd5ZRfFH6lphDJ4/vDuThGtM9bd0ZJBYsNkqv8GrFmW36UbCZ+CA/J2STaoTCmGzxXLzptKOKFqdWhA6ZZurfQjMoLXlBwj58tvuN1l7hvEOkJ2+VCbbyY7XUabQJrhMY0avsR45C/rlQ51N9Qttzj1KvvogUsUdm7Kvpm2uqMoppmeX53wrzoR+I4Isb9knbNsfhHdXfSMFyJgk1B/n/YL+25UO7NzrDWHOlrsN9bUih5vlPh8UxUJ9qRPAg2HLqf3W+Is1vTiC8UZ2gcOIFa4d/Vb1h1T7iJFQUzbLLpZIRMK+gH0Jj/ys0uMwQ3/wly8Gm83boo/SL2UtFvOw5NwTCug0r7hji4PhZ4G9T6iBpDfgvBqH8jm/O+xdlOqLXUmmYTnJk4VItuFJxyKc3pt8NnMsKKg8/VOASiRqC62kW584j4KugXFBBkmAiW1XkNbMBNsmKLcRwgKOQOa1I2oTpIXTjjFjRfO06QDGSqDU8FlC1FuDClRTVbdD+58tDOVMnBptJHK+kkKrK5OSsMczYSeKye5NZ5rsQlPTkP7bqg9lFR0QFBCXdnJAwoOXxf+cfATGnjXO5h1Tj0joPEpqrgps8eQENGlPDJlgHitCVuFX8y4ueq9AoynTWUeNM1fdOttYn5uivN6Z9TjdBnbEgVQOInrvox7aIz8qgsvX2CpS/llRq0W5/rdE/vykc7vOnpOWCUBaiSIuXR4xcQgBzQIyE9+Eqv7vLcz8bZae5kj0UwTWfEGljPJ1NaB2BozdL/qs1cxt4ajlCSWEBwiDDhywozpNxBdCYzwTi0dr6DYrrjXxVclMfUZRc+80sm+2Zm9QbxgfQ8xqz5tL0Y6DMyxfX9zktx+MFP3s6IyoxNhAaWiOomYn8oKXaDOH3LSv3FaOxx/iqGgqakhMUx2W88hbdaAlnsGvqb0D2SvrkjzNAKzsIVGwo6eM2Y89u9vuZfsofz7tdg0kSI7CFdscYjB+5NxrUxODDoFlgWPQJIaMe64s8+84QBOAa1qhMJnsN73+OSi+cAUCIdsmQNb94kTMItsevLlUFCOY7Kyyg7r0mWi0wUXP53ULv+vaAMm7/Q7N7nskJqAYuaknVYBYg3sh5shrSGNytvIh0wEwVkrPiGU1BPL0ZziQFF3SDfyRDcuahfWI2RS5sEQQPGQ2qIKkDJtbQl1/MOxMMdH6IZst6//MWyn5GkYk/QUTaHWFxpj0U3g2zjoh5o03g0B7QWaimqWZdmvQ4lWyxdcn9Ze+xneKyP0F5K+592tvTmq9SFMKUPkLTT3MBfFa X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 79ed7e47-5c8b-4efd-f649-08d904ae6dbc X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4966.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2021 10:15:46.4285 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2Rontj6Tz9TtWsmQkruckLnJAD+M1x/GuFeEy5p3lV1Nh3G64dDKsOl8++pcdkUWOLhO/PTUqUUbLfrdCYM30Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7687 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The SCU protocal is platform independent, so make the driver code as it is by dropping the soc prefix for structures. Signed-off-by: Dong Aisheng --- drivers/firmware/imx/scu-pd.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index 446a4f9f0ec9..bdf88aed6dca 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -95,7 +95,7 @@ struct imx_sc_pd_soc { static int imx_con_rsrc; -static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { +static const struct imx_sc_pd_range scu_pd_ranges[] = { /* LSIO SS */ { "pwm", IMX_SC_R_PWM_0, 8, true, 0 }, { "gpio", IMX_SC_R_GPIO_0, 8, true, 0 }, @@ -266,9 +266,9 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "board", IMX_SC_R_BOARD_R0, 8, true, 0}, }; -static const struct imx_sc_pd_soc imx8qxp_scu_pd = { - .pd_ranges = imx8qxp_scu_pd_ranges, - .num_ranges = ARRAY_SIZE(imx8qxp_scu_pd_ranges), +static const struct imx_sc_pd_soc scu_pd = { + .pd_ranges = scu_pd_ranges, + .num_ranges = ARRAY_SIZE(scu_pd_ranges), }; static struct imx_sc_ipc *pm_ipc_handle; @@ -463,8 +463,7 @@ static int imx_sc_pd_probe(struct platform_device *pdev) } static const struct of_device_id imx_sc_pd_match[] = { - { .compatible = "fsl,imx8qxp-scu-pd", &imx8qxp_scu_pd}, - { .compatible = "fsl,scu-pd", &imx8qxp_scu_pd}, + { .compatible = "fsl,scu-pd", &scu_pd}, { /* sentinel */ } };