From patchwork Mon Apr 19 14:20:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 425012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36188C433ED for ; Mon, 19 Apr 2021 14:21:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 07D1561221 for ; Mon, 19 Apr 2021 14:21:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238809AbhDSOVf (ORCPT ); Mon, 19 Apr 2021 10:21:35 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54588 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233529AbhDSOVd (ORCPT ); Mon, 19 Apr 2021 10:21:33 -0400 X-UUID: 34de687a778e45cf86052c1ab980c8dc-20210419 X-UUID: 34de687a778e45cf86052c1ab980c8dc-20210419 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 732026872; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 22:21:00 +0800 From: To: , CC: , , , , , , , , , , , , , Lorenzo Bianconi Subject: [PATCH v2 1/6] mt76: mt7921: move mt7921_dma_reset in dma.c Date: Mon, 19 Apr 2021 22:20:54 +0800 Message-ID: <1618842059-8192-2-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> References: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Lorenzo Bianconi Move mt7921_dma_reset routine in dma.c and make mt7921_dma_prefetch static. Moreover add force parameter to mt7921_dma_reset signature. This is a preliminary patch to reset dma mt7921_mcu_drv_pmctrl. Signed-off-by: Sean Wang Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt7921/dma.c | 73 ++++++++++++++++++- .../net/wireless/mediatek/mt76/mt7921/mac.c | 67 +---------------- .../wireless/mediatek/mt76/mt7921/mt7921.h | 2 +- 3 files changed, 74 insertions(+), 68 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c index 7ada8339b74f..0c577a5bac13 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c @@ -97,7 +97,7 @@ static int mt7921_poll_rx(struct napi_struct *napi, int budget) return done; } -void mt7921_dma_prefetch(struct mt7921_dev *dev) +static void mt7921_dma_prefetch(struct mt7921_dev *dev) { #define PREFETCH(base, depth) ((base) << 16 | (depth)) @@ -229,6 +229,77 @@ static int mt7921_dmashdl_disabled(struct mt7921_dev *dev) return 0; } +int mt7921_dma_reset(struct mt7921_dev *dev, bool force) +{ + int i; + + if (force) { + /* reset */ + mt76_clear(dev, MT_WFDMA0_RST, + MT_WFDMA0_RST_DMASHDL_ALL_RST | + MT_WFDMA0_RST_LOGIC_RST); + + mt76_set(dev, MT_WFDMA0_RST, + MT_WFDMA0_RST_DMASHDL_ALL_RST | + MT_WFDMA0_RST_LOGIC_RST); + } + + /* disable WFDMA0 */ + mt76_clear(dev, MT_WFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN | + MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); + + if (!mt76_poll(dev, MT_WFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | + MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000)) + return -ETIMEDOUT; + + /* reset hw queues */ + for (i = 0; i < __MT_TXQ_MAX; i++) + mt76_queue_reset(dev, dev->mphy.q_tx[i]); + + for (i = 0; i < __MT_MCUQ_MAX; i++) + mt76_queue_reset(dev, dev->mt76.q_mcu[i]); + + mt76_for_each_q_rx(&dev->mt76, i) + mt76_queue_reset(dev, &dev->mt76.q_rx[i]); + + mt76_tx_status_check(&dev->mt76, NULL, true); + + /* configure perfetch settings */ + mt7921_dma_prefetch(dev); + + /* reset dma idx */ + mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); + + /* configure delay interrupt */ + mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); + + mt76_set(dev, MT_WFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_TX_WB_DDONE | + MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN | + MT_WFDMA0_GLO_CFG_CLK_GAT_DIS | + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); + + mt76_set(dev, MT_WFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); + + mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); + + /* enable interrupts for TX/RX rings */ + mt7921_irq_enable(dev, + MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | + MT_INT_MCU_CMD); + mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); + + return 0; +} + int mt7921_dma_init(struct mt7921_dev *dev) { /* Increase buffer size to receive large VHT/HE MPDUs */ diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c index a73a5626321f..9aadb598019d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c @@ -1214,71 +1214,6 @@ int mt7921_wfsys_reset(struct mt7921_dev *dev) WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500); } -static void -mt7921_dma_reset(struct mt7921_dev *dev) -{ - int i; - - /* reset */ - mt76_clear(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | MT_WFDMA0_RST_LOGIC_RST); - - mt76_set(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | MT_WFDMA0_RST_LOGIC_RST); - - /* disable WFDMA0 */ - mt76_clear(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN | - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); - - mt76_poll(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | - MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000); - - /* reset hw queues */ - for (i = 0; i < __MT_TXQ_MAX; i++) - mt76_queue_reset(dev, dev->mphy.q_tx[i]); - - for (i = 0; i < __MT_MCUQ_MAX; i++) - mt76_queue_reset(dev, dev->mt76.q_mcu[i]); - - mt76_for_each_q_rx(&dev->mt76, i) - mt76_queue_reset(dev, &dev->mt76.q_rx[i]); - - mt76_tx_status_check(&dev->mt76, NULL, true); - - /* configure perfetch settings */ - mt7921_dma_prefetch(dev); - - /* reset dma idx */ - mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); - - /* configure delay interrupt */ - mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); - - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_WB_DDONE | - MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN | - MT_WFDMA0_GLO_CFG_CLK_GAT_DIS | - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); - - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); - - mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); - - /* enable interrupts for TX/RX rings */ - mt7921_irq_enable(dev, - MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | - MT_INT_MCU_CMD); - mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); -} - void mt7921_tx_token_put(struct mt7921_dev *dev) { struct mt76_txwi_cache *txwi; @@ -1349,7 +1284,7 @@ mt7921_mac_reset(struct mt7921_dev *dev) mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); mt7921_wfsys_reset(dev); - mt7921_dma_reset(dev); + mt7921_dma_reset(dev, true); mt76_for_each_q_rx(&dev->mt76, i) { mt76_queue_rx_reset(dev, i); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h index e461fe9b2c20..58cfa2bbeba5 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h @@ -253,7 +253,7 @@ int mt7921_eeprom_get_target_power(struct mt7921_dev *dev, u8 chain_idx); void mt7921_eeprom_init_sku(struct mt7921_dev *dev); int mt7921_dma_init(struct mt7921_dev *dev); -void mt7921_dma_prefetch(struct mt7921_dev *dev); +int mt7921_dma_reset(struct mt7921_dev *dev, bool force); void mt7921_dma_cleanup(struct mt7921_dev *dev); int mt7921_run_firmware(struct mt7921_dev *dev); int mt7921_mcu_init(struct mt7921_dev *dev); From patchwork Mon Apr 19 14:20:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 424298 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 328CCC433B4 for ; Mon, 19 Apr 2021 14:21:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EE04E61221 for ; Mon, 19 Apr 2021 14:21:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238405AbhDSOVd (ORCPT ); Mon, 19 Apr 2021 10:21:33 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:48984 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232452AbhDSOVc (ORCPT ); Mon, 19 Apr 2021 10:21:32 -0400 X-UUID: 0822cb5e665f47c19192faf82f51e6cd-20210419 X-UUID: 0822cb5e665f47c19192faf82f51e6cd-20210419 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 700161532; Mon, 19 Apr 2021 22:21:01 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 22:21:00 +0800 From: To: , CC: , , , , , , , , , , , , , Lorenzo Bianconi Subject: [PATCH v2 2/6] mt76: mt7921: introduce mt7921_wpdma_reset utility routine Date: Mon, 19 Apr 2021 22:20:55 +0800 Message-ID: <1618842059-8192-3-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> References: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Lorenzo Bianconi Introduce mt7921_wpdma_reset routine to reset wpdma during chip reset or driver_own request. Signed-off-by: Sean Wang Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt7921/dma.c | 44 ++++++++++++++++++- .../net/wireless/mediatek/mt76/mt7921/mac.c | 29 ++---------- .../wireless/mediatek/mt76/mt7921/mt7921.h | 2 +- 3 files changed, 47 insertions(+), 28 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c index 0c577a5bac13..af4b6cf38929 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c @@ -229,7 +229,7 @@ static int mt7921_dmashdl_disabled(struct mt7921_dev *dev) return 0; } -int mt7921_dma_reset(struct mt7921_dev *dev, bool force) +static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) { int i; @@ -300,6 +300,48 @@ int mt7921_dma_reset(struct mt7921_dev *dev, bool force) return 0; } +int mt7921_wfsys_reset(struct mt7921_dev *dev) +{ + mt76_set(dev, 0x70002600, BIT(0)); + msleep(200); + mt76_clear(dev, 0x70002600, BIT(0)); + + if (!__mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B, + WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500)) + return -ETIMEDOUT; + + return 0; +} + +int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force) +{ + int i, err; + + /* clean up hw queues */ + for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++) + mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); + + for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++) + mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true); + + mt76_for_each_q_rx(&dev->mt76, i) + mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); + + if (force) { + err = mt7921_wfsys_reset(dev); + if (err) + return err; + } + err = mt7921_dma_reset(dev, force); + if (err) + return err; + + mt76_for_each_q_rx(&dev->mt76, i) + mt76_queue_rx_reset(dev, i); + + return 0; +} + int mt7921_dma_init(struct mt7921_dev *dev) { /* Increase buffer size to receive large VHT/HE MPDUs */ diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c index 9aadb598019d..98daf03884a3 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c @@ -1204,16 +1204,6 @@ void mt7921_update_channel(struct mt76_dev *mdev) mt76_connac_power_save_sched(&dev->mphy, &dev->pm); } -int mt7921_wfsys_reset(struct mt7921_dev *dev) -{ - mt76_set(dev, 0x70002600, BIT(0)); - msleep(200); - mt76_clear(dev, 0x70002600, BIT(0)); - - return __mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B, - WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500); -} - void mt7921_tx_token_put(struct mt7921_dev *dev) { struct mt76_txwi_cache *txwi; @@ -1273,21 +1263,11 @@ mt7921_mac_reset(struct mt7921_dev *dev) mt7921_tx_token_put(dev); idr_init(&dev->token); - /* clean up hw queues */ - for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++) - mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true); - - for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++) - mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true); - - mt76_for_each_q_rx(&dev->mt76, i) - mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); - - mt7921_wfsys_reset(dev); - mt7921_dma_reset(dev, true); + err = mt7921_wpdma_reset(dev, true); + if (err) + return err; mt76_for_each_q_rx(&dev->mt76, i) { - mt76_queue_rx_reset(dev, i); napi_enable(&dev->mt76.napi[i]); napi_schedule(&dev->mt76.napi[i]); } @@ -1301,9 +1281,6 @@ mt7921_mac_reset(struct mt7921_dev *dev) mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); - mt7921_irq_enable(dev, - MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | - MT_INT_MCU_CMD); err = mt7921_run_firmware(dev); if (err) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h index 58cfa2bbeba5..67cb0a647066 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h @@ -253,7 +253,7 @@ int mt7921_eeprom_get_target_power(struct mt7921_dev *dev, u8 chain_idx); void mt7921_eeprom_init_sku(struct mt7921_dev *dev); int mt7921_dma_init(struct mt7921_dev *dev); -int mt7921_dma_reset(struct mt7921_dev *dev, bool force); +int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force); void mt7921_dma_cleanup(struct mt7921_dev *dev); int mt7921_run_firmware(struct mt7921_dev *dev); int mt7921_mcu_init(struct mt7921_dev *dev); From patchwork Mon Apr 19 14:20:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 424295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E855C43461 for ; Mon, 19 Apr 2021 14:21:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3B70C61090 for ; Mon, 19 Apr 2021 14:21:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239080AbhDSOVl (ORCPT ); Mon, 19 Apr 2021 10:21:41 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54674 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S239050AbhDSOVj (ORCPT ); Mon, 19 Apr 2021 10:21:39 -0400 X-UUID: 927164bb07034f22b162b68cc5a75d08-20210419 X-UUID: 927164bb07034f22b162b68cc5a75d08-20210419 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1902725450; Mon, 19 Apr 2021 22:21:06 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 22:21:00 +0800 From: To: , CC: , , , , , , , , , , , , , Lorenzo Bianconi Subject: [PATCH v2 3/6] mt76: mt7921: introduce mt7921_dma_{enable, disable} utilities Date: Mon, 19 Apr 2021 22:20:56 +0800 Message-ID: <1618842059-8192-4-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> References: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: D313CF67F8EEFB128D56CE4EEE4ECAE5CBE9FEB55ED205ACA51F34D28659EEE02000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Lorenzo Bianconi Introduce mt7921_dma_enable and mt7921_dma_disable utilities routine in order for code reusing between mt7921_dma_reset and mt7921_dma_init. This is a preliminary patch to reset dma during device driver_own request. Signed-off-by: Sean Wang Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt7921/dma.c | 108 ++++++------------ 1 file changed, 35 insertions(+), 73 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c index af4b6cf38929..fb7f98d92377 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c @@ -221,18 +221,8 @@ static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) return dev->bus_ops->rmw(mdev, addr, mask, val); } -static int mt7921_dmashdl_disabled(struct mt7921_dev *dev) +static int mt7921_dma_disable(struct mt7921_dev *dev, bool force) { - mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0, MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); - mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); - - return 0; -} - -static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) -{ - int i; - if (force) { /* reset */ mt76_clear(dev, MT_WFDMA0_RST, @@ -244,6 +234,11 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) MT_WFDMA0_RST_LOGIC_RST); } + /* disable dmashdl */ + mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0, + MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); + mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); + /* disable WFDMA0 */ mt76_clear(dev, MT_WFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN | @@ -257,18 +252,11 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000)) return -ETIMEDOUT; - /* reset hw queues */ - for (i = 0; i < __MT_TXQ_MAX; i++) - mt76_queue_reset(dev, dev->mphy.q_tx[i]); - - for (i = 0; i < __MT_MCUQ_MAX; i++) - mt76_queue_reset(dev, dev->mt76.q_mcu[i]); - - mt76_for_each_q_rx(&dev->mt76, i) - mt76_queue_reset(dev, &dev->mt76.q_rx[i]); - - mt76_tx_status_check(&dev->mt76, NULL, true); + return 0; +} +static int mt7921_dma_enable(struct mt7921_dev *dev) +{ /* configure perfetch settings */ mt7921_dma_prefetch(dev); @@ -300,6 +288,29 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) return 0; } +static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) +{ + int i, err; + + err = mt7921_dma_disable(dev, force); + if (err) + return err; + + /* reset hw queues */ + for (i = 0; i < __MT_TXQ_MAX; i++) + mt76_queue_reset(dev, dev->mphy.q_tx[i]); + + for (i = 0; i < __MT_MCUQ_MAX; i++) + mt76_queue_reset(dev, dev->mt76.q_mcu[i]); + + mt76_for_each_q_rx(&dev->mt76, i) + mt76_queue_reset(dev, &dev->mt76.q_rx[i]); + + mt76_tx_status_check(&dev->mt76, NULL, true); + + return mt7921_dma_enable(dev); +} + int mt7921_wfsys_reset(struct mt7921_dev *dev) { mt76_set(dev, 0x70002600, BIT(0)); @@ -362,32 +373,10 @@ int mt7921_dma_init(struct mt7921_dev *dev) mt76_dma_attach(&dev->mt76); - /* reset */ - mt76_clear(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | - MT_WFDMA0_RST_LOGIC_RST); - - mt76_set(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | - MT_WFDMA0_RST_LOGIC_RST); - - ret = mt7921_dmashdl_disabled(dev); + ret = mt7921_dma_disable(dev, true); if (ret) return ret; - /* disable WFDMA0 */ - mt76_clear(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | - MT_WFDMA0_GLO_CFG_RX_DMA_EN | - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); - - mt76_poll(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | - MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000); - /* init tx queue */ ret = mt7921_init_tx_queues(&dev->phy, MT7921_TXQ_BAND0, MT7921_TX_RING_SIZE); @@ -439,34 +428,7 @@ int mt7921_dma_init(struct mt7921_dev *dev) mt7921_poll_tx, NAPI_POLL_WEIGHT); napi_enable(&dev->mt76.tx_napi); - /* configure perfetch settings */ - mt7921_dma_prefetch(dev); - - /* reset dma idx */ - mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); - - /* configure delay interrupt */ - mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); - - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_WB_DDONE | - MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN | - MT_WFDMA0_GLO_CFG_CLK_GAT_DIS | - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); - - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); - - mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); - - /* enable interrupts for TX/RX rings */ - mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | - MT_INT_MCU_CMD); - mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); - - return 0; + return mt7921_dma_enable(dev); } void mt7921_dma_cleanup(struct mt7921_dev *dev) From patchwork Mon Apr 19 14:20:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 425010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C051EC433ED for ; Mon, 19 Apr 2021 14:21:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9CE5761221 for ; Mon, 19 Apr 2021 14:21:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239157AbhDSOVl (ORCPT ); Mon, 19 Apr 2021 10:21:41 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:49028 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S238604AbhDSOVh (ORCPT ); Mon, 19 Apr 2021 10:21:37 -0400 X-UUID: 3970f636acf443b3867fcd2d47c393e6-20210419 X-UUID: 3970f636acf443b3867fcd2d47c393e6-20210419 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 894135357; Mon, 19 Apr 2021 22:21:02 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 22:21:00 +0800 From: To: , CC: , , , , , , , , , , , , , Lorenzo Bianconi , Leon Yen Subject: [PATCH v2 4/6] mt76: mt7921: introduce mt7921_wpdma_reinit_cond utility routine Date: Mon, 19 Apr 2021 22:20:57 +0800 Message-ID: <1618842059-8192-5-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> References: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: FAD8A403A11F7897794284DAA6677DC5ECB4C422DCC3A0B248AEECEBD0CF588A2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Lorenzo Bianconi Add mt7921_wpdma_reinit_cond to check dummy reg if driver needs to reinitialized WPDMA after driver_own operation Co-developed-by: Sean Wang Signed-off-by: Sean Wang Co-developed-by: Leon Yen Signed-off-by: Leon Yen Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt76_connac.h | 2 ++ .../wireless/mediatek/mt76/mt7921/debugfs.c | 3 +++ .../net/wireless/mediatek/mt76/mt7921/dma.c | 25 +++++++++++++++++++ .../wireless/mediatek/mt76/mt7921/mt7921.h | 6 +++++ 4 files changed, 36 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac.h b/drivers/net/wireless/mediatek/mt76/mt76_connac.h index 9e61c107c640..6c889b90fd12 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac.h +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac.h @@ -64,11 +64,13 @@ struct mt76_connac_pm { struct delayed_work ps_work; unsigned long last_activity; unsigned long idle_timeout; + struct { unsigned long last_wake_event; unsigned long awake_time; unsigned long last_doze_event; unsigned long doze_time; + unsigned int lp_wake; } stats; }; diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c b/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c index f3982578cc56..6ee423dd4027 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c @@ -269,6 +269,7 @@ mt7921_pm_stats(struct seq_file *s, void *data) { struct mt7921_dev *dev = dev_get_drvdata(s->private); struct mt76_connac_pm *pm = &dev->pm; + unsigned long awake_time = pm->stats.awake_time; unsigned long doze_time = pm->stats.doze_time; @@ -281,6 +282,8 @@ mt7921_pm_stats(struct seq_file *s, void *data) jiffies_to_msecs(awake_time), jiffies_to_msecs(doze_time)); + seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake); + return 0; } diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c index fb7f98d92377..71e664ee7652 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c @@ -353,6 +353,31 @@ int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force) return 0; } +int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev) +{ + struct mt76_connac_pm *pm = &dev->pm; + int err; + + /* check if the wpdma must be reinitialized */ + if (mt7921_dma_need_reinit(dev)) { + /* disable interrutpts */ + mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); + mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0); + + err = mt7921_wpdma_reset(dev, false); + if (err) { + dev_err(dev->mt76.dev, "wpdma reset failed\n"); + return err; + } + + /* enable interrutpts */ + mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); + pm->stats.lp_wake++; + } + + return 0; +} + int mt7921_dma_init(struct mt7921_dev *dev) { /* Increase buffer size to receive large VHT/HE MPDUs */ diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h index 67cb0a647066..efc3ba791342 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h @@ -254,6 +254,7 @@ int mt7921_eeprom_get_target_power(struct mt7921_dev *dev, void mt7921_eeprom_init_sku(struct mt7921_dev *dev); int mt7921_dma_init(struct mt7921_dev *dev); int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force); +int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev); void mt7921_dma_cleanup(struct mt7921_dev *dev); int mt7921_run_firmware(struct mt7921_dev *dev); int mt7921_mcu_init(struct mt7921_dev *dev); @@ -317,6 +318,11 @@ mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val) #define mt7921_l1_set(dev, addr, val) mt7921_l1_rmw(dev, addr, 0, val) #define mt7921_l1_clear(dev, addr, val) mt7921_l1_rmw(dev, addr, val, 0) +static inline bool mt7921_dma_need_reinit(struct mt7921_dev *dev) +{ + return !mt76_get_field(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); +} + void mt7921_mac_init(struct mt7921_dev *dev); bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask); void mt7921_mac_reset_counters(struct mt7921_phy *phy); From patchwork Mon Apr 19 14:20:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 424296 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0056CC433B4 for ; Mon, 19 Apr 2021 14:21:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BBFAE61221 for ; Mon, 19 Apr 2021 14:21:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239026AbhDSOVj (ORCPT ); Mon, 19 Apr 2021 10:21:39 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:49050 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S238824AbhDSOVg (ORCPT ); Mon, 19 Apr 2021 10:21:36 -0400 X-UUID: 57623078f01347449ff384b6144e4834-20210419 X-UUID: 57623078f01347449ff384b6144e4834-20210419 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 927500230; Mon, 19 Apr 2021 22:21:02 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 22:21:00 +0800 From: To: , CC: , , , , , , , , , , , , , Leon Yen Subject: [PATCH v2 5/6] mt76: connac: introduce mt76_connac_mcu_set_deep_sleep utility Date: Mon, 19 Apr 2021 22:20:58 +0800 Message-ID: <1618842059-8192-6-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> References: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 787FEFBEDAE633D96533E843CEEB0C3CA9AD4A22DE488F0CBAA1BA686BADE5292000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Sean Wang Introduce mt76_connac_mcu_set_deep_sleep to enable deep sleep mode and will be activated immediately when the host returns the ownership to the device. Co-developed-by: Leon Yen Signed-off-by: Leon Yen Co-developed-by: YN Chen Signed-off-by: YN Chen Signed-off-by: Sean Wang --- .../wireless/mediatek/mt76/mt76_connac_mcu.c | 22 ++++++++++++------- .../wireless/mediatek/mt76/mt76_connac_mcu.h | 10 +++++++++ 2 files changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c index 860406a53cb6..7578855099e6 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c @@ -1528,14 +1528,7 @@ EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable); int mt76_connac_mcu_chip_config(struct mt76_dev *dev) { - struct { - __le16 id; - u8 type; - u8 resp_type; - __le16 data_size; - __le16 resv; - u8 data[320]; - } req = { + struct mt76_connac_config req = { .resp_type = 0, }; @@ -1546,6 +1539,19 @@ int mt76_connac_mcu_chip_config(struct mt76_dev *dev) } EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config); +int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable) +{ + struct mt76_connac_config req = { + .resp_type = 0, + }; + + snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable); + + return mt76_mcu_send_msg(dev, MCU_CMD_CHIP_CONFIG, &req, sizeof(req), + false); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep); + void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, struct mt76_connac_coredump *coredump) { diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h index ff9fca52f344..e943b89fda75 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h @@ -918,6 +918,15 @@ struct mt76_connac_tx_power_limit_tlv { u8 pad2[32]; } __packed; +struct mt76_connac_config { + __le16 id; + u8 type; + u8 resp_type; + __le16 data_size; + __le16 resv; + u8 data[320]; +} __packed; + #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) @@ -1017,6 +1026,7 @@ int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend); void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, struct ieee80211_vif *vif); int mt76_connac_mcu_chip_config(struct mt76_dev *dev); +int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable); void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, struct mt76_connac_coredump *coredump); int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy); From patchwork Mon Apr 19 14:20:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 425011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64E55C433ED for ; Mon, 19 Apr 2021 14:21:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 34DCA61221 for ; Mon, 19 Apr 2021 14:21:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239012AbhDSOVi (ORCPT ); Mon, 19 Apr 2021 10:21:38 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:49028 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S239017AbhDSOVg (ORCPT ); Mon, 19 Apr 2021 10:21:36 -0400 X-UUID: 51f6da4e1bdd47d3839114c6aaad239f-20210419 X-UUID: 51f6da4e1bdd47d3839114c6aaad239f-20210419 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1282442656; Mon, 19 Apr 2021 22:21:01 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 22:21:00 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 22:21:00 +0800 From: To: , CC: , , , , , , , , , , , , Subject: [PATCH v2 6/6] mt76: mt7921: enable deep sleep when the device suspends Date: Mon, 19 Apr 2021 22:20:59 +0800 Message-ID: <1618842059-8192-7-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> References: <1618842059-8192-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Sean Wang Enable the deep sleep mode in suspend handler to reduce the power consumption further. Signed-off-by: Sean Wang --- drivers/net/wireless/mediatek/mt76/mt7921/pci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c index d5da98d36f63..25f27e9d379b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c @@ -201,6 +201,9 @@ static int mt7921_pci_suspend(struct pci_dev *pdev, pm_message_t state) return err; } + if (!dev->pm.enable) + mt76_connac_mcu_set_deep_sleep(&dev->mt76, true); + napi_disable(&mdev->tx_napi); mt76_worker_disable(&mdev->tx_worker); @@ -239,6 +242,10 @@ static int mt7921_pci_suspend(struct pci_dev *pdev, pm_message_t state) napi_enable(&mdev->napi[i]); } napi_enable(&mdev->tx_napi); + + if (!dev->pm.enable) + mt76_connac_mcu_set_deep_sleep(&dev->mt76, false); + if (hif_suspend) mt76_connac_mcu_set_hif_suspend(mdev, false); @@ -261,6 +268,8 @@ static int mt7921_pci_resume(struct pci_dev *pdev) if (err < 0) return err; + mt7921_wpdma_reinit_cond(dev); + /* enable interrupt */ mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | @@ -279,6 +288,9 @@ static int mt7921_pci_resume(struct pci_dev *pdev) napi_enable(&mdev->tx_napi); napi_schedule(&mdev->tx_napi); + if (!dev->pm.enable) + mt76_connac_mcu_set_deep_sleep(&dev->mt76, false); + if (!test_bit(MT76_STATE_SUSPEND, &dev->mphy.state)) err = mt76_connac_mcu_set_hif_suspend(mdev, false);