From patchwork Wed Apr 14 08:04:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Zhou X-Patchwork-Id: 421418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AE6EC433B4 for ; Wed, 14 Apr 2021 08:16:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 625A7613B1 for ; Wed, 14 Apr 2021 08:16:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350030AbhDNIQz (ORCPT ); Wed, 14 Apr 2021 04:16:55 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:24912 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1350029AbhDNIQu (ORCPT ); Wed, 14 Apr 2021 04:16:50 -0400 X-UUID: d79b0cec56a64d80b7ab9bcdcac021af-20210414 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=7jpjr1gQD0+v/riKyIsAYDYr4J35y59pp8ISXpasrc0=; b=Xmi/YMT+PsMmq0eRjoMCWAfqZIYNPoq6OBfHlIQt2HUNkFGoM32VgjeUbmcmh8RtMxOc0ru2vv71UbzbBiwHxotqAXrU+mnZ49Gl4y9ZYVCy7nY2P51fe70SunpdTKURjI9jYPEIRHdrGdCXj6b6I9RmHx7py2J60Z/znMVvPxY=; X-UUID: d79b0cec56a64d80b7ab9bcdcac021af-20210414 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 567662278; Wed, 14 Apr 2021 16:16:22 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 14 Apr 2021 16:16:19 +0800 Received: from localhost.localdomain (10.15.20.246) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 14 Apr 2021 16:16:18 +0800 From: Peng Zhou To: Eric Biggers , Ulf Hansson , Chaotian Jing , CC: Adrian Hunter , Satya Tangirala , Rob Herring , Wulin Li , Peng Zhou , , Peng Zhou Subject: [PATCH RESEND v3 2/3] arm64: dts: Mediatek: MT6779: add mmc node with ICE setting Date: Wed, 14 Apr 2021 16:04:29 +0800 Message-ID: <20210414080427.21272-3-peng.zhou@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210414080427.21272-1-peng.zhou@mediatek.com> References: <20210414080427.21272-1-peng.zhou@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 2B5E27920E4219DE0A1538CEC2CBCAB45305A94956FA8017228314AC0799A50D2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Peng Zhou Add mmc node with Inline Crypto Engine (ICE) for Mediatek eMMC controller on MT6779. Signed-off-by: Peng Zhou --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi index 9bdf5145966c..9246e59fa4a6 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -242,6 +242,20 @@ #clock-cells = <1>; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt6779-mmc"; + reg = <0 0x11230000 0 0x10000>, + <0 0x11f50000 0 0x10000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MSDC50_0>, + <&infracfg_ao CLK_INFRA_MSDC0>, + <&infracfg_ao CLK_INFRA_MSDC0_SCK>, + <&infracfg_ao CLK_INFRA_AES_UFSFDE>; + clock-names = "source", "hclk", "source_cg", + "crypto"; + status = "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible = "mediatek,mt6779-mfgcfg", "syscon"; reg = <0 0x13fbf000 0 0x1000>; From patchwork Wed Apr 14 08:09:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Zhou X-Patchwork-Id: 421417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAF07C433ED for ; Wed, 14 Apr 2021 08:25:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7B1E8613C4 for ; Wed, 14 Apr 2021 08:25:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230494AbhDNIZV (ORCPT ); Wed, 14 Apr 2021 04:25:21 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:41105 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229467AbhDNIZV (ORCPT ); Wed, 14 Apr 2021 04:25:21 -0400 X-UUID: c3ba8ec3ed374db38e39633b6f6dbafd-20210414 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=wiZl8hHI+dzLmoVVwH3ncIL4BmeHx0LIVwIlGC9uQiw=; b=XTM+pbbQ4ESZDafcr24C/QDYrtb1JnWbTwwUUWlJ5w7j+hkyWWYgar5cC9uYu1pryWoSyHNsgbdk8Gnu9mFDX8exYYsuVc6fiFYsGD7q06cOY/GDMs7MCZV55mkF+hMGF4gC6XUWquHsetMU0ANpNC49bkdwoW0RoP64bRIpW9E=; X-UUID: c3ba8ec3ed374db38e39633b6f6dbafd-20210414 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1895344168; Wed, 14 Apr 2021 16:24:58 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 14 Apr 2021 16:24:53 +0800 Received: from localhost.localdomain (10.15.20.246) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 14 Apr 2021 16:24:52 +0800 From: Peng Zhou To: Eric Biggers , Ulf Hansson , Chaotian Jing , CC: Adrian Hunter , Satya Tangirala , Rob Herring , Wulin Li , Peng Zhou , Peng Zhou Subject: [PATCH RESEND v3 3/3] dt-bingdings: mmc: Mediatek: add ICE clock Date: Wed, 14 Apr 2021 16:09:56 +0800 Message-ID: <20210414080951.2800-4-peng.zhou@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210414080951.2800-1-peng.zhou@mediatek.com> References: <20210414080951.2800-1-peng.zhou@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: A9A59D6F075130F10FE9B5C495CC462ACF027733EB31CA42EA52051E8E8359CE2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Peng Zhou Document the binding for crypto clock of the Inline Crypto Engine (ICE) on Mediatek SoCs. Signed-off-by: Peng Zhou --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.18.0 diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 01630b0ecea7..a81c14c88906 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -37,7 +37,7 @@ properties: description: Should contain phandle for the clock feeding the MMC controller. minItems: 2 - maxItems: 8 + maxItems: 9 items: - description: source clock (required). - description: HCLK which used for host (required). @@ -47,10 +47,11 @@ properties: - description: peripheral bus clock gate (required for MT8192). - description: AXI bus clock gate (required for MT8192). - description: AHB bus clock gate (required for MT8192). + - description: crypto clock used for data encrypt/decrypt (optional). clock-names: minItems: 2 - maxItems: 8 + maxItems: 9 items: - const: source - const: hclk @@ -60,6 +61,7 @@ properties: - const: pclk_cg - const: axi_cg - const: ahb_cg + - const: crypto pinctrl-names: items: