From patchwork Tue Jun 5 06:01:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137669 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp545690lji; Mon, 4 Jun 2018 23:02:44 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJ+j9+Vyohowucgq0goiR1Y0CCdAPvQvREU7ZsxRXDZ7BF4DssgOL4+gktW+hbUv+JdvjEM X-Received: by 2002:a63:4384:: with SMTP id q126-v6mr19360836pga.294.1528178564470; Mon, 04 Jun 2018 23:02:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528178564; cv=none; d=google.com; s=arc-20160816; b=WNd3jzYgdZIJmBNU74YoW+cinmnyJkXobzl6/QUZkrhETnp3Kbg0WrF8iZwmfGuOiZ KsiZWVW2D7LE8lCGr48bZfFjZv97dfLnZbLjlGo7hD6QrGGK6uwclkg8tQMAKptJgSHc g4bN7cRfg/slLkavwrixgefNCAxOepyHdMJB83rrdvTX+nCVDhRzCVmWOF0pfl/Kk5VO bJplVIvdVRL0AlKPOD8WrPHndnb7krQqhv6jn8ZJf5TJLFtHGEo7UC4yFXOTXsnQjLkD Z6yHp1/pBrtKchwJAJxcmHWmF1k+KXbZtWFe1FNwsR2Jw7Q2jr7f5P0i+EK21V5AbdNJ n+qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=eimUDPqeWeUOFmqxLULGpeXlsU4UAQfJ0GBbbMalx6w=; b=fdcMN0wcWdGJv1PWzXZS/fu54rDZK0teBbCcjbWRap4KPshmvmGkcUqaNzN5JJCRxS 8RkTeqKTqZ7u/rtohgXlinqdsShkb+HXDy5u52IB9Esn1u93wj5ri2FVf0Pg9sOaIKYE uWISHztMXhlP1nf6A6qSyS06BxNWDoWkhbEWhcIOqzgTtg3jfFe3uBgOiMlyRkG80SlO SC52gWkO9NYa4sut8eO/vmnoOn4dr/qKgQ9SAAlp0h51lHbD7ZiiNiJ16qwZRgXzCJVw G10vbasNYvEWqcjEu8EiazSOtiaeeb+lyH9Afko6t1Yyt9J4AmWQkyDNy0AHvP1LPL40 SERw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jgUQ5CJ4; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f3-v6si12004888pgp.496.2018.06.04.23.02.44; Mon, 04 Jun 2018 23:02:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jgUQ5CJ4; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751632AbeFEGCm (ORCPT + 2 others); Tue, 5 Jun 2018 02:02:42 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:36568 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751772AbeFEGC1 (ORCPT ); Tue, 5 Jun 2018 02:02:27 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w5561kV5031133; Tue, 5 Jun 2018 01:01:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528178507; bh=kz9GN7f30FKq5Y4hhYYjFL5nEsk+iH4/oM8OE/47M2s=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jgUQ5CJ4f5Ltb/BT/GSwri08Idk4bTy0ue+60XFMHSFpHKwuX0Q/kSNpFVppWVbRJ D7HFFO9QRDdJEHyvjBW237aKf+gbArGs3Itg41mOxQHrV1JCd020WihaZX+usdzzKn NpcaxeDp8KSAIi3xVx7XQpftmNcR1QctAI0vQdv4= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5561k5g010584; Tue, 5 Jun 2018 01:01:46 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:01:46 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:01:46 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5561kjg021164; Tue, 5 Jun 2018 01:01:46 -0500 From: Nishanth Menon To: Santosh Shilimkar , Will Deacon , Catalin Marinas , Greg Kroah-Hartman , Mark Rutland , Rob Herring CC: , , , , Tony Lindgren , Vignesh R , Tero Kristo , Russell King , Sudeep Holla , Nishanth Menon Subject: [RFC PATCH 1/6] Documentation: arm: ti: Add bindings for AM654 SoC Date: Tue, 5 Jun 2018 01:01:20 -0500 Message-ID: <20180605060125.9518-2-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605060125.9518-1-nm@ti.com> References: <20180605060125.9518-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org The AM654 SoC is a lead device of the K3 Multicore SoC architecture platform, targeted for broad market and industrial control with aim to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Quad ARMv8 A53 cores split over two clusters * GICv3 compliant GIC500 * Configurable L3 Cache and IO-coherent architecture * Dual lock-step capable R5F uC for safety-critical applications * High data throughput capable distributed DMA architecture under NAVSS * Three Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL * Centralized System Controller for Security, Power, and Resource management. * Dual ADCSS, eQEP/eCAP, eHRPWM, dual CAN-FD * Flash subystem with OSPI and Hyperbus interfaces * Multimedia capability with CAL, DSS7-UL, SGX544, McASP * Peripheral connectivity including USB3, PCIE, MMC/SD, GPMC, I2C, SPI, GPIO See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.txt | 33 +++++++++++++++++++++++++ MAINTAINERS | 7 ++++++ 2 files changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/ti/k3.txt -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt new file mode 100644 index 000000000000..cbabb1b89f6f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/k3.txt @@ -0,0 +1,33 @@ +Texas Instruments K3 Multicore SoC architecture device tree bindings +-------------------------------------------------------------------- + +Boards based on K3 Multicore SoC architecture shall have the following property: +- compatible: Every hardware block introduced in K3 Multicore SoC + architecture shall be of the form: + "ti,XXX-YYY", where: + 'XXX' represents the specific SoC part for which the support is added. + 'YYY' represents the corresponding peripheral in SoC being supported. + + NOTE: Generic devices such as GIC or legacy devices shall use the specified + compatible for those devices. + + Example: + compatible = "ti,am654-i2c"; + +SoCs +------------------------------------------- + +Each device tree root node must specify which exact SoC in K3 Multicore SoC +architecture it uses, using one of the following compatible values: + +- AM654 + compatible = "ti,am654"; + +Boards +------------------------------------------- + +In addition, each device tree root node must specify which one or more +of the following board-specific compatible values: + +- AM654 EVM + compatible = "ti,am654-evm", "ti,am654"; diff --git a/MAINTAINERS b/MAINTAINERS index f39a8de1bbd7..cfb35b252ac7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2086,6 +2086,13 @@ L: linux-kernel@vger.kernel.org S: Maintained F: drivers/memory/*emif* +ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE +M: Tero Kristo +M: Nishanth Menon +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Supported +F: Documentation/devicetree/bindings/arm/ti/k3.txt + ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE M: Santosh Shilimkar L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) From patchwork Tue Jun 5 06:01:21 2018 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id w21-v6si47046012plp.199.2018.06.04.23.02.24; Mon, 04 Jun 2018 23:02:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=XTaekroL; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751634AbeFEGCX (ORCPT + 2 others); Tue, 5 Jun 2018 02:02:23 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:36561 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751601AbeFEGCX (ORCPT ); Tue, 5 Jun 2018 02:02:23 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w5561kkT031129; Tue, 5 Jun 2018 01:01:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528178506; bh=wFwrWivwMyJoT6G4DQ5J/F6H9j5lzOBF9QESX8KGu+8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XTaekroLrnfnSWIqrYT6xh2Gdwwl3wGDeH8XH2sb6p6LlvvJ0R6WyGindtYUulKWR FDi5gNPyBSwDoyQ8e38HHLze1UTmYppHUbcDvo7hS/aWpU/5RB+MQkMFE7u6nwxPDy rK6LBpCYTGT1GC+iShP+QRi4InYoGc8kKYsuOBcQ= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5561k1C022899; Tue, 5 Jun 2018 01:01:46 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:01:46 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:01:46 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5561kLs000852; Tue, 5 Jun 2018 01:01:46 -0500 From: Nishanth Menon To: Santosh Shilimkar , Will Deacon , Catalin Marinas , Greg Kroah-Hartman , Mark Rutland , Rob Herring CC: , , , , Tony Lindgren , Vignesh R , Tero Kristo , Russell King , Sudeep Holla , Nishanth Menon Subject: [RFC PATCH 2/6] arm64: Add support for TI's K3 Multicore SoC architecture Date: Tue, 5 Jun 2018 01:01:21 -0500 Message-ID: <20180605060125.9518-3-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605060125.9518-1-nm@ti.com> References: <20180605060125.9518-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add support for Texas Instrument's K3 Multicore SoC architecture processors. Signed-off-by: Nishanth Menon --- arch/arm64/Kconfig.platforms | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index d5aeac351fc3..52df25bf4f8c 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -71,6 +71,13 @@ config ARCH_EXYNOS help This enables support for ARMv8 based Samsung Exynos SoC family. +config ARCH_K3 + bool "Texas Instruments Inc. K3 multicore SoC architecture" + select PM_GENERIC_DOMAINS if PM + help + This enables support for Texas Instruments' K3 multicore SoC + architecture. + config ARCH_LAYERSCAPE bool "ARMv8 based Freescale Layerscape SoC family" select EDAC_SUPPORT From patchwork Tue Jun 5 06:05:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137680 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp549833lji; Mon, 4 Jun 2018 23:05:39 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIk7p/KWLGrENsJ4zjB/oY45CuptsrpvMQ+qlyGjQZBSFKGB8A+g/cFsAtzfjMVUe+3NjyU X-Received: by 2002:a62:4c04:: with SMTP id z4-v6mr24112574pfa.205.1528178739018; Mon, 04 Jun 2018 23:05:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528178739; cv=none; d=google.com; s=arc-20160816; b=oyPooR3091mjbtbb1Boxjnc2FTqMK1mGU6LizV92JnNsHL1xiCkRDfymudkjhJYgxW uR6uD2b4XFaJJ/Oyk5lW6uSqggiiZyXIlnvyHdKzHbBDHeK9kpSg7TWA7bXscWT4Tq1A 74ufjpkAAcdj2suwwYU/wroI89eGc4BT7971H4EPUxQEYGNDZphC5dpQMz7Rn8aevdOn xbPuz59YfudsqLES5JopmH5gAxQ+6fP/kCND6HnHZMACFMghsuq2IbY/gqHrPWJy2zg9 m2rLqOPVCQuag3b44R1SaE9gGyInh4Uhxy+5dG/ATp1V7xR6HRLlusX2iwKF79E+Xc4x 6b8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=9gXeIZlcf1BVqLa2UkBvoPUsnlT/ZK0LlRcCG94i1mU=; b=eGG2a7N9FLn+/uF11x9OjTvp9j9xlymWEqHq5X0ZzoPLAjsUJl1ti0F64IDWbVlqXa ME6VNsSkqQbKqjwLR04nA1TmZR4yuJ+/tBVThNQtBVt3+Lu8t3S6NmsqvzUDy2NdPNPW x6VcA/w3hDTSkNyNKY0eOQfuqFAkuhDtYk8i+SqHvmxQNGYPMzvQe+Hh15MhXtbyymhZ 62G/wQzQLG4abSJkV7JAkyZg+gxIGO1bxmTHjSf0HC5qS91ReaXmissIWfpR7zKuYJN6 Ccl137HIfcQIYqu0gSVRJ/WKIUsbpRcG4dfC8qrTkP1tGblZvrO/8n01X3BAzr6b268z k9Gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=ftM2pSMP; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f129-v6si25215688pgc.230.2018.06.04.23.05.38; Mon, 04 Jun 2018 23:05:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=ftM2pSMP; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751634AbeFEGFh (ORCPT + 2 others); Tue, 5 Jun 2018 02:05:37 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:15642 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751619AbeFEGFg (ORCPT ); Tue, 5 Jun 2018 02:05:36 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w5565BCZ005955; Tue, 5 Jun 2018 01:05:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528178711; bh=EWlG2sJlfM51UvEzWjBStOjB9TLLccYJ9kNNFJ3GdGM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ftM2pSMPDleO0sUhrJUrLcBRU72L0OyQhZjfpPRW6UmJjM1HVqAc4nDHEoi3VLyTk 0jKPksLM4WsywagCnKjpKHfmAWSLsSYP6ZWn/5lXCzY5YAa8rpksBHhEBID4dW9eNN pvw+7mG9tf+vaDLY5B8WmL+cNbqGdj6nyL20tChM= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5565BBc015242; Tue, 5 Jun 2018 01:05:11 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:05:11 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:05:11 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5565BkR011306; Tue, 5 Jun 2018 01:05:11 -0500 From: Nishanth Menon To: Santosh Shilimkar , Will Deacon , Catalin Marinas , Greg Kroah-Hartman , Mark Rutland , Rob Herring CC: , , , , Tony Lindgren , Vignesh R , Tero Kristo , Russell King , Sudeep Holla , Subject: [RFC PATCH 6/6] arm64: dts: ti: Add support for AM654 EVM base board Date: Tue, 5 Jun 2018 01:05:10 -0500 Message-ID: <20180605060510.32473-2-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605060510.32473-1-nm@ti.com> References: <=<20180605060125.9518-1-nm@ti.com> <20180605060510.32473-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org The EValuation Module(EVM) platform for AM654 consists of a common Base board + one or more of daughter cards, which include: a) "Personality Modules", which can be specific to a profile, such as ICSSG enabled or Multi-media (including audio). b) SERDES modules, which may be 2 lane PCIe or two port PCIe + USB2 c) Camera daughter card d) various display panels Among other options. There are two basic configurations defined which include an "EVM" configuration and "IDK" (Industrial development kit) which differ in the specific combination of daughter cards that are used. To simplify support, we choose to support just the base board as the core device tree file and all daughter cards would be expected to be device tree overlays. Signed-off-by: Lokesh Vutla Signed-off-by: Nishanth Menon --- MAINTAINERS | 1 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/ti/Makefile | 9 ++++++ arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 40 ++++++++++++++++++++++++++ 4 files changed, 51 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/Makefile create mode 100644 arch/arm64/boot/dts/ti/k3-am654-base-board.dts -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/MAINTAINERS b/MAINTAINERS index 5f5c4eddec7a..4491a0f0625f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2092,6 +2092,7 @@ M: Nishanth Menon L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Supported F: Documentation/devicetree/bindings/arm/ti/k3.txt +F: arch/arm64/boot/dts/ti/Makefile F: arch/arm64/boot/dts/ti/k3-* ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 3543bc324553..4690364d584b 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -23,5 +23,6 @@ subdir-y += rockchip subdir-y += socionext subdir-y += sprd subdir-y += synaptics +subdir-y += ti subdir-y += xilinx subdir-y += zte diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile new file mode 100644 index 000000000000..63e619d0b5b8 --- /dev/null +++ b/arch/arm64/boot/dts/ti/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Make file to build device tree binaries for boards based on +# Texas Instruments Inc processors +# +# Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ +# + +dtb-$(CONFIG_ARCH_K3_AM6_SOC) += k3-am654-base-board.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts new file mode 100644 index 000000000000..d227d792de60 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-am654.dtsi" + +/ { + compatible = "ti,am654-evm", "ti,am654"; + model = "Texas Instruments AM654 Base Board"; + + chosen { + stdout-path = "serial2:115200n8"; + bootargs = "earlycon=ns16550a,mmio32,0x02800000"; + }; + + memory@80000000 { + device_type = "memory"; + /* 4G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>, + <0x00000008 0x80000000 0x00000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + secure_ddr: secure_ddr@9e800000 { + reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + }; +}; + +&main_uart0 { + status = "okay"; +};