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Thu, 20 Apr 2017 14:16:45 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Stephen Boyd , Michael Turquette , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 1/4] clk: samsung: Convert common drivers to the new clk_hw API Date: Thu, 20 Apr 2017 15:16:36 +0200 Message-id: <1492694199-9553-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMIsWRmVeSWpSXmKPExsWy7djPc7r7tvyIMOg8KW6xccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLiKVeLw2/aWS1+nOlmceD0eH+jld3jcl8vk8emVZ1s Hn1bVjF6fN4kF8AaxWWTkpqTWZZapG+XwJVxvfsRc8G2pYwV75fMYmxgvN3G2MXIySEhYCLx 6vMjJghbTOLCvfVsILaQwFJGicv9UV2MXED2Z0aJac3XmbsYOcAaula6QcSXMUr8nzCVBcJp YJK492cxC0g3m4ChRNfbLrBJIgIOEp8/vWYEKWIW2MkkMeHnSrCEsECgxNdPt8HOYBFQlXj8 ZB47iM0r4C6x9sg5doiT5CROHpvMCmJzCnhITJ10hx1kkIRAM7vEy/kL2CBOkpXYdIAZot5F Ys/JT1CvCUu8Or4Fao6MRGfHQag3+xklmlq1IewZjBLn3vJC2NYSh49fBNvFLMAnMWnbdKiP eSU62oQgSjwkrh9eCDXeUeL8tguMEM/PZpSYt3kSywRGmQWMDKsYRVJLi3PTU4tN9IoTc4tL 89L1kvNzNzECo/r0v+NfdjAuPmZ1iFGAg1GJh/fEyh8RQqyJZcWVuYcYJTiYlUR4fTcBhXhT EiurUovy44tKc1KLDzFKc7AoifNynboWISSQnliSmp2aWpBaBJNl4uCUamBMu6v+sMdxX42Z 58RZO1MfCjqGTbxVc+2I4ZqcF7zsaww+aDyqzhM0D6m5rbn+JFNP3i2uWbcPzFulfUD34bYb fLbFj+99XNYpUdgqmqz21fvX1KP/Nfzs07tc8h4x3XlQL8OX7ZrrdXLb781zBC2MFKe/s7VZ cVF7rXVLmv7r5+t8f85Z38GhxFKckWioxVxUnAgA/yhuxuYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrMLMWRmVeSWpSXmKPExsVy+t/xy7oOW39EGGw6zW2xccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLiKVeLw2/aWS1+nOlmceD0eH+jld3jcl8vk8emVZ1s Hn1bVjF6fN4kF8Aa5WaTkZqYklqkkJqXnJ+SmZduqxQa4qZroaSQl5ibaqsUoesbEqSkUJaY UwrkGRmgAQfnAPdgJX27BLeM692PmAu2LWWseL9kFmMD4+02xi5GDg4JAROJrpVuXYycQKaY xIV769lAbCGBJYwSe6bUdDFyAdlNTBIvlixgAUmwCRhKdL3tAisSEXCQ+PzpNSNIEbPAbiaJ iycfM4IkhAX8JVp6p7KC2CwCqhKPn8xjB7F5Bdwl1h45xw6xTU7i5LHJYDWcAh4SUyfdYYfY 7C5xatsq1gmMvAsYGVYxiqSWFuem5xYb6hUn5haX5qXrJefnbmIEBvi2Yz8372C8tDH4EKMA B6MSD6/Cmh8RQqyJZcWVuYcYJTiYlUR4fTcBhXhTEiurUovy44tKc1KLDzGaAh01kVlKNDkf GH15JfGGJobmloZGxhYW5kZGSuK8JR+uhAsJpCeWpGanphakFsH0MXFwSjUwMvvxyi/Z8yx0 s6D2SoaDNwTO82pHlEmxTgo6MGGinUvGunw7jUWbt7bsnPeO9dW3j/mPhNd6/g3dZJp9IXK+ 8yrr03t7GFW+FTNemJ6hvjW7eubUwP56V7kSxtdH1zq9uHI6Lu1K3PV7JYrtri4V08xYlc5n tb9/ejJoauu2pgWbz8ZemOUoqsRSnJFoqMVcVJwIAEZIyACGAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170420131645eucas1p2324270d9801342eeebe8eddaf8172315 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170420131645eucas1p2324270d9801342eeebe8eddaf8172315 X-RootMTR: 20170420131645eucas1p2324270d9801342eeebe8eddaf8172315 References: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Clock providers should use the new struct clk_hw based API, so convert Samsung clock providers and their helper functions to the new approach. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-cpu.c | 15 +++--- drivers/clk/samsung/clk-pll.c | 14 +++--- drivers/clk/samsung/clk-pll.h | 4 -- drivers/clk/samsung/clk-s3c2410-dclk.c | 75 ++++++++++++++-------------- drivers/clk/samsung/clk.c | 91 +++++++++++++++------------------- drivers/clk/samsung/clk.h | 9 ++-- 6 files changed, 96 insertions(+), 112 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index 8bf7e805fd34..fbf0154b81a5 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -410,7 +410,7 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx, { struct exynos_cpuclk *cpuclk; struct clk_init_data init; - struct clk *clk; + struct clk *parent_clk; int ret = 0; cpuclk = kzalloc(sizeof(*cpuclk), GFP_KERNEL); @@ -440,15 +440,15 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx, goto free_cpuclk; } - clk = __clk_lookup(parent); - if (!clk) { + parent_clk = __clk_lookup(parent); + if (!parent_clk) { pr_err("%s: could not lookup parent clock %s\n", __func__, parent); ret = -EINVAL; goto free_cpuclk; } - ret = clk_notifier_register(clk, &cpuclk->clk_nb); + ret = clk_notifier_register(parent_clk, &cpuclk->clk_nb); if (ret) { pr_err("%s: failed to register clock notifier for %s\n", __func__, name); @@ -463,14 +463,13 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx, goto unregister_clk_nb; } - clk = clk_register(NULL, &cpuclk->hw); - if (IS_ERR(clk)) { + ret = clk_hw_register(NULL, &cpuclk->hw); + if (ret) { pr_err("%s: could not register cpuclk %s\n", __func__, name); - ret = PTR_ERR(clk); goto free_cpuclk_data; } - samsung_clk_add_lookup(ctx, clk, lookup_id); + samsung_clk_add_lookup(ctx, &cpuclk->hw, lookup_id); return 0; free_cpuclk_data: diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 52290894857a..db680575a9bd 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -1244,7 +1244,6 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, void __iomem *base) { struct samsung_clk_pll *pll; - struct clk *clk; struct clk_init_data init; int ret, len; @@ -1376,20 +1375,21 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, pll->lock_reg = base + pll_clk->lock_offset; pll->con_reg = base + pll_clk->con_offset; - clk = clk_register(NULL, &pll->hw); - if (IS_ERR(clk)) { - pr_err("%s: failed to register pll clock %s : %ld\n", - __func__, pll_clk->name, PTR_ERR(clk)); + ret = clk_hw_register(NULL, &pll->hw); + if (ret) { + pr_err("%s: failed to register pll clock %s : %d\n", + __func__, pll_clk->name, ret); kfree(pll); return; } - samsung_clk_add_lookup(ctx, clk, pll_clk->id); + samsung_clk_add_lookup(ctx, &pll->hw, pll_clk->id); if (!pll_clk->alias) return; - ret = clk_register_clkdev(clk, pll_clk->alias, pll_clk->dev_name); + ret = clk_hw_register_clkdev(&pll->hw, pll_clk->alias, + pll_clk->dev_name); if (ret) pr_err("%s: failed to register lookup for %s : %d", __func__, pll_clk->name, ret); diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h index a1ca0233cb4b..61eb8abbfd9c 100644 --- a/drivers/clk/samsung/clk-pll.h +++ b/drivers/clk/samsung/clk-pll.h @@ -103,8 +103,4 @@ struct samsung_pll_rate_table { unsigned int vsel; }; -extern struct clk * __init samsung_clk_register_pll2550x(const char *name, - const char *pname, const void __iomem *reg_base, - const unsigned long offset); - #endif /* __SAMSUNG_CLK_PLL_H */ diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c index ae9a595c72d0..077df3e539a7 100644 --- a/drivers/clk/samsung/clk-s3c2410-dclk.c +++ b/drivers/clk/samsung/clk-s3c2410-dclk.c @@ -90,13 +90,13 @@ static int s3c24xx_clkout_set_parent(struct clk_hw *hw, u8 index) .determine_rate = __clk_mux_determine_rate, }; -static struct clk *s3c24xx_register_clkout(struct device *dev, const char *name, - const char **parent_names, u8 num_parents, +static struct clk_hw *s3c24xx_register_clkout(struct device *dev, + const char *name, const char **parent_names, u8 num_parents, u8 shift, u32 mask) { struct s3c24xx_clkout *clkout; - struct clk *clk; struct clk_init_data init; + int ret; /* allocate the clkout */ clkout = kzalloc(sizeof(*clkout), GFP_KERNEL); @@ -113,9 +113,11 @@ static struct clk *s3c24xx_register_clkout(struct device *dev, const char *name, clkout->mask = mask; clkout->hw.init = &init; - clk = clk_register(dev, &clkout->hw); + ret = clk_hw_register(dev, &clkout->hw); + if (ret) + return ERR_PTR(ret); - return clk; + return &clkout->hw; } /* @@ -125,11 +127,12 @@ static struct clk *s3c24xx_register_clkout(struct device *dev, const char *name, struct s3c24xx_dclk { struct device *dev; void __iomem *base; - struct clk_onecell_data clk_data; struct notifier_block dclk0_div_change_nb; struct notifier_block dclk1_div_change_nb; spinlock_t dclk_lock; unsigned long reg_save; + /* clk_data must be the last entry in the structure */ + struct clk_hw_onecell_data clk_data; }; #define to_s3c24xx_dclk0(x) \ @@ -240,28 +243,23 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) { struct s3c24xx_dclk *s3c24xx_dclk; struct resource *mem; - struct clk **clk_table; struct s3c24xx_dclk_drv_data *dclk_variant; + struct clk_hw **clk_table; int ret, i; - s3c24xx_dclk = devm_kzalloc(&pdev->dev, sizeof(*s3c24xx_dclk), - GFP_KERNEL); + s3c24xx_dclk = devm_kzalloc(&pdev->dev, sizeof(*s3c24xx_dclk) + + sizeof(*s3c24xx_dclk->clk_data.hws) * DCLK_MAX_CLKS, + GFP_KERNEL); if (!s3c24xx_dclk) return -ENOMEM; + clk_table = s3c24xx_dclk->clk_data.hws; + s3c24xx_dclk->dev = &pdev->dev; + s3c24xx_dclk->clk_data.num = DCLK_MAX_CLKS; platform_set_drvdata(pdev, s3c24xx_dclk); spin_lock_init(&s3c24xx_dclk->dclk_lock); - clk_table = devm_kzalloc(&pdev->dev, - sizeof(struct clk *) * DCLK_MAX_CLKS, - GFP_KERNEL); - if (!clk_table) - return -ENOMEM; - - s3c24xx_dclk->clk_data.clks = clk_table; - s3c24xx_dclk->clk_data.clk_num = DCLK_MAX_CLKS; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); s3c24xx_dclk->base = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(s3c24xx_dclk->base)) @@ -271,29 +269,29 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) platform_get_device_id(pdev)->driver_data; - clk_table[MUX_DCLK0] = clk_register_mux(&pdev->dev, "mux_dclk0", + clk_table[MUX_DCLK0] = clk_hw_register_mux(&pdev->dev, "mux_dclk0", dclk_variant->mux_parent_names, dclk_variant->mux_num_parents, 0, s3c24xx_dclk->base, 1, 1, 0, &s3c24xx_dclk->dclk_lock); - clk_table[MUX_DCLK1] = clk_register_mux(&pdev->dev, "mux_dclk1", + clk_table[MUX_DCLK1] = clk_hw_register_mux(&pdev->dev, "mux_dclk1", dclk_variant->mux_parent_names, dclk_variant->mux_num_parents, 0, s3c24xx_dclk->base, 17, 1, 0, &s3c24xx_dclk->dclk_lock); - clk_table[DIV_DCLK0] = clk_register_divider(&pdev->dev, "div_dclk0", + clk_table[DIV_DCLK0] = clk_hw_register_divider(&pdev->dev, "div_dclk0", "mux_dclk0", 0, s3c24xx_dclk->base, 4, 4, 0, &s3c24xx_dclk->dclk_lock); - clk_table[DIV_DCLK1] = clk_register_divider(&pdev->dev, "div_dclk1", + clk_table[DIV_DCLK1] = clk_hw_register_divider(&pdev->dev, "div_dclk1", "mux_dclk1", 0, s3c24xx_dclk->base, 20, 4, 0, &s3c24xx_dclk->dclk_lock); - clk_table[GATE_DCLK0] = clk_register_gate(&pdev->dev, "gate_dclk0", + clk_table[GATE_DCLK0] = clk_hw_register_gate(&pdev->dev, "gate_dclk0", "div_dclk0", CLK_SET_RATE_PARENT, s3c24xx_dclk->base, 0, 0, &s3c24xx_dclk->dclk_lock); - clk_table[GATE_DCLK1] = clk_register_gate(&pdev->dev, "gate_dclk1", + clk_table[GATE_DCLK1] = clk_hw_register_gate(&pdev->dev, "gate_dclk1", "div_dclk1", CLK_SET_RATE_PARENT, s3c24xx_dclk->base, 16, 0, &s3c24xx_dclk->dclk_lock); @@ -312,15 +310,16 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) goto err_clk_register; } - ret = clk_register_clkdev(clk_table[MUX_DCLK0], "dclk0", NULL); + ret = clk_hw_register_clkdev(clk_table[MUX_DCLK0], "dclk0", NULL); if (!ret) - ret = clk_register_clkdev(clk_table[MUX_DCLK1], "dclk1", NULL); + ret = clk_hw_register_clkdev(clk_table[MUX_DCLK1], "dclk1", + NULL); if (!ret) - ret = clk_register_clkdev(clk_table[MUX_CLKOUT0], - "clkout0", NULL); + ret = clk_hw_register_clkdev(clk_table[MUX_CLKOUT0], + "clkout0", NULL); if (!ret) - ret = clk_register_clkdev(clk_table[MUX_CLKOUT1], - "clkout1", NULL); + ret = clk_hw_register_clkdev(clk_table[MUX_CLKOUT1], + "clkout1", NULL); if (ret) { dev_err(&pdev->dev, "failed to register aliases, %d\n", ret); goto err_clk_register; @@ -332,12 +331,12 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) s3c24xx_dclk->dclk1_div_change_nb.notifier_call = s3c24xx_dclk1_div_notify; - ret = clk_notifier_register(clk_table[DIV_DCLK0], + ret = clk_notifier_register(clk_table[DIV_DCLK0]->clk, &s3c24xx_dclk->dclk0_div_change_nb); if (ret) goto err_clk_register; - ret = clk_notifier_register(clk_table[DIV_DCLK1], + ret = clk_notifier_register(clk_table[DIV_DCLK1]->clk, &s3c24xx_dclk->dclk1_div_change_nb); if (ret) goto err_dclk_notify; @@ -345,12 +344,12 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) return 0; err_dclk_notify: - clk_notifier_unregister(clk_table[DIV_DCLK0], + clk_notifier_unregister(clk_table[DIV_DCLK0]->clk, &s3c24xx_dclk->dclk0_div_change_nb); err_clk_register: for (i = 0; i < DCLK_MAX_CLKS; i++) if (clk_table[i] && !IS_ERR(clk_table[i])) - clk_unregister(clk_table[i]); + clk_hw_unregister(clk_table[i]); return ret; } @@ -358,16 +357,16 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) static int s3c24xx_dclk_remove(struct platform_device *pdev) { struct s3c24xx_dclk *s3c24xx_dclk = platform_get_drvdata(pdev); - struct clk **clk_table = s3c24xx_dclk->clk_data.clks; + struct clk_hw **clk_table = s3c24xx_dclk->clk_data.hws; int i; - clk_notifier_unregister(clk_table[DIV_DCLK1], + clk_notifier_unregister(clk_table[DIV_DCLK1]->clk, &s3c24xx_dclk->dclk1_div_change_nb); - clk_notifier_unregister(clk_table[DIV_DCLK0], + clk_notifier_unregister(clk_table[DIV_DCLK0]->clk, &s3c24xx_dclk->dclk0_div_change_nb); for (i = 0; i < DCLK_MAX_CLKS; i++) - clk_unregister(clk_table[i]); + clk_hw_unregister(clk_table[i]); return 0; } diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index b7d87d6db9dc..7ce0fa86c5ff 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -60,23 +60,18 @@ struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np, void __iomem *base, unsigned long nr_clks) { struct samsung_clk_provider *ctx; - struct clk **clk_table; int i; - ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL); + ctx = kzalloc(sizeof(struct samsung_clk_provider) + + sizeof(*ctx->clk_data.hws) * nr_clks, GFP_KERNEL); if (!ctx) panic("could not allocate clock provider context.\n"); - clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); - if (!clk_table) - panic("could not allocate clock lookup table\n"); - for (i = 0; i < nr_clks; ++i) - clk_table[i] = ERR_PTR(-ENOENT); + ctx->clk_data.hws[i] = ERR_PTR(-ENOENT); ctx->reg_base = base; - ctx->clk_data.clks = clk_table; - ctx->clk_data.clk_num = nr_clks; + ctx->clk_data.num = nr_clks; spin_lock_init(&ctx->lock); return ctx; @@ -86,18 +81,18 @@ void __init samsung_clk_of_add_provider(struct device_node *np, struct samsung_clk_provider *ctx) { if (np) { - if (of_clk_add_provider(np, of_clk_src_onecell_get, + if (of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &ctx->clk_data)) panic("could not register clk provider\n"); } } /* add a clock instance to the clock lookup table used for dt based lookup */ -void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk *clk, - unsigned int id) +void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, + struct clk_hw *clk_hw, unsigned int id) { - if (ctx->clk_data.clks && id) - ctx->clk_data.clks[id] = clk; + if (id) + ctx->clk_data.hws[id] = clk_hw; } /* register a list of aliases */ @@ -105,14 +100,9 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx, const struct samsung_clock_alias *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_hw *clk_hw; unsigned int idx, ret; - if (!ctx->clk_data.clks) { - pr_err("%s: clock table missing\n", __func__); - return; - } - for (idx = 0; idx < nr_clk; idx++, list++) { if (!list->id) { pr_err("%s: clock id missing for index %d\n", __func__, @@ -120,14 +110,15 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx, continue; } - clk = ctx->clk_data.clks[list->id]; - if (!clk) { + clk_hw = ctx->clk_data.hws[list->id]; + if (!clk_hw) { pr_err("%s: failed to find clock %d\n", __func__, list->id); continue; } - ret = clk_register_clkdev(clk, list->alias, list->dev_name); + ret = clk_hw_register_clkdev(clk_hw, list->alias, + list->dev_name); if (ret) pr_err("%s: failed to register lookup %s\n", __func__, list->alias); @@ -139,25 +130,25 @@ void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx, const struct samsung_fixed_rate_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_hw *clk_hw; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { - clk = clk_register_fixed_rate(NULL, list->name, + clk_hw = clk_hw_register_fixed_rate(NULL, list->name, list->parent_name, list->flags, list->fixed_rate); - if (IS_ERR(clk)) { + if (IS_ERR(clk_hw)) { pr_err("%s: failed to register clock %s\n", __func__, list->name); continue; } - samsung_clk_add_lookup(ctx, clk, list->id); + samsung_clk_add_lookup(ctx, clk_hw, list->id); /* * Unconditionally add a clock lookup for the fixed rate clocks. * There are not many of these on any of Samsung platforms. */ - ret = clk_register_clkdev(clk, list->name, NULL); + ret = clk_hw_register_clkdev(clk_hw, list->name, NULL); if (ret) pr_err("%s: failed to register clock lookup for %s", __func__, list->name); @@ -168,19 +159,19 @@ void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx, void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx, const struct samsung_fixed_factor_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_hw *clk_hw; unsigned int idx; for (idx = 0; idx < nr_clk; idx++, list++) { - clk = clk_register_fixed_factor(NULL, list->name, + clk_hw = clk_hw_register_fixed_factor(NULL, list->name, list->parent_name, list->flags, list->mult, list->div); - if (IS_ERR(clk)) { + if (IS_ERR(clk_hw)) { pr_err("%s: failed to register clock %s\n", __func__, list->name); continue; } - samsung_clk_add_lookup(ctx, clk, list->id); + samsung_clk_add_lookup(ctx, clk_hw, list->id); } } @@ -189,25 +180,25 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx, const struct samsung_mux_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_hw *clk_hw; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { - clk = clk_register_mux(NULL, list->name, list->parent_names, - list->num_parents, list->flags, + clk_hw = clk_hw_register_mux(NULL, list->name, + list->parent_names, list->num_parents, list->flags, ctx->reg_base + list->offset, list->shift, list->width, list->mux_flags, &ctx->lock); - if (IS_ERR(clk)) { + if (IS_ERR(clk_hw)) { pr_err("%s: failed to register clock %s\n", __func__, list->name); continue; } - samsung_clk_add_lookup(ctx, clk, list->id); + samsung_clk_add_lookup(ctx, clk_hw, list->id); /* register a clock lookup only if a clock alias is specified */ if (list->alias) { - ret = clk_register_clkdev(clk, list->alias, + ret = clk_hw_register_clkdev(clk_hw, list->alias, list->dev_name); if (ret) pr_err("%s: failed to register lookup %s\n", @@ -221,32 +212,32 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx, const struct samsung_div_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_hw *clk_hw; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { if (list->table) - clk = clk_register_divider_table(NULL, list->name, - list->parent_name, list->flags, + clk_hw = clk_hw_register_divider_table(NULL, + list->name, list->parent_name, list->flags, ctx->reg_base + list->offset, list->shift, list->width, list->div_flags, list->table, &ctx->lock); else - clk = clk_register_divider(NULL, list->name, + clk_hw = clk_hw_register_divider(NULL, list->name, list->parent_name, list->flags, ctx->reg_base + list->offset, list->shift, list->width, list->div_flags, &ctx->lock); - if (IS_ERR(clk)) { + if (IS_ERR(clk_hw)) { pr_err("%s: failed to register clock %s\n", __func__, list->name); continue; } - samsung_clk_add_lookup(ctx, clk, list->id); + samsung_clk_add_lookup(ctx, clk_hw, list->id); /* register a clock lookup only if a clock alias is specified */ if (list->alias) { - ret = clk_register_clkdev(clk, list->alias, + ret = clk_hw_register_clkdev(clk_hw, list->alias, list->dev_name); if (ret) pr_err("%s: failed to register lookup %s\n", @@ -260,14 +251,14 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx, const struct samsung_gate_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_hw *clk_hw; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { - clk = clk_register_gate(NULL, list->name, list->parent_name, + clk_hw = clk_hw_register_gate(NULL, list->name, list->parent_name, list->flags, ctx->reg_base + list->offset, list->bit_idx, list->gate_flags, &ctx->lock); - if (IS_ERR(clk)) { + if (IS_ERR(clk_hw)) { pr_err("%s: failed to register clock %s\n", __func__, list->name); continue; @@ -275,14 +266,14 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx, /* register a clock lookup only if a clock alias is specified */ if (list->alias) { - ret = clk_register_clkdev(clk, list->alias, + ret = clk_hw_register_clkdev(clk_hw, list->alias, list->dev_name); if (ret) pr_err("%s: failed to register lookup %s\n", __func__, list->alias); } - samsung_clk_add_lookup(ctx, clk, list->id); + samsung_clk_add_lookup(ctx, clk_hw, list->id); } } diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index da3bdebabf1e..b8ca0dd3a38b 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -16,18 +16,17 @@ #include #include "clk-pll.h" -struct clk; - /** * struct samsung_clk_provider: information about clock provider * @reg_base: virtual address for the register base. - * @clk_data: holds clock related data like clk* and number of clocks. * @lock: maintains exclusion between callbacks for a given clock-provider. + * @clk_data: holds clock related data like clk_hw* and number of clocks. */ struct samsung_clk_provider { void __iomem *reg_base; - struct clk_onecell_data clk_data; spinlock_t lock; + /* clk_data must be the last entry due to variable lenght 'hws' array */ + struct clk_hw_onecell_data clk_data; }; /** @@ -367,7 +366,7 @@ extern void __init samsung_clk_of_register_fixed_ext( const struct of_device_id *clk_matches); extern void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, - struct clk *clk, unsigned int id); + struct clk_hw *clk_hw, unsigned int id); extern void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx, const struct samsung_clock_alias *list, From patchwork Thu Apr 20 13:16:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 97810 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp794150qgf; Thu, 20 Apr 2017 06:17:11 -0700 (PDT) X-Received: by 10.84.194.195 with SMTP id h61mr10498696pld.182.1492694231004; Thu, 20 Apr 2017 06:17:11 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 20 Apr 2017 14:16:46 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Stephen Boyd , Michael Turquette , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 2/4] clk: samsung: exynos-audss: Convert to the new clk_hw API Date: Thu, 20 Apr 2017 15:16:37 +0200 Message-id: <1492694199-9553-3-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrIIsWRmVeSWpSXmKPExsWy7djPc7r7t/yIMDi4g8Ni44z1rBbXvzxn tTh/fgO7xceee6wWM87vY7JYe+Quu8XFU64Wh9+0s1r8ONPN4sDp8f5GK7vH5b5eJo9NqzrZ PPq2rGL0+LxJLoA1issmJTUnsyy1SN8ugSvjyYU/rAW3DCoWHL/K3MB4QKOLkZNDQsBEYubz XUwQtpjEhXvr2boYuTiEBJYySvxYs5EJwvnMKLH323nWLkYOsI6z37Ug4ssYJQ5e+A5V1MAk 8ffvX7BRbAKGEl1vu9hAbBEBB4nPn14zghQxC+xkkpjwcyVYQlggQGLiz5lgDSwCqhJPXx5l BLF5Bdwl+rZ8ZIW4SU7i5LHJYDangIfE1El32EEGSQg0s0ts27SNHeIkWYlNB5gh6l0kOnYv YYSwhSVeHd/CDmHLSFye3M0CYfczSjS1akPYMxglzr3lhbCtJQ4fvwi2i1mAT2LStunMEON5 JTrahCBKPCTO/vvHBmE7Shw8+AxslZDAbEaJ3pP5ExhlFjAyrGIUSS0tzk1PLTbVK07MLS7N S9dLzs/dxAiM6NP/jn/dwbj0mNUhRgEORiUeXoU1PyKEWBPLiitzDzFKcDArifD6bgIK8aYk VlalFuXHF5XmpBYfYpTmYFES5+U6dS1CSCA9sSQ1OzW1ILUIJsvEwSnVwKhemHd3he/EC0fO lwSpXAtc0Nm08tFvabmMmqsOpb8y4m4zvFPQOKkpxjvlw5xWnhf/Xgm8fFH3hPNkhuj1Rw1H 2QUCw/7tyZ858aG/8I0//5PLf8RKZB/p+ic4c3OUxuccvv9131drRYs+XPQ5KTDmS7pTt7bP iqADR3wiJBYkLDK4uGWyPK8SS3FGoqEWc1FxIgD2Zzfr5AIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrILMWRmVeSWpSXmKPExsVy+t/xy7rXt/yIMNh1mcti44z1rBbXvzxn tTh/fgO7xceee6wWM87vY7JYe+Quu8XFU64Wh9+0s1r8ONPN4sDp8f5GK7vH5b5eJo9NqzrZ PPq2rGL0+LxJLoA1ys0mIzUxJbVIITUvOT8lMy/dVik0xE3XQkkhLzE31VYpQtc3JEhJoSwx pxTIMzJAAw7OAe7BSvp2CW4ZTy78YS24ZVCx4PhV5gbGAxpdjBwcEgImEme/a3UxcgKZYhIX 7q1n62Lk4hASWMIoMb3rCDtIQkigiUniyVoFEJtNwFCi620XG4gtIuAg8fnTa0aQBmaB3UwS F08+ZgRJCAv4Sax7850FxGYRUJV4+vIoWJxXwF2ib8tHVohtchInj00GszkFPCSmTroDtcxd 4tS2VawTGHkXMDKsYhRJLS3OTc8tNtIrTswtLs1L10vOz93ECAzubcd+btnB2PUu+BCjAAej Eg/viZU/IoRYE8uKK3MPMUpwMCuJ8PpuAgrxpiRWVqUW5ccXleakFh9iNAU6aiKzlGhyPjDy 8kriDU0MzS0NjYwtLMyNjJTEead+uBIuJJCeWJKanZpakFoE08fEwSnVwFj0Z+ssXTvFrrKX P3rZ5h97ZT5NfcYKEXN12YU6/Fv0BETX/pgi0Bl9acsfiYKZi3sNlwkkefln5zGm9S0QLbKf VVLffmux/41pwe989y50cpt4psEkdpXvbfkeR+6Js3mWJbOtm6a6ZOpq+zvNT/kaH5W9Mvpw U+s5Q8f/2T/aIxR63L72KCmxFGckGmoxFxUnAgDlqojKhAIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170420131646eucas1p1d302e43fd2823f8e8defe93a24e03e29 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170420131646eucas1p1d302e43fd2823f8e8defe93a24e03e29 X-RootMTR: 20170420131646eucas1p1d302e43fd2823f8e8defe93a24e03e29 References: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Clock providers should use the new struct clk_hw based API, so convert Exynos Audio Subsystem clock provider to the new approach. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos-audss.c | 55 +++++++++++++++++----------------- 1 file changed, 28 insertions(+), 27 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Krzysztof Kozlowski diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index cb7df358a27d..e8f89529da07 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -22,9 +22,8 @@ #include static DEFINE_SPINLOCK(lock); -static struct clk **clk_table; static void __iomem *reg_base; -static struct clk_onecell_data clk_data; +static struct clk_hw_onecell_data *clk_data; /* * On Exynos5420 this will be a clock which has to be enabled before any * access to audss registers. Typically a child of EPLL. @@ -110,18 +109,18 @@ static void exynos_audss_clk_teardown(void) int i; for (i = EXYNOS_MOUT_AUDSS; i < EXYNOS_DOUT_SRP; i++) { - if (!IS_ERR(clk_table[i])) - clk_unregister_mux(clk_table[i]); + if (!IS_ERR(clk_data->hws[i])) + clk_hw_unregister_mux(clk_data->hws[i]); } for (; i < EXYNOS_SRP_CLK; i++) { - if (!IS_ERR(clk_table[i])) - clk_unregister_divider(clk_table[i]); + if (!IS_ERR(clk_data->hws[i])) + clk_hw_unregister_divider(clk_data->hws[i]); } - for (; i < clk_data.clk_num; i++) { - if (!IS_ERR(clk_table[i])) - clk_unregister_gate(clk_table[i]); + for (; i < clk_data->num; i++) { + if (!IS_ERR(clk_data->hws[i])) + clk_hw_unregister_gate(clk_data->hws[i]); } } @@ -133,6 +132,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) const char *sclk_pcm_p = "sclk_pcm0"; struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; const struct exynos_audss_clk_drvdata *variant; + struct clk_hw **clk_table; struct resource *res; int i, ret = 0; @@ -149,14 +149,15 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) epll = ERR_PTR(-ENODEV); - clk_table = devm_kzalloc(&pdev->dev, - sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, + clk_data = devm_kzalloc(&pdev->dev, + sizeof(*clk_data) + + sizeof(*clk_data->hws) * EXYNOS_AUDSS_MAX_CLKS, GFP_KERNEL); - if (!clk_table) + if (!clk_data) return -ENOMEM; - clk_data.clks = clk_table; - clk_data.clk_num = variant->num_clks; + clk_data->num = variant->num_clks; + clk_table = clk_data->hws; pll_ref = devm_clk_get(&pdev->dev, "pll_ref"); pll_in = devm_clk_get(&pdev->dev, "pll_in"); @@ -176,7 +177,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) } } } - clk_table[EXYNOS_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", + clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", mout_audss_p, ARRAY_SIZE(mout_audss_p), CLK_SET_RATE_NO_REPARENT, reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); @@ -187,53 +188,53 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) mout_i2s_p[1] = __clk_get_name(cdclk); if (!IS_ERR(sclk_audio)) mout_i2s_p[2] = __clk_get_name(sclk_audio); - clk_table[EXYNOS_MOUT_I2S] = clk_register_mux(NULL, "mout_i2s", + clk_table[EXYNOS_MOUT_I2S] = clk_hw_register_mux(NULL, "mout_i2s", mout_i2s_p, ARRAY_SIZE(mout_i2s_p), CLK_SET_RATE_NO_REPARENT, reg_base + ASS_CLK_SRC, 2, 2, 0, &lock); - clk_table[EXYNOS_DOUT_SRP] = clk_register_divider(NULL, "dout_srp", + clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(NULL, "dout_srp", "mout_audss", 0, reg_base + ASS_CLK_DIV, 0, 4, 0, &lock); - clk_table[EXYNOS_DOUT_AUD_BUS] = clk_register_divider(NULL, + clk_table[EXYNOS_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, "dout_aud_bus", "dout_srp", 0, reg_base + ASS_CLK_DIV, 4, 4, 0, &lock); - clk_table[EXYNOS_DOUT_I2S] = clk_register_divider(NULL, "dout_i2s", + clk_table[EXYNOS_DOUT_I2S] = clk_hw_register_divider(NULL, "dout_i2s", "mout_i2s", 0, reg_base + ASS_CLK_DIV, 8, 4, 0, &lock); - clk_table[EXYNOS_SRP_CLK] = clk_register_gate(NULL, "srp_clk", + clk_table[EXYNOS_SRP_CLK] = clk_hw_register_gate(NULL, "srp_clk", "dout_srp", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 0, 0, &lock); - clk_table[EXYNOS_I2S_BUS] = clk_register_gate(NULL, "i2s_bus", + clk_table[EXYNOS_I2S_BUS] = clk_hw_register_gate(NULL, "i2s_bus", "dout_aud_bus", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 2, 0, &lock); - clk_table[EXYNOS_SCLK_I2S] = clk_register_gate(NULL, "sclk_i2s", + clk_table[EXYNOS_SCLK_I2S] = clk_hw_register_gate(NULL, "sclk_i2s", "dout_i2s", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 3, 0, &lock); - clk_table[EXYNOS_PCM_BUS] = clk_register_gate(NULL, "pcm_bus", + clk_table[EXYNOS_PCM_BUS] = clk_hw_register_gate(NULL, "pcm_bus", "sclk_pcm", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 4, 0, &lock); sclk_pcm_in = devm_clk_get(&pdev->dev, "sclk_pcm_in"); if (!IS_ERR(sclk_pcm_in)) sclk_pcm_p = __clk_get_name(sclk_pcm_in); - clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm", + clk_table[EXYNOS_SCLK_PCM] = clk_hw_register_gate(NULL, "sclk_pcm", sclk_pcm_p, CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 5, 0, &lock); if (variant->has_adma_clk) { - clk_table[EXYNOS_ADMA] = clk_register_gate(NULL, "adma", + clk_table[EXYNOS_ADMA] = clk_hw_register_gate(NULL, "adma", "dout_srp", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 9, 0, &lock); } - for (i = 0; i < clk_data.clk_num; i++) { + for (i = 0; i < clk_data->num; i++) { if (IS_ERR(clk_table[i])) { dev_err(&pdev->dev, "failed to register clock %d\n", i); ret = PTR_ERR(clk_table[i]); @@ -241,7 +242,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) } } - ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, + ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, &clk_data); if (ret) { dev_err(&pdev->dev, "failed to add clock provider\n"); From patchwork Thu Apr 20 13:16:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 97814 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp794568qgf; Thu, 20 Apr 2017 06:18:03 -0700 (PDT) X-Received: by 10.84.232.205 with SMTP id x13mr10567372plm.153.1492694283170; Thu, 20 Apr 2017 06:18:03 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 20 Apr 2017 14:16:46 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Stephen Boyd , Michael Turquette , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 3/4] clk: samsung: exynos-clkout: Convert to the new clk_hw API Date: Thu, 20 Apr 2017 15:16:38 +0200 Message-id: <1492694199-9553-4-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrAIsWRmVeSWpSXmKPExsWy7djP87r7t/yIMJg5V9Fi44z1rBbXvzxn tTh/fgO7xceee6wWM87vY7JYe+Quu8XFU64Wh9+0s1r8ONPN4sDp8f5GK7vH5b5eJo9NqzrZ PPq2rGL0+LxJLoA1issmJTUnsyy1SN8ugSvj+NpbjAWnhCrOXJ7P2sB4jb+LkZNDQsBE4tOj OewQtpjEhXvr2boYuTiEBJYySqya1csE4XxmlNh+fgkzTMfijeuYQGwhgWWMEkeue0MUNTBJ /P37FyzBJmAo0fW2iw3EFhFwkPj86TUjSBGzwE4miQk/VwIlODiEBQIlGl+ZgdSwCKhKPJ+3 BOwMXgF3iQX/30Itk5M4eWwyK4jNKeAhMXXSHahT/7NJvD5oBDJGQkBWYtMBqHIXiddf1rJA 2MISr45vgSqXkejsOMgEYfczSjS1akPYMxglzr3lhbCtJQ4fvwi2ilmAT2LStunMEON5JTra hCBKPCQuruqFGuko8eXtGlaI12czSnQvu8A+gVFmASPDKkaR1NLi3PTUYiO94sTc4tK8dL3k /NxNjMB4Pv3v+McdjO9PWB1iFOBgVOLhVVjzI0KINbGsuDL3EKMEB7OSCK/vJqAQb0piZVVq UX58UWlOavEhRmkOFiVxXq5T1yKEBNITS1KzU1MLUotgskwcnFINjFVXu+92Buz+rqcqGXPa VeLLUVOGd84BjNMerP99Tltet7XqbP6Ecxucq04xMVcKc6wwvbo2ckrz86Bb150bvNq2vu3h axTtWdFjf/6rAS+3ukCAQOwrvQseRj3aF791sPwTd3os5c+99r6tRMer6gdt0+QCFvRL7Pj5 /NjZ6K6rZxxvzfN6ocRSnJFoqMVcVJwIADeA14vjAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrALMWRmVeSWpSXmKPExsVy+t/xy7qOW39EGDydKWSxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLiKVeLw2/aWS1+nOlmceD0eH+jld3jcl8vk8emVZ1s Hn1bVjF6fN4kF8Aa5WaTkZqYklqkkJqXnJ+SmZduqxQa4qZroaSQl5ibaqsUoesbEqSkUJaY UwrkGRmgAQfnAPdgJX27BLeM42tvMRacEqo4c3k+awPjNf4uRk4OCQETicUb1zFB2GISF+6t ZwOxhQSWMEq8nhQKYTcxSTxZqwBiswkYSnS97QKrERFwkPj86TVjFyMXB7PAbiaJiycfAzkc HMIC/hKnT/mA1LAIqEo8n7eEHcTmFXCXWPD/LTPELjmJk8cms4LYnAIeElMn3WGH2OUucWrb KtYJjLwLGBlWMYqklhbnpucWG+oVJ+YWl+al6yXn525iBIb2tmM/N+9gvLQx+BCjAAejEg+v wpofEUKsiWXFlbmHGCU4mJVEeH03AYV4UxIrq1KL8uOLSnNSiw8xmgIdNZFZSjQ5Hxh3eSXx hiaG5paGRsYWFuZGRkrivCUfroQLCaQnlqRmp6YWpBbB9DFxcEo1MCoH/J9TknrF6jLfIqt7 Pp2zDnT8ETknf6V//bKOPPY536+1frOb5nowSz764V4fR87i/emht30kXLXc6k2fTVo9e44M 77oZajWLuprMdz7g9FHXNE6ffKGMw2yhRtCN5O2zc75rnL9RkvP/wbJLzIev+ZgE3H+64ojZ tYLPK003yD5oLZ/6q1GJpTgj0VCLuag4EQCpNJDlgwIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170420131647eucas1p27a8e65eb92f64f872bfce611ac031700 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170420131647eucas1p27a8e65eb92f64f872bfce611ac031700 X-RootMTR: 20170420131647eucas1p27a8e65eb92f64f872bfce611ac031700 References: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Clock providers should use the new struct clk_hw based API, so convert Exynos CLKOUT clock provider to the new approach. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-exynos-clkout.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Krzysztof Kozlowski diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clkout.c index 6c6afb87b4ce..a21aea062bae 100644 --- a/drivers/clk/samsung/clk-exynos-clkout.c +++ b/drivers/clk/samsung/clk-exynos-clkout.c @@ -29,10 +29,9 @@ struct exynos_clkout { struct clk_gate gate; struct clk_mux mux; spinlock_t slock; - struct clk_onecell_data data; - struct clk *clk_table[EXYNOS_CLKOUT_NR_CLKS]; void __iomem *reg; u32 pmu_debug_save; + struct clk_hw_onecell_data data; }; static struct exynos_clkout *clkout; @@ -62,7 +61,9 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask) int ret; int i; - clkout = kzalloc(sizeof(*clkout), GFP_KERNEL); + clkout = kzalloc(sizeof(*clkout) + + sizeof(*clkout->data.hws) * EXYNOS_CLKOUT_NR_CLKS, + GFP_KERNEL); if (!clkout) return; @@ -100,17 +101,16 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask) clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT; clkout->mux.lock = &clkout->slock; - clkout->clk_table[0] = clk_register_composite(NULL, "clkout", + clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout", parent_names, parent_count, &clkout->mux.hw, &clk_mux_ops, NULL, NULL, &clkout->gate.hw, &clk_gate_ops, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT); - if (IS_ERR(clkout->clk_table[0])) + if (IS_ERR(clkout->data.hws[0])) goto err_unmap; - clkout->data.clks = clkout->clk_table; - clkout->data.clk_num = EXYNOS_CLKOUT_NR_CLKS; - ret = of_clk_add_provider(node, of_clk_src_onecell_get, &clkout->data); + clkout->data.num = EXYNOS_CLKOUT_NR_CLKS; + ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, &clkout->data); if (ret) goto err_clk_unreg; @@ -119,7 +119,7 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask) return; err_clk_unreg: - clk_unregister(clkout->clk_table[0]); + clk_hw_unregister(clkout->data.hws[0]); err_unmap: iounmap(clkout->reg); clks_put: From patchwork Thu Apr 20 13:16:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 97812 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp794167qgf; Thu, 20 Apr 2017 06:17:13 -0700 (PDT) X-Received: by 10.84.225.145 with SMTP id u17mr9743138plj.91.1492694232983; Thu, 20 Apr 2017 06:17:12 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 20 Apr 2017 14:16:47 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Stephen Boyd , Michael Turquette , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 4/4] clk: samsung: s5pv210-audss: Convert to the new clk_hw API Date: Thu, 20 Apr 2017 15:16:39 +0200 Message-id: <1492694199-9553-5-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMIsWRmVeSWpSXmKPExsWy7djP87oHtvyIMJjzkdFi44z1rBbXvzxn tTh/fgO7xceee6wWM87vY7JYe+Quu8XFU64Wh9+0s1r8ONPN4sDp8f5GK7vH5b5eJo9NqzrZ PPq2rGL0+LxJLoA1issmJTUnsyy1SN8ugStj4rQpjAVHdCr+XdnF0sA4V7WLkZNDQsBE4vfe bmYIW0ziwr31bF2MXBxCAksZJSZ/P88K4XxmlJi7cBorTMeVtsVQVcsYJd7uaYZyGpgk/nzq ZQepYhMwlOh628UGYosIOEh8/vSaEaSIWWAnk8SEnyvBEsICgRLTJ+wGa2ARUJWY+uAE2CG8 Au4Sh1vfs0Gsk5M4eWwy2GpOAQ+JqZPusIMMkhD4zSbR1v0UKMEB5MhKbDoA9YSLROe1RkYI W1ji1fEt7BC2jERnx0EmCLufUaKpVRvCnsEoce4tL4RtLXH4+EWwXcwCfBKTtk1nhhjPK9HR JgRR4iFx+PxiqPGOEod7N7JDPD+bUaJ5+T3WCYwyCxgZVjGKpJYW56anFhvpFSfmFpfmpesl 5+duYgRG9el/xz/uYHx/wuoQowAHoxIPr8KaHxFCrIllxZW5hxglOJiVRHh9NwGFeFMSK6tS i/Lji0pzUosPMUpzsCiJ83KduhYhJJCeWJKanZpakFoEk2Xi4JRqYJyU5GX8+UbdrntdeWk7 jlxlPerJOuHLN9vzGzksNj39tIO5dCJnkh2zwWO1t+yrNr02dr+6o34tz+HHBWVtSRErLRKP iTze375j5frkRf/mN264VD3l4ZbIOpbvRub202V99/AaxgZO7V7eMefZYnW/Q+/M17yZebfT Nfb6/YhH9QdvWF390GKgxFKckWioxVxUnAgAwwOp0eYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrMLMWRmVeSWpSXmKPExsVy+t/xy7qOW39EGMxZp2uxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLiKVeLw2/aWS1+nOlmceD0eH+jld3jcl8vk8emVZ1s Hn1bVjF6fN4kF8Aa5WaTkZqYklqkkJqXnJ+SmZduqxQa4qZroaSQl5ibaqsUoesbEqSkUJaY UwrkGRmgAQfnAPdgJX27BLeMidOmMBYc0an4d2UXSwPjXNUuRk4OCQETiStti9kgbDGJC/fW A9lcHEICSxglDk7bygzhNDFJTLxzCKyKTcBQouttF5gtIuAg8fnTa0aQImaB3UwSF08+ZgRJ CAv4S9y8cJUVxGYRUJWY+uAEM4jNK+Aucbj1PdQ6OYmTxyaD1XAKeEhMnXSHHcQWAqo5tW0V 6wRG3gWMDKsYRVJLi3PTc4sN9YoTc4tL89L1kvNzNzECA3zbsZ+bdzBe2hh8iFGAg1GJh1dh zY8IIdbEsuLK3EOMEhzMSiK8vpuAQrwpiZVVqUX58UWlOanFhxhNgY6ayCwlmpwPjL68knhD E0NzS0MjYwsLcyMjJXHekg9XwoUE0hNLUrNTUwtSi2D6mDg4pRoYo/tPWnbb7zioMaV1lr// yr17OJW2XPPkiVY8KRVl5Hd9q2vmiRcFJffOlPJYfn43/+Hhhnm/jYSUMsr/338qee0+Y4PS wgnyHvyL8mdO2r983oRU+wWmrbJLfQTEUyylVnlH+sqLBF2sZFoZcfHxi8Zpoc82T7FanLZB X4whNtz3T5RJ0fI4JZbijERDLeai4kQARs+ZC4YCAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170420131647eucas1p2c9c0fa48776f7af4652250e3384bf52b X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170420131647eucas1p2c9c0fa48776f7af4652250e3384bf52b X-RootMTR: 20170420131647eucas1p2c9c0fa48776f7af4652250e3384bf52b References: <1492694199-9553-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Clock providers should use the new struct clk_hw based API, so convert Samsung S5PV210 Audio Subsystem clock provider to the new approach. Signed-off-by: Marek Szyprowski --- drivers/clk/samsung/clk-s5pv210-audss.c | 50 +++++++++++++++++---------------- 1 file changed, 26 insertions(+), 24 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/clk-s5pv210-audss.c index c66ed2d1450e..14d2e3367878 100644 --- a/drivers/clk/samsung/clk-s5pv210-audss.c +++ b/drivers/clk/samsung/clk-s5pv210-audss.c @@ -24,9 +24,8 @@ #include static DEFINE_SPINLOCK(lock); -static struct clk **clk_table; static void __iomem *reg_base; -static struct clk_onecell_data clk_data; +static struct clk_hw_onecell_data *clk_data; #define ASS_CLK_SRC 0x0 #define ASS_CLK_DIV 0x4 @@ -71,6 +70,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) const char *mout_audss_p[2]; const char *mout_i2s_p[3]; const char *hclk_p; + struct clk_hw **clk_table; struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -80,14 +80,16 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) return PTR_ERR(reg_base); } - clk_table = devm_kzalloc(&pdev->dev, - sizeof(struct clk *) * AUDSS_MAX_CLKS, + clk_data = devm_kzalloc(&pdev->dev, + sizeof(*clk_data) + + sizeof(*clk_data->hws) * AUDSS_MAX_CLKS, GFP_KERNEL); - if (!clk_table) + + if (!clk_data) return -ENOMEM; - clk_data.clks = clk_table; - clk_data.clk_num = AUDSS_MAX_CLKS; + clk_data->num = AUDSS_MAX_CLKS; + clk_table = clk_data->hws; hclk = devm_clk_get(&pdev->dev, "hclk"); if (IS_ERR(hclk)) { @@ -116,7 +118,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) else mout_audss_p[0] = "xxti"; mout_audss_p[1] = __clk_get_name(pll_in); - clk_table[CLK_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", + clk_data->hws[CLK_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", mout_audss_p, ARRAY_SIZE(mout_audss_p), CLK_SET_RATE_NO_REPARENT, reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); @@ -127,44 +129,44 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) else mout_i2s_p[1] = "iiscdclk0"; mout_i2s_p[2] = __clk_get_name(sclk_audio); - clk_table[CLK_MOUT_I2S_A] = clk_register_mux(NULL, "mout_i2s_audss", + clk_table[CLK_MOUT_I2S_A] = clk_hw_register_mux(NULL, "mout_i2s_audss", mout_i2s_p, ARRAY_SIZE(mout_i2s_p), CLK_SET_RATE_NO_REPARENT, reg_base + ASS_CLK_SRC, 2, 2, 0, &lock); - clk_table[CLK_DOUT_AUD_BUS] = clk_register_divider(NULL, + clk_table[CLK_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, "dout_aud_bus", "mout_audss", 0, reg_base + ASS_CLK_DIV, 0, 4, 0, &lock); - clk_table[CLK_DOUT_I2S_A] = clk_register_divider(NULL, "dout_i2s_audss", - "mout_i2s_audss", 0, reg_base + ASS_CLK_DIV, - 4, 4, 0, &lock); + clk_table[CLK_DOUT_I2S_A] = clk_hw_register_divider(NULL, + "dout_i2s_audss", "mout_i2s_audss", 0, + reg_base + ASS_CLK_DIV, 4, 4, 0, &lock); - clk_table[CLK_I2S] = clk_register_gate(NULL, "i2s_audss", + clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", "dout_i2s_audss", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 6, 0, &lock); hclk_p = __clk_get_name(hclk); - clk_table[CLK_HCLK_I2S] = clk_register_gate(NULL, "hclk_i2s_audss", + clk_table[CLK_HCLK_I2S] = clk_hw_register_gate(NULL, "hclk_i2s_audss", hclk_p, CLK_IGNORE_UNUSED, reg_base + ASS_CLK_GATE, 5, 0, &lock); - clk_table[CLK_HCLK_UART] = clk_register_gate(NULL, "hclk_uart_audss", + clk_table[CLK_HCLK_UART] = clk_hw_register_gate(NULL, "hclk_uart_audss", hclk_p, CLK_IGNORE_UNUSED, reg_base + ASS_CLK_GATE, 4, 0, &lock); - clk_table[CLK_HCLK_HWA] = clk_register_gate(NULL, "hclk_hwa_audss", + clk_table[CLK_HCLK_HWA] = clk_hw_register_gate(NULL, "hclk_hwa_audss", hclk_p, CLK_IGNORE_UNUSED, reg_base + ASS_CLK_GATE, 3, 0, &lock); - clk_table[CLK_HCLK_DMA] = clk_register_gate(NULL, "hclk_dma_audss", + clk_table[CLK_HCLK_DMA] = clk_hw_register_gate(NULL, "hclk_dma_audss", hclk_p, CLK_IGNORE_UNUSED, reg_base + ASS_CLK_GATE, 2, 0, &lock); - clk_table[CLK_HCLK_BUF] = clk_register_gate(NULL, "hclk_buf_audss", + clk_table[CLK_HCLK_BUF] = clk_hw_register_gate(NULL, "hclk_buf_audss", hclk_p, CLK_IGNORE_UNUSED, reg_base + ASS_CLK_GATE, 1, 0, &lock); - clk_table[CLK_HCLK_RP] = clk_register_gate(NULL, "hclk_rp_audss", + clk_table[CLK_HCLK_RP] = clk_hw_register_gate(NULL, "hclk_rp_audss", hclk_p, CLK_IGNORE_UNUSED, reg_base + ASS_CLK_GATE, 0, 0, &lock); - for (i = 0; i < clk_data.clk_num; i++) { + for (i = 0; i < clk_data->num; i++) { if (IS_ERR(clk_table[i])) { dev_err(&pdev->dev, "failed to register clock %d\n", i); ret = PTR_ERR(clk_table[i]); @@ -172,7 +174,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) } } - ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, + ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, &clk_data); if (ret) { dev_err(&pdev->dev, "failed to add clock provider\n"); @@ -186,9 +188,9 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) return 0; unregister: - for (i = 0; i < clk_data.clk_num; i++) { + for (i = 0; i < clk_data->num; i++) { if (!IS_ERR(clk_table[i])) - clk_unregister(clk_table[i]); + clk_hw_unregister(clk_table[i]); } return ret;