From patchwork Mon Apr 5 15:50:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E900C433B4 for ; Mon, 5 Apr 2021 15:52:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F32DA613BE for ; Mon, 5 Apr 2021 15:52:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241672AbhDEPwJ (ORCPT ); Mon, 5 Apr 2021 11:52:09 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:36157 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236221AbhDEPwI (ORCPT ); Mon, 5 Apr 2021 11:52:08 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617637922; x=1649173922; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZseDIZKjZBAQeshZzxvVySAICjj4gFiPGz57KZF5zJM=; b=r9/KB0sBUNzM5bvqspfivMCwQop4z4Obk5Ld5/VSR/ZgpyZ8D/DFuO+z dHkolVkAEWxOG5WhyOFwK3RIinkow4R9bqj1u9HwjUVZPcY7ZPjQ2BR0L uqpc8rLYqGBmI0tZW5kwHYOq/CDxWchnz8AblIQHn6Zq9Wkztm5+UurOo EMZ70s9RY2Nyyru5legJZSs8GSeMwTfWepgHEbpaqC4wS7BmwwpDButN7 pwYx/o2ry2xDQ/+pKd0ChzhkuXTkcXXraGe25YeJs1pgbAxc2orkGsYAk pPQ9aySeZMDJfGk57oJNul+P1xf/BWihk42Byjmc7/OYx1UN4NXFdM4tb w==; IronPort-SDR: kiJeli/0ITvZNC3++msYQdMJWIpS/sWaKxlvw0BWQcvQN9zaKalwHP6N920q8lHn156Q2y2vPy NX1fCaQFrz81yAgGelgB/u5cGkHgLMa4+Lihr6N7xBm/zuw85P9dU47Cw4MJP5k9VThLl0p+gu 31ClVYdL/L1mmEYEd9jKaoJ77/hvqze6E2G7cGYDx7TsmH9IozzWQJiaT61h7qQg7nShKoMd+4 cWVfK7sr3ycLLzspUPB7+bv8nCI0i4h03So7TNvVuRG+j1+0h72AoflWKc4rgMCARidSwIvMSc Ggs= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="112481480" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:52:02 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:52:01 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:51:44 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 01/30] media: atmel: atmel-isc: specialize gamma table into product specific Date: Mon, 5 Apr 2021 18:50:36 +0300 Message-ID: <20210405155105.162529-2-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Separate the gamma table from the isc base file into the specific sama5d2 product file. Add a pointer to the gamma table and entries count inside the platform driver specific struct. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 47 ++----------------- drivers/media/platform/atmel/atmel-isc.h | 11 +++-- .../media/platform/atmel/atmel-sama5d2-isc.c | 45 ++++++++++++++++++ 3 files changed, 56 insertions(+), 47 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index fe3ec8d0eaee..8b6c5e339cb8 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -176,48 +176,6 @@ struct isc_format formats_list[] = { }; -/* Gamma table with gamma 1/2.2 */ -const u32 isc_gamma_table[GAMMA_MAX + 1][GAMMA_ENTRIES] = { - /* 0 --> gamma 1/1.8 */ - { 0x65, 0x66002F, 0x950025, 0xBB0020, 0xDB001D, 0xF8001A, - 0x1130018, 0x12B0017, 0x1420016, 0x1580014, 0x16D0013, 0x1810012, - 0x1940012, 0x1A60012, 0x1B80011, 0x1C90010, 0x1DA0010, 0x1EA000F, - 0x1FA000F, 0x209000F, 0x218000F, 0x227000E, 0x235000E, 0x243000E, - 0x251000E, 0x25F000D, 0x26C000D, 0x279000D, 0x286000D, 0x293000C, - 0x2A0000C, 0x2AC000C, 0x2B8000C, 0x2C4000C, 0x2D0000B, 0x2DC000B, - 0x2E7000B, 0x2F3000B, 0x2FE000B, 0x309000B, 0x314000B, 0x31F000A, - 0x32A000A, 0x334000B, 0x33F000A, 0x349000A, 0x354000A, 0x35E000A, - 0x368000A, 0x372000A, 0x37C000A, 0x386000A, 0x3900009, 0x399000A, - 0x3A30009, 0x3AD0009, 0x3B60009, 0x3BF000A, 0x3C90009, 0x3D20009, - 0x3DB0009, 0x3E40009, 0x3ED0009, 0x3F60009 }, - - /* 1 --> gamma 1/2 */ - { 0x7F, 0x800034, 0xB50028, 0xDE0021, 0x100001E, 0x11E001B, - 0x1390019, 0x1520017, 0x16A0015, 0x1800014, 0x1940014, 0x1A80013, - 0x1BB0012, 0x1CD0011, 0x1DF0010, 0x1EF0010, 0x200000F, 0x20F000F, - 0x21F000E, 0x22D000F, 0x23C000E, 0x24A000E, 0x258000D, 0x265000D, - 0x273000C, 0x27F000D, 0x28C000C, 0x299000C, 0x2A5000C, 0x2B1000B, - 0x2BC000C, 0x2C8000B, 0x2D3000C, 0x2DF000B, 0x2EA000A, 0x2F5000A, - 0x2FF000B, 0x30A000A, 0x314000B, 0x31F000A, 0x329000A, 0x333000A, - 0x33D0009, 0x3470009, 0x350000A, 0x35A0009, 0x363000A, 0x36D0009, - 0x3760009, 0x37F0009, 0x3880009, 0x3910009, 0x39A0009, 0x3A30009, - 0x3AC0008, 0x3B40009, 0x3BD0008, 0x3C60008, 0x3CE0008, 0x3D60009, - 0x3DF0008, 0x3E70008, 0x3EF0008, 0x3F70008 }, - - /* 2 --> gamma 1/2.2 */ - { 0x99, 0x9B0038, 0xD4002A, 0xFF0023, 0x122001F, 0x141001B, - 0x15D0019, 0x1760017, 0x18E0015, 0x1A30015, 0x1B80013, 0x1CC0012, - 0x1DE0011, 0x1F00010, 0x2010010, 0x2110010, 0x221000F, 0x230000F, - 0x23F000E, 0x24D000E, 0x25B000D, 0x269000C, 0x276000C, 0x283000C, - 0x28F000C, 0x29B000C, 0x2A7000C, 0x2B3000B, 0x2BF000B, 0x2CA000B, - 0x2D5000B, 0x2E0000A, 0x2EB000A, 0x2F5000A, 0x2FF000A, 0x30A000A, - 0x3140009, 0x31E0009, 0x327000A, 0x3310009, 0x33A0009, 0x3440009, - 0x34D0009, 0x3560009, 0x35F0009, 0x3680008, 0x3710008, 0x3790009, - 0x3820008, 0x38A0008, 0x3930008, 0x39B0008, 0x3A30008, 0x3AB0008, - 0x3B30008, 0x3BB0008, 0x3C30008, 0x3CB0007, 0x3D20008, 0x3DA0007, - 0x3E20007, 0x3E90007, 0x3F00008, 0x3F80007 }, -}; - #define ISC_IS_FORMAT_RAW(mbus_code) \ (((mbus_code) & 0xf000) == 0x3000) @@ -683,7 +641,7 @@ static void isc_set_pipeline(struct isc_device *isc, u32 pipeline) regmap_write(regmap, ISC_CFA_CFG, bay_cfg | ISC_CFA_CFG_EITPOL); - gamma = &isc_gamma_table[ctrls->gamma_index][0]; + gamma = &isc->gamma_table[ctrls->gamma_index][0]; regmap_bulk_write(regmap, ISC_GAM_BENTRY, gamma, GAMMA_ENTRIES); regmap_bulk_write(regmap, ISC_GAM_GENTRY, gamma, GAMMA_ENTRIES); regmap_bulk_write(regmap, ISC_GAM_RENTRY, gamma, GAMMA_ENTRIES); @@ -2070,7 +2028,8 @@ static int isc_ctrl_init(struct isc_device *isc) v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -1024, 1023, 1, 0); v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -2048, 2047, 1, 256); - v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAMMA, 0, GAMMA_MAX, 1, 2); + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAMMA, 0, isc->gamma_max, 1, + isc->gamma_max); isc->awb_ctrl = v4l2_ctrl_new_std(hdl, &isc_awb_ops, V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index fab8eca58d93..f1df47a4655b 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -187,6 +187,10 @@ struct isc_ctrls { * * @current_subdev: current subdevice: the sensor * @subdev_entities: list of subdevice entitites + * + * @gamma_table: pointer to the table with gamma values, has + * gamma_max sets of GAMMA_ENTRIES entries each + * @gamma_max: maximum number of sets of inside the gamma_table */ struct isc_device { struct regmap *regmap; @@ -245,16 +249,17 @@ struct isc_device { struct v4l2_ctrl *gr_off_ctrl; struct v4l2_ctrl *gb_off_ctrl; }; -}; -#define GAMMA_MAX 2 #define GAMMA_ENTRIES 64 + /* pointer to the defined gamma table */ + const u32 (*gamma_table)[GAMMA_ENTRIES]; + u32 gamma_max; +}; #define ATMEL_ISC_NAME "atmel-isc" extern struct isc_format formats_list[]; extern const struct isc_format controller_formats[]; -extern const u32 isc_gamma_table[GAMMA_MAX + 1][GAMMA_ENTRIES]; extern const struct regmap_config isc_regmap_config; extern const struct v4l2_async_notifier_operations isc_async_ops; diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index 0b78fecfd2a8..c74f36245bd5 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -54,6 +54,48 @@ #define ISC_CLK_MAX_DIV 255 +/* Gamma table with gamma 1/2.2 */ +const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { + /* 0 --> gamma 1/1.8 */ + { 0x65, 0x66002F, 0x950025, 0xBB0020, 0xDB001D, 0xF8001A, + 0x1130018, 0x12B0017, 0x1420016, 0x1580014, 0x16D0013, 0x1810012, + 0x1940012, 0x1A60012, 0x1B80011, 0x1C90010, 0x1DA0010, 0x1EA000F, + 0x1FA000F, 0x209000F, 0x218000F, 0x227000E, 0x235000E, 0x243000E, + 0x251000E, 0x25F000D, 0x26C000D, 0x279000D, 0x286000D, 0x293000C, + 0x2A0000C, 0x2AC000C, 0x2B8000C, 0x2C4000C, 0x2D0000B, 0x2DC000B, + 0x2E7000B, 0x2F3000B, 0x2FE000B, 0x309000B, 0x314000B, 0x31F000A, + 0x32A000A, 0x334000B, 0x33F000A, 0x349000A, 0x354000A, 0x35E000A, + 0x368000A, 0x372000A, 0x37C000A, 0x386000A, 0x3900009, 0x399000A, + 0x3A30009, 0x3AD0009, 0x3B60009, 0x3BF000A, 0x3C90009, 0x3D20009, + 0x3DB0009, 0x3E40009, 0x3ED0009, 0x3F60009 }, + + /* 1 --> gamma 1/2 */ + { 0x7F, 0x800034, 0xB50028, 0xDE0021, 0x100001E, 0x11E001B, + 0x1390019, 0x1520017, 0x16A0015, 0x1800014, 0x1940014, 0x1A80013, + 0x1BB0012, 0x1CD0011, 0x1DF0010, 0x1EF0010, 0x200000F, 0x20F000F, + 0x21F000E, 0x22D000F, 0x23C000E, 0x24A000E, 0x258000D, 0x265000D, + 0x273000C, 0x27F000D, 0x28C000C, 0x299000C, 0x2A5000C, 0x2B1000B, + 0x2BC000C, 0x2C8000B, 0x2D3000C, 0x2DF000B, 0x2EA000A, 0x2F5000A, + 0x2FF000B, 0x30A000A, 0x314000B, 0x31F000A, 0x329000A, 0x333000A, + 0x33D0009, 0x3470009, 0x350000A, 0x35A0009, 0x363000A, 0x36D0009, + 0x3760009, 0x37F0009, 0x3880009, 0x3910009, 0x39A0009, 0x3A30009, + 0x3AC0008, 0x3B40009, 0x3BD0008, 0x3C60008, 0x3CE0008, 0x3D60009, + 0x3DF0008, 0x3E70008, 0x3EF0008, 0x3F70008 }, + + /* 2 --> gamma 1/2.2 */ + { 0x99, 0x9B0038, 0xD4002A, 0xFF0023, 0x122001F, 0x141001B, + 0x15D0019, 0x1760017, 0x18E0015, 0x1A30015, 0x1B80013, 0x1CC0012, + 0x1DE0011, 0x1F00010, 0x2010010, 0x2110010, 0x221000F, 0x230000F, + 0x23F000E, 0x24D000E, 0x25B000D, 0x269000C, 0x276000C, 0x283000C, + 0x28F000C, 0x29B000C, 0x2A7000C, 0x2B3000B, 0x2BF000B, 0x2CA000B, + 0x2D5000B, 0x2E0000A, 0x2EB000A, 0x2F5000A, 0x2FF000A, 0x30A000A, + 0x3140009, 0x31E0009, 0x327000A, 0x3310009, 0x33A0009, 0x3440009, + 0x34D0009, 0x3560009, 0x35F0009, 0x3680008, 0x3710008, 0x3790009, + 0x3820008, 0x38A0008, 0x3930008, 0x39B0008, 0x3A30008, 0x3AB0008, + 0x3B30008, 0x3BB0008, 0x3C30008, 0x3CB0007, 0x3D20008, 0x3DA0007, + 0x3E20007, 0x3E90007, 0x3F00008, 0x3F80007 }, +}; + static int isc_parse_dt(struct device *dev, struct isc_device *isc) { struct device_node *np = dev->of_node; @@ -150,6 +192,9 @@ static int atmel_isc_probe(struct platform_device *pdev) return ret; } + isc->gamma_table = isc_sama5d2_gamma_table; + isc->gamma_max = 2; + ret = isc_pipeline_init(isc); if (ret) return ret; From patchwork Mon Apr 5 15:50:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A1DBC433ED for ; Mon, 5 Apr 2021 15:52:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6FF39613AF for ; Mon, 5 Apr 2021 15:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238316AbhDEPw4 (ORCPT ); Mon, 5 Apr 2021 11:52:56 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:36224 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232798AbhDEPwz (ORCPT ); Mon, 5 Apr 2021 11:52:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617637969; x=1649173969; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=W9RTc4XTqmuga+DzPKp51siwwTSJHh6dtg9LlNk0M14=; b=gCpE7MTBzZBjzJlePCpiqRdP1NZq8ZBxbGb+6N8KYj1/a+uScoQTQfvd mX+wB7mcfHEGGKVJPPglQ+pPhn8qxErylb+E/XfkyaTHzQcEsccU/lSoK 6k3qP89ArNa7KzePMbJjTEfPYHTAHE8zEV4rVxxBtg3IhndxfIutw0OJf TJ4tMZySYV1P7y2zQezzEvIVCeJ8WlPU1qqejFInOiL+P939GaGGIZTTQ QnFDfmIrwxOoZtwiOZ3+5OCkA1K4kL7ivJ9Vy3O3QMFEv0KImFrT57i2B ll3uk+U+A3EsCBVKENbs96mTyGPvOfXyM4a/ssfzMHaM2fW037eEPBj3Q Q==; IronPort-SDR: US6DGm0iWxEyeoAwyPGNZAmbVvGtLhLaF8tBGQdxb51J65oG7yjBU/W0R+kP0HI43xoqOnVTbj Hck3klKSv5UqIXu0UW6YLMKpLWHWgZaHnxEg/uXLPbgw9Azde1b2eohuEwu8Hp47CVeZnf1/6E 7r751EgMZkQUn+RTs67ceUE0tYc5mjD5JdWQaf+5IafUw1MOG3INHu0z85W0A2k4q8ZrLITeqZ 4nvy3jUERHrNqlddH7b6TPi8GnrB8xUeDUczcjUjFLwfK0wM3YVWSMnDvV9aLw0q1LQLI8Q7R7 Jh4= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="112481602" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:52:49 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:52:49 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:52:23 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 03/30] media: atmel: atmel-isc: add checks for limiting frame sizes Date: Mon, 5 Apr 2021 18:50:38 +0300 Message-ID: <20210405155105.162529-4-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When calling the subdev, certain subdev drivers will overwrite the frame size and adding sizes which are beyond the ISC's capabilities. Thus we need to ensure the frame size is cropped to the maximum caps. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 277a8fd8b83d..45fc8dbb7943 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -1326,6 +1326,12 @@ static int isc_try_fmt(struct isc_device *isc, struct v4l2_format *f, v4l2_fill_pix_format(pixfmt, &format.format); + /* Limit to Atmel ISC hardware capabilities */ + if (pixfmt->width > ISC_MAX_SUPPORT_WIDTH) + pixfmt->width = ISC_MAX_SUPPORT_WIDTH; + if (pixfmt->height > ISC_MAX_SUPPORT_HEIGHT) + pixfmt->height = ISC_MAX_SUPPORT_HEIGHT; + pixfmt->field = V4L2_FIELD_NONE; pixfmt->bytesperline = (pixfmt->width * isc->try_config.bpp) >> 3; pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; @@ -1361,6 +1367,12 @@ static int isc_set_fmt(struct isc_device *isc, struct v4l2_format *f) if (ret < 0) return ret; + /* Limit to Atmel ISC hardware capabilities */ + if (pixfmt->width > ISC_MAX_SUPPORT_WIDTH) + pixfmt->width = ISC_MAX_SUPPORT_WIDTH; + if (pixfmt->height > ISC_MAX_SUPPORT_HEIGHT) + pixfmt->height = ISC_MAX_SUPPORT_HEIGHT; + isc->fmt = *f; if (isc->try_config.sd_format && isc->config.sd_format && From patchwork Mon Apr 5 15:50:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B607BC433ED for ; Mon, 5 Apr 2021 15:53:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 90C8061165 for ; Mon, 5 Apr 2021 15:53:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238415AbhDEPxb (ORCPT ); Mon, 5 Apr 2021 11:53:31 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:57502 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232798AbhDEPxb (ORCPT ); Mon, 5 Apr 2021 11:53:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638005; x=1649174005; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zGiPMKIR71RoJeRCsbyz2/Jkh0vjyf2K5BPASY5QkfU=; b=QJ5RsxZ1kSRS8VWPpHRuYF6X4fTCIgV8M/UMRnFOi/f5kLowf0Q51fwZ jeEbhlm51vNvsHYPGIqUnNbFolpAL0QoroLtvsrGK3+gT7cDVDCB3tFpR A+MB/D5MdL544sXg1lT8tg+fPJ/i3wzoWpnuhacRLTcErIpeuMq2wO2p+ 6FhjdCWcbBjfvUkavCCqXE2A2GF5BRy8sIBYfztwXsKBGXxjjw1G+hCvj NtQJO9LW/bBLdhsdSRLcGBIkHqDsugCS3bFbSwaC7zBFmNXA4tH4oz+gZ 8e42RzI39gdy0Dn6ARNb+8CCkBV6ZOTECg7Kw8VMtzymZuBZIo7yqWaGw g==; IronPort-SDR: BYg+Do5jNbtGiaeZ6Bw94KjY+jmGfmoT4CfqJnlJu/MUkt3JVmld4bcuS5HI2Q+js+PFeW226+ E15G7YZrwdblTSirCSuSZt580kKuJb+eL1ouPbSXN5P0c/ELpmd2bt6iD+YOiIe28+MtYVLb/v RwMATp1MGzb0FGUamDrhMG0Q/kdJ650TIPSkiXmaLjNV7+GvfREPTGKiz1amU0aVIoVyrB91ph NeynCrpI8Klq7YfafXtNnhqUi3qisKFkBboiwuO/0bZ9KdMm1xU4p6/QS0tu9u7TSLj2UUQKz4 S3A= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="121808111" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:53:25 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:53:24 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:53:07 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 05/30] media: atmel: atmel-isc: specialize dma cfg Date: Mon, 5 Apr 2021 18:50:40 +0300 Message-ID: <20210405155105.162529-6-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The dma configuration (DCFG) is specific to the product. Move this configuration in the product specific driver, and add the field inside the driver struct. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 3 +-- drivers/media/platform/atmel/atmel-isc.h | 2 ++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 3 +++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 350076dd029a..ff40ee2e2759 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -716,8 +716,7 @@ static int isc_configure(struct isc_device *isc) rlp_mode = isc->config.rlp_cfg_mode; pipeline = isc->config.bits_pipeline; - dcfg = isc->config.dcfg_imode | - ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; + dcfg = isc->config.dcfg_imode | isc->dcfg; pfe_cfg0 |= subdev->pfe_cfg0 | ISC_PFE_CFG0_MODE_PROGRESSIVE; mask = ISC_PFE_CFG0_BPS_MASK | ISC_PFE_CFG0_HPOL_LOW | diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index 6becc6c3aaf0..d14ae096fbf6 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -150,6 +150,7 @@ struct isc_ctrls { * @hclock: Hclock clock input (refer datasheet) * @ispck: iscpck clock (refer datasheet) * @isc_clks: ISC clocks + * @dcfg: DMA master configuration, architecture dependent * * @dev: Registered device driver * @v4l2_dev: v4l2 registered device @@ -197,6 +198,7 @@ struct isc_device { struct clk *hclock; struct clk *ispck; struct isc_clk isc_clks[2]; + u32 dcfg; struct device *dev; struct v4l2_device v4l2_dev; diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index f8d1c8ba99b3..6d9942dcd7c1 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -198,6 +198,9 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->max_width = ISC_SAMA5D2_MAX_SUPPORT_WIDTH; isc->max_height = ISC_SAMA5D2_MAX_SUPPORT_HEIGHT; + /* sama5d2-isc - 8 bits per beat */ + isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; + ret = isc_pipeline_init(isc); if (ret) return ret; From patchwork Mon Apr 5 15:50:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F212CC433ED for ; Mon, 5 Apr 2021 15:53:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B8505613B1 for ; Mon, 5 Apr 2021 15:53:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241740AbhDEPx4 (ORCPT ); Mon, 5 Apr 2021 11:53:56 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:14552 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235683AbhDEPxz (ORCPT ); Mon, 5 Apr 2021 11:53:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638028; x=1649174028; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XFUIMGcuk2LQccy9mIU7wH0R7YLi14N6pV7ElUM4/Mg=; b=IuHLq+VHYIrQ+YPzUvrmxmEPBDEDT3mV0HGLPhWqGv56B+KERsobp0NQ gaH6xAVwFlRvMPBfjx77HFU4SePLpwyNSDueW+khh24SCY3qT5vJCW3KB x3pgR7PJwPzTcBNKZaL9HChkHGG6OhCuXocNwozGM5uWjMAoIMJXQhBYI obUnzFOraEef73oWeoB2qCbSvnKxPJ/D8diZLgC6+p3xinDtzsej+uA1O HrcpD21k2f+46MQGBOCg0A5doSSbz2L+ubcahDUwsmL4BH84mQDzeiPGl eGjQEy4KoQcunKtt431b+8u5Yi3FS4TQzK22hDPioca0r00OChzuewA8T g==; IronPort-SDR: GDsoAM5p8sj/qeh6anODI46y6g5HeJuFm4wRyRGd4veLgXtVO8HPpxgGk2OZ1gIZrp4Gda42ix SVcMMFRsB7UTt/ip182jsA8HyOYwslrEuMwkhAnLP3LEHHA417J+0GP7SYOrY4U/gpuqQnvJW/ dJDXMaVb/66rgUVCHOTvlnPv6K0QY7cMwIYpHQJ+a6+9+fG+lymtcRjWQa6SzLXj/60FuHXGQe M0LPMFZ2nrMckbb4uJj2u69yKbj/GvJsMM3sgcYdqohwzdOa6MjQfHjEBqgthJDg5JqzTZt6Ez wsc= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="109700892" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:53:48 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:53:48 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:53:43 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 07/30] media: atmel: atmel-isc-base: add id to clock debug message Date: Mon, 5 Apr 2021 18:50:42 +0300 Message-ID: <20210405155105.162529-8-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add the clock id to the debug message regarding clock setup Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 31f63ba90c71..bc036e8ac4fe 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -277,8 +277,8 @@ static int isc_clk_enable(struct clk_hw *hw) unsigned long flags; unsigned int status; - dev_dbg(isc_clk->dev, "ISC CLK: %s, div = %d, parent id = %d\n", - __func__, isc_clk->div, isc_clk->parent_id); + dev_dbg(isc_clk->dev, "ISC CLK: %s, id = %d, div = %d, parent id = %d\n", + __func__, id, isc_clk->div, isc_clk->parent_id); spin_lock_irqsave(&isc_clk->lock, flags); regmap_update_bits(regmap, ISC_CLKCFG, From patchwork Mon Apr 5 15:50:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415499 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC479C43461 for ; Mon, 5 Apr 2021 15:53:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A0583613B1 for ; Mon, 5 Apr 2021 15:53:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241762AbhDEPyB (ORCPT ); Mon, 5 Apr 2021 11:54:01 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:57531 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241752AbhDEPx6 (ORCPT ); Mon, 5 Apr 2021 11:53:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638032; x=1649174032; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rdvIzi/L0XfqY6KKlPcjVlfFG0pyj+7V8L1NdsX9Lig=; b=zYz+Ve3VgwWR055YoZL9uRYVZBrpxap2XnGc0p1b9OVqGfeG91vv5Aox jbT6I3C5t7/O3XnbwklkmQVNCZ634mX1IUb9hleQtpHECEGtDbl4ElBKB FDWk0ug0KSwlAfDozEwACTjWKYoGLh9RRbdZwdTFt2Ga/WIeEmG1JdC1N PBIIySyNzjwBvObNXS10B2q+bvd6kKrKt8IB5CF0XgWD4CWKVb2je0POx 9A/af/MrAjpFIUg3SiX5Fr3b1n6WfjUSm6an9/3fQed7JXdgRcdGXIXkZ qdYc28MO9OffbrxBmna55wS/gnxLzEODqgVZIdF71c79gsVZeHCFbt+tV Q==; IronPort-SDR: WtJgYnqNL5CmEJ8R3HnPg1XfChDTB9ZfFOLEK3ua4FPT0DTsk6M4HvlDQmbAqs328keik1D8ku Ic4/Tw2BcUVeHo91iagkOFynsSEymrju+Guxg6igr41TZT8S/niXkhFNymNJXtmjiZi8OD/uKU 3kSmpWojtCoS6OOOGuWc+4I2Ytvc205o5ClX79W4mGhc4flfoupUllTw264cHbGXw+6VRVnTkd YSqYTbQeLwpTURVNKyPhL/oWDS2VElcX2I2oBfvGJ8CO0PRuUYmVkZTXmUXN2qptJCiobRNCSd WIs= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="121808146" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:53:52 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:53:52 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:53:50 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 09/30] media: atmel: atmel-isc: extract CBC submodule config into separate function Date: Mon, 5 Apr 2021 18:50:44 +0300 Message-ID: <20210405155105.162529-10-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The CBC submodule should be initialized in the product specific driver as it's product specific. Other products can implement it differently Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c | 4 +--- drivers/media/platform/atmel/atmel-isc.h | 3 +++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 10 ++++++++++ 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 019d931d1367..446fe232956b 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -647,9 +647,7 @@ static void isc_set_pipeline(struct isc_device *isc, u32 pipeline) regmap_bulk_write(regmap, ISC_GAM_RENTRY, gamma, GAMMA_ENTRIES); isc->config_csc(isc); - - regmap_write(regmap, ISC_CBC_BRIGHT, ctrls->brightness); - regmap_write(regmap, ISC_CBC_CONTRAST, ctrls->contrast); + isc->config_cbc(isc); } static int isc_update_profile(struct isc_device *isc) diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index ef3a0451192d..cb47932197b1 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -203,6 +203,8 @@ struct isc_reg_offsets { * * @config_csc: pointer to a function that initializes product * specific CSC module + * @config_cbc: pointer to a function that initializes product + * specific CBC module * * @offsets: struct holding the product specific register offsets */ @@ -275,6 +277,7 @@ struct isc_device { struct { void (*config_csc)(struct isc_device *isc); + void (*config_cbc)(struct isc_device *isc); }; struct isc_reg_offsets offsets; diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index 9e557d17e731..66b92fa1c752 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -55,6 +55,7 @@ #define ISC_CLK_MAX_DIV 255 void isc_sama5d2_config_csc(struct isc_device *isc); +void isc_sama5d2_config_cbc(struct isc_device *isc); void isc_sama5d2_config_csc(struct isc_device *isc) { @@ -75,6 +76,14 @@ void isc_sama5d2_config_csc(struct isc_device *isc) 0xFEE | (0x80 << 16)); } +void isc_sama5d2_config_cbc(struct isc_device *isc) +{ + struct regmap *regmap = isc->regmap; + + regmap_write(regmap, ISC_CBC_BRIGHT, isc->ctrls.brightness); + regmap_write(regmap, ISC_CBC_CONTRAST, isc->ctrls.contrast); +} + /* Gamma table with gamma 1/2.2 */ const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { /* 0 --> gamma 1/1.8 */ @@ -220,6 +229,7 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->max_height = ISC_SAMA5D2_MAX_SUPPORT_HEIGHT; isc->config_csc = isc_sama5d2_config_csc; + isc->config_cbc = isc_sama5d2_config_cbc; isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; From patchwork Mon Apr 5 15:50:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16965C43462 for ; Mon, 5 Apr 2021 15:54:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D5101613B5 for ; Mon, 5 Apr 2021 15:54:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236185AbhDEPyP (ORCPT ); Mon, 5 Apr 2021 11:54:15 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:14593 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238204AbhDEPyO (ORCPT ); Mon, 5 Apr 2021 11:54:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638048; x=1649174048; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JqXfHp4bsUuUwj+v0W0xbdRUW7UuWTLQzGx+Q3UCSH4=; b=bsbL0/WhATgxgUormaSvMxgS2uAS46jHHhmz7qwfU7tzUMNcrFdXNbdW RnFU+YO7zMUUNNLrJhOda3OAzz++wEYj9uKX3SS+JjVT/mYbMeAQABueU vQkNjZ5yQKRdrkXhZKXnSmoW9SEzqWUziWIS3QlnLCieUFsWmvaTJVbZf FAZ7M1KQYmXkcdQ1JxqwGeH+DHpGBQ3Mj4nbKODiDjbuzSU5nYMk/myVC fW73xj07Ya6/Y6L+GVLsYFwrmV37GWSkGLRHn67FmhrKcB1geSQYUaqx6 wvhP/DFZNRmQDad7Njg+kkz0vddoDEd0qn/m0muM4f9fAJMiqOAy/fPps g==; IronPort-SDR: sxeWNe39TcMN4gP5R1V6YR9kI3AjiPT0R/IUY5R4mdBsbx4rOl3L2voHTbjsbJ+g3lc0m2vQqL p07H8RrySAkBEBmobvaqwpVBdI4TMszo2D/OI8sro1ZtzPcEaUVL4fLuXTO8jk9mM2G9hazg4A LQbbyr+WI8peSK0EXeN8O9DB63m85nBRzqz3BWjv6AAIJHwHP6N3Pi5Byq7/yRbAwzmEim5mSW ohsVlbIbH2JMyWuHXo2mAdAZN/zpVeSGZ7dYgoZOa8iFpWC8ykRSXvv8P2Sc2BGAidBqRvH/xi k1o= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="109700956" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:54:08 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:54:08 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:54:02 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 11/30] media: atmel: atmel-isc: add SUB422 and SUB420 to register offsets Date: Mon, 5 Apr 2021 18:50:46 +0300 Message-ID: <20210405155105.162529-12-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add sub420 and sub422 to the reg offsets struct. This will allow different products to have a different reg offset for these particular modules. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 4 ++-- drivers/media/platform/atmel/atmel-isc-regs.h | 4 ++++ drivers/media/platform/atmel/atmel-isc.h | 4 ++++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 2 ++ 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index d4bf7fd5929f..b2067d75499b 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -2311,8 +2311,8 @@ int isc_pipeline_init(struct isc_device *isc) REG_FIELD(ISC_GAM_CTRL, 3, 3), REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0), REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0), - REG_FIELD(ISC_SUB422_CTRL, 0, 0), - REG_FIELD(ISC_SUB420_CTRL, 0, 0), + REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0), + REG_FIELD(ISC_SUB420_CTRL + isc->offsets.sub420, 0, 0), }; for (i = 0; i < ISC_PIPE_LINE_NODE_NUM; i++) { diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h index a5e2fe01ba9f..04839def6ef6 100644 --- a/drivers/media/platform/atmel/atmel-isc-regs.h +++ b/drivers/media/platform/atmel/atmel-isc-regs.h @@ -194,9 +194,13 @@ #define ISC_CBC_CONTRAST 0x000003c0 #define ISC_CBC_CONTRAST_MASK GENMASK(11, 0) +/* Offset for SUB422 register specific to sama5d2 product */ +#define ISC_SAMA5D2_SUB422_OFFSET 0 /* Subsampling 4:4:4 to 4:2:2 Control Register */ #define ISC_SUB422_CTRL 0x000003c4 +/* Offset for SUB420 register specific to sama5d2 product */ +#define ISC_SAMA5D2_SUB420_OFFSET 0 /* Subsampling 4:2:2 to 4:2:0 Control Register */ #define ISC_SUB420_CTRL 0x000003cc diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index b1fe93c93c61..fb7257872e7c 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -148,10 +148,14 @@ struct isc_ctrls { * struct isc_reg_offsets - ISC device register offsets * @csc: Offset for the CSC register * @cbc: Offset for the CBC register + * @sub422: Offset for the SUB422 register + * @sub420: Offset for the SUB420 register */ struct isc_reg_offsets { u32 csc; u32 cbc; + u32 sub422; + u32 sub420; }; /* diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index c3037244e01e..943793fbc791 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -235,6 +235,8 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; + isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET; + isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET; /* sama5d2-isc - 8 bits per beat */ isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; From patchwork Mon Apr 5 15:50:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415497 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27A37C433ED for ; Mon, 5 Apr 2021 15:54:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 008E461242 for ; Mon, 5 Apr 2021 15:54:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241797AbhDEPyx (ORCPT ); Mon, 5 Apr 2021 11:54:53 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:14644 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235800AbhDEPyw (ORCPT ); Mon, 5 Apr 2021 11:54:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638086; x=1649174086; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=98JvnLOs2M6C/Dh71ZzByydfYGYWfmEvEFUTgz5OSTo=; b=yxj2+UvLsK64GB3B1VBoU1QyjlErvNPGyO2sCNkxUYLZCChG5XinD69o DApk8+1RGM7Yn+JtQpUzmsIRa/Q9v43jvlPdzVNkBgKJp2pAhXuMuVJx0 VKlxzt3l5l67qBuAj/FdUigtvhCMYao793rNxVxgwnMExVlTvDXF1VadS jOCEuz5VGU/KnEhC6Wo5iSEtms+Yx5/zxRUAMFWanygclyeTN6MiXDLx6 77BHTMta+wxqPFYXqAxB9BfmIEDWv5v50GHAPDV1DUWhH2Jq3ZaTIOmfg banSRpDM+EmqfKiX6fDyP87ilvsDKcNMNeh56rf29wck6oUHe84M1iyjR g==; IronPort-SDR: djk3sZ3oFw1RpkI2IZ1jjpyZskfd5lSKh8527jiXa7xJ54xyCmnVasNUxC/x2tSINDn/YbX0+a dwFTJfdVbBVeW1f/Yd379OklhE9vwZTB8qEqFBUBiVkscgEHtX6Molw47SfBUZBJ2JUzYUa8Ok gJ0QcVbxtKEAGmkC/c3NCPsdpm/70OXFjzWgrNWl8YOCjP4OGiSvErMriBkS8HQDKk+7yu0ev8 5RbsA3ENakgyXNDyRcxF8R+UhGgTuM4sfW9Eo5gipCBrZfXtEhQnmqpYU9ghdYZH+z6EvfeLLm GT4= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="109701051" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:54:45 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:54:41 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:54:23 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 13/30] media: atmel: atmel-isc: add HIS to register offsets Date: Mon, 5 Apr 2021 18:50:48 +0300 Message-ID: <20210405155105.162529-14-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add his to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 11 +++++++---- drivers/media/platform/atmel/atmel-isc-regs.h | 2 ++ drivers/media/platform/atmel/atmel-isc.h | 2 ++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 1 + 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 317172959370..aa7a9a7ca0e6 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -678,12 +678,13 @@ static void isc_set_histogram(struct isc_device *isc, bool enable) struct isc_ctrls *ctrls = &isc->ctrls; if (enable) { - regmap_write(regmap, ISC_HIS_CFG, + regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his, ISC_HIS_CFG_MODE_GR | (isc->config.sd_format->cfa_baycfg << ISC_HIS_CFG_BAYSEL_SHIFT) | ISC_HIS_CFG_RAR); - regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_EN); + regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his, + ISC_HIS_CTRL_EN); regmap_write(regmap, ISC_INTEN, ISC_INT_HISDONE); ctrls->hist_id = ISC_HIS_CFG_MODE_GR; isc_update_profile(isc); @@ -692,7 +693,8 @@ static void isc_set_histogram(struct isc_device *isc, bool enable) ctrls->hist_stat = HIST_ENABLED; } else { regmap_write(regmap, ISC_INTDIS, ISC_INT_HISDONE); - regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_DIS); + regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his, + ISC_HIS_CTRL_DIS); ctrls->hist_stat = HIST_DISABLED; } @@ -1821,7 +1823,8 @@ static void isc_awb_work(struct work_struct *w) ctrls->awb = ISC_WB_NONE; } } - regmap_write(regmap, ISC_HIS_CFG, hist_id | baysel | ISC_HIS_CFG_RAR); + regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his, + hist_id | baysel | ISC_HIS_CFG_RAR); isc_update_profile(isc); /* if awb has been disabled, we don't need to start another histogram */ if (ctrls->awb) diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h index 2205484e04fc..0ab280ab59ec 100644 --- a/drivers/media/platform/atmel/atmel-isc-regs.h +++ b/drivers/media/platform/atmel/atmel-isc-regs.h @@ -224,6 +224,8 @@ #define ISC_RLP_CFG_MODE_YYCC_LIMITED 0xc #define ISC_RLP_CFG_MODE_MASK GENMASK(3, 0) +/* Offset for HIS register specific to sama5d2 product */ +#define ISC_SAMA5D2_HIS_OFFSET 0 /* Histogram Control Register */ #define ISC_HIS_CTRL 0x000003d4 diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index b7d4e7fab570..652285dc9f52 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -151,6 +151,7 @@ struct isc_ctrls { * @sub422: Offset for the SUB422 register * @sub420: Offset for the SUB420 register * @rlp: Offset for the RLP register + * @his: Offset for the HIS related registers */ struct isc_reg_offsets { u32 csc; @@ -158,6 +159,7 @@ struct isc_reg_offsets { u32 sub422; u32 sub420; u32 rlp; + u32 his; }; /* diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index dd3f8e50a8d4..914de4ed63f3 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -238,6 +238,7 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET; isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET; isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET; + isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET; /* sama5d2-isc - 8 bits per beat */ isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; From patchwork Mon Apr 5 15:50:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415496 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E4A8C433B4 for ; Mon, 5 Apr 2021 15:55:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7DFE2613B7 for ; Mon, 5 Apr 2021 15:55:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236488AbhDEPzN (ORCPT ); Mon, 5 Apr 2021 11:55:13 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:36396 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236340AbhDEPzN (ORCPT ); Mon, 5 Apr 2021 11:55:13 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638107; x=1649174107; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Nz2K1lpqGeTsaJJ5/JbHz6dYZwbhFbuGCzjN9yCEQnw=; b=mQnoVJ9fmU6xFPgKha8T4WrdbUPOvZ0SR/NQJrqz6IXjaUc7KvowA0fN m0XoTlR8NAha3yALutpJEPmXwRePIqgA5W9CDyVmkFmjLmk8ogFZu+mat uw/FkmMAaB3qTBibkPolXD4lOZA7XFs6SAj79W8VRmgDHB7DCFjIIlZ5x w1HbwYRT6Yp4lduUx07JOZakjDnHm40t6LhERxZmsXv86xqTFNi+j4uar FftFgFtW2zJq+LlybzobTsVGJ9oxe4BiacyOHjHaqOLZmuxpI+RbYX4y0 kxOUcrWcMRHQeyDDGaFmVcxslC0mi8IR27eSET4n4IO8UpqvQAbo2mfZ+ w==; IronPort-SDR: gEoKe1vpx2KJCkDQsR5frC7IZKfbofg9dJFJoo16dtVGCriwdZBk9+PzU/84lF5YwZSB2Lh7mE o13cV397Xdpf1k2YNJFFBJifiiWX9LMvBJR7SmY1SeAmPZKgjpF5b5bsgCLi2/9d7hVQy3BsH+ BfG8SnjeEhdUcAtacOt7fMXSAvvwwaODD1uV5s0xFYmJO80hXb3yYrcj+TIYJgs2ePeJi47AQb Y9dpEVCNYfKSrY1r2wiOE8MP7Bb62y2szX1yfSrQkf2mANOQ2H4esQ83LIQdsqcGK3Bfpzev1H r3I= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="112481795" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:55:06 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:55:06 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:54:58 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 15/30] media: atmel: atmel-isc: add support for version register Date: Mon, 5 Apr 2021 18:50:50 +0300 Message-ID: <20210405155105.162529-16-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add support for version register and print it at probe time. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-regs.h | 5 +++++ drivers/media/platform/atmel/atmel-isc.h | 2 ++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 5 +++++ 3 files changed, 12 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h index 4940998c82a2..344668dcfcf4 100644 --- a/drivers/media/platform/atmel/atmel-isc-regs.h +++ b/drivers/media/platform/atmel/atmel-isc-regs.h @@ -295,6 +295,11 @@ /* DMA Address 2 Register */ #define ISC_DAD2 0x000003fc +/* Offset for version register specific to sama5d2 product */ +#define ISC_SAMA5D2_VERSION_OFFSET 0 +/* Version Register */ +#define ISC_VERSION 0x0000040c + /* Histogram Entry */ #define ISC_HIS_ENTRY 0x00000410 diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index 52a9199d65ee..676a5be1ee8c 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -153,6 +153,7 @@ struct isc_ctrls { * @rlp: Offset for the RLP register * @his: Offset for the HIS related registers * @dma: Offset for the DMA related registers + * @version: Offset for the version register */ struct isc_reg_offsets { u32 csc; @@ -162,6 +163,7 @@ struct isc_reg_offsets { u32 rlp; u32 his; u32 dma; + u32 version; }; /* diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index 12f56a71db40..10b70d4b04c4 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -192,6 +192,7 @@ static int atmel_isc_probe(struct platform_device *pdev) struct isc_subdev_entity *subdev_entity; int irq; int ret; + u32 ver; isc = devm_kzalloc(dev, sizeof(*isc), GFP_KERNEL); if (!isc) @@ -240,6 +241,7 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET; isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET; isc->offsets.dma = ISC_SAMA5D2_DMA_OFFSET; + isc->offsets.version = ISC_SAMA5D2_VERSION_OFFSET; /* sama5d2-isc - 8 bits per beat */ isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; @@ -335,6 +337,9 @@ static int atmel_isc_probe(struct platform_device *pdev) pm_runtime_enable(dev); pm_request_idle(dev); + regmap_read(isc->regmap, ISC_VERSION + isc->offsets.version, &ver); + dev_info(dev, "Microchip ISC version %x\n", ver); + return 0; cleanup_subdev: From patchwork Mon Apr 5 15:50:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415495 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83E7BC43460 for ; Mon, 5 Apr 2021 15:55:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5C15C613A3 for ; Mon, 5 Apr 2021 15:55:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235896AbhDEPzz (ORCPT ); Mon, 5 Apr 2021 11:55:55 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:43539 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235453AbhDEPzz (ORCPT ); Mon, 5 Apr 2021 11:55:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638148; x=1649174148; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eEFZK/hSf05itEILHRf197/MjzOOVQu1dFzDN6v4vnA=; b=tLii0qJkmhHDewF2pH7YZyGgKR4j2HN1OnNg/uGbGerVzzZ3n78mS3dy JkILF89K2a0aMgG25axcZBrYM4tPMWYK7aamQUcy7WhWbTeC7YCQ07bjU 2EpPQ7oTP+BXgXfF3VPlX9vlsp5fKdv49HEFMUs1mY0Fd1iZ7pDARDRqk TQdr2t0WGBXsIiO1+kHTMTCZA1YTXL1ms3ZoT+OH98M6IGAW+meozH26Z Z6DwsR85stKjMczaSYaHnaWfATmN3JQJbY9da+YZ9Ko2ONfHA1V37DRZO K/3NeDWnY3SNwURjgEbLTXqdZn8Ibkddi1h5bweAUwmQtGicWn1WedT9R w==; IronPort-SDR: ycrgj04Sxxhrqe8UkRP/OOKVdx4UcTmq5SAChhZyl+oFtSqnxdEYpCeESfqnpRFMOJohei5aYa s9NXRrgIaJvsiSDqIS413pjN2SdRJkI2769jRsZw7yh+MLj0ox6+2KXKMmr9Ux/BcIZDDH0yjB 96BKwgP3eOcx5aY77PSz/epp24G6wRxZ4GIt5xwtHbh2/z2AoNK5j3rBJJll6Ym8w2jCzKOlQw oErniOkO5qPCdhUg+ehhXSe+/yVriyFKYzqHp/nyungw1L4+egtt3EYJWZjIBjzKvaGKsJ0tQb l+Y= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="115869574" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:55:48 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:55:48 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:55:27 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 17/30] media: atmel: atmel-isc: add register description for additional modules Date: Mon, 5 Apr 2021 18:50:52 +0300 Message-ID: <20210405155105.162529-18-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add register description for additional pipeline modules: the Defective Pixel Correction (DPC) and the Vertical and Horizontal Scaler(VHXS) Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-regs.h | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h index a15c13e1a833..457eed74cda9 100644 --- a/drivers/media/platform/atmel/atmel-isc-regs.h +++ b/drivers/media/platform/atmel/atmel-isc-regs.h @@ -90,6 +90,46 @@ #define ISC_INT_DDONE BIT(8) #define ISC_INT_HISDONE BIT(12) +/* ISC DPC Control Register */ +#define ISC_DPC_CTRL 0x40 + +#define ISC_DPC_CTRL_DPCEN BIT(0) +#define ISC_DPC_CTRL_GDCEN BIT(1) +#define ISC_DPC_CTRL_BLCEN BIT(2) + +/* ISC DPC Config Register */ +#define ISC_DPC_CFG 0x44 + +#define ISC_DPC_CFG_BAYSEL_SHIFT 0 + +#define ISC_DPC_CFG_EITPOL BIT(4) + +#define ISC_DPC_CFG_TA_ENABLE BIT(14) +#define ISC_DPC_CFG_TC_ENABLE BIT(13) +#define ISC_DPC_CFG_TM_ENABLE BIT(12) + +#define ISC_DPC_CFG_RE_MODE BIT(17) + +#define ISC_DPC_CFG_GDCCLP_SHIFT 20 +#define ISC_DPC_CFG_GDCCLP_MASK GENMASK(22, 20) + +#define ISC_DPC_CFG_BLOFF_SHIFT 24 +#define ISC_DPC_CFG_BLOFF_MASK GENMASK(31, 24) + +#define ISC_DPC_CFG_BAYCFG_SHIFT 0 +#define ISC_DPC_CFG_BAYCFG_MASK GENMASK(1, 0) +/* ISC DPC Threshold Median Register */ +#define ISC_DPC_THRESHM 0x48 + +/* ISC DPC Threshold Closest Register */ +#define ISC_DPC_THRESHC 0x4C + +/* ISC DPC Threshold Average Register */ +#define ISC_DPC_THRESHA 0x50 + +/* ISC DPC STatus Register */ +#define ISC_DPC_SR 0x54 + /* ISC White Balance Control Register */ #define ISC_WB_CTRL 0x00000058 @@ -153,6 +193,33 @@ /* ISC_Gamma Correction Green Entry Register */ #define ISC_GAM_RENTRY 0x00000298 +/* ISC VHXS Control Register */ +#define ISC_VHXS_CTRL 0x398 + +/* ISC VHXS Source Size Register */ +#define ISC_VHXS_SS 0x39C + +/* ISC VHXS Destination Size Register */ +#define ISC_VHXS_DS 0x3A0 + +/* ISC Vertical Factor Register */ +#define ISC_VXS_FACT 0x3a4 + +/* ISC Horizontal Factor Register */ +#define ISC_HXS_FACT 0x3a8 + +/* ISC Vertical Config Register */ +#define ISC_VXS_CFG 0x3ac + +/* ISC Horizontal Config Register */ +#define ISC_HXS_CFG 0x3b0 + +/* ISC Vertical Tap Register */ +#define ISC_VXS_TAP 0x3b4 + +/* ISC Horizontal Tap Register */ +#define ISC_HXS_TAP 0x434 + /* Offset for CSC register specific to sama5d2 product */ #define ISC_SAMA5D2_CSC_OFFSET 0 From patchwork Mon Apr 5 15:50:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C67CC433B4 for ; Mon, 5 Apr 2021 15:56:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 14FCE61242 for ; Mon, 5 Apr 2021 15:56:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238650AbhDEP4g (ORCPT ); Mon, 5 Apr 2021 11:56:36 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:43619 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235453AbhDEP4g (ORCPT ); Mon, 5 Apr 2021 11:56:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638190; x=1649174190; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c7kkGNZaIvu+iWN3XmHs+l32xpFQTaZ7LU9lPeNNP0I=; b=0mLkBP00QQBK0sMBQpTGMDv3KzarldlUkiP7D8yecTO5ynrBGXRVbR4w bjvMBnZ2urF3blfdmp/UTF2dYiKBvqCg95dO9ZYNjE6yUXoe+BN1lX7jb j1qFH2JouhGytwmFcYXkaJSdphz16vU8Z61Kd/xU4IKfvvzuLikjyZxoq DKmHVK6n5Kqpufr9B2LNfidJUGzo+lG/gj6lzRrjRdBtcc0H7ZWLLIRAp dyhKyZrb4tbaKbCRth8qvAozYjDEoPZb/7tvup+F4KgzjXSdvc2gkacbu 0GCE+PQaDz/z0RCgozLQ9c5EievO+0+b/RGFbC8PG5vDXVE9H93E7ttjx Q==; IronPort-SDR: jBDT7cilrzOETe2J+DkF26QcdkzlhrOtfTkHozrN27lrDm3seZwUa6pp+aopHWTa/gZrYf7TeE 6u0/wEutdiF/b28WIQVljuRv/W9djR9szvgHqZ6FR21IsfiS+FlGXnBLXy8wVgOYVHFBn/kxwt VM2oL8nphF7A1TEE59zbtAyqfhSqrqPdAk/spqgx/zm4qyz5FeFStQD1BRUCcU9biBa6bDdQoy 0vpvwtm2oc3feOT799apE9RhXhAFTJsDwv+SerCCcJoryWUfSqMCyCUnQVZOLcHIcvH17GsH8V SmU= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="115869630" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:56:29 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:56:29 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:56:07 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 19/30] media: atmel: atmel-isc: add CC initialization function Date: Mon, 5 Apr 2021 18:50:54 +0300 Message-ID: <20210405155105.162529-20-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Implement the color correction (CC) submodule initialization, as a product specific function, which currently configures the neutral point in color correction. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c | 1 + drivers/media/platform/atmel/atmel-isc.h | 3 +++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 15 +++++++++++++++ 3 files changed, 19 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 66005cb3940f..182903803c05 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -653,6 +653,7 @@ static void isc_set_pipeline(struct isc_device *isc, u32 pipeline) isc->config_csc(isc); isc->config_cbc(isc); + isc->config_cc(isc); } static int isc_update_profile(struct isc_device *isc) diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index f574bcc3ba67..a5f8d5001381 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -225,6 +225,8 @@ struct isc_reg_offsets { * specific CSC module * @config_cbc: pointer to a function that initializes product * specific CBC module + * @config_cc: pointer to a function that initializes product + * specific CC module * * @offsets: struct holding the product specific register offsets */ @@ -298,6 +300,7 @@ struct isc_device { struct { void (*config_csc)(struct isc_device *isc); void (*config_cbc)(struct isc_device *isc); + void (*config_cc)(struct isc_device *isc); }; struct isc_reg_offsets offsets; diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index 0ff13198d732..0ce8293622f9 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -56,6 +56,7 @@ void isc_sama5d2_config_csc(struct isc_device *isc); void isc_sama5d2_config_cbc(struct isc_device *isc); +void isc_sama5d2_config_cc(struct isc_device *isc); void isc_sama5d2_config_csc(struct isc_device *isc) { @@ -86,6 +87,19 @@ void isc_sama5d2_config_cbc(struct isc_device *isc) isc->ctrls.contrast); } +void isc_sama5d2_config_cc(struct isc_device *isc) +{ + struct regmap *regmap = isc->regmap; + + /* Configure each register at the neutral fixed point 1.0 or 0.0 */ + regmap_write(regmap, ISC_CC_RR_RG, (1 << 8)); + regmap_write(regmap, ISC_CC_RB_OR, 0); + regmap_write(regmap, ISC_CC_GR_GG, (1 << 8) << 16); + regmap_write(regmap, ISC_CC_GB_OG, 0); + regmap_write(regmap, ISC_CC_BR_BG, 0); + regmap_write(regmap, ISC_CC_BB_OB, (1 << 8)); +} + /* Gamma table with gamma 1/2.2 */ const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { /* 0 --> gamma 1/1.8 */ @@ -233,6 +247,7 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->config_csc = isc_sama5d2_config_csc; isc->config_cbc = isc_sama5d2_config_cbc; + isc->config_cc = isc_sama5d2_config_cc; isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; From patchwork Mon Apr 5 15:50:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22E87C433B4 for ; Mon, 5 Apr 2021 15:57:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E96DA613A3 for ; Mon, 5 Apr 2021 15:57:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241805AbhDEP5b (ORCPT ); Mon, 5 Apr 2021 11:57:31 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:43682 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235453AbhDEP5b (ORCPT ); Mon, 5 Apr 2021 11:57:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638244; x=1649174244; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6NE168aYAGOsVTgWwYu70CMc7dOuZws71nNZmWK/fkM=; b=Yz+cbHk+OX0e2DEwQNdBF6wiVfG9B6dOH8KT5pHtv18ERup7UgVrQS2j t3iVgUj25KqVGd/wWbZBzRT3hUXZn3zCSqoVJ5Q1aRKcXzUzD1OR3oAsW jEmm69wp31w5vQP7ynvCu2AUCs9oPXcIvQCydsE0kA7imXlyrDr2EdBaz JAJr1wMhf9AR4LHTTXRzFfNc9KaPhQGVMf7QtxYEmgLzm4UD2N2zxu8pE /lLDo9mtRk5zO0ovuKjtseKQkHDy79erdZAB7BD3042wGB1SqdD+sUK42 GwOwA05ENOZ02WNySUq8T0Bbnsx2v/JIS275R5btm7sqsPwlGFA1iQgpR w==; IronPort-SDR: xUTO3UTMpzODcfOkKYfSUkiE7f/yY1vUxxhSERLwiYz+EtvQI+Fdf0FII6N5t9ooN+/fauYiKY 00f/Es5R6NcETNmOGKeFepZ8dxSVndnG8f8mBWgLbJ5jXvQVVZKvgCROO4mk5XIpw0t1YcdJLm rRpQWyJskQCFM7WLSc5rlGhgF5u5ipvwLQW68DmP1p5fp1ElhjTR7fBd0IIdae9Q8KYD7R00nj xMXE74IVbrW1GvthUnG/g+baSxVagvCqKzjXzQ8t/eFi3Adoilt4I/ARpooZrmDBfWCR0xSLcz aqQ= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="115869718" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:57:24 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:57:23 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:56:52 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 21/30] media: atmel: atmel-isc: create callback for DPC submodule product specific Date: Mon, 5 Apr 2021 18:50:56 +0300 Message-ID: <20210405155105.162529-22-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Create a product specific callback for initializing the DPC submodule of the pipeline. For sama5d2 product, this module does not exist, thus this function is a noop. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c | 1 + drivers/media/platform/atmel/atmel-isc.h | 3 +++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 7 +++++++ 3 files changed, 11 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 69952b6ac401..1f7116abc61a 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -651,6 +651,7 @@ static void isc_set_pipeline(struct isc_device *isc, u32 pipeline) regmap_bulk_write(regmap, ISC_GAM_GENTRY, gamma, GAMMA_ENTRIES); regmap_bulk_write(regmap, ISC_GAM_RENTRY, gamma, GAMMA_ENTRIES); + isc->config_dpc(isc); isc->config_csc(isc); isc->config_cbc(isc); isc->config_cc(isc); diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index eb549fadb1a8..d6cd85a4c3e9 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -221,6 +221,8 @@ struct isc_reg_offsets { * @max_width: maximum frame width, dependent on the internal RAM * @max_height: maximum frame height, dependent on the internal RAM * + * @config_dpc: pointer to a function that initializes product + * specific DPC module * @config_csc: pointer to a function that initializes product * specific CSC module * @config_cbc: pointer to a function that initializes product @@ -300,6 +302,7 @@ struct isc_device { u32 max_height; struct { + void (*config_dpc)(struct isc_device *isc); void (*config_csc)(struct isc_device *isc); void (*config_cbc)(struct isc_device *isc); void (*config_cc)(struct isc_device *isc); diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index 7ff8b362568d..2b53e9427353 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -57,6 +57,7 @@ void isc_sama5d2_config_csc(struct isc_device *isc); void isc_sama5d2_config_cbc(struct isc_device *isc); void isc_sama5d2_config_cc(struct isc_device *isc); +void isc_sama5d2_config_dpc(struct isc_device *isc); void isc_sama5d2_config_ctrls(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); @@ -114,6 +115,11 @@ void isc_sama5d2_config_ctrls(struct isc_device *isc, v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -2048, 2047, 1, 256); } +void isc_sama5d2_config_dpc(struct isc_device *isc) +{ + /* This module is not present on sama5d2 pipeline */ +} + /* Gamma table with gamma 1/2.2 */ const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { /* 0 --> gamma 1/1.8 */ @@ -259,6 +265,7 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->max_width = ISC_SAMA5D2_MAX_SUPPORT_WIDTH; isc->max_height = ISC_SAMA5D2_MAX_SUPPORT_HEIGHT; + isc->config_dpc = isc_sama5d2_config_dpc; isc->config_csc = isc_sama5d2_config_csc; isc->config_cbc = isc_sama5d2_config_cbc; isc->config_cc = isc_sama5d2_config_cc; From patchwork Mon Apr 5 15:50:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99B49C433B4 for ; Mon, 5 Apr 2021 15:57:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7683B613B5 for ; Mon, 5 Apr 2021 15:57:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238269AbhDEP5v (ORCPT ); Mon, 5 Apr 2021 11:57:51 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:36624 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234101AbhDEP5v (ORCPT ); Mon, 5 Apr 2021 11:57:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638265; x=1649174265; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=du2O5syMi8zSs+hLQUxMxYliXMvMoEYN5nGYA2Yx1S4=; b=N/npX1d1F+BeYlHbU0yldJtt5Wgwv2qyxHMKqhi+DpMzdynjpqwB9Vty XD3zchsCL7S8QWqi+Ogy5zUbVSqpq3Bg2zGewIHxITTyuJ7eX7AVZSXey 5E1iazQXXYZVX316mSgpnXVQdyV/ZGe+HhAtTrXC2GVWoNxLJxIiAA9eD Aid43pcaPjNZXzChSeFKMnmuluVROgqPumAZMmz/cgvHCjQXk3OTpKg5T gI516FbqUFbnOotl/6lYHqG+w3wvxm4Fg1RG5mlP02rLEWHxja4VGolG4 eZe2LoZ9MIZ9/0PTQw0BpK7t06Z5OEYvhhxSnQpy/2VY7F1oqMbhY+X8y Q==; IronPort-SDR: wcmsnTHAoubP/bDAWoQUUc0/lhsJk8AYWLc064iCZJaJQZ0cjIjYj/uCTxxf3cYb/BLvz9KZ8l LvhbNQvXARjrm6JIBeF10ZVPJekrAUE31YX9QhRfTmq+J/mVuldgIFJCa9z1FJfV/zsJjf9xW6 HP0XhgiKWQxktrl7X5RLPKN9UcOk9w0eJC45LNgbECedJd6JvsyQlfBFjmAbNmOUG40l1IkvfU H3W6+JliH04ObmDQ2GHuygohfYCLDvfSbpj9LTSR2YGgqci1XmUQWV4qLlQPASeeYjN0dIqI/J kgc= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="112482138" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:57:45 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:57:44 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:57:34 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 23/30] media: atmel: atmel-isc: create callback for RLP submodule product specific Date: Mon, 5 Apr 2021 18:50:58 +0300 Message-ID: <20210405155105.162529-24-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Create a product specific callback for initializing the RLP submodule of the pipeline Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c | 6 ++---- drivers/media/platform/atmel/atmel-isc.h | 3 +++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 11 +++++++++++ 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index bd24e0c99613..8422df41f083 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -711,11 +711,10 @@ static void isc_set_histogram(struct isc_device *isc, bool enable) static int isc_configure(struct isc_device *isc) { struct regmap *regmap = isc->regmap; - u32 pfe_cfg0, rlp_mode, dcfg, mask, pipeline; + u32 pfe_cfg0, dcfg, mask, pipeline; struct isc_subdev_entity *subdev = isc->current_subdev; pfe_cfg0 = isc->config.sd_format->pfe_cfg0_bps; - rlp_mode = isc->config.rlp_cfg_mode; pipeline = isc->config.bits_pipeline; dcfg = isc->config.dcfg_imode | isc->dcfg; @@ -728,8 +727,7 @@ static int isc_configure(struct isc_device *isc) regmap_update_bits(regmap, ISC_PFE_CFG0, mask, pfe_cfg0); - regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp, - ISC_RLP_CFG_MODE_MASK, rlp_mode); + isc->config_rlp(isc); regmap_write(regmap, ISC_DCFG + isc->offsets.dma, dcfg); diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index 1e6988f1876e..abeef7b2ab27 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -231,6 +231,8 @@ struct isc_reg_offsets { * specific CC module * @config_gam: pointer to a function that initializes product * specific GAMMA module + * @config_rlp: pointer to a function that initializes product + * specific RLP module * @config_ctrls: pointer to a functoin that initializes product * specific v4l2 controls. * @@ -309,6 +311,7 @@ struct isc_device { void (*config_cbc)(struct isc_device *isc); void (*config_cc)(struct isc_device *isc); void (*config_gam)(struct isc_device *isc); + void (*config_rlp)(struct isc_device *isc); void (*config_ctrls)(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index df26941af64b..855027821fba 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -59,6 +59,7 @@ void isc_sama5d2_config_cbc(struct isc_device *isc); void isc_sama5d2_config_cc(struct isc_device *isc); void isc_sama5d2_config_dpc(struct isc_device *isc); void isc_sama5d2_config_gam(struct isc_device *isc); +void isc_sama5d2_config_rlp(struct isc_device *isc); void isc_sama5d2_config_ctrls(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); @@ -126,6 +127,15 @@ void isc_sama5d2_config_gam(struct isc_device *isc) /* No specific gamma configuration */ } +void isc_sama5d2_config_rlp(struct isc_device *isc) +{ + struct regmap *regmap = isc->regmap; + u32 rlp_mode = isc->config.rlp_cfg_mode; + + regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp, + ISC_RLP_CFG_MODE_MASK, rlp_mode); +} + /* Gamma table with gamma 1/2.2 */ const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { /* 0 --> gamma 1/1.8 */ @@ -276,6 +286,7 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->config_cbc = isc_sama5d2_config_cbc; isc->config_cc = isc_sama5d2_config_cc; isc->config_gam = isc_sama5d2_config_gam; + isc->config_rlp = isc_sama5d2_config_rlp; isc->config_ctrls = isc_sama5d2_config_ctrls; isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; From patchwork Mon Apr 5 15:51:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5F09C433B4 for ; Mon, 5 Apr 2021 15:58:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 89FF7613A0 for ; Mon, 5 Apr 2021 15:58:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238815AbhDEP6U (ORCPT ); Mon, 5 Apr 2021 11:58:20 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:41946 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238110AbhDEP6T (ORCPT ); Mon, 5 Apr 2021 11:58:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638293; x=1649174293; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m3AUyedur1/fvaghauHM2iA19tNbhRZGs4zP8HiP8AE=; b=lGqeKs3PRvoT1Shub6Rvd9XYaRqti+2d8ZtZkZnPOnNu25yeB9+W1Nfh Q+ISuPHEHOxGRxlwwZGFw1rXcHkVUxZI5EKWbz4K792NZI3fWy66yFjy0 fSovH3JjKw1VbDHX29uMmPDCtLVLK+1+YtuCk6q49O6A6AopSbUxqDG9f PbomveR0K1c7rGNv/CFjtVp+/1wC6mqVVaYaw6Y3Y/+DLHajhh4wQUx6Q 179U/NmU8pzEH9TeJBwGQ2C+p/+TSlgQ9BU0TM4ZPMOACtSVUjDTQvPRx iih8DsxH0ja+wrAUujrktniv9h0mEcOztwsMrfQdUA2WYXhFBOHgBZo/p Q==; IronPort-SDR: ncnQiAT0hvaAGVvV+Zohy42/YY796KFJZgUmDfXHiu7erORxQ9hkcHfDRG1ccLOA1KtFyF0kIJ u3pu+ZV9jMPxp3h3TKHKpNEN0cXYOdkxVnVEoCAnnLl5Tfnw9SjZAYB0EaNioZR/FStp20WjNn +FO/rmLsNRSIE0brAOZXXh2Ge0WSHPTT7rqP8ViIzH9ZRpA4B2lySGMxAs5imgRoWheBioHo51 w1Q9VAQSlGNokh0BHcgS9KEGIBpRmhXALF7ipj+JKJyriwQOwJnD9KKfuuGsFbYM+xGBT40E4v o9s= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="50026891" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:58:13 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:58:12 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:58:03 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 25/30] media: atmel: atmel-isc: create an adapt pipeline callback for product specific Date: Mon, 5 Apr 2021 18:51:00 +0300 Message-ID: <20210405155105.162529-26-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Once the pipeline is set in the base code, create a callback that will adapt the ISC pipeline to each product. Create the adapt_pipeline callback that will be used in this fashion. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c | 4 ++++ drivers/media/platform/atmel/atmel-isc.h | 5 +++++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 12 ++++++++++++ 3 files changed, 21 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 6746c9060e3f..a3c299068bd5 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -1047,6 +1047,10 @@ static int isc_try_configure_pipeline(struct isc_device *isc) default: isc->try_config.bits_pipeline = 0x0; } + + /* Tune the pipeline to product specific */ + isc->adapt_pipeline(isc); + return 0; } diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index 14e318a7373c..19cc60dfcbe0 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -236,6 +236,9 @@ struct isc_reg_offsets { * @config_ctrls: pointer to a functoin that initializes product * specific v4l2 controls. * + * @adapt_pipeline: pointer to a function that adapts the pipeline bits + * to the product specific pipeline + * * @offsets: struct holding the product specific register offsets * @controller_formats: pointer to the array of possible formats that the * controller can output @@ -321,6 +324,8 @@ struct isc_device { void (*config_ctrls)(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); + + void (*adapt_pipeline)(struct isc_device *isc); }; struct isc_reg_offsets offsets; diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index a5823a3a6111..b2ace528b260 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -54,12 +54,17 @@ #define ISC_CLK_MAX_DIV 255 +#define ISC_SAMA5D2_PIPELINE \ + (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ + CBC_ENABLE | SUB422_ENABLE | SUB420_ENABLE) + void isc_sama5d2_config_csc(struct isc_device *isc); void isc_sama5d2_config_cbc(struct isc_device *isc); void isc_sama5d2_config_cc(struct isc_device *isc); void isc_sama5d2_config_dpc(struct isc_device *isc); void isc_sama5d2_config_gam(struct isc_device *isc); void isc_sama5d2_config_rlp(struct isc_device *isc); +void isc_sama5d2_adapt_pipeline(struct isc_device *isc); void isc_sama5d2_config_ctrls(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); @@ -267,6 +272,11 @@ void isc_sama5d2_config_rlp(struct isc_device *isc) ISC_RLP_CFG_MODE_MASK, rlp_mode); } +void isc_sama5d2_adapt_pipeline(struct isc_device *isc) +{ + isc->try_config.bits_pipeline &= ISC_SAMA5D2_PIPELINE; +} + /* Gamma table with gamma 1/2.2 */ const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { /* 0 --> gamma 1/1.8 */ @@ -420,6 +430,8 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->config_rlp = isc_sama5d2_config_rlp; isc->config_ctrls = isc_sama5d2_config_ctrls; + isc->adapt_pipeline = isc_sama5d2_adapt_pipeline; + isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET; From patchwork Mon Apr 5 15:51:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96D6FC433ED for ; Mon, 5 Apr 2021 15:59:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6456A613A3 for ; Mon, 5 Apr 2021 15:59:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241844AbhDEP7F (ORCPT ); Mon, 5 Apr 2021 11:59:05 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:36738 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238110AbhDEP7F (ORCPT ); Mon, 5 Apr 2021 11:59:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638339; x=1649174339; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=L0ubezju1a2v2fOHoFbJx+Tkrd4cQqmjDLOQsJU/n+8=; b=OXhwwEjlTLGZueaO8j2cU/gsrhxtK42P/QtBICtnnjxygKr22MJeKmjy 850DnJ3ZP9MXlgXZUbg4Qa7NlEa4BhVxJb5NV0X892Zu8QB4xymHpBCyQ 7sRgORJqcNMAlSUYO6ImPrJ3Znwr7imJ5m4c3kgAO/vLiBR+Uuo5N5hv/ 5byZewtWB2aZtnHy3HAURDE3lwc0PiM2Zku7bSbVPN2DH1cc+RY6BhhA0 lNYyEIWQaH9/RQ3j8gyIOggYgDx0OTVltaHGLCle2bodYFhjcGFXIjKFD 2hlcqahZB78aX1HyIrg9h+dJC+8DkokoWaDfn2u7pcUusxE3mDHqQqtdG A==; IronPort-SDR: N7/IBHt9aXNxDBrXUrRF3Zd6Up3uToL4Kg67cfyaLUASyivXHai7s/l729hgnQDt3oofYuXIWt tpqtrGIWNnntE/hiJ+a9SiKzHCxCkGeYa169Y2WqyUJOpA+f/6ftk2NMZ2AZyx9yvuUIXt8Ux9 dB9z+qHxlJ+CAodWNqmcorrCunQkXdNC7FUvdtzsImrXCMr0Zh7JwtGJo5nG7L1Ko6Qe7n/lkm tfOb0T0yNSWdAs52hIsZnYA0DBObl9YT64MX0JNU0ii0zqrZbzojhDJGEBzHN8h0A3fBJr/Knh f7M= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="112482218" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:58:59 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:58:58 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:58:48 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 27/30] media: atmel: atmel-isc-base: add support for more formats and additional pipeline modules Date: Mon, 5 Apr 2021 18:51:02 +0300 Message-ID: <20210405155105.162529-28-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add support for additional formats supported by newer pipelines, and for additional pipeline modules. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 48 +++++++++++++++---- 1 file changed, 38 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index a3c299068bd5..f30493a1dccd 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -843,6 +843,8 @@ static int isc_try_validate_formats(struct isc_device *isc) case V4L2_PIX_FMT_YUV420: case V4L2_PIX_FMT_YUV422P: case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: ret = 0; yuv = true; break; @@ -857,6 +859,7 @@ static int isc_try_validate_formats(struct isc_device *isc) break; case V4L2_PIX_FMT_GREY: case V4L2_PIX_FMT_Y10: + case V4L2_PIX_FMT_Y16: ret = 0; grey = true; break; @@ -887,6 +890,8 @@ static int isc_try_validate_formats(struct isc_device *isc) */ static int isc_try_configure_rlp_dma(struct isc_device *isc, bool direct_dump) { + isc->try_config.rlp_cfg_mode = 0; + switch (isc->try_config.fourcc) { case V4L2_PIX_FMT_SBGGR8: case V4L2_PIX_FMT_SGBRG8: @@ -953,7 +958,19 @@ static int isc_try_configure_rlp_dma(struct isc_device *isc, bool direct_dump) isc->try_config.bpp = 16; break; case V4L2_PIX_FMT_YUYV: - isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YYCC; + isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_YUYV; + isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; + isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; + isc->try_config.bpp = 16; + break; + case V4L2_PIX_FMT_UYVY: + isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_UYVY; + isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; + isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; + isc->try_config.bpp = 16; + break; + case V4L2_PIX_FMT_VYUY: + isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_VYUY; isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32; isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; isc->try_config.bpp = 16; @@ -964,8 +981,11 @@ static int isc_try_configure_rlp_dma(struct isc_device *isc, bool direct_dump) isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; isc->try_config.bpp = 8; break; + case V4L2_PIX_FMT_Y16: + isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DATY10 | ISC_RLP_CFG_LSH; + fallthrough; case V4L2_PIX_FMT_Y10: - isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DATY10; + isc->try_config.rlp_cfg_mode |= ISC_RLP_CFG_MODE_DATY10; isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16; isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED; isc->try_config.bpp = 16; @@ -999,7 +1019,8 @@ static int isc_try_configure_pipeline(struct isc_device *isc) /* if sensor format is RAW, we convert inside ISC */ if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { isc->try_config.bits_pipeline = CFA_ENABLE | - WB_ENABLE | GAM_ENABLES; + WB_ENABLE | GAM_ENABLES | DPC_BLCENABLE | + CC_ENABLE; } else { isc->try_config.bits_pipeline = 0x0; } @@ -1008,8 +1029,9 @@ static int isc_try_configure_pipeline(struct isc_device *isc) /* if sensor format is RAW, we convert inside ISC */ if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { isc->try_config.bits_pipeline = CFA_ENABLE | - CSC_ENABLE | WB_ENABLE | GAM_ENABLES | - SUB420_ENABLE | SUB422_ENABLE | CBC_ENABLE; + CSC_ENABLE | GAM_ENABLES | WB_ENABLE | + SUB420_ENABLE | SUB422_ENABLE | CBC_ENABLE | + DPC_BLCENABLE; } else { isc->try_config.bits_pipeline = 0x0; } @@ -1019,33 +1041,39 @@ static int isc_try_configure_pipeline(struct isc_device *isc) if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { isc->try_config.bits_pipeline = CFA_ENABLE | CSC_ENABLE | WB_ENABLE | GAM_ENABLES | - SUB422_ENABLE | CBC_ENABLE; + SUB422_ENABLE | CBC_ENABLE | DPC_BLCENABLE; } else { isc->try_config.bits_pipeline = 0x0; } break; case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: /* if sensor format is RAW, we convert inside ISC */ if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { isc->try_config.bits_pipeline = CFA_ENABLE | CSC_ENABLE | WB_ENABLE | GAM_ENABLES | - SUB422_ENABLE | CBC_ENABLE; + SUB422_ENABLE | CBC_ENABLE | DPC_BLCENABLE; } else { isc->try_config.bits_pipeline = 0x0; } break; case V4L2_PIX_FMT_GREY: - if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { + case V4L2_PIX_FMT_Y16: /* if sensor format is RAW, we convert inside ISC */ + if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) { isc->try_config.bits_pipeline = CFA_ENABLE | CSC_ENABLE | WB_ENABLE | GAM_ENABLES | - CBC_ENABLE; + CBC_ENABLE | DPC_BLCENABLE; } else { isc->try_config.bits_pipeline = 0x0; } break; default: - isc->try_config.bits_pipeline = 0x0; + if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) + isc->try_config.bits_pipeline = WB_ENABLE | DPC_BLCENABLE; + else + isc->try_config.bits_pipeline = 0x0; } /* Tune the pipeline to product specific */ From patchwork Mon Apr 5 15:51:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 415489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20C78C433ED for ; Mon, 5 Apr 2021 15:59:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DA983613A3 for ; Mon, 5 Apr 2021 15:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239439AbhDEP7f (ORCPT ); Mon, 5 Apr 2021 11:59:35 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:42043 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238495AbhDEP7e (ORCPT ); Mon, 5 Apr 2021 11:59:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1617638368; x=1649174368; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=moq1d9N+xas3Sok1/bzQQTjVgaigAE5SM0QmiyTE3dk=; b=pboNS23tuDRkUNFMwezTc26F0oRBS2OUFbQK9YNSKSzEDnZ66hCz3T+J E8ocBGu8PUZcN84YmUrc0RvkXJ0hT/sK7obYdlMyntXorwx81Cm99lhs9 1mOU84E6E6pWTwslrM6uhtw+M0AvNaFuxx7pc5ZB0yA6smbwBVY+aMix8 Ix2A3PGf6pBkVv0WGDbr+0aNraeTj7ZcrfOMp2S8ISUkOiVAlBe+PKhMH z0xGnHmwfQqwAoOi5mHMcllHcTFP5Hdmtq7GArq6NHl95vGtaR4tk+aVZ lmEz731sKLOa2u7v+cfAz+mNGk+hjVd32h4b/B4Me1sQcahuOA8rjzfOk g==; IronPort-SDR: 6eSdg6/WHlQA4dUWAQvmfrCLGERNpOgka/5Or0UKoAv/IGpnhb4iA4ii2UmRYmoy7NtO0g9lLj 0+XjQAz1zv3Lha8i+NvsyJHZ7o/GTD/J6gNgyQ7jDk3n3girQcasqa2E33BzNHnRQ+OBfcO+TS /AMkaOIdNfycSi7Xu+XwsGcEcQwcVdW4mwOzmzhB1vBGB0wxQg0ZQ0I9JzqAUq7BzhyuXkV1q7 OoNScr4sQe1W3QDe7PKs1mCiIf5KYvUaoivwc3yNhDGe0e6VMrbYNkz5Pp6cPXZw4Ev9atLhSY aPI= X-IronPort-AV: E=Sophos;i="5.81,307,1610434800"; d="scan'208";a="50026997" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2021 08:59:28 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 5 Apr 2021 08:59:27 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 5 Apr 2021 08:59:19 -0700 From: Eugen Hristev To: , CC: , , Eugen Hristev Subject: [PATCH v2 29/30] media: atmel: atmel-isc-sama5d2: remove duplicate define Date: Mon, 5 Apr 2021 18:51:04 +0300 Message-ID: <20210405155105.162529-30-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210405155105.162529-1-eugen.hristev@microchip.com> References: <20210405155105.162529-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Remove a duplicate definition of clock max divider Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-sama5d2-isc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index b2ace528b260..213a2ecc7c66 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -52,8 +52,6 @@ #define ISC_SAMA5D2_MAX_SUPPORT_WIDTH 2592 #define ISC_SAMA5D2_MAX_SUPPORT_HEIGHT 1944 -#define ISC_CLK_MAX_DIV 255 - #define ISC_SAMA5D2_PIPELINE \ (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ CBC_ENABLE | SUB422_ENABLE | SUB420_ENABLE)