From patchwork Fri Apr 2 02:20:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414285 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063802jai; Thu, 1 Apr 2021 19:21:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzdnMiHPD/SdSx9Lk7p9bim3tpFk4JVVSrYQbFpFe6E7kPgewS8epPIbFYq1WSb65TDvTbr X-Received: by 2002:a02:b890:: with SMTP id p16mr10697156jam.138.1617330078939; Thu, 01 Apr 2021 19:21:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330078; cv=none; d=google.com; s=arc-20160816; b=ydn2oNyjDTcJ7+30etec0JMbt764VeYOsUAu3WGZBiCABxy+5f/I8h8lTZDIAKJZbB leGkB33ULl3N/FCIFiFlE5OOjftvjHowRnAl5HrqAnKT3D4iKyhQUsBjtvcNGNpuk6JZ 4bJQ4ZepKsnv7Kdwy9U4qIJk+5HIG5lWHerrZhaVJlCseUR3z5QOSE0kv6wmGCEZFG+z LO9N/N4909A7wNjCvaNYSet2zxqWOgSjdWohpECnRRCBkkuk5+k6+5VtnNIFkFAwuUK8 PiX1fPlsfR3nilmhvOl9n9K6KP1ZuAhlmIe9woQX3pZkxwQmvTfbZHsYaG0ndmpiOPw1 Qr0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9ueam1eNKHbBDz7SDl8uIB8BD9gz/4AOee4PPPewcoM=; b=LhBZqJY/T13k6rl56Ro4NGdWD3xU1odDl+8XzVboLPVtIqUhMubNmPokPIoC3V1y7d PfGvU78OOAPfp33eLcFX7f2f6SILfSb+3SIXS5XULoA1iDzU5jE639rzNKFbEiYcLuC4 DcB5Qi36HIvn1ZgfkMgKWGobuK/VavzSJOtSZu3Yd9dZOC1oaY2jRTLFSRPQoacqX+YC ti3ygnio5F5pn0wcSCQtK4clUxEn4Fw0sS/IweJuwqvJ6Lq2adRixJ93Lt+6StFHYXCS 9ebwDCFnDNRVR6cvdRp6iYOjPn6UIJ0aHD7ErfKtZKAu1P4P+ZqX/Jwc676jwsdqoaU/ 3QRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pQImnG8w; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/dispcc-sc7180.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c index f487515701e3..3334bf9cfb94 100644 --- a/drivers/clk/qcom/dispcc-sc7180.c +++ b/drivers/clk/qcom/dispcc-sc7180.c @@ -19,8 +19,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_EVEN, P_DISP_CC_PLL0_OUT_MAIN, P_DP_PHY_PLL_LINK_CLK, From patchwork Fri Apr 2 02:20:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414289 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063832jai; Thu, 1 Apr 2021 19:21:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyjB2swDSb9p1OiFPRwSmQsCwL0Xp+F0KIJxW26GeXvgKQGd9o25ghH5nfqdipUs6vjBimL X-Received: by 2002:a6b:4a02:: with SMTP id w2mr9453329iob.140.1617330082371; Thu, 01 Apr 2021 19:21:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330082; cv=none; d=google.com; s=arc-20160816; b=N8KL9EUTPjbaisCG1RKQpdnQztpNH7+lbGDkOYMMdJSjSD30UAYGExJSuC4vyO1/Pl o4tV5jpBUuxqQO5daYIYMbvVw6MMjuHUV6roBAwl2SDEvY4B2nCQzyZ25y4zoxSQQ0Z8 T4rKK90EjVhQEnx4t7ztQYN++z6qkMm7wL0bxQed1in2cvbCWM4pQo7xdyqF1wja2GEC x5cCOKx84wSCeOWr2ZjBae8MF1isM5wc4loBdKKWxaAQuXV5vKgEJEz5PeVfowuWxNuA NtnkAqqHfH3TA5kal1FJ2WI9lh5sXh/WDtsLUC5mOl2wGavzy2aUbd04xh6qNCINc7aI 6Jgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r9B4hH0XQcWzr0ChjxI/N+85fa5tVGRkG7jorPots9g=; b=OwIowrlV9WcP3ezUAkFosqIaRaxzrM1hRCUUpuETW8Y/JMHskp+aITMgu1Jx73c5nB uxYsH/TpfFJGexXgHefVF4w7lH/S4pG1vVU+UUL+jaiBuMWBmpDo2AO6TARA8UTgNeml M2JW76HOSfLrRKPvIvWEVkt/kL3riwE+jMDsK0+eCptRCuxbzKyCtD0I53jZLyxEbFVR YdkgAQGTwYuyeF/MYDYCHQCY1DrhK/40BqLtQbRnEvR1qEb6FfwbnBDsvVG+xWhRqUQY chVXF3Db2/ffWaJrcxn5Eb6by9n79oZiQrPRaY+MtN9PouMoSbWsPlMLxHt+Cx49lWnG xsFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QTaFiJRQ; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 8 -------- 1 file changed, 8 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 588575e1169d..86275814e055 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -21,23 +21,15 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DISP_CC_PLL1_OUT_EVEN, P_DISP_CC_PLL1_OUT_MAIN, P_DP_PHY_PLL_LINK_CLK, P_DP_PHY_PLL_VCO_DIV_CLK, - P_DPTX1_PHY_PLL_LINK_CLK, - P_DPTX1_PHY_PLL_VCO_DIV_CLK, - P_DPTX2_PHY_PLL_LINK_CLK, - P_DPTX2_PHY_PLL_VCO_DIV_CLK, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, P_DSI1_PHY_PLL_OUT_BYTECLK, P_DSI1_PHY_PLL_OUT_DSICLK, - P_EDP_PHY_PLL_LINK_CLK, - P_EDP_PHY_PLL_VCO_DIV_CLK, }; static struct pll_vco vco_table[] = { From patchwork Fri Apr 2 02:20:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414287 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063818jai; Thu, 1 Apr 2021 19:21:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwFL1irJIVlEUCU4s/fm5Zf7NWWrdNyDvT5Nrd1pm9R2mYOjDsYmVuhPSgmyQo88XRdp/5n X-Received: by 2002:a05:6e02:219e:: with SMTP id j30mr9014361ila.196.1617330080724; Thu, 01 Apr 2021 19:21:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330080; cv=none; d=google.com; s=arc-20160816; b=HQ1ri5Wnoux4yxHRiNdALHTcwW5a3Vg+JoX3LHIrZ0ZSG2NOKvVwyYM0PZE4bns0OH gNOY9yu2muwh1l+lA/OFx0COIENceTC4IJarWRbjh1Z16VWjbMWwhW1wRjuoPSs23Ewy aTWeba/oPMigloz/mKnvEvCii1zW/odfX8tswjS+LmTEd4v0KRElDkOnxPnyjmONACQf a7z95XFPwQsNWbjpzbp/QIM+Mm7MbK/A3qztjxbOXTh4aejE4GZ5D7e+C1mj/DNK/kCr PuhZuHoyRdWTWJaZKaPqitddQ98kgcMlJCKY/R5Kpfp6M4ABC4C3mTm9CrfqvkDhSMlV T3yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Yw9v3FzQxmFiB5ZmaLj1VaafcFx5aWR8q2x1pRfX23w=; b=DjEBwkKq3RDSc0A2+gpZ5qMRO/pxA4MzJFOreHtGki5/e0dyvTcNIlx1XLqSEih+QD iXwS8/WFR/aAT/bBbAv7JEisg107ZVCCW4L+j0dlp4Ud9F2hcHNHYBlcOLqzKMvi4sx4 kxcjex9Ouy41zw/atdvjFXdZUwsPfz/FxZxS29Wrj5XHap5WBIygUBk+N9qbC5yU7az/ 4IWCmkxBXHfWN0+LzSZ82Xx8IMxYwhFFxY0EENFH7NlavMfcqs6Cc7r/MRKHlz8Ir+Sg X1aB6E/EP5vbXAua6Yhk9meW5g78qLS+5iXxQh2f1HML85ZzongTcdcuJjPchmwlm5Lb ZOxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F9JfnSru; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c index ab594a0f0c40..86626a027f6f 100644 --- a/drivers/clk/qcom/gcc-sm8250.c +++ b/drivers/clk/qcom/gcc-sm8250.c @@ -25,7 +25,6 @@ enum { P_BI_TCXO, P_AUD_REF_CLK, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL4_OUT_MAIN, From patchwork Fri Apr 2 02:20:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414288 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063829jai; Thu, 1 Apr 2021 19:21:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwhcO/imuWooaI7yhEMYZgxr4EzMH9KqC1xtVclVT3PtkNkgAB5bQYaUkmu6q95X8HVXK7T X-Received: by 2002:a05:6e02:1289:: with SMTP id y9mr9821307ilq.244.1617330081848; Thu, 01 Apr 2021 19:21:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330081; cv=none; d=google.com; s=arc-20160816; b=nOpC7fL/qPRjCvtRVnM6FSwTzNNDq2iPheSWXozyubI3zuyCmfewmvaRXzZeHJBr/d 0jD5ZDoeaxdpZml1s3Z3sfimaSwNuVe+dTV+tQlBA3Be/e1HjSO04BY94zi6OyHlaFsl ckdr7N5ORDOj2RSL6qpo/MqrlC1VPtV7NRzQcL8JoJP4BA/c6m5C6hnYeYIMorgBwayz u5YR9L8jDrNY4Hqaxx/Ovr47kZEPMYl5y7+QuHvjqhifLEnZ9dWA1BNh7uPC1tY4H2yG PoNz040flXYPR30ItH7+sa+5egvgy5h332nUn9v1BRD1yesTlrtV+J1MRaLICBgEBl38 F1Nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dCFJAklUokvx3G+IzOXh/1EQ/pUoJjWKvsCg2z2tyJc=; b=XuCsQrYMcQWaxUuE12IH0ygLF1HHf/qm1S+Tix+DMVRGLLY0uiQ5jtrSUM2NHaY37B oKSwqt/hFWWZ7HEgASz/sHdlj5zmeJjS3KqgMw43d+2qaJMTLpR0/9BJeSBOVscc2yJJ uRk+rrTaFehpC0RJqyTiWw5le868pJhRnGrKzGyePrwn2TxK9W1PvzD3jNlEdfJ146jb RJbpfVNR98K4fXIfx1i+LdqIqMl15EXtJeW74pJydgGjbQRIOv7qxO+aJapJAADMg2Bs khyh2a1LcnYauu6azkQBg7a1kaXeNnE1qotk2dVEJLtoDZZipCwUSGl36S+oOtu1sIfr 76JQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yKCSwAzJ; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sc7180.c | 3 --- 1 file changed, 3 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sc7180.c b/drivers/clk/qcom/gpucc-sc7180.c index 88a739b6fec3..d738251cba17 100644 --- a/drivers/clk/qcom/gpucc-sc7180.c +++ b/drivers/clk/qcom/gpucc-sc7180.c @@ -26,12 +26,9 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, - P_GPU_CC_PLL1_OUT_EVEN, P_GPU_CC_PLL1_OUT_MAIN, - P_GPU_CC_PLL1_OUT_ODD, }; static const struct pll_vco fabia_vco[] = { From patchwork Fri Apr 2 02:20:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414290 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063844jai; Thu, 1 Apr 2021 19:21:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwhoKFNPhu49c6ijC7SGSKst2fYGF4J1t+E8mOh31GdjbgpxlEkNtfXXj8vQGnMZueF7/kM X-Received: by 2002:a6b:4a02:: with SMTP id w2mr9453398iob.140.1617330084309; Thu, 01 Apr 2021 19:21:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330084; cv=none; d=google.com; s=arc-20160816; b=yoX8su0xLaRVKH0inH7HhrjbVur5bxEHxjSkthbhM+3LrgAoKDGZLNcR7rM7O2BoMQ iiknSbz3oAPii2RP4Nz/sTlVCREmOgnwFiEhjxaLzPOwf3plM7KTUfRVKhyiIUm7EYEt Qi3I6ZydMgD4huPu3KNdkJsmFWold5FVLyNyNczgzBW4HIPuy8iqvuw152o+7ZTd7fz7 0GkH46oXAFfcTF3DZm/zrZzhOSN2PVtyoypL8fiJibxpPwnRv1XoX6ROcm3nCHKegQEe 0qS2n6FTcJEM/gvQlTl0zjO6oaQr1eh2dbPzykEfH4RuWr/GrR4cQ5xiegl8B0b8Skxv o1tQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kMkSpD3OcWTd6f37s3IGkgZFUGHa0Z/7pX7Q5b4doiI=; b=Wcv5d8zlmw/94E+M0iYy0a+k9Y8qi9e+aS5uDgmVrBujjobd3s8uFdwdeeAYutPENr P77KkgYDmrUmLVH7FXYPh48XYEMcHXXWhdYHM/H92pPLincEFkS/iX9G+YiyE29I4BRg BUVBBDmZ2+NyacGxdB+GupzqDf9CAyk9urgHKxlsMQhlhWW9WxA4BQrS10igJ8bglp2r t7Pq6azydAmk9Ny7dZtmcEnaKyjCkCuicSdbND0G9oLHHpa3yI4VBzaOgLVoOsZ/b3uy LkrR6GBawJy70K3WEKr8pRv3TA5gW4m6s7AQ15lDDxiKeM0aoU5M77rSQfbgMIZAqjV9 niDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=b+VY2SLL; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 5663698b306b..2d7dc89915e8 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -30,9 +30,7 @@ enum { P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, - P_GPU_CC_PLL1_OUT_EVEN, P_GPU_CC_PLL1_OUT_MAIN, - P_GPU_CC_PLL1_OUT_ODD, }; static const struct parent_map gpu_cc_parent_map_0[] = { From patchwork Fri Apr 2 02:20:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414295 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063866jai; Thu, 1 Apr 2021 19:21:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxT8zItg5n7IL/H6uL9njsKjLbOguxHFTTfPNqbzmM1nV+IrqIWvMqLfu+YbrE3GkGpjToz X-Received: by 2002:a05:6602:1406:: with SMTP id t6mr9291408iov.154.1617330088475; Thu, 01 Apr 2021 19:21:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330088; cv=none; d=google.com; s=arc-20160816; b=Jato+EZhMn7fN6tBz0s0I8IWRf9BL9yBbNmloSrxBjte0fZnHL4rARsfrLOywDTQIr 5Q5hEAqK3f6qTORiqIc3DEIUUacq1Bmau4kjw/id8PPumsXg30sC4ot0f5ug4eDNvWaj 4mGB9VyvbviKN0vVWAu1IoW71o5Ini0fr/kXnjz1Gy7GCNoJ05e8A6VFFIuv9fIQVnTo QGsEiingQLViIzlWQs+RL73qTB+1YTEFZkc3JABi4wQlg+2zQFZ4f16CDF6XX2kylYbY 25qlypY5HH8yXdZixrpNwFZNGTPLB9EbXUlN1FxKOPpto882rXBf1NmeJDxMUyL4I64x Ya1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LaVGcGxnlvWl/N60TSPqkBXVPvOJpnJu23KDJt8v/cE=; b=bj+hbV4JSkUV05IwRbSoyTzrV5IIfOW+LIBsoH7E6cAf62eY7ifuSuuTscMSRV8ar6 7amz+2cR732oKhllDBQg4KZJbivETfyP8ncvlvHv/HGkjvNV0FnXUkY1KQ9nMrTXRHTl m9MhUJBOJc+3wE/qO4YTd7gKhiWWAUQ6xQzYGwKKL8ZASrZxtfCnAJLxZa+4c4Y+m8OX qmQnb2o/W07BXmUtiPNqRgeoNPga1AG9MY9hD6wXrHgFGBa/DOoSK6kDdMGytP60Mo8n pxIczZhCWFdGqudjOPym+4VU39F1j+iLwb798k4id8tU2nmf8OGdgKpigcGjdADMAL+n cj1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qL8V/rUg"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sm8150.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sm8150.c b/drivers/clk/qcom/gpucc-sm8150.c index 27c40754b2c7..2b952f561537 100644 --- a/drivers/clk/qcom/gpucc-sm8150.c +++ b/drivers/clk/qcom/gpucc-sm8150.c @@ -21,7 +21,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL1_OUT_MAIN, From patchwork Fri Apr 2 02:20:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414291 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063851jai; Thu, 1 Apr 2021 19:21:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxHyKmLj5ohQU4iAuUWtp+mP+YzM1ubz736ijPsiYjEM8JmAHkvfAJ/3S8ivjmsb+i1Owx0 X-Received: by 2002:a05:6602:1592:: with SMTP id e18mr8894097iow.49.1617330085081; Thu, 01 Apr 2021 19:21:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330085; cv=none; d=google.com; s=arc-20160816; b=BoNcv7r43dM3AbcbqkYZAprOdWzBNnhZN0lwEMkLnryp3/CQag2f7gllBYBqKNk7JZ KEmG6IkMkLvdSP3nBLJ4ILlyY+0kfnhnND7JsW6BUo8eybQAMOfnP/V3IbsrTFCNqWmB iHkIaNqyIWpDHkNMinsZl4+DU2kTgOKQGmKKtcOpuWkui4ptW7b2mJSn1s3gIVPHTDS4 0XzQ0mww80NUC2JW4twILFwIGwMV3n9K7H2T/x8MsWGAi/tkTcUrzRJYxYa5qX43z6RO oE1iLmfLD98mqsj8/sdtkjqqWcEKm+aEuFw3f5lHYo7dE/qA4GmV0uqIeHD4ZaACmxQZ W3fg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1jU9us/3mI30guyXLRXo1PxXu6Cnze2Bw7/gT4xxmgc=; b=tfdQ81ZAx4a5K5CZfCTEuNbp1yH1DU3D6lVBDPKG+c39dcbteyrYN0Fkw8j0eh5qu6 IA3uVLCNvaa1R8I8h99lRuvUiH+A/JgwvZLxPjgxpzE6wvnycjq0KBKfseNVGGmTrkrk 5VlFnESAmSfW2Zixs60TNqO2MGP4p+lpLyPwAlK2JMcTuaa5kcHlAOLcGvOqmcB1haon k7Jp06/AO1/1w4kIWCZigLCVNLd3PIFxwWJTyRr/6PPTzJ1qtnsnu2d8WdiZOROUM5YJ 3DmIjYiwAWKJ1GDwlLKmD9oocQ+ggdq1O8rPi9te/Fwhcs3IiQroEtQo3AoZVwzq8IpW ndTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QtOXlY+w; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/gpucc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sm8250.c b/drivers/clk/qcom/gpucc-sm8250.c index 3fa7d1f9ff98..67c136a77efb 100644 --- a/drivers/clk/qcom/gpucc-sm8250.c +++ b/drivers/clk/qcom/gpucc-sm8250.c @@ -26,7 +26,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL0_OUT_MAIN, From patchwork Fri Apr 2 02:21:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414293 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063859jai; Thu, 1 Apr 2021 19:21:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyVQaWwP0HWdxdfBWjIzu/cC+q1Zt9REjKCA1n+TVEsaRzzqEKFy8X2P3+EvWLdvLmgZHtV X-Received: by 2002:a5d:9693:: with SMTP id m19mr8730263ion.46.1617330087040; Thu, 01 Apr 2021 19:21:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330087; cv=none; d=google.com; s=arc-20160816; b=DL6coOb9oBnHHCqTDMR7nSZa9GOaSiu72wJxRWcynVpSV6e6vsxRCLOWtNJEKzQudw HEHvXK/HVcLjYaQhc1MmzixLmYJsT7az/RjERd/Tly0khpVLBzpAzc7LtW+Z7Gr2E76a bxU0Z4RZbzhz+4DbBDzVGWzw/bcR2QY8ERS2SQ9aWMM7UrK3DNzCHgM0IeMMoJtRTP1g HXDXPmxwQd4gJ3yKLIzECvYGtU9R5p0yjWL0JhE9KqxOJLSrNroHubAhY0qWxN8ejAxh DzfBI91nsV36K6ASZu6/eF4ef3eJ2TnKEe4eKhXV0tWFTdj5hCGaST3bz1hNIrsDIdQA B3fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=b5s+r9vXI8ypakYfW1qP+Mc/8XhHgo5jUKnSXepZgcA=; b=ZcM6kSqFIiuvouAgHyfR6kTQKq4HIF1+4IvKm4lQVgTQEovBiqYUBqOW8CO6MWacRU 38Pjm/c966tHuTASN+34+l+HC6x3hMki7MWmwbgkEVlm/rOwlJCUyYfD5YNrZIhW6Df2 +uN/fusZxFGrQVQkqhZJ+9IdWWqZgutjIfBkVaKsxnBifyU8skbw7Z52bib/EdUpQfZZ 5Wz/OVAOIIohLfk4E+xfNDzu8a66ZqXs2Ifak4uW7xOfsz8bZpO6LVROj7RtpZaOgKh+ TqMPbMR0f7dG2FYyaOjzhzbc9CtaxvOlKOIluCE53wn67u+mfYTeD183BdiRkzGBnIyM nidg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=usAekJAw; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/videocc-sc7180.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c index 276e5ecd4840..ed57bbb19f88 100644 --- a/drivers/clk/qcom/videocc-sc7180.c +++ b/drivers/clk/qcom/videocc-sc7180.c @@ -19,11 +19,7 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, - P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, - P_VIDEO_PLL0_OUT_ODD, }; static const struct pll_vco fabia_vco[] = { From patchwork Fri Apr 2 02:21:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414292 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063854jai; Thu, 1 Apr 2021 19:21:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxtx5Qm7rAlzwvA6FQ53WxlnzlHoMDjSJg8ybsezR4PxPjxilgdKtlKa5PwkYD/zGDmsobv X-Received: by 2002:a05:6602:2012:: with SMTP id y18mr8779217iod.169.1617330085846; Thu, 01 Apr 2021 19:21:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330085; cv=none; d=google.com; s=arc-20160816; b=OqvqVvtjx+eMGl2RTk7ykZBOCB0vRejEfXVCt7o36vYgTNpYoYthXhYBHy0wBQT529 9OW/ajpsbP9w5sbE0YXzKZlmLMISYoKVxM6exhqzdbkTF3SZFsz1zSLdg6PVFRM9x3pe x5RWmklNicOb/hNn6U8/2/m+QKFWYZmFWe2VIB6WLEJ4FwIXEdjvGeaknWVpyYSp7uYI 5Iutk/njzApXZzYRh6sWDE7EyyTYNwZDXJUmH5RfqQATbzLHMjfdd2YRqhmUWtTM1pT8 FVAIJv7L2ecO2T40wsEiHWfkDZQKthFdd3WIuLAHOr9qr6kjy39Py8xXqPNskoWNDIHg rn9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uc2bBmZbtEdOHqgSTXP/SGQ9SxGSu18X6WnoYCdFGZg=; b=yKTMjB0SWIckPR/MDXHy05ee66Jats+bGpIAyA29VxpNvvtNVAIM0TlFqy58wlp21y PCua9logPzT30hk7jS7P1HDhOwIoLzD4jqsun7lbzEgJlkJZN4fvwZx6As46MuCtvSoS GoJxkoCpO7P4Ux5y8Js3qUz1MAh3l953myGWWTlPb4uYVWRJlqQDqamI5HWkV7t3as34 6bsmm+VhQi8gCiEN0qKGsqbAAQNwacI9K0B+7383AdNCYcTZ4CERPb45Joju9N/Ssl9q pElWRZEb4v+Y6bAOiTfHpf3FWkqojVSEyXMu1xFUODZe5q7G03NN2P3XIJ0WYByNnu0+ XftA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ClruPNLn; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8150.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c index 3087e2ec8fd4..85b0bbc2b151 100644 --- a/drivers/clk/qcom/videocc-sm8150.c +++ b/drivers/clk/qcom/videocc-sm8150.c @@ -20,11 +20,7 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, - P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, - P_VIDEO_PLL0_OUT_ODD, }; static struct pll_vco trion_vco[] = { From patchwork Fri Apr 2 02:21:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414294 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063861jai; Thu, 1 Apr 2021 19:21:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz/9jCr3g5GN6VC/dhPqLmirvWVOde1Ix26gMy3xIZnBXOgt0+v/iLR+dVXIT1RYeSHsSKh X-Received: by 2002:a92:c549:: with SMTP id a9mr9554157ilj.300.1617330087433; Thu, 01 Apr 2021 19:21:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330087; cv=none; d=google.com; s=arc-20160816; b=t9aXLP12axKRy8IN0Tywv9Sf5sKyxWLQL8hV4JjPjQWiClR9kaJMbarPv40SQ/rlx+ JDhqrkkeC5RX3TeosNXsCw6QVYSbYDixEXrOOx3eur6hmKNtXH7DBkmvfjZrSvMRATxC 3W4/SsSxKEPbDNIQ/TtYidnQmkd/3Py128otql0ikt/jlQPTBWdkfK2Yh51mH0LABWy2 NvK+49Ksx/4iaOXGeuPEi0QE00vRxLPIZXWqJngN0P26lgBzq+EdT7IMJiFtxLzEJVax KtxpangZ8BXh996kkzjIuOir86CWn0ob4bHFb8xiSWctkTR++Vm47kkv2T0mnrz4AktY sUaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e7cDGwvCK159I/9FSrY1M64d33eVbPn2loBLKSHFDao=; b=JAz9jTA80wqllYOcrza4l+Et6TtzaoBHfOaMXjZORF3qYX71P2myJ8PZfCSQEyeUFv fisliQDpj2i5/s4eC53lh2oFNOEq5J5hmScdhjfLz/o5oppxdqWy3c0PegjEnKqdFsu4 XhjDdsR4qDIY4lLZf2yEt66GWu8bkNtFJCxo82I8LaDaTyPvwar3bd+/IIzv7kz3JXi+ Fu8Ff1nqoZNIAn/xzVLkQVYwGq0aqFavuz2gVR47gOZdqpebPFgZJAEbAbtAt7n/jWac 4dm0Wy5kn1Yq19tbL+XWezm/AwzG4OdYvDdu5DCfvMovsSO89XDKF+SOhk+IV2Ncl4G2 k+Zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WyOFnevH; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index b0efadc19634..06a8a2c98deb 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -21,8 +21,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL1_OUT_MAIN, }; From patchwork Fri Apr 2 02:21:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414299 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063883jai; Thu, 1 Apr 2021 19:21:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy04vRUG9KVbhgSkQDANPV+fcgSA/ezpif3CnDL5ZcoDQKVi1Xh9Ro2AkdaIssVDtn6Zm/L X-Received: by 2002:a5d:9e47:: with SMTP id i7mr9284881ioi.104.1617330090223; Thu, 01 Apr 2021 19:21:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330090; cv=none; d=google.com; s=arc-20160816; b=xguzI4U7336TSVDEsa7AkwLPqSpvq8m3mt4rB+E10X3BnSIpnFJ0bLi4lzbDyztvqA AMDYUrBM/qKQRewta9JU+KFm1StOJ8b8VZ6qHBxSKbxrN2x9seDqHTs+2R9Ea23N88aF IRhGvRBJ9ae4A0PVynCNr8zp6bQmLQGJSfpAigwBzmRtfShqsAbaMAe+fLrUrXo21Ey8 KCNFvB2+7yc3qWjov8ed6NN+d87CB6d9FfNmFXlx75Qcv/L93GtMiPjT66Av3lINyWLd F9kyej+pF8t9tgbP/cZiJnWsjHsf7yImx04RqkaqHdx41yVs1UcsrPVebdphE/0yi8qa fd4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nFKRMT+uuLb0v0tcxrynoQiqJNSnoW1UORVuiU4smjw=; b=Yyb6HX+txHfZ0HlHnwSOrUKq+XHGQV8MD9HFr9wEQDLaiIAP7yM5xT37ychEL264Lr k/UR4H+VtdxDG0h5olqu9rDRu/2TmgfyZRAr/YN23TekEqehRhV10ssZcgfnR7b0C3ns gWnDZ3sWmn8GF4SIAiH83E77/ZZBkOSmJW3othlbTmxahslFVhD5bH2qE9RziMQxz1Lo Wqp/m8O8Zoz+ZXBWiku2twBWiv+G7LeF+FNRiwhtIvX3weHKC3KSVPNHwIck5HJK0pSk XY5UNXljWoyR4K0QAxtBbf8Gn/xyrn+LeF+j4hlXQ5vn6rC6nGwfEx3f2AtrmKvU9356 IwdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kax29Xgf; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sdm845.c | 188 ++++++++++++++++--------------- 1 file changed, 95 insertions(+), 93 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index 5c932cd17b14..bf5e8a4a0230 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -33,6 +33,21 @@ enum { P_DP_PHY_PLL_VCO_DIV_CLK, }; +static struct clk_alpha_pll disp_cc_pll0 = { + .offset = 0x0, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], + .clkr = { + .hw.init = &(struct clk_init_data){ + .name = "disp_cc_pll0", + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_fabia_ops, + }, + }, +}; + static const struct parent_map disp_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 }, @@ -40,11 +55,11 @@ static const struct parent_map disp_cc_parent_map_0[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_0[] = { - "bi_tcxo", - "dsi0_phy_pll_out_byteclk", - "dsi1_phy_pll_out_byteclk", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dsi0_phy_pll_out_byteclk", .name = "dsi0_phy_pll_out_byteclk" }, + { .fw_name = "dsi1_phy_pll_out_byteclk", .name = "dsi1_phy_pll_out_byteclk" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { @@ -54,11 +69,11 @@ static const struct parent_map disp_cc_parent_map_1[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_1[] = { - "bi_tcxo", - "dp_link_clk_divsel_ten", - "dp_vco_divided_clk_src_mux", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_1[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dp_link_clk_divsel_ten", .name = "dp_link_clk_divsel_ten" }, + { .fw_name = "dp_vco_divided_clk_src_mux", .name = "dp_vco_divided_clk_src_mux" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { @@ -66,9 +81,9 @@ static const struct parent_map disp_cc_parent_map_2[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_2[] = { - "bi_tcxo", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_2[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -79,12 +94,12 @@ static const struct parent_map disp_cc_parent_map_3[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_3[] = { - "bi_tcxo", - "disp_cc_pll0", - "gcc_disp_gpll0_clk_src", - "gcc_disp_gpll0_div_clk_src", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_3[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &disp_cc_pll0.clkr.hw }, + { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" }, + { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { @@ -94,24 +109,11 @@ static const struct parent_map disp_cc_parent_map_4[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_4[] = { - "bi_tcxo", - "dsi0_phy_pll_out_dsiclk", - "dsi1_phy_pll_out_dsiclk", - "core_bi_pll_test_se", -}; - -static struct clk_alpha_pll disp_cc_pll0 = { - .offset = 0x0, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr = { - .hw.init = &(struct clk_init_data){ - .name = "disp_cc_pll0", - .parent_names = (const char *[]){ "bi_tcxo" }, - .num_parents = 1, - .ops = &clk_alpha_pll_fabia_ops, - }, - }, +static const struct clk_parent_data disp_cc_parent_data_4[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dsi0_phy_pll_out_dsiclk", .name = "dsi0_phy_pll_out_dsiclk" }, + { .fw_name = "dsi1_phy_pll_out_dsiclk", .name = "dsi1_phy_pll_out_dsiclk" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; /* Return the HW recalc rate for idle use case */ @@ -122,7 +124,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { .parent_map = disp_cc_parent_map_0, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -137,7 +139,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { .parent_map = disp_cc_parent_map_0, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -157,7 +159,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_dp_aux_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", - .parent_names = disp_cc_parent_names_2, + .parent_data = disp_cc_parent_data_2, .num_parents = 2, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, @@ -171,7 +173,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .ops = &clk_byte2_ops, }, @@ -184,7 +186,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -198,7 +200,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, @@ -212,7 +214,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, @@ -232,7 +234,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .ops = &clk_rcg2_ops, }, @@ -246,7 +248,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .ops = &clk_rcg2_ops, }, @@ -273,7 +275,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk_src", - .parent_names = disp_cc_parent_names_3, + .parent_data = disp_cc_parent_data_3, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -287,7 +289,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { .parent_map = disp_cc_parent_map_4, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk_src", - .parent_names = disp_cc_parent_names_4, + .parent_data = disp_cc_parent_data_4, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, @@ -302,7 +304,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { .parent_map = disp_cc_parent_map_4, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk_src", - .parent_names = disp_cc_parent_names_4, + .parent_data = disp_cc_parent_data_4, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, @@ -326,7 +328,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_rot_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk_src", - .parent_names = disp_cc_parent_names_3, + .parent_data = disp_cc_parent_data_3, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -340,7 +342,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk_src", - .parent_names = disp_cc_parent_names_2, + .parent_data = disp_cc_parent_data_2, .num_parents = 2, .ops = &clk_rcg2_ops, }, @@ -381,8 +383,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -399,8 +401,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_div_clk_src", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -417,8 +419,8 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -436,8 +438,8 @@ static struct clk_branch disp_cc_mdss_byte1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -454,8 +456,8 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_div_clk_src", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -472,8 +474,8 @@ static struct clk_branch disp_cc_mdss_byte1_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_div_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -490,8 +492,8 @@ static struct clk_branch disp_cc_mdss_dp_aux_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_aux_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_aux_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -508,8 +510,8 @@ static struct clk_branch disp_cc_mdss_dp_crypto_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_crypto_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_crypto_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -526,8 +528,8 @@ static struct clk_branch disp_cc_mdss_dp_link_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_link_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -545,8 +547,8 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_link_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_branch2_ops, @@ -562,8 +564,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_pixel1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_pixel1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -580,8 +582,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_pixel_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_pixel_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -598,8 +600,8 @@ static struct clk_branch disp_cc_mdss_esc0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_esc0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_esc0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -616,8 +618,8 @@ static struct clk_branch disp_cc_mdss_esc1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_esc1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_esc1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -634,8 +636,8 @@ static struct clk_branch disp_cc_mdss_mdp_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_mdp_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -652,8 +654,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_lut_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_mdp_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_branch2_ops, @@ -670,8 +672,8 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_pclk0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -689,8 +691,8 @@ static struct clk_branch disp_cc_mdss_pclk1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_pclk1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_pclk1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -707,8 +709,8 @@ static struct clk_branch disp_cc_mdss_rot_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_rot_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_rot_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -738,8 +740,8 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rscc_vsync_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_vsync_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -756,8 +758,8 @@ static struct clk_branch disp_cc_mdss_vsync_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_vsync_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Fri Apr 2 02:21:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414296 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063871jai; Thu, 1 Apr 2021 19:21:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxYmxb8WUhWbVd4QkSUFrmOBsTgwfZgH2WdUrsZgkhnbMegiOeFiJxYdm1xDebpWPtZhiTf X-Received: by 2002:a5e:c809:: with SMTP id y9mr9376055iol.192.1617330088848; Thu, 01 Apr 2021 19:21:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330088; cv=none; d=google.com; s=arc-20160816; b=qf+eAvso/aMtltWd5FkZQvUJlfFHFzFvFOtdyJ02WWFzzqSJhbY5IlLBc5debTxuNy iGmk/j3wlKg7qP3IF6b4a7n6B9m1Ny2BkCLM2lqTkef/UO5+DZWaPZMzZ4HOpVAjAMqj WXsSlsRNZmCfI4VhLqOP0q1AkO+g7DtrEFieJiB4np5RVxpPkDbTctjI7ZNilbd7z+Bb BcBl7QngCSEEWgy/tI9/TR9k5QGTzXVPf9sQQqN1aDWt5KrBfM2E1doYNzTJN/qCpsK1 Uin6xrn4cQ++l8+M4nyzn+oWkeggDLIsJwIAvhnDHYt1TWQqRX+D9hL+gFWbI1XCG7f5 Sb0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oD24D/NHNTgtv3QYd7/t2oeh57K22Anyb+KS67fLkXQ=; b=UMm+Xdg1mznVIWCodIXVuGV1ygkGwT0+tpCQQuh8VtynuBTDDgzb9sJuvHmSlPLvyF aIsIGDC55jn8VAGYKrzUh6hYGzX3GBAwJnRAVdmkJhPaGO/ijLfiqCWxegLA3GQ3y5fz a0E4jaWXomZtEyA0A4vKzayifgRyqSlEWBCuCVe3krvlZeiFZ8rlAefEhqB6OR+3qcFD oeHcx8Ke2s7ASYNNQWV3ASBL338A7W4oh9hKhxvXEyQZIb9rk2djLTvpkOzPWOGLlRJz jWShK7gkFjsPX5rjzA/YavQAbIJeep5oOESGds0urgn8wX2IwCYu9ftpwtERu0X2/Drj cT5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vQjAiLg3; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 42 +++++++++++++++++---------------- 1 file changed, 22 insertions(+), 20 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 2d7dc89915e8..44039fd2abf2 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -33,22 +33,6 @@ enum { P_GPU_CC_PLL1_OUT_MAIN, }; -static const struct parent_map gpu_cc_parent_map_0[] = { - { P_BI_TCXO, 0 }, - { P_GPU_CC_PLL1_OUT_MAIN, 3 }, - { P_GPLL0_OUT_MAIN, 5 }, - { P_GPLL0_OUT_MAIN_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, -}; - -static const char * const gpu_cc_parent_names_0[] = { - "bi_tcxo", - "gpu_cc_pll1", - "gcc_gpu_gpll0_clk_src", - "gcc_gpu_gpll0_div_clk_src", - "core_bi_pll_test_se", -}; - static const struct alpha_pll_config gpu_cc_pll1_config = { .l = 0x1a, .alpha = 0xaab, @@ -60,13 +44,31 @@ static struct clk_alpha_pll gpu_cc_pll1 = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll1", - .parent_names = (const char *[]){ "bi_tcxo" }, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, .num_parents = 1, .ops = &clk_alpha_pll_fabia_ops, }, }, }; +static const struct parent_map gpu_cc_parent_map_0[] = { + { P_BI_TCXO, 0 }, + { P_GPU_CC_PLL1_OUT_MAIN, 3 }, + { P_GPLL0_OUT_MAIN, 5 }, + { P_GPLL0_OUT_MAIN_DIV, 6 }, + { P_CORE_BI_PLL_TEST_SE, 7 }, +}; + +static const struct clk_parent_data gpu_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &gpu_cc_pll1.clkr.hw }, + { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, + { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = "gcc_gpu_gpll0_div_clk_src" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, +}; + static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0), @@ -82,7 +84,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .freq_tbl = ftbl_gpu_cc_gmu_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gpu_cc_gmu_clk_src", - .parent_names = gpu_cc_parent_names_0, + .parent_data = gpu_cc_parent_data_0, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -96,8 +98,8 @@ static struct clk_branch gpu_cc_cx_gmu_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gpu_cc_cx_gmu_clk", - .parent_names = (const char *[]){ - "gpu_cc_gmu_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &gpu_cc_gmu_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Fri Apr 2 02:21:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414300 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063889jai; Thu, 1 Apr 2021 19:21:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx2jQ8dBIlSYcxBxEpYcv+fTV9ETegW5r81BMHXjUhFaqB2qgYMlHn5EgbQhEaLBv/u5bRv X-Received: by 2002:a5e:c908:: with SMTP id z8mr9257542iol.136.1617330090886; Thu, 01 Apr 2021 19:21:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330090; cv=none; d=google.com; s=arc-20160816; b=UgW6gZJqzjCqQ04OCgllYa58T3ah9LfbC5L2UxFjyR+z7Tg18RhQrHXedhFjOTr9qV KPhXOt4Rzslgrv9E6+7VpBoyA4GxZdFQgDYuUf/9Zmu54Kk3hNYfQebFCAo/4e5Gyb/r vKwz/3cC8Gj/Y9hmDBnjbrH5MGPl/ZBB/mB717MlC/n1HfnrEtho3SpBJXeCiCfkCgoz Ec0C6Szc+tXS3D+JB1UhYA+/YqYyml29meFGAaSD3F295hwBza0n20Od5o0hP2X21cu3 SD8voss7KZHbz+RwT3KDbhqhcnfNSqo1Jpay/SxtwKEmx7G7KAinbQQH4kytQWADls0z K4GQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7JxBwpurnZTOmamu5Y1J1N7aXWjvfD4iS8l8pnFRSMI=; b=VMOJiKF7fox56c65m3BykPfbJUmQIJv2ksQl9jsxISryC14xtjO6hG8w5SM4UVLYlB mq6R8rd/tIC5ClWi85NtePezOK1geArKNKkhHyJxqUL8fCsLfpVoKCO43N6gmAxHHlIB mPrzI/aBLNBxFtyPhqvdH0Qlfz5b6PdgBvaoWrFgeHK3CBRl5kEhM9v6S5EF6AueGS6W 9kg16xdyx3B0UYB4bu350ZzmCdw9ml19F+HzZyZEc04z0RtsxCQFgCuKbI48lYZO5csW sDgKSm1DlYmhBOVaz9hnKbJfffA7449LKcQDYEmaNZW1VNhvB4lBMmJAEmnJfe1FXIxg auUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gxFZxpH5; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 50 ++++++++++++++++--------------- 1 file changed, 26 insertions(+), 24 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index 5d6a7724a194..7f3a93efa928 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -26,22 +26,6 @@ enum { P_VIDEO_PLL0_OUT_ODD, }; -static const struct parent_map video_cc_parent_map_0[] = { - { P_BI_TCXO, 0 }, - { P_VIDEO_PLL0_OUT_MAIN, 1 }, - { P_VIDEO_PLL0_OUT_EVEN, 2 }, - { P_VIDEO_PLL0_OUT_ODD, 3 }, - { P_CORE_BI_PLL_TEST_SE, 4 }, -}; - -static const char * const video_cc_parent_names_0[] = { - "bi_tcxo", - "video_pll0", - "video_pll0_out_even", - "video_pll0_out_odd", - "core_bi_pll_test_se", -}; - static const struct alpha_pll_config video_pll0_config = { .l = 0x10, .alpha = 0xaaab, @@ -53,13 +37,31 @@ static struct clk_alpha_pll video_pll0 = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "video_pll0", - .parent_names = (const char *[]){ "bi_tcxo" }, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, .num_parents = 1, .ops = &clk_alpha_pll_fabia_ops, }, }, }; +static const struct parent_map video_cc_parent_map_0[] = { + { P_BI_TCXO, 0 }, + { P_VIDEO_PLL0_OUT_MAIN, 1 }, + { P_VIDEO_PLL0_OUT_EVEN, 2 }, + { P_VIDEO_PLL0_OUT_ODD, 3 }, + { P_CORE_BI_PLL_TEST_SE, 4 }, +}; + +static const struct clk_parent_data video_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &video_pll0.clkr.hw }, + { .name = "video_pll0_out_even" }, + { .name = "video_pll0_out_odd" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, +}; + static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0), F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0), @@ -78,7 +80,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .freq_tbl = ftbl_video_cc_venus_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", - .parent_names = video_cc_parent_names_0, + .parent_data = video_cc_parent_data_0, .num_parents = 5, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, @@ -158,8 +160,8 @@ static struct clk_branch video_cc_vcodec0_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_vcodec0_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -189,8 +191,8 @@ static struct clk_branch video_cc_vcodec1_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_vcodec1_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -233,8 +235,8 @@ static struct clk_branch video_cc_venus_ctl_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_venus_ctl_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Fri Apr 2 02:21:06 2021 Content-Type: text/plain; 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 44039fd2abf2..621ad03fe154 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -27,7 +27,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL1_OUT_MAIN, @@ -58,7 +57,6 @@ static const struct parent_map gpu_cc_parent_map_0[] = { { P_GPU_CC_PLL1_OUT_MAIN, 3 }, { P_GPLL0_OUT_MAIN, 5 }, { P_GPLL0_OUT_MAIN_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gpu_cc_parent_data_0[] = { @@ -66,7 +64,6 @@ static const struct clk_parent_data gpu_cc_parent_data_0[] = { { .hw = &gpu_cc_pll1.clkr.hw }, { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = "gcc_gpu_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { @@ -85,7 +82,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gpu_cc_gmu_clk_src", .parent_data = gpu_cc_parent_data_0, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; From patchwork Fri Apr 2 02:21:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414301 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063893jai; Thu, 1 Apr 2021 19:21:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxaB9N9NQLHVf+i40mJGOUf4DYOB57gejTV2JVkuHNGeefSDXg3fu7b5pKsh2vj3limCjIE X-Received: by 2002:a05:6638:d47:: with SMTP id d7mr10875410jak.2.1617330091562; Thu, 01 Apr 2021 19:21:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330091; cv=none; d=google.com; s=arc-20160816; b=y7Shb0bBufn1gJaJB0978f5kf83FDasLD0fsl/kJSNHHFDODnot9RDFC2VcipDJMP0 neNGVtqSyk2Vijfy/S4Tjz1r71foZPohpMfOwyMBT9fTIQc06A5f4r/e2HBHHMwyolKv UMVCZHmXGuDYS0/OdNaL614TTW4YV0Zk1ZHkmE2EVsqefB3gmrD8LMAh6HG2Tf7kiGWV 8vAD+ziHIErJZF0TtMg6EX5RKBfzFsrnQl9Gb5QkvmFCyz9G9lk+3kO8wWzq17AbTSiQ AuG7tzBmvB2x4lLfWFh+eUVw4zK/fwkk4Ojs4Cf+0h+0oh5+h2lO3ZIE86H3B/etq4t8 Wtsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vlFFAnWw2oQS6KQuBOzl9VFGrwAtxCUu1GQdT8KGelI=; b=llQSSsFS7HBXVx5T2jzVn6Xsxyg5qdkCou3tj/Fc2fB5z7oh9BsNeapWIFN/jwBtPD lrBIjG5BVisesYuW0BhXlyLHF6cvPzvEN1ij+FEuYZ9xq7X78+wCXzhKDe3tfpFYKeVc tM+UPkS/gPCnl8tA5fKqtMVbEQQz2k0FcBQgK1b4CeHLSTnKuBvHBgVZAjc6QCEoW6lE Aago3o4GijQdcSNiuz1l1dF/+Cv6tiMYCpEOS/belMh1691zpev4bkV2jj5tNEWBtaUc yj8AWEAXFHv8L/Ij3Pf39cNj+DE1RjOTjifaGaGR1sBBQ7ebT4Essiytynzqu6OFtbZW HiNQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HAy2YI1N; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sdm845.c | 39 ++++++++++++-------------------- 1 file changed, 14 insertions(+), 25 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index bf5e8a4a0230..195cecf9f294 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -21,7 +21,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, @@ -52,38 +51,32 @@ static const struct parent_map disp_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 }, { P_DSI1_PHY_PLL_OUT_BYTECLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_byteclk", .name = "dsi0_phy_pll_out_byteclk" }, { .fw_name = "dsi1_phy_pll_out_byteclk", .name = "dsi1_phy_pll_out_byteclk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { { P_BI_TCXO, 0 }, { P_DP_PHY_PLL_LINK_CLK, 1 }, { P_DP_PHY_PLL_VCO_DIV_CLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_1[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dp_link_clk_divsel_ten", .name = "dp_link_clk_divsel_ten" }, { .fw_name = "dp_vco_divided_clk_src_mux", .name = "dp_vco_divided_clk_src_mux" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { { P_BI_TCXO, 0 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_2[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -91,7 +84,6 @@ static const struct parent_map disp_cc_parent_map_3[] = { { P_DISP_CC_PLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_MAIN, 4 }, { P_GPLL0_OUT_MAIN_DIV, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_3[] = { @@ -99,21 +91,18 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = { { .hw = &disp_cc_pll0.clkr.hw }, { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" }, { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, { P_DSI1_PHY_PLL_OUT_DSICLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_4[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_dsiclk", .name = "dsi0_phy_pll_out_dsiclk" }, { .fw_name = "dsi1_phy_pll_out_dsiclk", .name = "dsi1_phy_pll_out_dsiclk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; /* Return the HW recalc rate for idle use case */ @@ -125,7 +114,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -140,7 +129,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -160,7 +149,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", .parent_data = disp_cc_parent_data_2, - .num_parents = 2, + .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, }, @@ -174,7 +163,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .ops = &clk_byte2_ops, }, }; @@ -187,7 +176,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -201,7 +190,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, }, @@ -215,7 +204,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, }, @@ -235,7 +224,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .ops = &clk_rcg2_ops, }, }; @@ -249,7 +238,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .ops = &clk_rcg2_ops, }, }; @@ -276,7 +265,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk_src", .parent_data = disp_cc_parent_data_3, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; @@ -290,7 +279,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk_src", .parent_data = disp_cc_parent_data_4, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, }, @@ -305,7 +294,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk_src", .parent_data = disp_cc_parent_data_4, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, }, @@ -329,7 +318,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk_src", .parent_data = disp_cc_parent_data_3, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; @@ -343,7 +332,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk_src", .parent_data = disp_cc_parent_data_2, - .num_parents = 2, + .num_parents = 1, .ops = &clk_rcg2_ops, }, }; From patchwork Fri Apr 2 02:21:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414298 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1063879jai; Thu, 1 Apr 2021 19:21:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyPUy0RKJUHst6xOcLfN9pkg9bq01d3p8YPW7/7hTkB6dnOTX4jNksHpQwlwGYlAUFI8B8t X-Received: by 2002:a05:6e02:219e:: with SMTP id j30mr9014693ila.196.1617330089547; Thu, 01 Apr 2021 19:21:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617330089; cv=none; d=google.com; s=arc-20160816; b=YSAzx1OgZDkeyK+Re/eWT3tNbcdfcjIYv2o90Xzwh0hOR617IhUd+asScFaVIwq+qz pF73bPQgAIzETYR26WG/BA2wTcH3d0aY4o3Hd/J6joYc54HoPsUxI5Cb+THFgLLD/lDt rBhcqj4vaPWXNVTp71aEyWtEb+aW5StXrg8SM+SfZ4lyv5MTsGWQdJSrMZfPdszw9K2l DLJJ9WA16+Rby4vN6T7rtHvXIWW08WkKGbBqPKgs/CQPT7ZQ3OZv3Wvs5oYNmJV4xk91 SyEM3sUYttIeRqWc+86FWdG37iqPAqoxsRiefZivYG7WxsoeZyUptv92PgIrJkMfq3J3 /CIw== ARC-Message-Signature: i=1; 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index 7f3a93efa928..1997e1460e18 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -20,7 +20,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL0_OUT_ODD, @@ -51,7 +50,6 @@ static const struct parent_map video_cc_parent_map_0[] = { { P_VIDEO_PLL0_OUT_MAIN, 1 }, { P_VIDEO_PLL0_OUT_EVEN, 2 }, { P_VIDEO_PLL0_OUT_ODD, 3 }, - { P_CORE_BI_PLL_TEST_SE, 4 }, }; static const struct clk_parent_data video_cc_parent_data_0[] = { @@ -59,7 +57,6 @@ static const struct clk_parent_data video_cc_parent_data_0[] = { { .hw = &video_pll0.clkr.hw }, { .name = "video_pll0_out_even" }, { .name = "video_pll0_out_odd" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { @@ -81,7 +78,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", .parent_data = video_cc_parent_data_0, - .num_parents = 5, + .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, },