From patchwork Tue Mar 30 07:09:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunus Bas X-Patchwork-Id: 413125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E8DAC433E2 for ; Tue, 30 Mar 2021 07:24:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3A49A61996 for ; Tue, 30 Mar 2021 07:24:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231138AbhC3HXv (ORCPT ); Tue, 30 Mar 2021 03:23:51 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:45720 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231426AbhC3HXe (ORCPT ); Tue, 30 Mar 2021 03:23:34 -0400 X-Greylist: delayed 903 seconds by postgrey-1.27 at vger.kernel.org; Tue, 30 Mar 2021 03:23:34 EDT DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a1; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1617088109; x=1619680109; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=SmcnULtbRocuygQNSkUfkwTI14SkLY/pcncpocgGeNk=; b=RcVPWWYuwn66YljmUtQWfnk4hPKfNK2BOvIpWlSQPGKvH4Sdj2g+XAcBtI6wjHN4 Np0fzNUKMGmHGybIK5PUF1pEqFRbSzG3dukCwsJx7KBSp2Ykz4aSjzO6JPeBBWJN ViulTVmopYOptpQ8h2JMJlYY8evh95+WHuQH5ZeiFBM=; X-AuditID: c39127d2-868b870000001c91-ff-6062ce6d56a2 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id E2.73.07313.D6EC2606; Tue, 30 Mar 2021 09:08:29 +0200 (CEST) Received: from lws-ybas.phytec.de ([172.16.21.122]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021033009082926-261598 ; Tue, 30 Mar 2021 09:08:29 +0200 From: Yunus Bas To: dri-devel@lists.freedesktop.org, thierry.reding@gmail.com, sam@ravnborg.org Cc: devicetree@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org Subject: [PATCH 1/2] drm/panel: simple: Add support for EDT ETMV570G2DHU panel Date: Tue, 30 Mar 2021 09:09:06 +0200 Message-Id: <20210330070907.11587-1-y.bas@phytec.de> X-Mailer: git-send-email 2.30.0 MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 30.03.2021 09:08:29, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 30.03.2021 09:08:29 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrILMWRmVeSWpSXmKPExsWyRoCBSzf3XFKCwfb5yha9504yWfzfNpHZ Yv6Rc6wWV76+Z7No3XuE3WLFz62MFj93zWNxYPfY+20Bi8fOWXfZPTat6mTz2P7tAavH/e7j TB5Lpl1l8/i8SS6APYrLJiU1J7MstUjfLoEr4/ye7UwFT8Uqui+0MDUwPhHqYuTkkBAwkfjz ZB0TiC0ksI1RYs899S5GLiD7PKPEoQNPwRJsAooS52+/ZQWxRQT8JTbcXssOYjMLhErcmbAd rEZYwE/i8vlPLCA2i4CqxMaNB8BsXqAFB25+ZoZYJi9xcu1hJoi4oMTJmU9YQJZJCFxhlFj9 /SdUkZDE6cVnmSEWaEssW/iaeQIj3ywkPbOQpBYwMq1iFMrNTM5OLcrM1ivIqCxJTdZLSd3E CAzWwxPVL+1g7JvjcYiRiYPxEKMEB7OSCK/wgcQEId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rwb eEvChATSE0tSs1NTC1KLYLJMHJxSDYwKsx/4qh0+LbrSuuSZQ1bJmg3J+u4Kx6eeqfM95N37 J2R/ROanT3OzzDJt7drZ5sgzFc10Yw6Iveictek5e9LUkJTc8B7LgJTXIQfYri0LunOX88Lj 41+mHWOX/3Zu4zWZVr+TAtr/XfW2N+39esvyamJlpWOL3AfJTW0nZrF/8oo5H+YxU1eJpTgj 0VCLuag4EQCekH8sRAIAAA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Stefan Riedmueller This patch adds support for the EDT ETMV570G2DHU 5.7" (640x480) lcd panel to DRM simple panel driver. Signed-off-by: Stefan Riedmueller Signed-off-by: Yunus Bas --- .../bindings/display/panel/panel-simple.yaml | 3 ++ drivers/gpu/drm/panel/panel-simple.c | 29 +++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 62b0d54d87b7..57be1fa39728 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -114,6 +114,9 @@ properties: - edt,etm043080dh6gp # Emerging Display Technology Corp. 480x272 TFT Display - edt,etm0430g0dh6 + # Emerging Display Technology Corp. 5.7" VGA TFT LCD panel with + # capacitive touch + - edt,etmv570g2dhu # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch # Same as ETM0700G0DH6 but with inverted pixel clock. - edt,etm070080bdh6 diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 4e2dad314c79..283c17a75376 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1926,6 +1926,32 @@ static const struct panel_desc edt_et057090dhu = { .connector_type = DRM_MODE_CONNECTOR_DPI, }; +static const struct drm_display_mode edt_etmv570g2dhu_mode = { + .clock = 25175, + .hdisplay = 640, + .hsync_start = 640, + .hsync_end = 640 + 16, + .htotal = 640 + 16 + 30 + 114, + .vdisplay = 480, + .vsync_start = 480 + 10, + .vsync_end = 480 + 10 + 3, + .vtotal = 480 + 10 + 3 + 35, + .flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC, +}; + +static const struct panel_desc edt_etmv570g2dhu = { + .modes = &edt_etmv570g2dhu_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 115, + .height = 86, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct drm_display_mode edt_etm0700g0dh6_mode = { .clock = 33260, .hdisplay = 800, @@ -4226,6 +4252,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "edt,et057090dhu", .data = &edt_et057090dhu, + }, { + .compatible = "edt,etmv570g2dhu", + .data = &edt_etmv570g2dhu, }, { .compatible = "edt,et070080dh6", .data = &edt_etm0700g0dh6, From patchwork Tue Mar 30 07:09:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunus Bas X-Patchwork-Id: 411884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 567E2C433E0 for ; Tue, 30 Mar 2021 07:24:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0ECE361999 for ; Tue, 30 Mar 2021 07:24:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231206AbhC3HXv (ORCPT ); Tue, 30 Mar 2021 03:23:51 -0400 Received: from mickerik.phytec.de ([195.145.39.210]:45724 "EHLO mickerik.phytec.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230436AbhC3HXr (ORCPT ); Tue, 30 Mar 2021 03:23:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a1; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1617088109; x=1619680109; h=From:Sender:Reply-To:Subject:Date:Message-Id:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=jt+/S3UrL+Gkr+sv4rTAeuYQp6C5y4tCuV4BT5eP5Gk=; b=W5LJtocW+YJjUel0OzIYCrYnmFdjUO/95Uzoc4OvoAsta2aIYC3SH4XNyyXN3PQh 96fJSz6WnjX8GzPDnFMYZ+w8wff1nmrD6eJ8z6lQ47wub5qA2WhFY2ZWzRowtSP4 MCQ2T+3ddcSjuYAOvKkU5mucfJjV+p1Mzbeqp874Ylo=; X-AuditID: c39127d2-85cb770000001c91-00-6062ce6d3b8a Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 63.73.07313.D6EC2606; Tue, 30 Mar 2021 09:08:29 +0200 (CEST) Received: from lws-ybas.phytec.de ([172.16.21.122]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021033009082952-261599 ; Tue, 30 Mar 2021 09:08:29 +0200 From: Yunus Bas To: dri-devel@lists.freedesktop.org, thierry.reding@gmail.com, sam@ravnborg.org Cc: devicetree@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org Subject: [PATCH 2/2] drm/panel: simple: Add support for EDT ETM0350G0DH6 panel Date: Tue, 30 Mar 2021 09:09:07 +0200 Message-Id: <20210330070907.11587-2-y.bas@phytec.de> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210330070907.11587-1-y.bas@phytec.de> References: <20210330070907.11587-1-y.bas@phytec.de> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 30.03.2021 09:08:29, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 30.03.2021 09:08:29 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFLMWRmVeSWpSXmKPExsWyRoCBSzf3XFKCwcGVeha9504yWfzfNpHZ Yv6Rc6wWV76+Z7No3XuE3WLFz62MFj93zWNxYPfY+20Bi8fOWXfZPTat6mTz2P7tAavH/e7j TB5Lpl1l8/i8SS6APYrLJiU1J7MstUjfLoEr482E+0wF98Uq5r28xtLA+ESoi5GTQ0LAROLE vW9MXYxcHEIC2xgl7r18wwzhnGeU2Pj6DytIFZuAosT522/BbBEBf4kNt9eyg9jMAqESdyZs ZwKxhQX8JNo2nQaLswioSlzfcJ0ZxOYF2nDl7WYmiG3yEifXHgazOQVMJZ4veMUCYgsB1ayd 2cEKUS8ocXLmExaQIyQErjBKrP7+kxmiWUji9OKzzBCLtSWWLXzNPIFRYBaSnllIUgsYmVYx CuVmJmenFmVm6xVkVJakJuulpG5iBIb34Ynql3Yw9s3xOMTIxMF4iFGCg1lJhFf4QGKCEG9K YmVValF+fFFpTmrxIUZpDhYlcd4NvCVhQgLpiSWp2ampBalFMFkmDk6pBkbjs7UWf98Uftle Pvlf5pln2np+PjtN71THepgl/n8Z/IZ9kq31C7NFaw7ukPG3XPzuXh0jw7l9pvKH0n9LKORt ntFSmdFow82/XHXuzUzHW9JvuBhNQlIntXbHfshXs3t6fEZVRKXx7tRIH7m+fP3319Jf2W4v 2f/WJv7mveLyaaVBBZ4uH5RYijMSDbWYi4oTAXxI7MZdAgAA Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Stefan Riedmueller This patch adds support for the EDT ETM0350G0DH6 3.5" (320x240) lcd panel to DRM simple panel driver. Signed-off-by: Stefan Riedmueller Signed-off-by: Yunus Bas --- .../bindings/display/panel/panel-simple.yaml | 3 ++ drivers/gpu/drm/panel/panel-simple.c | 29 +++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 57be1fa39728..9a6b42f911d1 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -107,6 +107,9 @@ properties: - dlc,dlc1010gig # Emerging Display Technology Corp. 3.5" QVGA TFT LCD panel - edt,et035012dm6 + # Emerging Display Technology Corp. 3.5" WVGA TFT LCD panel with + # capacitive multitouch + - edt,etm0350g0dh6 # Emerging Display Technology Corp. 5.7" VGA TFT LCD panel - edt,et057090dhu - edt,et070080dh6 diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 283c17a75376..70c25f6e642b 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1847,6 +1847,32 @@ static const struct panel_desc edt_et035012dm6 = { .bus_flags = DRM_BUS_FLAG_DE_LOW | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE, }; +static const struct drm_display_mode edt_etm0350g0dh6_mode = { + .clock = 6520, + .hdisplay = 320, + .hsync_start = 320 + 20, + .hsync_end = 320 + 20 + 68, + .htotal = 320 + 20 + 68, + .vdisplay = 240, + .vsync_start = 240 + 4, + .vsync_end = 240 + 4 + 18, + .vtotal = 240 + 4 + 18, + .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, +}; + +static const struct panel_desc edt_etm0350g0dh6 = { + .modes = &edt_etm0350g0dh6_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 70, + .height = 53, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct drm_display_mode edt_etm043080dh6gp_mode = { .clock = 10870, .hdisplay = 480, @@ -4243,6 +4269,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "edt,et035012dm6", .data = &edt_et035012dm6, + }, { + .compatible = "edt,etm0350g0dh6", + .data = &edt_etm0350g0dh6, }, { .compatible = "edt,etm043080dh6gp", .data = &edt_etm043080dh6gp,