From patchwork Thu Mar 25 11:11:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408777 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430263jai; Thu, 25 Mar 2021 04:12:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxUpxbXizuyYkKhQY/sp5OMXa2Yu+jEaOzdZHRM4KQdD14HQc5ot1nMwlc4YMjz3Lly7ZNy X-Received: by 2002:a17:906:110d:: with SMTP id h13mr8880756eja.357.1616670750433; Thu, 25 Mar 2021 04:12:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670750; cv=none; d=google.com; s=arc-20160816; b=KvEqE749zjcRhAJmDf2zlXWCL6OvsnGKfHVvMv7sJ/WZmcbj/d4c55XDJkpQvn8rwi wO/bNIlrMX7ZKXEmc+t4oScxcSoMR5i/xK4C/R/UNpw/VV3fxNNw/ZPl8MohcqPxhsN2 XvDrI6bQSeV4tSIGBG5q+e+RSbYl1Cu4iTSKGu5aWircA4K0RkGrbaUQ1LmPtWugwQiE kcOGXDAMk11YHpknIvCN2fQofbnVXuekvTHohHQ5FKDbByBA829DtoxRqXrd4Qb8A6OO nIaH7IKUN1lJbN9wfW5HZkTZ0pj/jXyE04fmDKkkoUTu9/8WasN/PYrTlWBWkygHWj19 br/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xZREofHrKR5d8VoYsbC5q5FAdkVvzXXQxtWXdVEK1w0=; b=bjR1tmvznGCul50keyZe5NADVPqCnsLRW751QMczxTaG539lRs6z+93ruzo/LXIOIz 8kJqyrry4raoRaYL3z1aUV0LVt6WYLLhcBPxlOWerR/gCydqabs+nweZ+qKNzU872pRa tJnqke81jBqomB488LTAHl2F36SP/mBG8lSOgJ7o0tCYp7AIKlG3maYd2FI2Fmhh3p2Z 9zeFhzCd27BP70FBnCWlK+77hcfHV41uGKjD8NApdavPTwrGRRUQmUphp5Wzswagmprf fuHR0nSn2sYLKnfdWugIOIfBqSh6TMa2+b3if5AY35Kwv677938Q5vdABTU0uNEyIyzh nCBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Fd4t2AI8; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sc7180.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 Reviewed-by: Taniya Das diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c index f487515701e3..3334bf9cfb94 100644 --- a/drivers/clk/qcom/dispcc-sc7180.c +++ b/drivers/clk/qcom/dispcc-sc7180.c @@ -19,8 +19,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_EVEN, P_DISP_CC_PLL0_OUT_MAIN, P_DP_PHY_PLL_LINK_CLK, From patchwork Thu Mar 25 11:11:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408774 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430210jai; Thu, 25 Mar 2021 04:12:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxiWghBSQIdODRTHBV4mEhHXEA/Vr+VYttV1jMTminSqGZN6ffx4GXlahxISHWtkeUJ7TaW X-Received: by 2002:a17:906:24c7:: with SMTP id f7mr8580352ejb.473.1616670748078; Thu, 25 Mar 2021 04:12:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670748; cv=none; d=google.com; s=arc-20160816; b=dZ8h2DoAF7OaA5wHnRHXJquXrII85sbQHaxg09KTzj1VjrS/ROdtdMXwX72NCtnhFo CVSQmgNFmXZZGQz44nHG+SHPqF/wq+/lMdxiwvGMZhvr+OAgGuIbh4jOxyqvUhQD8Wvh GAA4UFXi7NnJvj0fd3uTYzqm2+QpzfsS6hjeqETr/XZzhKM/3tynZ9cO04YkNKlAEkn2 qyLeqbMfxA97Bfdr+SOip5FltFlbSiIjudgqU1SaNbzOq4H+273PW4OJRL3daifIew14 BnMNgdFxTYMcKkWlJ5SRSagF3Tywcm2mPlVCkkjhigihOxIeJ9h2p03fXfLvIx/Mt79n gGJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r9B4hH0XQcWzr0ChjxI/N+85fa5tVGRkG7jorPots9g=; b=Ppk+VHpabRoOvAnlZzEldNb6f9p8Cov+q41CXJgeBYcxO7Sw4mHEOSAd+q2P1y3dc/ TsDFFHYrxUKqzyULGDtuNkjt9w870ELCBqu8eXy1/8RfL2IY8ir/Mh2s0SGVt8US7XQT GLtcNT9kHHlV4cX6ILU/uZb726udpNcBebJTL9Ms0ZICKMoDER/kLtdve6IBiWQ8j4Qg 9VDicfoLJ3Eoyju7YFL3w70OVM1iujDfSIFolEm5tJU/bv0tR/8Fs4yIkV7Fxsdglwmp g4j/Ec2HEqmwy5wWPXTcWy4tpQNW/taLfsT2NQzCwH12a1K8DgTGeJs9GFIAVU5Y7OI+ s16w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YhAG7IPz; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 8 -------- 1 file changed, 8 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 588575e1169d..86275814e055 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -21,23 +21,15 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DISP_CC_PLL1_OUT_EVEN, P_DISP_CC_PLL1_OUT_MAIN, P_DP_PHY_PLL_LINK_CLK, P_DP_PHY_PLL_VCO_DIV_CLK, - P_DPTX1_PHY_PLL_LINK_CLK, - P_DPTX1_PHY_PLL_VCO_DIV_CLK, - P_DPTX2_PHY_PLL_LINK_CLK, - P_DPTX2_PHY_PLL_VCO_DIV_CLK, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, P_DSI1_PHY_PLL_OUT_BYTECLK, P_DSI1_PHY_PLL_OUT_DSICLK, - P_EDP_PHY_PLL_LINK_CLK, - P_EDP_PHY_PLL_VCO_DIV_CLK, }; static struct pll_vco vco_table[] = { From patchwork Thu Mar 25 11:11:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408776 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430247jai; Thu, 25 Mar 2021 04:12:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJznbGzyy9F3B0TmPSNtMo7FCdXL+vPj1D4YZ6xzo6Q6fi5t+Bq5K4HjmozRNW1tyeWSFYU5 X-Received: by 2002:a05:6402:3592:: with SMTP id y18mr3529582edc.360.1616670749960; Thu, 25 Mar 2021 04:12:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670749; cv=none; d=google.com; s=arc-20160816; b=SazWFEWZ+9vJku5uL8i6UmV5IEPiutDdqmzVCGyM/U1hoplb+1jVsJbTv8oQHr2HuW 1lD5JdkrD0Gg+rqZlwpqEPdLS+geE9SjyiegdYrE1YfsKheA9A4OkypCwN/3IyG0Kz9b f53NCfMwmC//gp2tm8oyxNfYT2FHJAbwoqr/EbJgCpvC8+ynSIUm1SOKvY4pO6OmPfbo MYGqXs2Ohd2dyshtgBReCEQR37OBTYougcPYrqBHMfz9cIBvSNX04oZrp2m1w4CGSmG8 WwGh1znUgPUrVjwQzPE0KrTDoGvzNN0dKCIkvYJEG8+Cq+14ZEqeuUj0M57nUPcf9W2i eXHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Yw9v3FzQxmFiB5ZmaLj1VaafcFx5aWR8q2x1pRfX23w=; b=DJDvWZ99z39WynS/U8yU1fOYpvNbs/wmiDd9HYBGo0Zf945uyNRKtWQU8ZC3cBGswD i+QinVv5px+UEYBw17aDuq/JTlwXomeBfvYRU9KafYBNaIT/gyar6wkHKg0FtfVEdldT b4HtarbcPMdECGq/4hwKX/+dOAOOTJe76hBmEjBqjKSr4/6m+A/b3kundaNhPE0PZwgU JKUl6twhUml1XmWR6ZB/CDNq/3kBpZNvMlUHJr76PKEBVAZzdKzf+gaIXLHQ16YLZ7js 5ri6RR0tvzznmD4QuqCbNJeWbC92j+A4G0siN6/eFID92IoGwJ0NXekFMdKMFVOKdBFc 93/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OKL0kMbz; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c index ab594a0f0c40..86626a027f6f 100644 --- a/drivers/clk/qcom/gcc-sm8250.c +++ b/drivers/clk/qcom/gcc-sm8250.c @@ -25,7 +25,6 @@ enum { P_BI_TCXO, P_AUD_REF_CLK, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL4_OUT_MAIN, From patchwork Thu Mar 25 11:11:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408778 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430618jai; Thu, 25 Mar 2021 04:12:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzjPK2IoGPBqzHRwSKfFTf6XNGHqG7cIcYTo3+q+Exafl68SFXlUZc3FV6blB2E4RyYm1Dc X-Received: by 2002:a05:6402:3122:: with SMTP id dd2mr8281733edb.253.1616670778693; Thu, 25 Mar 2021 04:12:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670778; cv=none; d=google.com; s=arc-20160816; b=x3WptOmBlEz4P1lzHxsmeYFTm/WfaEFq/v83oGhdre0MQJiX6f7MF+80yCjjuj3dgV vOhin9DSfrgZlexDM495TQMuE2xCOpUBibXpQDf5GgEZYMsoAviWfDN1dRGS/xskfjlG x5eiGHdD8rVZjT4FLtHNpJAj+2t/o6yiZg5CksGN1jZfuxsDcMo8QDohHdo28oLPgUTM tlgidrmS2Zb6HsDPb/szBSXQqLGgwc/bQemLAVipJfwFH1b3QPOJ/cjcSoPiesyydHAd XU1esHYwWDHMQwFIkLojEoi4M/xKB6iffD55Jhe55dh67EzFWiSafrfRAeBTqnKxPJZU i2rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LaVGcGxnlvWl/N60TSPqkBXVPvOJpnJu23KDJt8v/cE=; b=qc46AhORhF9EuAmy7GTUcd/xyADr0cIHHvwvxWf6PrCIlZuO47jg5sdWc+aVLnjR9I jXsGocyUT/RQuW+hvDKlv1dNfejAvuq3wjf9nt6x8UpwYcBrZY+4ow2acmp+ygOJxok0 oqy5YI/gslNvRM+zNob29YzY+Erg3C3UZEflJ3utWtIvRU5RMSspwnps5are9WLKqIH4 vTi41P0zVXUcd4GUKCZa0wgHkUQfc7mOPqw2AoJzUWl5q7+FjzNvIjsmDuZ75PRTzjgk QH7jH96u3Z+En7ZoGPX559qL/Oo0CQK0nMdl260K7EFBb7U7k6Vvb4aP7ItoBY+DutlU rWdw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=egsHgCoM; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sm8150.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sm8150.c b/drivers/clk/qcom/gpucc-sm8150.c index 27c40754b2c7..2b952f561537 100644 --- a/drivers/clk/qcom/gpucc-sm8150.c +++ b/drivers/clk/qcom/gpucc-sm8150.c @@ -21,7 +21,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL1_OUT_MAIN, From patchwork Thu Mar 25 11:11:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408780 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430644jai; Thu, 25 Mar 2021 04:13:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyB+pZdYdUul/HR1GrOICC6WTe+OVC9u0LYk2ahKBNH+szJuy4zYGj7Wnxpb6nCPjXI/A0O X-Received: by 2002:a05:6402:3122:: with SMTP id dd2mr8281938edb.253.1616670781082; Thu, 25 Mar 2021 04:13:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670781; cv=none; d=google.com; s=arc-20160816; b=0E9SN4Fz90ANCleNkCWRqYKzc9TC02Zf56dhXoS7D8Smy9S+aA5nL41Y4QXgb58vZx d6mTrofHo9d5OVu7EIvQhu4p3e1hKMMzhM7O6+Ltvu0sjXNp0mKpWkX1crYjoaWYY/WN MSqVHTBI+7R7B9JC5+3I9464ndHsrZfVSL6bOrJdnziZQJuTFnOUSVE6jw+aekbZ96jg IEWiA9UZ9gZH33TPYg58CKl/8a6WJZFKTSzAsNIMqZOmusbSdGYCm5QNv+Tn7rRJe8R8 duvDzkzt3Cn+ja7MZWl99RL1MiFNyQ4OWYHP/OewsupFLL7ELLNAo9j4gcKMupBvGHdY Q8Iw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ompL+1ESkwIQ3JYCBOzQVLg5EbIrKfFGt5UNdwB9BnE=; b=My4DhJUTMY0qAWLBjJkjTWZlfqFUkZwmgj5tsye8ai4P99e6UQgx9CZVGOKN1Jv3b0 HN+/vRNQ2+XXbfL9qtnDtw+zyzozoBhnKBoY9rgGPBusMFL+YPYT5PykVpdthm/N9suZ Q7GyHFApcr9tvuypL51Wjr+Qz085jjSmED2szI6K9PZ2yKXa3zAlszHMnM55UYIZW9Xy pKZwvns/+CTUQkOI0UEJkZbF4KDVogXF5+kWKdqGWZ8gzmxIjDTlcZm1OFtvzxLuQgKx E3C6hEtqijyyoPIiKFLruDgLXtTDQESTKatdGpVrS+GMs9qOkpZcT23PHLNBzibmPxH2 FGsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hs9teXZE; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 Reviewed-by: Taniya Das diff --git a/drivers/clk/qcom/gpucc-sm8250.c b/drivers/clk/qcom/gpucc-sm8250.c index 3fa7d1f9ff98..67c136a77efb 100644 --- a/drivers/clk/qcom/gpucc-sm8250.c +++ b/drivers/clk/qcom/gpucc-sm8250.c @@ -26,7 +26,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL0_OUT_MAIN, From patchwork Thu Mar 25 11:11:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408779 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430629jai; Thu, 25 Mar 2021 04:13:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxtVXv9vnfc3RdD4wzS4/ZgNXepceMzLgXfQABibymoXNOVUKnqD9SACUDzp+bwJsird1kG X-Received: by 2002:a05:6402:b31:: with SMTP id bo17mr8368428edb.113.1616670779903; Thu, 25 Mar 2021 04:12:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670779; cv=none; d=google.com; s=arc-20160816; b=KwXdNyikthVImaZEfLogIf5T/E+YvCzsqv/0vnJFuh5FT6PKVNmIwx9XFn6oArn05q qWrQxeGGWWPOtyvm6CyHLlFctJySM3+kqO7wSzqTEk8s2+rHAsUj2j33RVAuF7W7zsPX iDiyIjr70mRQDJEUnOEFD6aRagsZE//giR+6phf56gp8G3arXAKZ1QT+Idkd5boS/G8K LP1OPj/8/2Td3KBLcWzCshN+GiOVzeCIdIAamya3Cf9T5Olsb1KnmHfkUcYkKzP55d+1 h+dLeUvMibcWdEXZ2pKFaBlJRw8ZttFnqN8Y/c+/6z+maftMX2dB/cYAUFPC85ChKKhD 34GA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iyvnBZlTNurXEyCrPSOLE64/hPUHT0EpxducBu8pG7s=; b=FCQGfdamjkBcKg1wA5N6V7juUPrNH74gp7g297fpqwP7nZTKzUOY1iDh2DJ/xTq+4f /YmUzDIdz116+rCYLvEIC3PKtegShRBMrWfh4zKyZfqpeOFxo2aX3fyzsJVzYChJ/j40 3Fci+exUXOeSaBOefjkwCMdpOTJQFUwWy96dPD+g+yL+Tj9NTXkZsMfOp2BgA60i2ntz E2Cs6jw2jdPj0eJq6MrK1zxAy36IX2rWe4i5MmKlWfHUTKavgKqwgKIFBcGOX76i3i8L MYavcjXKuugRC8/GkgSr8SpgnsrulaYmuZ1q8RIDVuJZ6jBJm4qfsQjvyQCJakdHnBTx K+yg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vj4HF4WP; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sc7180.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 Reviewed-by: Taniya Das diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c index 276e5ecd4840..f5d04791a3cd 100644 --- a/drivers/clk/qcom/videocc-sc7180.c +++ b/drivers/clk/qcom/videocc-sc7180.c @@ -19,8 +19,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL0_OUT_ODD, From patchwork Thu Mar 25 11:11:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408783 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430685jai; Thu, 25 Mar 2021 04:13:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw55u2ExE8iL6Nx8krdoJdSyEHi2BZiH5aa3YPXI+OnBm5eSxhkWSSia3J7RAMAm6WfkuVr X-Received: by 2002:a17:906:4f02:: with SMTP id t2mr8640233eju.121.1616670783681; Thu, 25 Mar 2021 04:13:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670783; cv=none; d=google.com; s=arc-20160816; b=KqOzCfDfsigQVXakNpsdUsfAY7Nk0ztmBb6alWlx5UFPXXZIi5a0bhAPeRuMRVawIi hncqtoPWD8OilDNlgR8ttpL+jedALZHMWqgY1nNxfLk1NrAxIXn6vtEckmfDfYOhgH35 /b856G8MHf0ivTyw6sNz9LgabISqG9uT1VO4aGXz0Ihf3GeAqEH6YxtON5ESXcnzY4DZ WbYpX8ATVYeiFqEZ6ZUxGMCFvEuvLtTwTlgbvmo4j/wHfifkS/Y5Zk+t/2e+c/1h39Ek YzN/UjggGTO+yRCJ8GwiL/2lF49TpZawb9JNzj82TnQ75Iam3lRCfweb30tkgMNxyR+F /NJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NDXHpCb5h3W3+zF4OjuQq512OaSqWRquW+9LthWR0MA=; b=G4N+2chNeYPncRi23wlO3qkA4U2ycFioFJwBap9Ce3UwWQz7EXh0cOn9PWQdHdexGb 9mmMBgtOd4o8JcI+DzUrlXJxE+PGA5oP765/HTabjQxEQs/XgCWPBQfMV4Cr2vprfk7y Ibza9NAaLaH6u5ozxRNiJcXK3k3vxsWQxC3r/9diXYlrX3yz7KZSH7haQMYv+GUIDFFR oH+Xm578Et6sgQ++x+fuWk1/iR75/UDCkiN+Xob2HvP1FeE5BHmh3ib1+rPsCoGvyrJD uPFOZPDQn2yXvA0mtxYnZbTDNEUVxf5T3nARIG2phAkY7wPC4jayCc59AheT+3+rzyMz ghEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e+X49hqz; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8150.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c index 3087e2ec8fd4..de09e5456555 100644 --- a/drivers/clk/qcom/videocc-sm8150.c +++ b/drivers/clk/qcom/videocc-sm8150.c @@ -20,8 +20,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL0_OUT_ODD, From patchwork Thu Mar 25 11:11:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408782 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430679jai; Thu, 25 Mar 2021 04:13:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzHtJVqEUjctpcPP04IIlzh5Cxff7wgE6kAfNFMaTKYH86dESydtf572dpL9X20zEHXEq06 X-Received: by 2002:a17:906:8043:: with SMTP id x3mr8620245ejw.149.1616670783152; Thu, 25 Mar 2021 04:13:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670783; cv=none; d=google.com; s=arc-20160816; b=kuaV2mU891B6RIa88JfneXvM2lWjyqhTgwivfvg27g/HFmToCALiuCMt2ZWPvt+mZ+ t6X9CQD7iTx/UOgL4JA9V/4jngUU2J9fBx3XLB/3QoHF7C7Dx8U/RGtOqKr5LZUA3ztZ XctmPwbw9rYzRJXFzctoRENFzFFSvUKswuXlKwUs9qSbNVmoPU/DmsAHatHUyqMN2J9c vpCn883dTWfIp/KjGGuWO9KVKCo7GrQHa++eDnt3R4HjC3T0ElJ/9HnWv3m3F/l7qLeJ IqqMviI4sM5QKOWEXgEnOmx+Slm/Owzc7duhkvu3hVEyYKiiyCdEHra3JAn62ruWIAbf vCrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e7cDGwvCK159I/9FSrY1M64d33eVbPn2loBLKSHFDao=; b=kNFWLKBmTgI1Z9ckmaFN68cX45GvSM6ExzNyiuJaW4EsXuQ9fwyIZdIoJbuC+uZxIg 4umVoRa5aY93dBziAhjY/CLpYySVsZtX4XgNfbPVCag8yTe6R8CrxoveTBBQTUpQwhWZ IEF8W5o3c1ssFnsBLVDkAMybOEyBK/mXCug8X+8ahgXU9Os90Bx38p+xLi6RVAh7GhvQ qRSGe+2Cg0uceh8o1nZK8HywtaZiwD085l4lPtnbBl36ZbkycuLyNX/ZqyAFkrbzZm6Z c/ZvJFzjlW7Kj4LSu62WL7WzFj2CHUHvztw4LcsBM/JMm4U7dvBYkRSKXXzehC5L3+bW YAkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jtseuONb; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index b0efadc19634..06a8a2c98deb 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -21,8 +21,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL1_OUT_MAIN, }; From patchwork Thu Mar 25 11:11:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408781 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430653jai; Thu, 25 Mar 2021 04:13:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyV/Us/i9zg4zOEC+ptNQQYbr/YOIQDoMh4KT1ZroGpBb+tbvZTmMnElLq1bFE7008ywlI5 X-Received: by 2002:a05:6402:278b:: with SMTP id b11mr8443567ede.380.1616670781500; Thu, 25 Mar 2021 04:13:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670781; cv=none; d=google.com; s=arc-20160816; b=a95HNmoApn1xA7YlH8x03ANuccD3pMDiAp47TsXI/DE1TLtkEyc8aKB2voVJ1qVU7u iaICQ/DMeLLUvG+1pDtI9qcW6Ljvw5lxoX5E4Ds5DtoEvjCc42OR96BrgsDgQPZzjh5/ lO4T5MvzKMy3qjNPwVx3NwAq12kDiY99t+ZQ76PDbJKzOWThxix0xDx2Jcs+bSR3Hgk5 yZ9PCiHWx+Jo0mFeqnFLkPQEpPOVPpZATQthuvAi5BKdq84P6xYMskEVB5CoCxTz44BM F3i84UQy1hk3rNfegqcB4vJ5OqMms22R+e6id3IrWWq5hqrCBZ0jHC8BPGtriahl6T1o 33hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nFKRMT+uuLb0v0tcxrynoQiqJNSnoW1UORVuiU4smjw=; b=wdfvYxsbF8Gi7Z6XDxqEiURy8B5bi9FM9fa2OKiydVleIlOe2vEhOWRO/3ZPGAZqqd vBrd4qd0pLWH+wOrmO6lzWSZmqo6gtSl7OvI2Ipa+enNnxNSN3gUgtQ0HIao/oAEoZjH gjGqj5mtiziGG5G4uqvvwPeGOW/QYFw+R7rOnZJ2dPF81b3otNCfZquOnBiAP4YzWCVB Z5yIKzVUFFgBBj3Aw9S8mwhqvdJTOIutd9PJQz8M2IdGVu21MQ7Pxd0LcIIrok2s3KgO jBHcX4j8gpjJAPU9Zo1HqCvAN6xrRoQjpUjqEwKc0X02CnpH50drKK+MuJCBp+s5qrYX UOSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kk33QTWN; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sdm845.c | 188 ++++++++++++++++--------------- 1 file changed, 95 insertions(+), 93 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index 5c932cd17b14..bf5e8a4a0230 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -33,6 +33,21 @@ enum { P_DP_PHY_PLL_VCO_DIV_CLK, }; +static struct clk_alpha_pll disp_cc_pll0 = { + .offset = 0x0, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], + .clkr = { + .hw.init = &(struct clk_init_data){ + .name = "disp_cc_pll0", + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_fabia_ops, + }, + }, +}; + static const struct parent_map disp_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 }, @@ -40,11 +55,11 @@ static const struct parent_map disp_cc_parent_map_0[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_0[] = { - "bi_tcxo", - "dsi0_phy_pll_out_byteclk", - "dsi1_phy_pll_out_byteclk", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dsi0_phy_pll_out_byteclk", .name = "dsi0_phy_pll_out_byteclk" }, + { .fw_name = "dsi1_phy_pll_out_byteclk", .name = "dsi1_phy_pll_out_byteclk" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { @@ -54,11 +69,11 @@ static const struct parent_map disp_cc_parent_map_1[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_1[] = { - "bi_tcxo", - "dp_link_clk_divsel_ten", - "dp_vco_divided_clk_src_mux", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_1[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dp_link_clk_divsel_ten", .name = "dp_link_clk_divsel_ten" }, + { .fw_name = "dp_vco_divided_clk_src_mux", .name = "dp_vco_divided_clk_src_mux" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { @@ -66,9 +81,9 @@ static const struct parent_map disp_cc_parent_map_2[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_2[] = { - "bi_tcxo", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_2[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -79,12 +94,12 @@ static const struct parent_map disp_cc_parent_map_3[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_3[] = { - "bi_tcxo", - "disp_cc_pll0", - "gcc_disp_gpll0_clk_src", - "gcc_disp_gpll0_div_clk_src", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_3[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &disp_cc_pll0.clkr.hw }, + { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" }, + { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { @@ -94,24 +109,11 @@ static const struct parent_map disp_cc_parent_map_4[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_4[] = { - "bi_tcxo", - "dsi0_phy_pll_out_dsiclk", - "dsi1_phy_pll_out_dsiclk", - "core_bi_pll_test_se", -}; - -static struct clk_alpha_pll disp_cc_pll0 = { - .offset = 0x0, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr = { - .hw.init = &(struct clk_init_data){ - .name = "disp_cc_pll0", - .parent_names = (const char *[]){ "bi_tcxo" }, - .num_parents = 1, - .ops = &clk_alpha_pll_fabia_ops, - }, - }, +static const struct clk_parent_data disp_cc_parent_data_4[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dsi0_phy_pll_out_dsiclk", .name = "dsi0_phy_pll_out_dsiclk" }, + { .fw_name = "dsi1_phy_pll_out_dsiclk", .name = "dsi1_phy_pll_out_dsiclk" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; /* Return the HW recalc rate for idle use case */ @@ -122,7 +124,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { .parent_map = disp_cc_parent_map_0, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -137,7 +139,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { .parent_map = disp_cc_parent_map_0, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -157,7 +159,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_dp_aux_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", - .parent_names = disp_cc_parent_names_2, + .parent_data = disp_cc_parent_data_2, .num_parents = 2, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, @@ -171,7 +173,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .ops = &clk_byte2_ops, }, @@ -184,7 +186,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -198,7 +200,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, @@ -212,7 +214,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, @@ -232,7 +234,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .ops = &clk_rcg2_ops, }, @@ -246,7 +248,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .ops = &clk_rcg2_ops, }, @@ -273,7 +275,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk_src", - .parent_names = disp_cc_parent_names_3, + .parent_data = disp_cc_parent_data_3, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -287,7 +289,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { .parent_map = disp_cc_parent_map_4, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk_src", - .parent_names = disp_cc_parent_names_4, + .parent_data = disp_cc_parent_data_4, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, @@ -302,7 +304,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { .parent_map = disp_cc_parent_map_4, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk_src", - .parent_names = disp_cc_parent_names_4, + .parent_data = disp_cc_parent_data_4, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, @@ -326,7 +328,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_rot_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk_src", - .parent_names = disp_cc_parent_names_3, + .parent_data = disp_cc_parent_data_3, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -340,7 +342,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk_src", - .parent_names = disp_cc_parent_names_2, + .parent_data = disp_cc_parent_data_2, .num_parents = 2, .ops = &clk_rcg2_ops, }, @@ -381,8 +383,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -399,8 +401,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_div_clk_src", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -417,8 +419,8 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -436,8 +438,8 @@ static struct clk_branch disp_cc_mdss_byte1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -454,8 +456,8 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_div_clk_src", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -472,8 +474,8 @@ static struct clk_branch disp_cc_mdss_byte1_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_div_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -490,8 +492,8 @@ static struct clk_branch disp_cc_mdss_dp_aux_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_aux_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_aux_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -508,8 +510,8 @@ static struct clk_branch disp_cc_mdss_dp_crypto_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_crypto_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_crypto_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -526,8 +528,8 @@ static struct clk_branch disp_cc_mdss_dp_link_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_link_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -545,8 +547,8 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_link_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_branch2_ops, @@ -562,8 +564,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_pixel1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_pixel1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -580,8 +582,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_pixel_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_pixel_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -598,8 +600,8 @@ static struct clk_branch disp_cc_mdss_esc0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_esc0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_esc0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -616,8 +618,8 @@ static struct clk_branch disp_cc_mdss_esc1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_esc1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_esc1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -634,8 +636,8 @@ static struct clk_branch disp_cc_mdss_mdp_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_mdp_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -652,8 +654,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_lut_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_mdp_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_branch2_ops, @@ -670,8 +672,8 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_pclk0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -689,8 +691,8 @@ static struct clk_branch disp_cc_mdss_pclk1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_pclk1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_pclk1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -707,8 +709,8 @@ static struct clk_branch disp_cc_mdss_rot_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_rot_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_rot_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -738,8 +740,8 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rscc_vsync_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_vsync_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -756,8 +758,8 @@ static struct clk_branch disp_cc_mdss_vsync_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_vsync_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Thu Mar 25 11:11:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408786 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430718jai; Thu, 25 Mar 2021 04:13:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxs9SLA74od4HIQGoZu6V62foLdbdG3DzBJTfX7D1oSg5iVaAe+5kNhRUSE5+YSQMQ9/tv6 X-Received: by 2002:a17:906:2504:: with SMTP id i4mr8847072ejb.115.1616670786689; Thu, 25 Mar 2021 04:13:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670786; cv=none; d=google.com; s=arc-20160816; b=K2yzUopPpJTdS1HquOzU+xi6yyh16gQxAAVUlMBFwE7+mOZ3EvHVQq2u/UNio1Rm2/ uJrPJV4jOazNF8tGmEUwwH8KQ2PITU4of0YzH+vHRhtMWOd26mvRo8kewlEeT1s7Gvbk +IZya+502hJPlHAX7nxOJmPjPagGfrEouaWVIW79R3+dm7ctUggZad+hIqvT3XKulTJJ XW+Ic3a42WELPxWNRo96/zgoBaibwbKZdjqpucrF6gWZ2xNOdfqAo/g9sRFrFZ/ZzStZ PGoC/RYRYskBhJXwEVp5+kBRVAoH63QpFXmHExLRkFwHh465s2trcOO/K1Vese1rW/6t YXjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PdrYj3VEfoKs37S4vt+lSgqRqm7gvPJV0IcgSzyglyQ=; b=frQId1z8PDdvJ6sV7bEVSSaVtSCEwTjiaX1soS7LolS74Mi00UBTEJgGynPaAXTNxS odahVc1aUi+pSxJ4vlOw3tjt9BDOacTg/HhPbj0/TQ1uZlRzIgzBXWohghWyk1Namcn7 GVxsvWhei5Wgp4M/TVaP54cXK5F/EtLemM7Tr34E9+BwZjui19eefD984uqz+mEnVr8Y EauI2cQIjvHmJCy14d6Pwy4xUomrnCNlgp90uAeq/XWzuZB8ebS9iy5eCUWIYck/PvM+ jZ10tNFrfSOjk3c7mCVMSmr63DBDoVUAQphijcQkZcBs/IpEs3ls4kwHObXzZnevEqNY Qa5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oEj0Zs4I; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 42 +++++++++++++++++---------------- 1 file changed, 22 insertions(+), 20 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 5663698b306b..2d637b113ac8 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -35,22 +35,6 @@ enum { P_GPU_CC_PLL1_OUT_ODD, }; -static const struct parent_map gpu_cc_parent_map_0[] = { - { P_BI_TCXO, 0 }, - { P_GPU_CC_PLL1_OUT_MAIN, 3 }, - { P_GPLL0_OUT_MAIN, 5 }, - { P_GPLL0_OUT_MAIN_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, -}; - -static const char * const gpu_cc_parent_names_0[] = { - "bi_tcxo", - "gpu_cc_pll1", - "gcc_gpu_gpll0_clk_src", - "gcc_gpu_gpll0_div_clk_src", - "core_bi_pll_test_se", -}; - static const struct alpha_pll_config gpu_cc_pll1_config = { .l = 0x1a, .alpha = 0xaab, @@ -62,13 +46,31 @@ static struct clk_alpha_pll gpu_cc_pll1 = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll1", - .parent_names = (const char *[]){ "bi_tcxo" }, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, .num_parents = 1, .ops = &clk_alpha_pll_fabia_ops, }, }, }; +static const struct parent_map gpu_cc_parent_map_0[] = { + { P_BI_TCXO, 0 }, + { P_GPU_CC_PLL1_OUT_MAIN, 3 }, + { P_GPLL0_OUT_MAIN, 5 }, + { P_GPLL0_OUT_MAIN_DIV, 6 }, + { P_CORE_BI_PLL_TEST_SE, 7 }, +}; + +static const struct clk_parent_data gpu_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &gpu_cc_pll1.clkr.hw }, + { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, + { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = "gcc_gpu_gpll0_div_clk_src" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, +}; + static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0), @@ -84,7 +86,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .freq_tbl = ftbl_gpu_cc_gmu_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gpu_cc_gmu_clk_src", - .parent_names = gpu_cc_parent_names_0, + .parent_data = gpu_cc_parent_data_0, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -98,8 +100,8 @@ static struct clk_branch gpu_cc_cx_gmu_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gpu_cc_cx_gmu_clk", - .parent_names = (const char *[]){ - "gpu_cc_gmu_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &gpu_cc_gmu_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Thu Mar 25 11:11:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408784 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430705jai; Thu, 25 Mar 2021 04:13:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzrodhU4zk9mvUH/ODF7hBTmdIcR5Ux8QtMw6gBzKgosRq7fJ6DTOyP4dcvxrzNPmH1LIJx X-Received: by 2002:a05:6402:518d:: with SMTP id q13mr8403957edd.313.1616670785258; Thu, 25 Mar 2021 04:13:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670785; cv=none; d=google.com; s=arc-20160816; b=eGUXzQWEx0J3QzpGwlvum+wGq822AM4AQ6hslv9ei5Toy2VWB+AmSI8UhDemtElmDf MSV19lxE5ADKPhvrqLdlEpGFsBvKZX7VzsZsOjENQlAMgtdXISaxEM6LuiHA8RbHWPfl IzSKtnxbllO7eXEqYvlJvhOVGXNdw7ZTH5Y14Ew1+/wNRl+BVkhkvLBcHFpv5xYnm4Zq iakDL1i6QKF/b7CzittZbtQBRZ+zElwORiI83JxyxdrgnM6tJWxve4rqJay7dpytTYbS tNFVjKCRAuacJ/48ZJ8oVDX/RAeYm1sdr7iTFTUUvpgD2Tx8JsGisWUwydSJ10NzQP5C XWUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WRdbjkyuvxdjQ/ZLpYlbOrxHP3k+OVVlBOCYuojvEgw=; b=gh82WiRlpJdNsONhRRp9JZSnNwLcGcyH3Vonqy8NygmxTBCj7OPXR5ySDBBxxxKL77 4k4SeDsTXOz2vtrcuVpSfjm8pWyr+p9fSAlSsgVFTxoI+mt8HQOk0rCjSFzgrz7ivFEw 5upv0X8jeDFoC7wgA7/oPcclCGK8PdQ5ySKL+elg6rtym3PLl+MfcS5xbt0CgsVlJ2uy KAQu8DNoKjIPv49EFgO6myB8FRDdrZQCRz5OfwIR8FXdEtDgoznFOJQsGCTp2YOOFzD3 u4d4Y0LvCjED3gkW6ryXSGfeUFhTmxzYKmx0S21Ha+ithTUGiPf+eWzVjJaYNDuD3X7U +VGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="DU8Dbv/1"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 2d637b113ac8..6f53c6b4c6ed 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -27,7 +27,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL1_OUT_EVEN, @@ -60,7 +59,6 @@ static const struct parent_map gpu_cc_parent_map_0[] = { { P_GPU_CC_PLL1_OUT_MAIN, 3 }, { P_GPLL0_OUT_MAIN, 5 }, { P_GPLL0_OUT_MAIN_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gpu_cc_parent_data_0[] = { @@ -68,7 +66,6 @@ static const struct clk_parent_data gpu_cc_parent_data_0[] = { { .hw = &gpu_cc_pll1.clkr.hw }, { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = "gcc_gpu_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { @@ -87,7 +84,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gpu_cc_gmu_clk_src", .parent_data = gpu_cc_parent_data_0, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; From patchwork Thu Mar 25 11:11:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408789 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430760jai; Thu, 25 Mar 2021 04:13:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwaEbXsNRWxfQ/MOS1kVWVUTyeIJSdziuPpTbUB+5pEeI2Flvk0ocK7L3RdkPuTdhIOLSDc X-Received: by 2002:a05:6402:13ce:: with SMTP id a14mr8464561edx.365.1616670789484; Thu, 25 Mar 2021 04:13:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670789; cv=none; d=google.com; s=arc-20160816; b=hfZEZc9dCxH6PfzXcHSYHajtUn6CIPAlhUdPr+KV5lnZQUQRgN6CZDDbfkJsUu49/9 jiSQ5DBFK2V0n/y7WPCaNYs/7WoVeeS4ITYBLlXBj4uoN5tKm9KKPrxMv+GShAcHHQZi hIPbSWKSFwe2C+fd3wRUgPF/1ZQKhF1ySF/D5+eo8kXIR3e4BKPT5twYCuY/SlpuGMB7 +Mu4Ez4MaK4SD2lS7qhFhj7gKHOT/tVYRibwPeGE5UUAjCih+NxSm/TYkhOalJBZPV1F EdxXlXFxtI71pHtjWVaaSXMIl2xotKxKJjSdE3M7K/6p5nw2HFATCoo+W/CZb7a7PYaz P2pQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vlFFAnWw2oQS6KQuBOzl9VFGrwAtxCUu1GQdT8KGelI=; b=0ujywVQDq9vPpsiXtlZzxxf18ugU7OlI/dqRyQ7uTPmGIoZmkEIp53PBD7vKVGzOT+ 4xlxE9qaUvX3N752DfAsehuXJ1BnxUxIzAMWZFxN5JGXXvUavjtAPcJ/y41p6nH3/2pv fb7W4mQodqH1dCwgqQu6Vg898WnuyL3ClQRa5nSqTu0SEZLq+K4rpkOvjhdZTAnkdAh4 3nO8FGbxMamDKrH+vp5VVGr54Njce2li4d+nPGN8S/KPFDvaDzrRhcGzWDgl10kcQrYj SI/iIqAQttWlXjfVWG7t9HYVBLAUZNWx9qW4qAeVbRZpZ30KFs+CQbr095dsaZXEJM04 uIpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q2FtlHyq; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sdm845.c | 39 ++++++++++++-------------------- 1 file changed, 14 insertions(+), 25 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index bf5e8a4a0230..195cecf9f294 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -21,7 +21,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, @@ -52,38 +51,32 @@ static const struct parent_map disp_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 }, { P_DSI1_PHY_PLL_OUT_BYTECLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_byteclk", .name = "dsi0_phy_pll_out_byteclk" }, { .fw_name = "dsi1_phy_pll_out_byteclk", .name = "dsi1_phy_pll_out_byteclk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { { P_BI_TCXO, 0 }, { P_DP_PHY_PLL_LINK_CLK, 1 }, { P_DP_PHY_PLL_VCO_DIV_CLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_1[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dp_link_clk_divsel_ten", .name = "dp_link_clk_divsel_ten" }, { .fw_name = "dp_vco_divided_clk_src_mux", .name = "dp_vco_divided_clk_src_mux" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { { P_BI_TCXO, 0 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_2[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -91,7 +84,6 @@ static const struct parent_map disp_cc_parent_map_3[] = { { P_DISP_CC_PLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_MAIN, 4 }, { P_GPLL0_OUT_MAIN_DIV, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_3[] = { @@ -99,21 +91,18 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = { { .hw = &disp_cc_pll0.clkr.hw }, { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" }, { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, { P_DSI1_PHY_PLL_OUT_DSICLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_4[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_dsiclk", .name = "dsi0_phy_pll_out_dsiclk" }, { .fw_name = "dsi1_phy_pll_out_dsiclk", .name = "dsi1_phy_pll_out_dsiclk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; /* Return the HW recalc rate for idle use case */ @@ -125,7 +114,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -140,7 +129,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -160,7 +149,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", .parent_data = disp_cc_parent_data_2, - .num_parents = 2, + .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, }, @@ -174,7 +163,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .ops = &clk_byte2_ops, }, }; @@ -187,7 +176,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -201,7 +190,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, }, @@ -215,7 +204,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, }, @@ -235,7 +224,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .ops = &clk_rcg2_ops, }, }; @@ -249,7 +238,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .ops = &clk_rcg2_ops, }, }; @@ -276,7 +265,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk_src", .parent_data = disp_cc_parent_data_3, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; @@ -290,7 +279,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk_src", .parent_data = disp_cc_parent_data_4, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, }, @@ -305,7 +294,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk_src", .parent_data = disp_cc_parent_data_4, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, }, @@ -329,7 +318,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk_src", .parent_data = disp_cc_parent_data_3, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; @@ -343,7 +332,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk_src", .parent_data = disp_cc_parent_data_2, - .num_parents = 2, + .num_parents = 1, .ops = &clk_rcg2_ops, }, }; From patchwork Thu Mar 25 11:11:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408785 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430710jai; Thu, 25 Mar 2021 04:13:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzDfz/5qY/9WQZZaQ34JhX+gPAXFuYmhHO5Byb7/2xVrydUx068nWwlmvsYBogWWz+yQV6p X-Received: by 2002:a17:906:170f:: with SMTP id c15mr8714132eje.358.1616670785833; Thu, 25 Mar 2021 04:13:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670785; cv=none; d=google.com; s=arc-20160816; b=hUWhXiPaUqxxvrFZvcVjKQtMTacxwptHWLrJLufc+4F6t7X8VVyuM24Lpcn514Ub6s 4nzlRrZF37Mxd0K+up3NjIeWhCTCWQ7FYL3ywIRVeu2/vboI5FuWsFFZ6RAl+Q0ibE9x rtztXzB5UTXfzD06AI+jHOdHjK1dG6vIVCIEALnDsOPk87jrXDG1UrL2XlTFtvWMsP2+ mxD/uwK2meRTfqMU+5QCLznyn3LT/CNloFKaEJAqM67WPN+Da2I05NHpYHcqVRS3IIq5 6Js+9P3vA85246Tz7HJxYXctkTTAB+NzQ1WfYVU5V7TvKfiuFQYMM7DTv7qKcQmf8s/2 BeKw== ARC-Message-Signature: i=1; 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index 5d6a7724a194..7153f044504f 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -21,24 +21,18 @@ enum { P_BI_TCXO, P_CORE_BI_PLL_TEST_SE, - P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, - P_VIDEO_PLL0_OUT_ODD, }; static const struct parent_map video_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_VIDEO_PLL0_OUT_MAIN, 1 }, - { P_VIDEO_PLL0_OUT_EVEN, 2 }, - { P_VIDEO_PLL0_OUT_ODD, 3 }, { P_CORE_BI_PLL_TEST_SE, 4 }, }; static const char * const video_cc_parent_names_0[] = { "bi_tcxo", "video_pll0", - "video_pll0_out_even", - "video_pll0_out_odd", "core_bi_pll_test_se", }; @@ -79,7 +73,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", .parent_names = video_cc_parent_names_0, - .num_parents = 5, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, }, From patchwork Thu Mar 25 11:11:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 408788 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp430742jai; Thu, 25 Mar 2021 04:13:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwOPVaYB7CAALQMwUfDW9Wjf+WHpjaPqFY8f21CWO3tcKByQMaqwFhHuGCcS/sFEeVW+ncA X-Received: by 2002:a05:6402:32a:: with SMTP id q10mr8370969edw.15.1616670788460; Thu, 25 Mar 2021 04:13:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616670788; cv=none; d=google.com; s=arc-20160816; b=ulgPKTv67VjcQ+GtViKV51ZsVmW1xEaLcyeu8n765TMM+g1OUXcie3SHLN5Z0ngC6f Hns8aqN56j5CvCkRtPbW8mi4PDdXuZgBQRUlskP+pX1ZzYylTbC1UL4YYRIqtROwqe+k FgLADCN/oA/TNwcoZJpq1joUcweqZIM2bIAuTy5F47wIutAF4mJj+mK6KngjZIUa1gTh xmHwigucPrkGxsgd01GUbPeSVEjU63UcPvaKuHqZkE90qtZ98f6HWG7zPPy56VQTdUit 4EQM5H3ZBppbtKISwTowXCF+73ElBqccFX6vD6vCbETgFBdpvgEyaRRVjLYx4J+8GRz2 J13A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=VMEzD124xLe49unMX5TAa2m3h8cRgc8nhb5nDmCHgWc=; b=mnRkzwWeLx/sEI/VN/ZF6SSEuzTruJz2EJOXNNp9DmCprKrncKq19DykY9xMf44BK7 I0jzTQz3maGRR0YAJaYU3yszPhjncEvdpMhra0WQv1VXAls0OF/qFldiSB4PrOjwHv8K ikzhrJXphTum9oJc+YrCsHdoOO1GLMoFMC/lzLwlW4JcqnNvoiExSto1cFGV1m4AIOGB e8A8NOLT8PKkhnZFd/AIzU2W+CIJh1qToWy5WYhRZ7AeHHJEM1+gji2R4S2jWqJkImQF IIcxUnqQSJbESgY+qfxbybn/76e5+0YYKShUx1B9/d9IWtZxELOQ45uKE9H/VxEFtEV0 tFag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=od2V9W8W; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 42 ++++++++++++++++--------------- 1 file changed, 22 insertions(+), 20 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index 7153f044504f..c8e9a4153b74 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -24,18 +24,6 @@ enum { P_VIDEO_PLL0_OUT_MAIN, }; -static const struct parent_map video_cc_parent_map_0[] = { - { P_BI_TCXO, 0 }, - { P_VIDEO_PLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 4 }, -}; - -static const char * const video_cc_parent_names_0[] = { - "bi_tcxo", - "video_pll0", - "core_bi_pll_test_se", -}; - static const struct alpha_pll_config video_pll0_config = { .l = 0x10, .alpha = 0xaaab, @@ -47,13 +35,27 @@ static struct clk_alpha_pll video_pll0 = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "video_pll0", - .parent_names = (const char *[]){ "bi_tcxo" }, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, .num_parents = 1, .ops = &clk_alpha_pll_fabia_ops, }, }, }; +static const struct parent_map video_cc_parent_map_0[] = { + { P_BI_TCXO, 0 }, + { P_VIDEO_PLL0_OUT_MAIN, 1 }, + { P_CORE_BI_PLL_TEST_SE, 4 }, +}; + +static const struct clk_parent_data video_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &video_pll0.clkr.hw }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, +}; + static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0), F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0), @@ -72,7 +74,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .freq_tbl = ftbl_video_cc_venus_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", - .parent_names = video_cc_parent_names_0, + .parent_data = video_cc_parent_data_0, .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, @@ -152,8 +154,8 @@ static struct clk_branch video_cc_vcodec0_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_vcodec0_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -183,8 +185,8 @@ static struct clk_branch video_cc_vcodec1_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_vcodec1_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -227,8 +229,8 @@ static struct clk_branch video_cc_venus_ctl_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_venus_ctl_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Thu Mar 25 11:11:44 2021 Content-Type: text/plain; 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[23.128.96.18]) by mx.google.com with ESMTP id c13si4085244eje.45.2021.03.25.04.13.06; Thu, 25 Mar 2021 04:13:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XITEs6fZ; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230120AbhCYLMk (ORCPT + 17 others); Thu, 25 Mar 2021 07:12:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230142AbhCYLMB (ORCPT ); Thu, 25 Mar 2021 07:12:01 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAAE6C061761 for ; Thu, 25 Mar 2021 04:11:59 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id b14so1902778lfv.8 for ; Thu, 25 Mar 2021 04:11:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DSVfYQ9ZPjA/bgLQSetVxDKJ9vsWeSggzjNMlh72HGQ=; b=XITEs6fZGgRcoc2ho2PtVJU87fCTVXlsxK09nkC+3uD5qSntkpJPAbFfw0efcsi9R3 QKtJA06M6dHH75egwfYYPYGL6LewPQh+R92EGoKeZhPhAtIKW1GCr9xyWcptCygBgklC N9B5JAgZry0rQzJW8PaGKk3w9Oy6RO1SYogGU458gj7q1iQwTtQ0RZRcsTRrQ8NeJR0u ceSJL9gBtBzvldALwAgIRLgB3d2U22XGB/WpWNtzUgSvm238Za+IhBC4Qzjcb6t8WQwe fmIRHXNvfCSP7kCDePdeiC60cP8Q0lCzSbeO4v5nEMtxyhg3MZHjGEa9BSbPS3S0IVGj JRtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DSVfYQ9ZPjA/bgLQSetVxDKJ9vsWeSggzjNMlh72HGQ=; b=ZcqPzhv3AAj23MrmgLegwBBiVEC30UTSoxiAEPhbmWXarKC0Oi/CbUlZ8sSU47vQrZ jS2xs4Vem0pvyiQW/w/OxchSB4az1Wgcsih+D8CCfYDSNju01btHaT4Fu1WV54bpTlaw sAfEjgPX2vKyDDwoFBZWEFZ/4eimgVe5QH39BEqG4QJKmb6/xSSFO4L/5DK5W9ztoziu h/FleFrwpkvJD8BpP0mmOsIQot4DavZNrcGy0OGR6vNfT9K82gwXu/EuCYCKxCXifZeH ow+ZrrJCanEiLn/34DpdQ+axUxSZCyuVUqHNuK2MggNpjZf0gOBSyT6Qx9DpmiHFb14x 2GJA== X-Gm-Message-State: AOAM531+kuiRgtBnSgDg0CE1tIOOdqszO/4tviRGtQgDAIlFNMIHnjee jGjpPptlQn/kIb/5teEoZv34Wg== X-Received: by 2002:a19:380a:: with SMTP id f10mr4601010lfa.294.1616670718266; Thu, 25 Mar 2021 04:11:58 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id t22sm715191ljj.94.2021.03.25.04.11.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 04:11:57 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Stephen Boyd Subject: [PATCH v1 15/15] clk: qcom: videocc-sdm845: get rid of the test clock Date: Thu, 25 Mar 2021 14:11:44 +0300 Message-Id: <20210325111144.2852594-16-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210325111144.2852594-1-dmitry.baryshkov@linaro.org> References: <20210325111144.2852594-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock isn't in the bindings and apparently it's not used by anyone upstream. Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index c8e9a4153b74..312097ca785d 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -20,7 +20,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_MAIN, }; @@ -47,13 +46,11 @@ static struct clk_alpha_pll video_pll0 = { static const struct parent_map video_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_VIDEO_PLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 4 }, }; static const struct clk_parent_data video_cc_parent_data_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &video_pll0.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { @@ -75,7 +72,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", .parent_data = video_cc_parent_data_0, - .num_parents = 3, + .num_parents = 2, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, },