From patchwork Wed Mar 24 21:43:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 408536 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADE73C433FC for ; Wed, 24 Mar 2021 21:45:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8AD9461A1E for ; Wed, 24 Mar 2021 21:45:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238608AbhCXVok (ORCPT ); Wed, 24 Mar 2021 17:44:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238545AbhCXVoS (ORCPT ); Wed, 24 Mar 2021 17:44:18 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C70F9C06174A; Wed, 24 Mar 2021 14:44:17 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id b7so35353126ejv.1; Wed, 24 Mar 2021 14:44:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A96CjrFMTFBzH0FBnki24YuX02XsfjoC/hVWyeOwHlQ=; b=iGfYpa2O03sy2L2GYtZoHamI20Wg7B4SG80ShHCAHUfhfJH5YwDGXXoIVIem0b2SRb 1P9GpnyVdCxrknvBx/Ko8OjFNLzjolWWdyYd27FjxmWTxbAGHVVe6tcbA+74cjDdKnB4 DerV97GYntkufIG+qZesTyCbPYzjmHICEAUq1dwX/jDu5ZqB6MC/HZxvsZe/mNQG9ZIz wGyMLMjLHM1PxT6vYg53Dfk+I46DRX0J7d8W3FI3d05BwWmjQVAKKeDntR2cmEKlbOT6 QHuUAMUYCPh1AeXa8OZHXMF+E2j6GFtD88N6CAbckmdanNLComy31iUsqcQlxQ3qneyZ XizA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A96CjrFMTFBzH0FBnki24YuX02XsfjoC/hVWyeOwHlQ=; b=HuRZykL/XwPBcJUwebsmXYdPPjF+KUtIhl6Z1Saxw3v4oQeDdhEQiy1B7+1Z3it6PJ 2sAmPNQdXWiE3ZXPWTU7hDbufO2/DLMYl162eMcSn/v3i7Arb23rOfII8KNvLB6A6ldx XBW/soDJjk49mq+IN4Bpuu5DmibLFfJZ6FVzW+Be1kh50tQlmctkPh7gdaETouurLOs0 MIfbkW5S+AAVLOCnvrDRUprmvNx0POc73D73OCZORaicY0v3eqeZoJy3jOzT3Kg7c0Li wikbf4aAeEEqxJVH75j7171t6TOvcW1lpbnkxfZBOfLTt7vD8pbMqWEpS6MO/LAxgR01 PfpQ== X-Gm-Message-State: AOAM5321JTyidIpnZgBk9h+p2gpSCVnrGZgPwWqxHYWqHa/akuITA+oi gTIFv1PF2Rp5qz5uZtUv8dk= X-Google-Smtp-Source: ABdhPJxTiXo06fuFJdBWdssTrrTa3r0lIOJ5hn1V5qlXLDFDdk8a06QYlbIOex50jYM7xGIBBUzNgQ== X-Received: by 2002:a17:907:d1b:: with SMTP id gn27mr5812551ejc.227.1616622250841; Wed, 24 Mar 2021 14:44:10 -0700 (PDT) Received: from Ansuel-xps.localdomain (host-79-34-220-97.business.telecomitalia.it. [79.34.220.97]) by smtp.googlemail.com with ESMTPSA id z9sm1871211edr.75.2021.03.24.14.44.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 14:44:10 -0700 (PDT) From: Ansuel Smith To: Thara Gopinath Cc: Ansuel Smith , Amit Kucheria , Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Rob Herring , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v13 2/9] drivers: thermal: tsens: Don't hardcode sensor slope Date: Wed, 24 Mar 2021 22:43:56 +0100 Message-Id: <20210324214404.798-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210324214404.798-1-ansuelsmth@gmail.com> References: <20210324214404.798-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Function compute_intercept_slope hardcode the sensor slope to SLOPE_DEFAULT. Change this and use the default value only if a slope is not defined. This is needed for tsens VER_0 that has a hardcoded slope table. Signed-off-by: Ansuel Smith Reviewed-by: Thara Gopinath --- drivers/thermal/qcom/tsens.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 6b582a81358f..6da567de1db7 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -86,7 +86,8 @@ void compute_intercept_slope(struct tsens_priv *priv, u32 *p1, "%s: sensor%d - data_point1:%#x data_point2:%#x\n", __func__, i, p1[i], p2[i]); - priv->sensor[i].slope = SLOPE_DEFAULT; + if (!priv->sensor[i].slope) + priv->sensor[i].slope = SLOPE_DEFAULT; if (mode == TWO_PT_CALIB) { /* * slope (m) = adc_code2 - adc_code1 (y2 - y1)/ From patchwork Wed Mar 24 21:43:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 408537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12B03C433F2 for ; Wed, 24 Mar 2021 21:45:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ED39C61A1E for ; Wed, 24 Mar 2021 21:45:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238596AbhCXVoi (ORCPT ); Wed, 24 Mar 2021 17:44:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234508AbhCXVoO (ORCPT ); Wed, 24 Mar 2021 17:44:14 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF1A6C06174A; Wed, 24 Mar 2021 14:44:13 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id w3so35342356ejc.4; Wed, 24 Mar 2021 14:44:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fu81fKlLAFW3uWu/bLxRNDUvKBG2yYeAnb3WyHS2HYs=; b=i2D9Kvc38yv1+9Yg84HLOFvIj9mFhkPa4EQeF5f2pXhvHbMBxjLllQwMPXJr4UFr/y cfI4n/BFe00XtdBB75mU84a4W4d4neWyIqhcS0GKiXU3jfJStFqi1mI7Mi2q6+6lN1qh j1J+fmiqLPot13NcFuv98Qw/vZNk3kKN6M3JwP7pkB2Yq4ei60MmlKUVAD2VVa9w8nbz N5TIgEAE9Eg0nVCIHEx2NRetF36wk4pYrsi8LbM0eoVbbWuwvdcV3jh5GeKov1RfGGqv Ix6qYpgXOCB39/8CRmalzTqb9im5rGaFrTKUKgUUCW3+XK4TNsStCkUZjJyrprCfnImR YwvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fu81fKlLAFW3uWu/bLxRNDUvKBG2yYeAnb3WyHS2HYs=; b=kQthNVpxwLT5DNlZjlStQOhpBhv31eyqx+lDXTUuqrpiKbz9XfcXXD0vGi6JNfYK/n RivZXmlGt3FdEp8BwqvHYUvq7861KPPayaWkVcYxcbMZOqqrBiZruq9tGeJjTcka4M8N eYbKZdnugLF9kHqO6lcarl33KfqzMz9lDRXefhJ8QunrDETisIf/ffR1qcAoBqn9rpxL rkRexl+8BGODLAiZnbkbUKm3RDIV6FcNQ7G6b1BJYyjbyy/vMn4U4PMsr8UogV3AwWIY azBo3TaKoowLsrKNbXqFByRUB2YwVmf3/NSDJHK0r3It2mSUBAVH7N4PnHRw5MYK14mz +Aqg== X-Gm-Message-State: AOAM532l0F6ODvtzSBdUZ9PiVz4I3M1GgFRd24EcWYl2GsN3LbeV30Ic +R0gAM8LertjH0EzHPpCKa4= X-Google-Smtp-Source: ABdhPJw1Bh3uTOzY3WJs21ahYpj3zCQzEsKR1F92diGcN0Y5rVLTdvEvatOTRqX0BfdYFVq3ERGFkQ== X-Received: by 2002:a17:907:119b:: with SMTP id uz27mr5822994ejb.464.1616622252580; Wed, 24 Mar 2021 14:44:12 -0700 (PDT) Received: from Ansuel-xps.localdomain (host-79-34-220-97.business.telecomitalia.it. [79.34.220.97]) by smtp.googlemail.com with ESMTPSA id z9sm1871211edr.75.2021.03.24.14.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 14:44:12 -0700 (PDT) From: Ansuel Smith To: Thara Gopinath Cc: Ansuel Smith , Amit Kucheria , Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Rob Herring , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v13 3/9] drivers: thermal: tsens: Convert msm8960 to reg_field Date: Wed, 24 Mar 2021 22:43:57 +0100 Message-Id: <20210324214404.798-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210324214404.798-1-ansuelsmth@gmail.com> References: <20210324214404.798-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Convert msm9860 driver to reg_field to use the init_common function. Signed-off-by: Ansuel Smith Acked-by: Thara Gopinath --- drivers/thermal/qcom/tsens-8960.c | 80 ++++++++++++++++++++++++++++++- 1 file changed, 79 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 2a28a5af209e..3f4fc1ffe679 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -51,11 +51,22 @@ #define MIN_LIMIT_TH 0x0 #define MAX_LIMIT_TH 0xff -#define S0_STATUS_ADDR 0x3628 #define INT_STATUS_ADDR 0x363c #define TRDY_MASK BIT(7) #define TIMEOUT_US 100 +#define S0_STATUS_OFF 0x3628 +#define S1_STATUS_OFF 0x362c +#define S2_STATUS_OFF 0x3630 +#define S3_STATUS_OFF 0x3634 +#define S4_STATUS_OFF 0x3638 +#define S5_STATUS_OFF 0x3664 /* Sensors 5-10 found on apq8064/msm8960 */ +#define S6_STATUS_OFF 0x3668 +#define S7_STATUS_OFF 0x366c +#define S8_STATUS_OFF 0x3670 +#define S9_STATUS_OFF 0x3674 +#define S10_STATUS_OFF 0x3678 + static int suspend_8960(struct tsens_priv *priv) { int ret; @@ -269,6 +280,71 @@ static int get_temp_8960(const struct tsens_sensor *s, int *temp) return -ETIMEDOUT; } +static struct tsens_features tsens_8960_feat = { + .ver_major = VER_0, + .crit_int = 0, + .adc = 1, + .srot_split = 0, + .max_sensors = 11, +}; + +static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = { + /* ----- SROT ------ */ + /* No VERSION information */ + + /* CNTL */ + [TSENS_EN] = REG_FIELD(CNTL_ADDR, 0, 0), + [TSENS_SW_RST] = REG_FIELD(CNTL_ADDR, 1, 1), + /* 8960 has 5 sensors, 8660 has 11, we only handle 5 */ + [SENSOR_EN] = REG_FIELD(CNTL_ADDR, 3, 7), + + /* ----- TM ------ */ + /* INTERRUPT ENABLE */ + /* NO INTERRUPT ENABLE */ + + /* Single UPPER/LOWER TEMPERATURE THRESHOLD for all sensors */ + [LOW_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 0, 7), + [UP_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 8, 15), + /* MIN_THRESH_0 and MAX_THRESH_0 are not present in the regfield + * Recycle CRIT_THRESH_0 and 1 to set the required regs to hardcoded temp + * MIN_THRESH_0 -> CRIT_THRESH_1 + * MAX_THRESH_0 -> CRIT_THRESH_0 + */ + [CRIT_THRESH_1] = REG_FIELD(THRESHOLD_ADDR, 16, 23), + [CRIT_THRESH_0] = REG_FIELD(THRESHOLD_ADDR, 24, 31), + + /* UPPER/LOWER INTERRUPT [CLEAR/STATUS] */ + /* 1 == clear, 0 == normal operation */ + [LOW_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 9, 9), + [UP_INT_CLEAR_0] = REG_FIELD(CNTL_ADDR, 10, 10), + + /* NO CRITICAL INTERRUPT SUPPORT on 8960 */ + + /* Sn_STATUS */ + [LAST_TEMP_0] = REG_FIELD(S0_STATUS_OFF, 0, 7), + [LAST_TEMP_1] = REG_FIELD(S1_STATUS_OFF, 0, 7), + [LAST_TEMP_2] = REG_FIELD(S2_STATUS_OFF, 0, 7), + [LAST_TEMP_3] = REG_FIELD(S3_STATUS_OFF, 0, 7), + [LAST_TEMP_4] = REG_FIELD(S4_STATUS_OFF, 0, 7), + [LAST_TEMP_5] = REG_FIELD(S5_STATUS_OFF, 0, 7), + [LAST_TEMP_6] = REG_FIELD(S6_STATUS_OFF, 0, 7), + [LAST_TEMP_7] = REG_FIELD(S7_STATUS_OFF, 0, 7), + [LAST_TEMP_8] = REG_FIELD(S8_STATUS_OFF, 0, 7), + [LAST_TEMP_9] = REG_FIELD(S9_STATUS_OFF, 0, 7), + [LAST_TEMP_10] = REG_FIELD(S10_STATUS_OFF, 0, 7), + + /* No VALID field on 8960 */ + /* TSENS_INT_STATUS bits: 1 == threshold violated */ + [MIN_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 0, 0), + [LOWER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 1, 1), + [UPPER_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 2, 2), + /* No CRITICAL field on 8960 */ + [MAX_STATUS_0] = REG_FIELD(INT_STATUS_ADDR, 3, 3), + + /* TRDY: 1=ready, 0=in progress */ + [TRDY] = REG_FIELD(INT_STATUS_ADDR, 7, 7), +}; + static const struct tsens_ops ops_8960 = { .init = init_8960, .calibrate = calibrate_8960, @@ -282,4 +358,6 @@ static const struct tsens_ops ops_8960 = { struct tsens_plat_data data_8960 = { .num_sensors = 11, .ops = &ops_8960, + .feat = &tsens_8960_feat, + .fields = tsens_8960_regfields, }; From patchwork Wed Mar 24 21:44:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 408535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BC01C4345A for ; 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[79.34.220.97]) by smtp.googlemail.com with ESMTPSA id z9sm1871211edr.75.2021.03.24.14.44.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 14:44:18 -0700 (PDT) From: Ansuel Smith To: Thara Gopinath Cc: Ansuel Smith , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v13 7/9] drivers: thermal: tsens: Drop unused define for msm8960 Date: Wed, 24 Mar 2021 22:44:01 +0100 Message-Id: <20210324214404.798-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210324214404.798-1-ansuelsmth@gmail.com> References: <20210324214404.798-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Drop unused define for msm8960 replaced by generic api and reg_field. Signed-off-by: Ansuel Smith Reviewed-by: Thara Gopinath --- drivers/thermal/qcom/tsens-8960.c | 24 +----------------------- 1 file changed, 1 insertion(+), 23 deletions(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 9cc8a7dd23ae..58d09e927383 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -10,8 +10,6 @@ #include #include "tsens.h" -#define CAL_MDEGC 30000 - #define CONFIG_ADDR 0x3640 #define CONFIG_ADDR_8660 0x3620 /* CONFIG_ADDR bitmasks */ @@ -21,39 +19,19 @@ #define CONFIG_SHIFT_8660 28 #define CONFIG_MASK_8660 (3 << CONFIG_SHIFT_8660) -#define STATUS_CNTL_ADDR_8064 0x3660 #define CNTL_ADDR 0x3620 /* CNTL_ADDR bitmasks */ #define EN BIT(0) #define SW_RST BIT(1) -#define SENSOR0_EN BIT(3) + #define MEASURE_PERIOD BIT(18) #define SLP_CLK_ENA BIT(26) #define SLP_CLK_ENA_8660 BIT(24) #define SENSOR0_SHIFT 3 -/* INT_STATUS_ADDR bitmasks */ -#define MIN_STATUS_MASK BIT(0) -#define LOWER_STATUS_CLR BIT(1) -#define UPPER_STATUS_CLR BIT(2) -#define MAX_STATUS_MASK BIT(3) - #define THRESHOLD_ADDR 0x3624 -/* THRESHOLD_ADDR bitmasks */ -#define THRESHOLD_MAX_LIMIT_SHIFT 24 -#define THRESHOLD_MIN_LIMIT_SHIFT 16 -#define THRESHOLD_UPPER_LIMIT_SHIFT 8 -#define THRESHOLD_LOWER_LIMIT_SHIFT 0 - -/* Initial temperature threshold values */ -#define LOWER_LIMIT_TH 0x50 -#define UPPER_LIMIT_TH 0xdf -#define MIN_LIMIT_TH 0x0 -#define MAX_LIMIT_TH 0xff #define INT_STATUS_ADDR 0x363c -#define TRDY_MASK BIT(7) -#define TIMEOUT_US 100 #define S0_STATUS_OFF 0x3628 #define S1_STATUS_OFF 0x362c From patchwork Wed Mar 24 21:44:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 408534 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D24ADC4345F for ; Wed, 24 Mar 2021 21:45:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AD61A61A1E for ; Wed, 24 Mar 2021 21:45:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238623AbhCXVom (ORCPT ); Wed, 24 Mar 2021 17:44:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238577AbhCXVoY (ORCPT ); Wed, 24 Mar 2021 17:44:24 -0400 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAEE0C06174A; Wed, 24 Mar 2021 14:44:23 -0700 (PDT) Received: by mail-ed1-x536.google.com with SMTP id l18so113077edc.9; Wed, 24 Mar 2021 14:44:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=21TRq5T7n/YlJzaiHd/rYW7/ONn9U06XAcWKZPDtNYI=; b=kF+NCah/EVPAXGmpxeftPScbCYp5REz87xSOKWqgMpHa7eWAklrqHZlsFaN1y8/4jO AVcbJ1wfXLc2/b+ytYDQ0Qu5dFHlyj+w+f6yruJW9OjDJPgKX8+yq4bIu3uoBA4i3i1U Tjm5mFinBmqHoAARKHE48JD+LUIogVRvwrEJhBgYh7PyPNhI9FQQMbjpknBgIKPWtxvb oK76ogwZ96JNAIcl+QBIa28Dd7WdTU7UDUwlG4FZhaxTn6wOkbUk2BK6WspCm15fVIMi IGjGlD5hHDGORwlbkFvjUXYUJLM7nQoZJSyq8m+Vsd4DAMuhUj9KyQLTRuNK1d2Vp/kY aqSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=21TRq5T7n/YlJzaiHd/rYW7/ONn9U06XAcWKZPDtNYI=; b=I6FcKVxAte9y2PtinI2ee9AFxkd7axTTSwO5tH3DCl5CWbUvLR7253caZAQmN/VxAx mG+YnjCFoXMvM2CW2DJLCd2boukI2E/8TuvRUmzDUKA7mjiEbd4ffP2faLmcf3K4Gh0r YK7+vcNASNzqVUdsPBwzU/vG4V9LIuAWDy7rx6bVRT+XaTZUX7ojPePmAvq487zp/moH +BLhKZ88ckSsl+5phYol02TbL+9JmkNdNIOHnPbQ6Pumrs21YBRmSoS21K2ClgN53/Um /oSpo3oavjSgHhWQRAehGvpsiLaG5g6ZWyeK4EdMmlcOq/hHjzdqK4ZYNL7BRYyGM0hC atVw== X-Gm-Message-State: AOAM5325+HEH9Jq1aDe9udhCykwU8HosaX9DoqpajHz+WVWiV42Xd2BA JnWzKM7yVoNg1YLH2zDW3cE= X-Google-Smtp-Source: ABdhPJyaTpezBnijEbWtNHFTUtQrYf2y5z/n6gFhEZlmw+gU6i6JN5lWNChqXNqExTeW6A1ECP+sjA== X-Received: by 2002:aa7:c14a:: with SMTP id r10mr5474571edp.132.1616622262403; Wed, 24 Mar 2021 14:44:22 -0700 (PDT) Received: from Ansuel-xps.localdomain (host-79-34-220-97.business.telecomitalia.it. [79.34.220.97]) by smtp.googlemail.com with ESMTPSA id z9sm1871211edr.75.2021.03.24.14.44.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 14:44:22 -0700 (PDT) From: Ansuel Smith To: Thara Gopinath Cc: Ansuel Smith , Rob Herring , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v13 9/9] dt-bindings: thermal: tsens: Document ipq8064 bindings Date: Wed, 24 Mar 2021 22:44:03 +0100 Message-Id: <20210324214404.798-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210324214404.798-1-ansuelsmth@gmail.com> References: <20210324214404.798-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Document the use of bindings used for msm8960 tsens based devices. msm8960 use the same gcc regs and is set as a child of the qcom gcc. Signed-off-by: Ansuel Smith Reviewed-by: Rob Herring --- .../bindings/thermal/qcom-tsens.yaml | 56 ++++++++++++++++--- 1 file changed, 48 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 95462e071ab4..1785b1c75a3c 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -19,6 +19,11 @@ description: | properties: compatible: oneOf: + - description: msm9860 TSENS based + items: + - enum: + - qcom,ipq8064-tsens + - description: v0.1 of TSENS items: - enum: @@ -73,7 +78,9 @@ properties: maxItems: 2 items: - const: calib - - const: calib_sel + - enum: + - calib_backup + - calib_sel "#qcom,sensors": description: @@ -88,12 +95,20 @@ properties: Number of cells required to uniquely identify the thermal sensors. Since we have multiple sensors this is set to 1 +required: + - compatible + - interrupts + - interrupt-names + - "#thermal-sensor-cells" + - "#qcom,sensors" + allOf: - if: properties: compatible: contains: enum: + - qcom,ipq8064-tsens - qcom,msm8916-tsens - qcom,msm8974-tsens - qcom,msm8976-tsens @@ -114,17 +129,42 @@ allOf: interrupt-names: minItems: 2 -required: - - compatible - - reg - - "#qcom,sensors" - - interrupts - - interrupt-names - - "#thermal-sensor-cells" + - if: + properties: + compatible: + contains: + enum: + - qcom,tsens-v0_1 + - qcom,tsens-v1 + - qcom,tsens-v2 + + then: + required: + - reg additionalProperties: false examples: + - | + #include + // Example msm9860 based SoC (ipq8064): + gcc: clock-controller { + + /* ... */ + + tsens: thermal-sensor { + compatible = "qcom,ipq8064-tsens"; + + nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; + nvmem-cell-names = "calib", "calib_backup"; + interrupts = ; + interrupt-names = "uplow"; + + #qcom,sensors = <11>; + #thermal-sensor-cells = <1>; + }; + }; + - | #include // Example 1 (legacy: for pre v1 IP):