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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id n7sm1160486ile.12.2021.03.24.06.15.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 06:15:31 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 1/6] net: ipa: reduce IPA version assumptions Date: Wed, 24 Mar 2021 08:15:23 -0500 Message-Id: <20210324131528.2369348-2-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210324131528.2369348-1-elder@linaro.org> References: <20210324131528.2369348-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Modify conditional tests throughout the IPA code so they do not assume that IPA v3.5.1 is the oldest version supported. Also remove assumptions that IPA v4.5 is the newest version of IPA supported. Augment versions in comments with "+", to be clearer that the comment applies to a version and subsequent versions. (E.g., "present for IPA v4.2+" instead of just "present for v4.2".) Signed-off-by: Alex Elder --- drivers/net/ipa/gsi.c | 8 ++++---- drivers/net/ipa/ipa_cmd.c | 26 +++++++++++++++----------- drivers/net/ipa/ipa_endpoint.c | 25 ++++++++++++++----------- drivers/net/ipa/ipa_main.c | 6 +++--- drivers/net/ipa/ipa_qmi.c | 2 +- 5 files changed, 37 insertions(+), 30 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index b6355827bf900..7f2a8fce5e0db 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -827,14 +827,14 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell) /* Max prefetch is 1 segment (do not set MAX_PREFETCH_FMASK) */ - /* We enable the doorbell engine for IPA v3.5.1 */ - if (gsi->version == IPA_VERSION_3_5_1 && doorbell) + /* No need to use the doorbell engine starting at IPA v4.0 */ + if (gsi->version < IPA_VERSION_4_0 && doorbell) val |= USE_DB_ENG_FMASK; /* v4.0 introduces an escape buffer for prefetch. We use it * on all but the AP command channel. */ - if (gsi->version != IPA_VERSION_3_5_1 && !channel->command) { + if (gsi->version >= IPA_VERSION_4_0 && !channel->command) { /* If not otherwise set, prefetch buffers are used */ if (gsi->version < IPA_VERSION_4_5) val |= USE_ESCAPE_BUF_ONLY_FMASK; @@ -973,7 +973,7 @@ void gsi_channel_reset(struct gsi *gsi, u32 channel_id, bool doorbell) gsi_channel_reset_command(channel); /* Due to a hardware quirk we may need to reset RX channels twice. */ - if (gsi->version == IPA_VERSION_3_5_1 && !channel->toward_ipa) + if (gsi->version < IPA_VERSION_4_0 && !channel->toward_ipa) gsi_channel_reset_command(channel); gsi_channel_program(channel, doorbell); diff --git a/drivers/net/ipa/ipa_cmd.c b/drivers/net/ipa/ipa_cmd.c index 35e35852c25c5..a0be25f1f4427 100644 --- a/drivers/net/ipa/ipa_cmd.c +++ b/drivers/net/ipa/ipa_cmd.c @@ -71,13 +71,12 @@ struct ipa_cmd_hw_hdr_init_local { /* IPA_CMD_REGISTER_WRITE */ -/* For IPA v4.0+, this opcode gets modified with pipeline clear options */ - +/* For IPA v4.0+, the pipeline clear options are encoded in the opcode */ #define REGISTER_WRITE_OPCODE_SKIP_CLEAR_FMASK GENMASK(8, 8) #define REGISTER_WRITE_OPCODE_CLEAR_OPTION_FMASK GENMASK(10, 9) struct ipa_cmd_register_write { - __le16 flags; /* Unused/reserved for IPA v3.5.1 */ + __le16 flags; /* Unused/reserved prior to IPA v4.0 */ __le16 offset; __le32 value; __le32 value_mask; @@ -85,12 +84,12 @@ struct ipa_cmd_register_write { }; /* Field masks for ipa_cmd_register_write structure fields */ -/* The next field is present for IPA v4.0 and above */ +/* The next field is present for IPA v4.0+ */ #define REGISTER_WRITE_FLAGS_OFFSET_HIGH_FMASK GENMASK(14, 11) -/* The next field is present for IPA v3.5.1 only */ +/* The next field is not present for IPA v4.0+ */ #define REGISTER_WRITE_FLAGS_SKIP_CLEAR_FMASK GENMASK(15, 15) -/* The next field and its values are present for IPA v3.5.1 only */ +/* The next field and its values are not present for IPA v4.0+ */ #define REGISTER_WRITE_CLEAR_OPTIONS_FMASK GENMASK(1, 0) /* IPA_CMD_IP_PACKET_INIT */ @@ -123,7 +122,7 @@ struct ipa_cmd_hw_dma_mem_mem { /* Field masks for ipa_cmd_hw_dma_mem_mem structure fields */ #define DMA_SHARED_MEM_FLAGS_DIRECTION_FMASK GENMASK(0, 0) -/* The next two fields are present for IPA v3.5.1 only. */ +/* The next two fields are not present for IPA v4.0+ */ #define DMA_SHARED_MEM_FLAGS_SKIP_CLEAR_FMASK GENMASK(1, 1) #define DMA_SHARED_MEM_FLAGS_CLEAR_OPTIONS_FMASK GENMASK(3, 2) @@ -237,11 +236,12 @@ static bool ipa_cmd_register_write_offset_valid(struct ipa *ipa, u32 bit_count; /* The maximum offset in a register_write immediate command depends - * on the version of IPA. IPA v3.5.1 supports a 16 bit offset, but - * newer versions allow some additional high-order bits. + * on the version of IPA. A 16 bit offset is always supported, + * but starting with IPA v4.0 some additional high-order bits are + * allowed. */ bit_count = BITS_PER_BYTE * sizeof(payload->offset); - if (ipa->version != IPA_VERSION_3_5_1) + if (ipa->version >= IPA_VERSION_4_0) bit_count += hweight32(REGISTER_WRITE_FLAGS_OFFSET_HIGH_FMASK); BUILD_BUG_ON(bit_count > 32); offset_max = ~0U >> (32 - bit_count); @@ -440,7 +440,11 @@ void ipa_cmd_register_write_add(struct gsi_trans *trans, u32 offset, u32 value, /* pipeline_clear_src_grp is not used */ clear_option = clear_full ? pipeline_clear_full : pipeline_clear_hps; - if (ipa->version != IPA_VERSION_3_5_1) { + /* IPA v4.0+ represents the pipeline clear options in the opcode. It + * also supports a larger offset by encoding additional high-order + * bits in the payload flags field. + */ + if (ipa->version >= IPA_VERSION_4_0) { u16 offset_high; u32 val; diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c index 88310d3585574..5f93bd60c7586 100644 --- a/drivers/net/ipa/ipa_endpoint.c +++ b/drivers/net/ipa/ipa_endpoint.c @@ -266,7 +266,7 @@ ipa_endpoint_init_ctrl(struct ipa_endpoint *endpoint, bool suspend_delay) * if (endpoint->toward_ipa) * assert(ipa->version != IPA_VERSION_4.2); * else - * assert(ipa->version == IPA_VERSION_3_5_1); + * assert(ipa->version < IPA_VERSION_4_0); */ mask = endpoint->toward_ipa ? ENDP_DELAY_FMASK : ENDP_SUSPEND_FMASK; @@ -347,7 +347,7 @@ ipa_endpoint_program_suspend(struct ipa_endpoint *endpoint, bool enable) { bool suspended; - if (endpoint->ipa->version != IPA_VERSION_3_5_1) + if (endpoint->ipa->version >= IPA_VERSION_4_0) return enable; /* For IPA v4.0+, no change made */ /* assert(!endpoint->toward_ipa); */ @@ -515,7 +515,7 @@ static void ipa_endpoint_init_hdr(struct ipa_endpoint *endpoint) /* Where IPA will write the length */ offset = offsetof(struct rmnet_map_header, pkt_len); /* Upper bits are stored in HDR_EXT with IPA v4.5 */ - if (version == IPA_VERSION_4_5) + if (version >= IPA_VERSION_4_5) offset &= field_mask(HDR_OFST_PKT_SIZE_FMASK); val |= HDR_OFST_PKT_SIZE_VALID_FMASK; @@ -562,7 +562,7 @@ static void ipa_endpoint_init_hdr_ext(struct ipa_endpoint *endpoint) /* IPA v4.5 adds some most-significant bits to a few fields, * two of which are defined in the HDR (not HDR_EXT) register. */ - if (ipa->version == IPA_VERSION_4_5) { + if (ipa->version >= IPA_VERSION_4_5) { /* HDR_TOTAL_LEN_OR_PAD_OFFSET is 0, so MSB is 0 */ if (endpoint->data->qmap && !endpoint->toward_ipa) { u32 offset; @@ -776,7 +776,7 @@ static u32 hol_block_timer_val(struct ipa *ipa, u32 microseconds) if (!microseconds) return 0; /* Nothing to compute if timer period is 0 */ - if (ipa->version == IPA_VERSION_4_5) + if (ipa->version >= IPA_VERSION_4_5) return hol_block_timer_qtime_val(ipa, microseconds); /* Use 64 bit arithmetic to avoid overflow... */ @@ -1468,8 +1468,7 @@ static void ipa_endpoint_reset(struct ipa_endpoint *endpoint) * is active, we need to handle things specially to recover. * All other cases just need to reset the underlying GSI channel. */ - special = ipa->version == IPA_VERSION_3_5_1 && - !endpoint->toward_ipa && + special = ipa->version < IPA_VERSION_4_0 && !endpoint->toward_ipa && endpoint->data->aggregation; if (special && ipa_endpoint_aggr_active(endpoint)) ret = ipa_endpoint_reset_rx_aggr(endpoint); @@ -1567,8 +1566,10 @@ void ipa_endpoint_suspend_one(struct ipa_endpoint *endpoint) (void)ipa_endpoint_program_suspend(endpoint, true); } - /* IPA v3.5.1 doesn't use channel stop for suspend */ - stop_channel = endpoint->ipa->version != IPA_VERSION_3_5_1; + /* Starting with IPA v4.0, endpoints are suspended by stopping the + * underlying GSI channel rather than using endpoint suspend mode. + */ + stop_channel = endpoint->ipa->version >= IPA_VERSION_4_0; ret = gsi_channel_suspend(gsi, endpoint->channel_id, stop_channel); if (ret) dev_err(dev, "error %d suspending channel %u\n", ret, @@ -1588,8 +1589,10 @@ void ipa_endpoint_resume_one(struct ipa_endpoint *endpoint) if (!endpoint->toward_ipa) (void)ipa_endpoint_program_suspend(endpoint, false); - /* IPA v3.5.1 doesn't use channel start for resume */ - start_channel = endpoint->ipa->version != IPA_VERSION_3_5_1; + /* Starting with IPA v4.0, the underlying GSI channel must be + * restarted for resume. + */ + start_channel = endpoint->ipa->version >= IPA_VERSION_4_0; ret = gsi_channel_resume(gsi, endpoint->channel_id, start_channel); if (ret) dev_err(dev, "error %d resuming channel %u\n", ret, diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index 64b92dfdd3f5c..62d82d48aed69 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -227,8 +227,8 @@ static void ipa_hardware_config_comp(struct ipa *ipa) { u32 val; - /* Nothing to configure for IPA v3.5.1 */ - if (ipa->version == IPA_VERSION_3_5_1) + /* Nothing to configure prior to IPA v4.0 */ + if (ipa->version < IPA_VERSION_4_0) return; val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET); @@ -388,7 +388,7 @@ static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data) } /* Implement some hardware workarounds */ - if (version != IPA_VERSION_3_5_1 && version < IPA_VERSION_4_5) { + if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5) { /* Enable open global clocks (not needed for IPA v4.5) */ val = GLOBAL_FMASK; val |= GLOBAL_2X_CLK_FMASK; diff --git a/drivers/net/ipa/ipa_qmi.c b/drivers/net/ipa/ipa_qmi.c index af8666b89b375..7b833e92a0ac7 100644 --- a/drivers/net/ipa/ipa_qmi.c +++ b/drivers/net/ipa/ipa_qmi.c @@ -377,7 +377,7 @@ init_modem_driver_req(struct ipa_qmi *ipa_qmi) /* None of the stats fields are valid (IPA v4.0 and above) */ - if (ipa->version != IPA_VERSION_3_5_1) { + if (ipa->version >= IPA_VERSION_4_0) { mem = &ipa->mem[IPA_MEM_STATS_QUOTA_MODEM]; if (mem->size) { req.hw_stats_quota_base_addr_valid = 1; From patchwork Wed Mar 24 13:15:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 407808 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp401963jai; Wed, 24 Mar 2021 06:16:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwkbLTrdYIcmwj/3vVTDAkB8KEi25EHqSKTm+66IVBtZ8HLkjeJlwuE+1+Tn9dwnDHk6gMS X-Received: by 2002:a05:6402:382:: with SMTP id o2mr3496281edv.238.1616591798341; Wed, 24 Mar 2021 06:16:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616591798; cv=none; d=google.com; s=arc-20160816; b=r0NfqgAUsj+NSKd4gvHcdGbOpRYV/uaYRhDq60KY59rWkYgsCLxwqUyHi6KJRhJxhJ CM8ywbHXP9u/MEp7Rp+uoVBKiDrrkJKwe7quAiZjTXgOs4+AINX7U0FzlHKuDBrJlrrQ 7yfWk9QqMi7TKaAtyv2fsE10M865KTjnZ86WYQXZBrLoEUXMADQzrODLfEzSEMbwhZAg fei34nkEe5YdUYIpifb+qZdnP7NBVyQEyo8nuSknEp9EO3YbIwaJGyYcs70Sqei1Oav+ GGCVxFe7eLWiG8pplBLgboF0KXlksKEIr2WEgYkhLSNE+iCPzvhAmRZeizQyMkCkLBSQ E8cw== ARC-Message-Signature: i=1; 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id n7sm1160486ile.12.2021.03.24.06.15.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 06:15:32 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 2/6] net: ipa: update version definitions Date: Wed, 24 Mar 2021 08:15:24 -0500 Message-Id: <20210324131528.2369348-3-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210324131528.2369348-1-elder@linaro.org> References: <20210324131528.2369348-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add IPA version definitions for all IPA v3.x and v4.x. Fix the GSI version associated with IPA version 4.1. Signed-off-by: Alex Elder --- v2: - Add kernel-doc descriptions for ipa_version members. drivers/net/ipa/ipa_version.h | 29 ++++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_version.h b/drivers/net/ipa/ipa_version.h index 2944e2a890231..ee2b3d02f3cd3 100644 --- a/drivers/net/ipa/ipa_version.h +++ b/drivers/net/ipa/ipa_version.h @@ -8,17 +8,32 @@ /** * enum ipa_version + * @IPA_VERSION_3_0: IPA version 3.0/GSI version 1.0 + * @IPA_VERSION_3_1: IPA version 3.1/GSI version 1.1 + * @IPA_VERSION_3_5: IPA version 3.5/GSI version 1.2 + * @IPA_VERSION_3_5_1: IPA version 3.5.1/GSI version 1.3 + * @IPA_VERSION_4_0: IPA version 4.0/GSI version 2.0 + * @IPA_VERSION_4_1: IPA version 4.1/GSI version 2.0 + * @IPA_VERSION_4_2: IPA version 4.2/GSI version 2.2 + * @IPA_VERSION_4_5: IPA version 4.5/GSI version 2.5 + * @IPA_VERSION_4_7: IPA version 4.7/GSI version 2.7 + * @IPA_VERSION_4_9: IPA version 4.9/GSI version 2.9 + * @IPA_VERSION_4_11: IPA version 4.11/GSI version 2.11 (2.1.1) * * Defines the version of IPA (and GSI) hardware present on the platform. - * It seems this might be better defined elsewhere, but having it here gets - * it where it's needed. */ enum ipa_version { - IPA_VERSION_3_5_1, /* GSI version 1.3.0 */ - IPA_VERSION_4_0, /* GSI version 2.0 */ - IPA_VERSION_4_1, /* GSI version 2.1 */ - IPA_VERSION_4_2, /* GSI version 2.2 */ - IPA_VERSION_4_5, /* GSI version 2.5 */ + IPA_VERSION_3_0, + IPA_VERSION_3_1, + IPA_VERSION_3_5, + IPA_VERSION_3_5_1, + IPA_VERSION_4_0, + IPA_VERSION_4_1, + IPA_VERSION_4_2, + IPA_VERSION_4_5, + IPA_VERSION_4_7, + IPA_VERSION_4_9, + IPA_VERSION_4_11, }; #endif /* _IPA_VERSION_H_ */ From patchwork Wed Mar 24 13:15:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 407809 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp401976jai; Wed, 24 Mar 2021 06:16:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzZAX4pzfHBGlHL4QcFJouKLTyzUw7If2iyXZPesX9uj+3nR3ujGMKdt7HwpnELXp9MguYr X-Received: by 2002:a05:6402:84b:: with SMTP id b11mr3364537edz.56.1616591798749; Wed, 24 Mar 2021 06:16:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616591798; cv=none; d=google.com; s=arc-20160816; b=XrjbBrAp985uQtuKKMLCcj8lLjXOXuyCijW7REKZ39BzhAyZza+gXweLmypcWcKD95 KovyJRqTOAhLmMuoBFqVV1x3oYb5aVx8ARslCT4UsspFFbz4t0ySLuBPCnfmteHWz8yq 1Bf8j0PNy1fZHiSEg3lsqnPgiSmH9Jo0CuMLwAs+kMZTufv14WU+U5lWrDIxhGOpELol e7+CdHgYavlL9ziZBz09FZlugffJtfPhX6QWPE5Q3kvmSviZYuQaytUGXU/8q1pRd/VF lEs3J2h8HYCGUNbsBeG1q+GiZfw1uxTXiZxlFTYLxryJYsYc+mCHe780avA9UvblcS1t Fq0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qKrY3MtVV0SjI4PDoOYPSEatpvEs6DJpVc9j1EaE/t0=; b=p5ZsO2S0WoDI1yImcXmpQN+Q0vBkHyZDeqjfEnsCSIHRSxmWdLOMgFQKBfPzJn9Ywl kAfMZcbsh7Lq5AGHwVjy95y/g3cLchmTGbFU9CiWuZOC86j2v+N80xBdAreUH3aFc3Cg FyTHp2nvfS/8U0M5FIHb4PbbNjh/6wN/TPpwXQ4yvip5A+72Oz0yxTgDzmTn0Pssl9IC KH6MvV73YwqquajrG//5ayGulPs4tflWfSSKK5M2yq4cQEU6+dM5pI3EsrVvYKk/3Gh9 A4ugE7IvSFOWUY+7ZzA+FXhFxzeAkz/GAZGsA38EdsdtU6gKm+KrFHWfrsa7KVKzrahR cdkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L3n+VQn1; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id n7sm1160486ile.12.2021.03.24.06.15.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 06:15:33 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 3/6] net: ipa: define the ENDP_INIT_NAT register Date: Wed, 24 Mar 2021 08:15:25 -0500 Message-Id: <20210324131528.2369348-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210324131528.2369348-1-elder@linaro.org> References: <20210324131528.2369348-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Define the ENDP_INIT_NAT register for setting up the NAT configuration for an endpoint. We aren't using NAT at this time, so explicitly set the type to BYPASS for all endpoints. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_endpoint.c | 17 ++++++++++++++++- drivers/net/ipa/ipa_reg.h | 14 +++++++++++++- 2 files changed, 29 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c index 5f93bd60c7586..38e83cd467b52 100644 --- a/drivers/net/ipa/ipa_endpoint.c +++ b/drivers/net/ipa/ipa_endpoint.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2019-2020 Linaro Ltd. + * Copyright (C) 2019-2021 Linaro Ltd. */ #include @@ -468,6 +468,20 @@ static void ipa_endpoint_init_cfg(struct ipa_endpoint *endpoint) iowrite32(val, endpoint->ipa->reg_virt + offset); } +static void ipa_endpoint_init_nat(struct ipa_endpoint *endpoint) +{ + u32 offset; + u32 val; + + if (!endpoint->toward_ipa) + return; + + offset = IPA_REG_ENDP_INIT_NAT_N_OFFSET(endpoint->endpoint_id); + val = u32_encode_bits(IPA_NAT_BYPASS, NAT_EN_FMASK); + + iowrite32(val, endpoint->ipa->reg_virt + offset); +} + /** * ipa_endpoint_init_hdr() - Initialize HDR endpoint configuration register * @endpoint: Endpoint pointer @@ -1488,6 +1502,7 @@ static void ipa_endpoint_program(struct ipa_endpoint *endpoint) else (void)ipa_endpoint_program_suspend(endpoint, false); ipa_endpoint_init_cfg(endpoint); + ipa_endpoint_init_nat(endpoint); ipa_endpoint_init_hdr(endpoint); ipa_endpoint_init_hdr_ext(endpoint); ipa_endpoint_init_hdr_metadata_mask(endpoint); diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h index 36fe746575f6b..bba088e80cd1e 100644 --- a/drivers/net/ipa/ipa_reg.h +++ b/drivers/net/ipa/ipa_reg.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2018-2020 Linaro Ltd. + * Copyright (C) 2018-2021 Linaro Ltd. */ #ifndef _IPA_REG_H_ #define _IPA_REG_H_ @@ -388,6 +388,18 @@ enum ipa_cs_offload_en { IPA_CS_OFFLOAD_DL = 0x2, }; +/* Valid only for TX (IPA consumer) endpoints */ +#define IPA_REG_ENDP_INIT_NAT_N_OFFSET(ep) \ + (0x0000080c + 0x0070 * (ep)) +#define NAT_EN_FMASK GENMASK(1, 0) + +/** enum ipa_nat_en - ENDP_INIT_NAT register NAT_EN field value */ +enum ipa_nat_en { + IPA_NAT_BYPASS = 0x0, + IPA_NAT_SRC = 0x1, + IPA_NAT_DST = 0x2, +}; + #define IPA_REG_ENDP_INIT_HDR_N_OFFSET(ep) \ (0x00000810 + 0x0070 * (ep)) #define HDR_LEN_FMASK GENMASK(5, 0) From patchwork Wed Mar 24 13:15:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 407812 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp402055jai; Wed, 24 Mar 2021 06:16:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyp5glrNXS6eOkUj06Oy9zu5ol9yAMBddXj7am52rEAMIJrnGwkSaIR9MSVOCrc7BwJG3Jr X-Received: by 2002:a17:906:dfce:: with SMTP id jt14mr3687130ejc.83.1616591803838; Wed, 24 Mar 2021 06:16:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616591803; cv=none; d=google.com; s=arc-20160816; b=lck4QKqp6cBwXOzUhzQamFZ/FxnwdMSCKsWsiSM4hnyzBqCVfHeorpJfkRXcwIX1pP NPsldbhIcGJXLu426u8j+cNL6cAVnCUEEbSd/kG7IwVzcMEY0zvK7DJXSMsuNK5IxAlZ DKUjCYZOMnvBxDHKG0r0UPsnyP8h787z6nbxNczWjMeMql640M1MiGZTTTrw48ks2tSY hMOJM0I3E2ogme0pDbfnl6Q1U4E9jUBo3PH41Mh3pXlhenSvjUXYzPrlcFkYNwVyT7g7 6pDjmJQTFMVlSchtjv7NzKlswhFTYc6wqu2Yg4k1Oe88+xrPLpmi49WLxl2yIvRux2Ff MvrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=urnf0slLMOPXg7nga5dabZHaUvtoQMaa3zOQvFLPfpg=; b=kmodcXa75hs2XIorVhbrES6JsV+Z79uCUVO94Z1LV1BaKGN1zcwEA5qodh6Au5Y5Yv ZRlTGC3Xzgvq7w9zh1og3Sw+bLXBmPfmzX5MAzQP5VoPnNVw6PrdFOzMfm+xhir/rPBn jljjcTXyFcyptdSUbjs/hRX3xf1JLCAi0hWmZOfg0//pXyBLEY9Ywp7pqoaz0IDktCKr Fr3ZrzgvA40mDl3BO7vuiXRXNF4Xu1JpSWcNC2yPEi1TQANCOvrL43djmuCO9RCdcTmQ lIKujhehfeX9g+Da03zfxt6YxlMr0K26ZiymtgQNVT5IrqP7+3DEpR/0NnIlbwbiIA8n Vlbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XXnUftby; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id n7sm1160486ile.12.2021.03.24.06.15.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 06:15:34 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 4/6] net: ipa: limit local processing context address Date: Wed, 24 Mar 2021 08:15:26 -0500 Message-Id: <20210324131528.2369348-5-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210324131528.2369348-1-elder@linaro.org> References: <20210324131528.2369348-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Not all of the bits of the LOCAL_PKT_PROC_CNTXT register are valid. Until IPA v4.5, there are 17 valid bits (though the bottom three must be zero). Starting with IPA v4.5, 18 bits are valid. Introduce proc_cntxt_base_addr_encoded() to encode the base address for use in the register using only the valid bits. Shorten the name of the register (omit "_BASE") to avoid the need to wrap the line in the one place it's used. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_mem.c | 6 ++++-- drivers/net/ipa/ipa_reg.h | 14 ++++++++++++-- 2 files changed, 16 insertions(+), 4 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_mem.c b/drivers/net/ipa/ipa_mem.c index f25029b9ec857..32907dde5dc6a 100644 --- a/drivers/net/ipa/ipa_mem.c +++ b/drivers/net/ipa/ipa_mem.c @@ -61,6 +61,7 @@ int ipa_mem_setup(struct ipa *ipa) struct gsi_trans *trans; u32 offset; u16 size; + u32 val; /* Get a transaction to define the header memory region and to zero * the processing context and modem memory regions. @@ -89,8 +90,9 @@ int ipa_mem_setup(struct ipa *ipa) gsi_trans_commit_wait(trans); /* Tell the hardware where the processing context area is located */ - iowrite32(ipa->mem_offset + ipa->mem[IPA_MEM_MODEM_PROC_CTX].offset, - ipa->reg_virt + IPA_REG_LOCAL_PKT_PROC_CNTXT_BASE_OFFSET); + offset = ipa->mem_offset + ipa->mem[IPA_MEM_MODEM_PROC_CTX].offset; + val = proc_cntxt_base_addr_encoded(ipa->version, offset); + iowrite32(val, ipa->reg_virt + IPA_REG_LOCAL_PKT_PROC_CNTXT_OFFSET); return 0; } diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h index bba088e80cd1e..cbfef27bbcf2c 100644 --- a/drivers/net/ipa/ipa_reg.h +++ b/drivers/net/ipa/ipa_reg.h @@ -217,8 +217,18 @@ static inline u32 ipa_reg_bcr_val(enum ipa_version version) return 0x00000000; } -/* The value of the next register must be a multiple of 8 */ -#define IPA_REG_LOCAL_PKT_PROC_CNTXT_BASE_OFFSET 0x000001e8 +/* The value of the next register must be a multiple of 8 (bottom 3 bits 0) */ +#define IPA_REG_LOCAL_PKT_PROC_CNTXT_OFFSET 0x000001e8 + +/* Encoded value for LOCAL_PKT_PROC_CNTXT register BASE_ADDR field */ +static inline u32 proc_cntxt_base_addr_encoded(enum ipa_version version, + u32 addr) +{ + if (version < IPA_VERSION_4_5) + return u32_encode_bits(addr, GENMASK(16, 0)); + + return u32_encode_bits(addr, GENMASK(17, 0)); +} /* ipa->available defines the valid bits in the AGGR_FORCE_CLOSE register */ #define IPA_REG_AGGR_FORCE_CLOSE_OFFSET 0x000001ec From patchwork Wed Mar 24 13:15:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 407811 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp402013jai; Wed, 24 Mar 2021 06:16:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxrN4UMuUo4FBTmmLIv0B7LUv6S6yx2jskf16hUOkSiqHuneEcD/8qB/e1zCvpjGOS4MZv3 X-Received: by 2002:a17:906:d94:: with SMTP id m20mr3513826eji.511.1616591800815; Wed, 24 Mar 2021 06:16:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616591800; cv=none; d=google.com; s=arc-20160816; b=eCxmYHMe6V63HBLWm+tkd8nb5x3V++3T06bwPIbH15SeCzp3HB9fRrLcz9ZNU3Or/M sbKOiZ+Mhy/AQfVS2v4ehNdvclWb0IzWsOJp5Jd18XQZwBLu0qs1lrmFE6Z3rdS/V3BW xgyRys6Qn+1wRgJGpYDao+l/6QiJdZ/N4ceHpmiPrtYWZySjpMcPuiEeLvvnKTgfY8Iq A+IC1wIC7dpvSYjyj6tdhr8X2e0CdtYA0xmalx59ChJcxYwxx/F4lHCgokIc5XeOQHCz z3qaNGnHbZSGFlG6l5L2Bjqtvlh/A4OGxMsYoo+Furk+sHhPR7Zs6cogNO8Dq0R2pkAp 2quQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mz7860lZzk6VZ253Yqzghlj/rfYbeBGQaKOgyWdMwc4=; b=WnzcEChFutZ5MtoH0Y9Q3frgaPZ6bRgJy3c386CXhGh7Ve3XzNgwo2UbtEQ8Szm67N kpr11tPb8d1IA06zoSnIcGqUuuK3CYLVEMyhP0A7T4DGo0CWx8g9RMsANFPPxVTH9sKO ODlzk23Gh/oG4mk2Qb70Ti1epdX81KUKiPDZEBIyTalU2zFAm4YIn6/WukL2Ezy2WpcF P0xgq1nVVFtKXbVao2PxyuoAw9xOW+gVNEYCMRXMsI00yrA0V7pZhxoxUpuYQTOfBU4T JPLi2yGXWu06x+0N0Wqph34TPnWfaHbgsUc4XdP4hMNETvyUJj3+pPpViHaeYWS8iCPu WG5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SfYkeKXA; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id n7sm1160486ile.12.2021.03.24.06.15.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 06:15:35 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 5/6] net: ipa: move ipa_aggr_granularity_val() Date: Wed, 24 Mar 2021 08:15:27 -0500 Message-Id: <20210324131528.2369348-6-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210324131528.2369348-1-elder@linaro.org> References: <20210324131528.2369348-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We only use ipa_aggr_granularity_val() inside "ipa_main.c", so it doesn't really need to be defined in a header file. It makes some sense to be grouped with the register definitions, but it is unlike the other inline functions now defined in "ipa_reg.h". So move it into "ipa_main.c" where it's used. TIMER_FREQUENCY is used only by that function, so move that definition as well. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_main.c | 15 +++++++++++++++ drivers/net/ipa/ipa_reg.h | 12 ------------ 2 files changed, 15 insertions(+), 12 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index 62d82d48aed69..ba1bfc30210a3 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -287,6 +287,21 @@ ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data) iowrite32(val, ipa->reg_virt + IPA_REG_QSB_MAX_READS_OFFSET); } +/* The internal inactivity timer clock is used for the aggregation timer */ +#define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */ + +/* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY + * field to represent the given number of microseconds. The value is one + * less than the number of timer ticks in the requested period. 0 is not + * a valid granularity value. + */ +static u32 ipa_aggr_granularity_val(u32 usec) +{ + /* assert(usec != 0); */ + + return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1; +} + /* IPA uses unified Qtime starting at IPA v4.5, implementing various * timestamps and timers independent of the IPA core clock rate. The * Qtimer is based on a 56-bit timestamp incremented at each tick of diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h index cbfef27bbcf2c..86fe2978e8102 100644 --- a/drivers/net/ipa/ipa_reg.h +++ b/drivers/net/ipa/ipa_reg.h @@ -237,18 +237,6 @@ static inline u32 proc_cntxt_base_addr_encoded(enum ipa_version version, #define IPA_REG_COUNTER_CFG_OFFSET 0x000001f0 #define AGGR_GRANULARITY_FMASK GENMASK(8, 4) -/* The internal inactivity timer clock is used for the aggregation timer */ -#define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */ - -/* Compute the value to use in the AGGR_GRANULARITY field representing the - * given number of microseconds. The value is one less than the number of - * timer ticks in the requested period. 0 not a valid granularity value. - */ -static inline u32 ipa_aggr_granularity_val(u32 usec) -{ - return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1; -} - /* The next register is not present for IPA v4.5 */ #define IPA_REG_TX_CFG_OFFSET 0x000001fc /* The first three fields are present for IPA v3.5.1 only */ From patchwork Wed Mar 24 13:15:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 407810 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp401993jai; Wed, 24 Mar 2021 06:16:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyPuRTVTyWXL77l4yEu8WzG/pedaUo7E4iwtbGyAuaR738PuMa38frEextkvex5ktUIedTN X-Received: by 2002:a50:ed96:: with SMTP id h22mr3341199edr.39.1616591799718; Wed, 24 Mar 2021 06:16:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616591799; cv=none; d=google.com; s=arc-20160816; b=Uzh8bY9ZXQ6QM8zQKcaQyWVAKNu/+dzWFSdPbrOwZbBcN4TdxD8jM7vQmXLdrIRrte kQAwK1SzcvKaTFHmgt8yXSki5wSkPULnj4rriIDKR1F/YsckWyi+p0WkCBtsQGd5HKut 8mdIbnuZlLzARb5c5cIuf/6Z6s2/CQk5PI3vr93HUSnlmYRQVKf43x/FEIsdiCnIGp9Z voKGVQiHSYdcHQU0/MiZxYZ4UhpU74H1+1hrOjqI0dn5iEsIX+KZjoNDpNOBYbJtxzvD Q/Zr8IBMLNLpYcDZatMzb2gGz8d0dFDMe4pjlZ+ROW8cD5ftrXEx/g6jG1Lr7h+6W6Mp ykwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FQFA2QStDKmo1XhVZ4KOEMpN+hi3li+F67WfkjwPMWs=; b=cGHGAnylCeTOrbjxpOcvup6VdzKPon7Z98BJciV3Zxj5jp2XJkYf9u3DTOWS3wZ9Gd rqI51TFVTi/N0YbJe8ec69rQQ0qfdUERysjKDJcSA0gJv1zuogwe8sIXsj1Lav0WwaCh L4pNUpft+5T0TCYbRRoUQdkYeafkgj9egVh0jozaPk8p3VKdv/PLZp20zXRsqDtjenD6 HK2URpdPaGjXOtxCXa2iwoYXaSyKuJjryTFPfljCiAhMDnh+j6MGx5k6cizIZk7MHX/R Xge7bcRrXG6eg/9i/efUSs59kDSlM1dVsT+rlXL8JDL12vxlLn3OPYEX4qipJKyzMXB8 Kt6Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WeDb3w8C; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id n7sm1160486ile.12.2021.03.24.06.15.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 06:15:35 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 6/6] net: ipa: increase channels and events Date: Wed, 24 Mar 2021 08:15:28 -0500 Message-Id: <20210324131528.2369348-7-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210324131528.2369348-1-elder@linaro.org> References: <20210324131528.2369348-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Increase the maximum number of channels and event rings supported by the driver, to allow the maximum available on the SDX55. Signed-off-by: Alex Elder --- drivers/net/ipa/gsi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/gsi.h b/drivers/net/ipa/gsi.h index efc980f96109e..d5996bdb20ef5 100644 --- a/drivers/net/ipa/gsi.h +++ b/drivers/net/ipa/gsi.h @@ -16,8 +16,8 @@ #include "ipa_version.h" /* Maximum number of channels and event rings supported by the driver */ -#define GSI_CHANNEL_COUNT_MAX 17 -#define GSI_EVT_RING_COUNT_MAX 13 +#define GSI_CHANNEL_COUNT_MAX 23 +#define GSI_EVT_RING_COUNT_MAX 20 /* Maximum TLV FIFO size for a channel; 64 here is arbitrary (and high) */ #define GSI_TLV_MAX 64