From patchwork Sat May 12 05:02:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135627 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1752426lji; Fri, 11 May 2018 22:03:42 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrn4vTzbHHfVFQbW/Z8XS4pnF073svh8BVAD9QsCHunbqZvI3xtz1aM9YZOgsFFQVZCciKc X-Received: by 2002:ac8:2f43:: with SMTP id k3-v6mr721976qta.389.1526101422694; Fri, 11 May 2018 22:03:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526101422; cv=none; d=google.com; s=arc-20160816; b=SIzNvPGD2AyDo4ASPjXMQj2g+z7zVD783kTSzFYawsOTJFLngNi1NlybOBo0jTEo6F 5suKzyIzcfCKrgz1Pnhx27I9FLiy7467oQqrnbozJdIij5ybLb2V490Bb6iy9r08+A2/ 3a/667hsVIxmv6IpwxtbEoMDsnhU8/lXL4Ff5c/9NvMV8GwQfchGXZopFPsV1wobbvF1 ZbjUAd97zAH1n/GKAcpHlvz8uFAv1+9xGNP9e/X0YBRo+Ry8FMDRzfrLplO9RpFS4PkJ j9oVe2ts1MX58ca3lw1uZhB71J1xdT3krdRzTdmgc93p3Lj5b1GV10BezEs0dNDN9zar HFAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=HmV49nLJ6y8U9749KyeDAFR/zUCT5hZAmZM9azYZbHQ=; b=NU++ixG2kt412wtRrDnyPZq74wh23WgdurWycNt4gv3cshSF5ekyIjRu+4YBkqDKpo jed0UPO1quwF7u8uf2YGDxaE7bKs3j9Fi67d48kz5UJ1F4Z1TMv6D/Aen0aZ5lcrvcOV jyAatHfFPoKXYGiExJbIjpWMlj3v9Z62dOFsXXSW/waiynmQSlQ73lV5b0aZu6tr32h6 TrM9ME2+4LWYBCXq5KKIinlrKx55+OJCusAEYLgjOgQuahUlWrP48Valydm6bH3lGzMm EiaVRQd55q+1pb04GLMaythJBywnLg9Ir6uADQTJltQL6ZFImjQ7AcyDLBSfN66Yd7SW 4xdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=CM4IbaFl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id b32-v6si4906547qta.275.2018.05.11.22.03.42 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:03:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=CM4IbaFl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45381 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMh4-00042q-4e for patch@linaro.org; Sat, 12 May 2018 01:03:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60510) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgN-000414-US for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgI-0008Ko-Ud for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:59 -0400 Received: from mail-pl0-x242.google.com ([2607:f8b0:400e:c01::242]:46305) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgI-0008Kd-Ps for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:54 -0400 Received: by mail-pl0-x242.google.com with SMTP id 59-v6so4364872plc.13 for ; Fri, 11 May 2018 22:02:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HmV49nLJ6y8U9749KyeDAFR/zUCT5hZAmZM9azYZbHQ=; b=CM4IbaFlSHDvcvzNBpyvUNec31P+IelX2ZrxPguee5RkChK5gD/tWcNigcwGiFoOun w9F+0XPi3Q/URQfBswvQE6AVRSNO/H5GmJ/ybuhvRbsuEx6YHk34CDtc1s4PuPjd7hYA bAr3FPJ2oAzeY8LvR83v44nfxnJJV8vIN6C+Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HmV49nLJ6y8U9749KyeDAFR/zUCT5hZAmZM9azYZbHQ=; b=Qy6boQiP0MgEmPUuTrp3ozy16Ghg5Jizjq5nGGKCPPi3YsE9MyDuCTf/ystLLlA9Yx CoX03pVSdDPRQ1QC8TQqIjDmzuF/NRn+lYpIVTn7fxxMuJDGTT9T0ki/cbs+qiFsbG2y icya6JQIejAJN4EH5XgwUT3CZ/m8V+56gkyazSwi3i5bNXUlogyQIwQH1vOOrTrASY3A YcCAXCKoTwBLbem2ZYyK7r5scBkDelOJuS+CkeMXM4mvJWEFZPx4u7VgkYXBXXbq0gVg Ef/EkFzwuye7hN2bP0t/lw91EFzfHE60vmBDSjKI8Z8zKpGXQUwyVQCF92NkS5uS8sKU zx/A== X-Gm-Message-State: ALKqPwfMC5RzE0Ix7YQe98JHKN43SUFud34pa76ZridLGImXe2KT82wl QtWbqjOSzHk839RJJNGCPoDukmH34KM= X-Received: by 2002:a17:902:3e5:: with SMTP id d92-v6mr1078761pld.104.1526101373490; Fri, 11 May 2018 22:02:53 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:02:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:42 -0700 Message-Id: <20180512050250.12774-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH 1/9] target/m68k: Use DISAS_NORETURN for exceptions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The raise_exception helper does not return. Do not generate any code following that. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 44a0ac4e2e..86404906e0 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -291,18 +291,18 @@ static void gen_jmp(DisasContext *s, TCGv dest) s->is_jmp = DISAS_JUMP; } -static void gen_raise_exception(int nr) +static void gen_exception(DisasContext *s, uint32_t dest, int nr) { - TCGv_i32 tmp = tcg_const_i32(nr); + TCGv_i32 tmp; + update_cc_op(s); + tcg_gen_movi_i32(QREG_PC, dest); + + tmp = tcg_const_i32(nr); gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); -} -static void gen_exception(DisasContext *s, uint32_t where, int nr) -{ - gen_jmp_im(s, where); - gen_raise_exception(nr); + s->is_jmp = DISAS_NORETURN; } static inline void gen_addr_fault(DisasContext *s) @@ -6106,7 +6106,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { gen_exception(dc, dc->pc, EXCP_DEBUG); - dc->is_jmp = DISAS_JUMP; /* The address covered by the breakpoint must be included in [tb->pc, tb->pc + tb->size) in order to for it to be properly cleared -- thus we increment the PC here so that @@ -6150,6 +6149,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) tcg_gen_exit_tb(0); break; case DISAS_TB_JUMP: + case DISAS_NORETURN: /* nothing more to generate */ break; } From patchwork Sat May 12 05:02:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135632 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1756371lji; Fri, 11 May 2018 22:08:59 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpMBC+cv+uV3+RHBqCNzn11vBnQJuydYCC96wtj4eBolzUnyc/FXeBrXGK/cSVHsUUcj1uh X-Received: by 2002:ac8:2a5:: with SMTP id p37-v6mr799950qtg.218.1526101739821; Fri, 11 May 2018 22:08:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526101739; cv=none; d=google.com; s=arc-20160816; b=N5/qCQmY6RDYxQCbx+uxK5sOpftHpucbx/JivgkEzmJek8SkDSmOrS+9sHmjRpZM6i GXNsZ0opqnnYFxle+3mFz6aUxWOl/nZYFv4/LZ+bE4Jys2fEtqR9G9RHqXt0NLej3kHs qOMa+OkOyDb18cCImm6Lfs/MKEBeg1j9r9rLakv16psDRR7R/NaLkru0uJMqcaTt+tUv 1XOmJkbtwQiRlQIxtCggVWiywhbltsWpCQxpnYu+jP5Z7wzgOZlsY8rqgBtfOVUe7B5x V7BklqGj1gnLbUw/HBU+DOjylESkIM9jzHeZVJSGglMRiwbwAv8ceCie7mxY8cGRsdR4 DUWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=2h8oXQwE9h1EoJwXHIglzoEGED86c8Vcit+7NqxnS7A=; b=kU3rB98FErUCywXbkYsUiJou+qSpAwmXgLqK3OXgdvvlSo2BOcp/7O8fOjfAKSYhc2 mmFDIcdd6mPFMvuF65tuzHnB2Jl51fB5eVyEzMuRldFZbaowk18b8fBWxvFdU9xqOGg3 vx+XAe5rpd3cF6uW7knIRq6ZRPOJDywdC0pkbD0M2srUIsEkU6O68o9fjxD0ovC9Tw+L bdzSac5d6PmQDWZdhMfLpIKdX2p1++n0PahyEIbasHB6lQSRz81MXXgf2nJI4K4aRhtJ I676r/YAhDCKq2msy2ISg7BsPJx1/xtWqRfi7RlTWR0WKNIvuYw634FO4W2gX1ViSZD/ 6reQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=W05gB0cw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id l17-v6si4232216qvd.35.2018.05.11.22.08.59 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:08:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=W05gB0cw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45559 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMmB-0007Ez-7d for patch@linaro.org; Sat, 12 May 2018 01:08:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60512) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgN-000415-Uc for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgK-0008L7-6H for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:59 -0400 Received: from mail-pl0-x242.google.com ([2607:f8b0:400e:c01::242]:34671) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgK-0008L1-08 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:56 -0400 Received: by mail-pl0-x242.google.com with SMTP id ay10-v6so4372966plb.1 for ; Fri, 11 May 2018 22:02:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2h8oXQwE9h1EoJwXHIglzoEGED86c8Vcit+7NqxnS7A=; b=W05gB0cw0oZE5pWpI6T/SlrwvbUEmvYVotn3HSUajl5KZcynvAjTcZmBf5QZh/c+mk e4fXa54RR5/9ur2NG0ODHNK0mPcioe9AdPHpefDGGP8GM+URDzUYx0vdjONmV6EyQmnM 3Sonrd8ytYJ2BgFZXFLJcaTJKi9yR81eGfnwk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2h8oXQwE9h1EoJwXHIglzoEGED86c8Vcit+7NqxnS7A=; b=AZ0bXDVXIcHXyDrbcs+GMBtDHf58Tzz6QH15gyV2OwOXBmKFbbnH8cRe9J4TfSfeoM lDjdrngY0If/jM5f+6pA/0hE2ojBzawDIbbz0yVbZMhcFCYwcWPI3HI1NFB38P38eqUA OhEKjps6O3BnQXZgt7QPJmyMlp/0dMQddirlMUBcbl06p07aet4fbkfZMV1ILaq/X7bm CmxcLpH+k4zZMlKRJ5YD4hD6LL8UZq0yIN9LInCELsJ7ZYm2xMs+QIjtIJuL9YvVY0GS J2wAflT/d0CDpsDwc3vPwoC7wfjgWzucqdf29CmRqnYtT2frNdveelQ/s8XtIfnpaVN7 yZRA== X-Gm-Message-State: ALKqPwfgtJCbYXnhhNTvyBk/JlSnji5u2Zk3Dz1L5bnVsb6Kch3HI/Am KtWRUdq0jsREQ+Bi0vXkybfywI4XEkk= X-Received: by 2002:a17:902:780a:: with SMTP id p10-v6mr999346pll.281.1526101374739; Fri, 11 May 2018 22:02:54 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:02:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:43 -0700 Message-Id: <20180512050250.12774-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH 2/9] target/m68k: Replace DISAS_TB_JUMP with DISAS_NORETURN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We have exited the TB after using goto_tb; there is no distinction from DISAS_NORETURN. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 86404906e0..6ab24fac0b 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -199,7 +199,6 @@ static void do_writebacks(DisasContext *s) /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ #define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */ -#define DISAS_TB_JUMP DISAS_TARGET_2 /* only pc was modified statically */ #define DISAS_JUMP_NEXT DISAS_TARGET_3 #if defined(CONFIG_USER_ONLY) @@ -1496,7 +1495,7 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) gen_jmp_im(s, dest); tcg_gen_exit_tb(0); } - s->is_jmp = DISAS_TB_JUMP; + s->is_jmp = DISAS_NORETURN; } DISAS_INSN(scc) @@ -6148,7 +6147,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) /* indicate that the hash table must be used to find the next TB */ tcg_gen_exit_tb(0); break; - case DISAS_TB_JUMP: case DISAS_NORETURN: /* nothing more to generate */ break; From patchwork Sat May 12 05:02:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135636 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1756731lji; Fri, 11 May 2018 22:09:30 -0700 (PDT) X-Google-Smtp-Source: AB8JxZq6i2vangHW/GUM+PO0rwWPPLFPJMMGdPNc5E3MS9WFrQy+ki6Udo4BEd4II6/ZuEB0iQX6 X-Received: by 2002:aed:21d1:: with SMTP id m17-v6mr745767qtc.351.1526101770123; Fri, 11 May 2018 22:09:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526101770; cv=none; d=google.com; s=arc-20160816; b=CwCMov522PqNEe10tohk9VyR9xqK9yqLEIbSw1TfCs379M1jsJeluHxyXMu2k9gZT5 qx3ABKNxQ10aUVtK7R3Ear+8blOk3s9PFm0+mJ9bWo5ZutIqQwHKP1hH09xFALathu5z O/jUHSns7v8jTsS8+AC91JCqCRegWZGMQ+g4/PzFMx1kQHPUYNOpX3gCgJS5vZNAJQbV UuGn2KVfYBVmaEVJqbovxf3yPEDLbxg+O6YV0lrh+2MsRnJ3NlLTZV+D0LvxBznCnmqm 3DnTcmpj+/T0GV6ftOxUd8RkHJjtb1PEcDPULpn8V4Lr5OqPbRdrbMx8gFzFN0o7On17 M2lQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=tNTLnC9nTzAT6+eS/Qq74KyG9riiNWqgx1lt/ZK6vsM=; b=adFoSYeEdaya3PNBqcN3H1p3KaCSqE5YbAPVebq53AuPcfc8kMhjbLw4Wkm7ziN44q xGYcI/UUzCNohW0ObqoLBo6aMLl/LcgKZreh5Cy9k/wepBf7HgktyNr/8E6RHjEKCCOD e6D99BGhGkplLqJB/uEJ7PyBuTw62i8zU8IC8pc5AvDJGVxKJgre7TqqAXsjM2Ziy61u GR74+4YbgKCqeXPadqQt8zjnVJXqwPQMXFOPNuCBv66hfcSlzuvW2BIEAWvV5hqZ80QQ VJjedPetFCMX1MYuM5YA9PXTliEtpdYvAvK4g98XOelBN3cFgrXkGhYosO/S5INNSVCq dacw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DgNBgsIk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id c6-v6si1096036qkb.164.2018.05.11.22.09.29 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:09:30 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DgNBgsIk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45594 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMmf-0006nY-Ei for patch@linaro.org; Sat, 12 May 2018 01:09:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60509) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgN-000413-US for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgL-0008LM-E3 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:59 -0400 Received: from mail-pl0-x242.google.com ([2607:f8b0:400e:c01::242]:41882) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgL-0008LG-8Z for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:57 -0400 Received: by mail-pl0-x242.google.com with SMTP id az12-v6so4365129plb.8 for ; Fri, 11 May 2018 22:02:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tNTLnC9nTzAT6+eS/Qq74KyG9riiNWqgx1lt/ZK6vsM=; b=DgNBgsIkyTmgvi4UfqJzeeSqUArXsk/y4cDQDw+KZqz1rF2yzoAryxZ51YHSS4PaiI 0QAklvMgGo4isjUePUdUSQyFM/toGzhfFzbD7IzJUw2xn3vwHkt7QT+ThS7GUg1rPkfw flkkzBMV6Ev9ncqOZMlWgTD2tQAhwEyeRWE+w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tNTLnC9nTzAT6+eS/Qq74KyG9riiNWqgx1lt/ZK6vsM=; b=pHxtBFK+/dD5Wsm1yoPfEIfdG7av9yoOKLUKlzEkIDaxayBFIc5GpUm4YIDBnYHC1J vHDzYkgMWHfeE4NxnK30H1D9ySiUHLKlZlbT797s+0ddHe61Dyi4HxFsLHb1pBrYN66P MEvzIML7Bw76cGJFrRSKCYPZFgTAY3sJYYodosnW3K4E2tIcEt1+ABslt82mdGv/YL/c F695SOrxKk/ioyf9jFUo9vUXKtG3v3ksBicyRnQH+2ebCepkwQsA4ZqRg4/kdctgIOW2 D/hXAEotEuBW2pUuizsmUO7dbtNz7mRu8FBdL/ObxlbxarP9AVrMY4QNsONOwQhzieE8 Qt/w== X-Gm-Message-State: ALKqPwdMCObVkh+LHqLqKv8L170T/RV8jv1TFTiFYLDonnpGqIXa/nSb hbc/rakqWW/QZ9izUQ6v9RdYeNPaCPo= X-Received: by 2002:a17:902:3381:: with SMTP id b1-v6mr1038612plc.248.1526101375964; Fri, 11 May 2018 22:02:55 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:02:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:44 -0700 Message-Id: <20180512050250.12774-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH 3/9] target/m68k: Remove DISAS_JUMP_NEXT as unused X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/m68k/translate.c | 1 - 1 file changed, 1 deletion(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 6ab24fac0b..c795d8e64f 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -199,7 +199,6 @@ static void do_writebacks(DisasContext *s) /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ #define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */ -#define DISAS_JUMP_NEXT DISAS_TARGET_3 #if defined(CONFIG_USER_ONLY) #define IS_USER(s) 1 From patchwork Sat May 12 05:02:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135637 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1760033lji; Fri, 11 May 2018 22:13:47 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqJAROj9civ1lYyX5FuhxbZd0h1Ca8E52u+7juhzvlGZTo/FCxmd6jHHQq2jWrmm7K1M7U9 X-Received: by 2002:aed:3bcc:: with SMTP id s12-v6mr796154qte.83.1526102027247; Fri, 11 May 2018 22:13:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526102027; cv=none; d=google.com; s=arc-20160816; b=JP4KqXnzhXkfqLB2zPwj3vlEaOP08aH7XzM6aA1vxh/RnU20cw3VHK2HvzjLOXVEPl azboLbGKK8cE+QLis+LJQv7Zxi3QVW5nPWFPDNCt786Bxd5mfUcC7CdLktaTVn8uFOxU NKUKJP/yXkEs+RQTikxNjecso/DdlQ4D5YBTJOek67OA+GL2EbKt/rYTq6PoT9k476Ei 0QUJ8UaxpqyqRuKf1TSl78dc3U8ys7ahS4YDM5sUr2kgVURY/kPDtgRDFf9ZGYV2lDa+ Z+pxKnIAaE4M3ibLyXHomYQDnKjHZ4g0voTxUUrkOKkOZD0tieTugAgehd95i69GlJfj cfqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=TFZiFQHICSD7tSpPnk5VYIEXmQgj2zjPgKFhaAtzL7M=; b=Pe7uF+QiREtEiooLYaq83QVDaO0qCzxh39bZK+TbHP/Ui2luse3GUFqkAGiQhRJ+J5 w0k7sHQJyhl9886c68UB0yAILqEywjE6LLjqUc78ojiG9kNRo1hI2yp6lr+i22osj20I 3kBnBk5gUDRDVMJ4E/PHwmVC0Vz3p0+hc7RzKaRDm0I44c4rz4/dpYLdWGfPYespnQEE 7f9t50q+HzUlPdx2eilkS4K+6YSma0kv9fZ+pWEy7PiZioBdidkYws+h04mEUvkr+9bC J6oI3yYe4tJE7uak399+T1g5hyrE2nm8KVlKxKHEAyxwumdFpKRs1fdXYzyR9N8L+9I6 5E7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=j4Qp3yq5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id q12-v6si3885728qtk.125.2018.05.11.22.13.47 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:13:47 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=j4Qp3yq5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45714 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMqo-0005Yd-MO for patch@linaro.org; Sat, 12 May 2018 01:13:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgN-000412-Tg for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgM-0008LZ-Lk for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:59 -0400 Received: from mail-pl0-x243.google.com ([2607:f8b0:400e:c01::243]:44561) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgM-0008LT-GO for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:58 -0400 Received: by mail-pl0-x243.google.com with SMTP id e6-v6so4362018plt.11 for ; Fri, 11 May 2018 22:02:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TFZiFQHICSD7tSpPnk5VYIEXmQgj2zjPgKFhaAtzL7M=; b=j4Qp3yq5rGG7XoUY/MTk4zYcYCPi/XIbBh/Y9MaG5bkyM04QNkcosfVNUTzqgObpL/ QTko7B24AgyBadA9HYxsmFwZPNPeqVe3dNqH04RPIUztu8up3J8BEU0IetoC3ZkgAFNl WR4nnpeR1Rb6tei6AYd8NStmUNINKGVn2cy+4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TFZiFQHICSD7tSpPnk5VYIEXmQgj2zjPgKFhaAtzL7M=; b=nHVIeXuJDpM9rx8fi7VnOuhSDVRX1nyU33lvKuD/6rK47ojXTz+q2ik75WaErNewXt LglwTOaDkQPRGZFaakXBHUNbTyyFcwk1GITfeeqcMc4oYw0qyUaRzHEZviMcv/1Qd9rZ Xh0urvtjKHr2VTntCP79mayF9r6UBDXjH73TdlRQu/Yl2DbYQklngXM4/fHmSU6vJDVH JwedGJe+0xIGkBeEf6AyC8Vzqmd3cCBeN/OixVNm7thuttf0kCKd+68nkOUdwQ6rsu2Z 1DLchKPI34c/h3eQx6vRJMRHCwPCXXQfo5fEn5xYqiqngLiSMYUMaxV6qSaI6k9/6Mmg mfRg== X-Gm-Message-State: ALKqPweZpaT4YmTq6kZmmDL7Bhk+nzNpeVscmB+YVNRIXmi6CL+7xIT9 hQVFKRgyihT7LpWNUYTGTqPjt0EKKio= X-Received: by 2002:a17:902:3a5:: with SMTP id d34-v6mr1033820pld.103.1526101377184; Fri, 11 May 2018 22:02:57 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:02:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:45 -0700 Message-Id: <20180512050250.12774-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH 4/9] target/m68k: Use lookup_and_goto_tb for DISAS_JUMP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These are all indirect or out-of-page direct jumps. We can indirectly chain to the next TB without going back to the main loop. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index c795d8e64f..80712ed0af 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6139,8 +6139,11 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) update_cc_op(dc); gen_jmp_tb(dc, 0, dc->pc); break; - default: case DISAS_JUMP: + /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ + tcg_gen_lookup_and_goto_ptr(); + break; + default: case DISAS_UPDATE: update_cc_op(dc); /* indicate that the hash table must be used to find the next TB */ From patchwork Sat May 12 05:02:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135638 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1760094lji; Fri, 11 May 2018 22:13:51 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrWH/K0+dy1e7XyA2m0+3xyMW/G7e3m1wsi1rSIomZee9wCs9tuh2qkcNDjoZQc0eRvTUZt X-Received: by 2002:a37:a78a:: with SMTP id q132-v6mr736778qke.154.1526102031433; Fri, 11 May 2018 22:13:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526102031; cv=none; d=google.com; s=arc-20160816; b=BlA3FG7ciww4Eq7iVoNKRNw8cZ3tSGN5NcMgcxCf4uZCZ2qsbNcx8sIqcV8nmxGKvW lDFHXtf+45BbxsCAlpKZ/+NTgcbqJs1CWls3mlDyfMbuvUxuRkssGzc7cnYz/OyT+ogC D/I1R88fzindzeiqS3U26mpboT8hTRLwx7eupgFeP9K9RsV202RBB+VW5kOlIZPtbll7 iCBR2Yx34lDvm9u8hsBYbb5GnZfPt1BVznk0Tp1Whrjzm7O6NKyjB+UT37N8LjoEQmHh ggcUuMipl0ybtDI0Du4HNAT0454LS5CW5xULH10hwDkxYOSzHhPJwqeqe7jZCKIbIHjL Qu2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=UQ+zNfjQyVUBm2RnKmWYmwQxmXk3WBw2GUbAKJ4QHf8=; b=lmAI636NQvZCbUmCvKhXVXM1d3f33lG9X237GHdoqJ3I+ImtHri86bOpDtQvYS3tgb ScPUqv/sCrtoWakmtz2uPrd3JlChtrUjvM66TXVrtFvN0C/oKphPT/DWkat0Dpm6AfYY VnLErCsVdEJEcXcuQCzu6673QtGFcrhM8IMINGoVHtJkJLgpuI9ele+qt9rUllvD1xXR i7EEdPoHUmOw/iysWpCPbgTyD9NWPpVJVJzFpoUAZUOEAEk9efdx1iOoc/yloF5hUyk8 UhPiku4ExVHRDDPS4HrTOY6ePkcqcMRdJS8rutkGKDmK4PULV1K0rVXa27drMzHhsQZv GfGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RqXUlZOx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id d26-v6si4386279qtn.268.2018.05.11.22.13.51 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:13:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RqXUlZOx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45717 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMqs-0005dT-RI for patch@linaro.org; Sat, 12 May 2018 01:13:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60537) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgO-00041A-UP for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgN-0008Ly-WC for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:00 -0400 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]:40795) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgN-0008Lo-Q3 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:02:59 -0400 Received: by mail-pg0-x241.google.com with SMTP id l2-v6so3252015pgc.7 for ; Fri, 11 May 2018 22:02:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UQ+zNfjQyVUBm2RnKmWYmwQxmXk3WBw2GUbAKJ4QHf8=; b=RqXUlZOxJSCV0057I0ly8V7eaa2CRlvZx51934qSkps9XjxhsNgx1LL2iZxjKkRbIe i3Eo31ph48yXpOXmJ7DyNnsG1urIUo4CWJkgWBtXXDypn4nHsIpAAvcddm+LF+fhno0q YxpT3yx2vemvHqdUP5bbZ3pCkI71vY5N28naw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UQ+zNfjQyVUBm2RnKmWYmwQxmXk3WBw2GUbAKJ4QHf8=; b=iqP5M17CZ6EUfAc1YjTWkBdarzUMP+nvlKUvM35u/GsH6Q3w6KsupFsxeoIPxLWasA uxgtZcph4Xym/s33HqbjMbvOnrAizk4VxnmifGGMw4BYeCX5+q9DG4oQ5lOVzq41s34k SXNTgoPKVBWu9+J0a4xdUaxtHqVNTMekY+Nm4nCWOcs2Q927NvMkKE61iabVv+86vmpY Y5WsJiuhwR/HjNugW3Ev7iYoYkhoCDvf86W5ull4O82/ZRr/JzfNQuC8O1LTyDoLM/uO k3AsrPgboH3h6jTV3kDYylsAWGwdEx5arOxb298rlsZx42PI45c54B1HvzA1CRrVGj3P aGJQ== X-Gm-Message-State: ALKqPwef2+mzBMcpf9tBmpRwO2Il8ioXxSO8DD2C2JO61ue3cT3HiMqk Q1qYL73XKZCzMWV1FfQrEq8XIUps/HE= X-Received: by 2002:a62:59d1:: with SMTP id k78-v6mr1704730pfj.54.1526101378386; Fri, 11 May 2018 22:02:58 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:02:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:46 -0700 Message-Id: <20180512050250.12774-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [PATCH 5/9] target/m68k: Rename DISAS_UPDATE and gen_lookup_tb X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The name gen_lookup_tb is at odds with tcg_gen_lookup_and_goto_tb. For these cases, we do indeed want to exit back to the main loop. Similarly, DISAS_UPDATE performs no actual update, whereas DISAS_EXIT does what it says. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 80712ed0af..ff1a8d58f4 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -198,7 +198,7 @@ static void do_writebacks(DisasContext *s) /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ -#define DISAS_UPDATE DISAS_TARGET_1 /* cpu state was modified dynamically */ +#define DISAS_EXIT DISAS_TARGET_1 /* cpu state was modified dynamically */ #if defined(CONFIG_USER_ONLY) #define IS_USER(s) 1 @@ -1446,11 +1446,11 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) } /* Force a TB lookup after an instruction that changes the CPU state. */ -static void gen_lookup_tb(DisasContext *s) +static void gen_exit_tb(DisasContext *s) { update_cc_op(s); tcg_gen_movi_i32(QREG_PC, s->pc); - s->is_jmp = DISAS_UPDATE; + s->is_jmp = DISAS_EXIT; } #define SRC_EA(env, result, opsize, op_sign, addrp) do { \ @@ -4604,7 +4604,7 @@ DISAS_INSN(move_to_sr) return; } gen_move_to_sr(env, s, insn, false); - gen_lookup_tb(s); + gen_exit_tb(s); } DISAS_INSN(move_from_usp) @@ -4680,7 +4680,7 @@ DISAS_INSN(cf_movec) reg = DREG(ext, 12); } gen_helper_cf_movec_to(cpu_env, tcg_const_i32(ext & 0xfff), reg); - gen_lookup_tb(s); + gen_exit_tb(s); } DISAS_INSN(m68k_movec) @@ -4705,7 +4705,7 @@ DISAS_INSN(m68k_movec) } else { gen_helper_m68k_movec_from(reg, cpu_env, tcg_const_i32(ext & 0xfff)); } - gen_lookup_tb(s); + gen_exit_tb(s); } DISAS_INSN(intouch) @@ -5749,7 +5749,7 @@ DISAS_INSN(to_macsr) TCGv val; SRC_EA(env, val, OS_LONG, 0, NULL); gen_helper_set_macsr(cpu_env, val); - gen_lookup_tb(s); + gen_exit_tb(s); } DISAS_INSN(to_mask) @@ -6144,9 +6144,9 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) tcg_gen_lookup_and_goto_ptr(); break; default: - case DISAS_UPDATE: - update_cc_op(dc); - /* indicate that the hash table must be used to find the next TB */ + case DISAS_EXIT: + /* We updated CC_OP and PC in gen_exit_tb, but also modified + other state that may require returning to the main loop. */ tcg_gen_exit_tb(0); break; case DISAS_NORETURN: From patchwork Sat May 12 05:02:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135629 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1752574lji; Fri, 11 May 2018 22:03:57 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqEgx4G5EAO2T5J1/Avm718eMixBAJ7hu8hKOSOG/ebTKd53w+00o8RNqMJmIVXeK1BT1tI X-Received: by 2002:a37:6c02:: with SMTP id h2-v6mr672170qkc.145.1526101437530; Fri, 11 May 2018 22:03:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526101437; cv=none; d=google.com; s=arc-20160816; b=jE+JMujV2TQl2xawkbrT8X2QHy8eQ7Rx4USvkRurYolTmKarqKI/MzuVFO6X6MlmhZ Dem2vIy+tp3EfXTgeGwL3RkcLjg79ltl/vJ4APDl9uKv6Ebn2PGElrKFukp7yiPiqeyC 541hGePxyJXGNigjKzRMLY68/ovNMudbCzoI8jSl30BgDI/uCAh6YvnjB5z+SNxJ1RPq i9Yj6ZQm8vxrxb3ETOMofjmHIc7lrdIoifhdcqBCTm8RHVibi7FLTh6nyVKLX/9V8I1a yTitzjFwmbHMMBn4hngxYPicDtm14wZQmAHDL0Q8Fa4Ev8LdVylNHiINmhBj3EK9O5ZW ugEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=pE9ae2rbzFXA3B5EwRdW4pgGBDXjURbKiMGdR6dXZhQ=; b=IHfn62bt1V+nM723xQyKnh0n/UnlfbOwLZ4FIbRepeXBgZZtP9NdluJobOr6enwh3a BSwGe1bBmobPiCtFaKB25Q+fZLa/ncb+ZreaozRcpXcmEra7rRRmoaBw4Db03wpTcNxa w2VcRA4BHOXbu6mS0XKRWBG9ZMPMIuuyLVVzsKPkAUO9zeRTmXEoKX8oiZ5mu2J5g4P9 vYbND0ow8Y6IVTwpNYZyLblaSV9ld9LhVQtsoD27Or4g4uMkLpFIJE3cJ9ETE1dOCSbD OjaTffZ2+GSUt8qNTKpZgyp3VdxZEedqKCosLGDC6sUfngEBIWwl2bUvGPwgrRBDTdIF R8SA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=h+G7BW/1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id r4-v6si4790161qki.301.2018.05.11.22.03.57 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:03:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=h+G7BW/1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45433 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMhI-0004Fn-V8 for patch@linaro.org; Sat, 12 May 2018 01:03:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60554) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgR-00041O-D8 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgP-0008Mi-DV for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:03 -0400 Received: from mail-pl0-x243.google.com ([2607:f8b0:400e:c01::243]:45199) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgP-0008MV-5e for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:01 -0400 Received: by mail-pl0-x243.google.com with SMTP id bi12-v6so4363095plb.12 for ; Fri, 11 May 2018 22:03:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pE9ae2rbzFXA3B5EwRdW4pgGBDXjURbKiMGdR6dXZhQ=; b=h+G7BW/1ihV6wFwKS1/FUoA3FgS6QxvLyFiovNASxezcuYTiMlCzSTk+qgQtKsE7tO /FLSjDbjRP/L0boaOod24kIR7nfhd5cfodrXkjoE1WHRprbo7vf+6eXZp6iz7FcO7vou 9dqM0FOHYgpqry52/bS2FQJUpUxY+f0bm1DB4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pE9ae2rbzFXA3B5EwRdW4pgGBDXjURbKiMGdR6dXZhQ=; b=pNsc+opaesG+nho1cGlHofAwg4aTQAw7MUPBXoRSlbbl2M8ymD3KFLK53pG0CvNb/i 4LiCg+B4hfTDelNSzuh8dOSxTIAInOqClKe0moifLFAwT3XbVj6ZkgPih632uULHUm7V YPSmF/x30d6Q80Q5o3yL67hjRYojvAu9/nTEgtl83aWNUCGmhOznrNVfCNpdP6+MeY2K FvCyPvip2Yv01Q/VzZJesxc7bqdHr3+4Lbq1WOG3HA10sOF0xL6puAn4TlJ3IMJcdieH Jo6gEyQneL0nN9gcsqCmvg9FylNLiwY2K65NrNiJCzJq1m9QesPEowxCldFy9DWGUqze pOaA== X-Gm-Message-State: ALKqPweiCYuFV6CkMzYkuqwW3jtuubllpLhG/XvtrRUDOgTgkr/LOsqe fOr6FtOunso8YSa/RTh0tN0oM+ko1BM= X-Received: by 2002:a17:902:5610:: with SMTP id h16-v6mr1035984pli.140.1526101379717; Fri, 11 May 2018 22:02:59 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:02:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:47 -0700 Message-Id: <20180512050250.12774-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH 6/9] target/m68k: Convert to DisasContextBase X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Removed ctx->insn_pc in favour of ctx->base.pc_next. Yes, it is annoying, but didn't want to waste its 4 bytes. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 137 ++++++++++++++++++++-------------------- 1 file changed, 67 insertions(+), 70 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index ff1a8d58f4..01d3265437 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -111,14 +111,11 @@ void m68k_tcg_init(void) /* internal defines */ typedef struct DisasContext { + DisasContextBase base; CPUM68KState *env; - target_ulong insn_pc; /* Start of the current instruction. */ target_ulong pc; - int is_jmp; CCOp cc_op; /* Current CC operation */ int cc_op_synced; - struct TranslationBlock *tb; - int singlestep_enabled; TCGv_i64 mactmp; int done_mac; int writeback_mask; @@ -203,10 +200,10 @@ static void do_writebacks(DisasContext *s) #if defined(CONFIG_USER_ONLY) #define IS_USER(s) 1 #else -#define IS_USER(s) (!(s->tb->flags & TB_FLAGS_MSR_S)) -#define SFC_INDEX(s) ((s->tb->flags & TB_FLAGS_SFC_S) ? \ +#define IS_USER(s) (!(s->base.tb->flags & TB_FLAGS_MSR_S)) +#define SFC_INDEX(s) ((s->base.tb->flags & TB_FLAGS_SFC_S) ? \ MMU_KERNEL_IDX : MMU_USER_IDX) -#define DFC_INDEX(s) ((s->tb->flags & TB_FLAGS_DFC_S) ? \ +#define DFC_INDEX(s) ((s->base.tb->flags & TB_FLAGS_DFC_S) ? \ MMU_KERNEL_IDX : MMU_USER_IDX) #endif @@ -278,7 +275,7 @@ static void gen_jmp_im(DisasContext *s, uint32_t dest) { update_cc_op(s); tcg_gen_movi_i32(QREG_PC, dest); - s->is_jmp = DISAS_JUMP; + s->base.is_jmp = DISAS_JUMP; } /* Generate a jump to the address in qreg DEST. */ @@ -286,7 +283,7 @@ static void gen_jmp(DisasContext *s, TCGv dest) { update_cc_op(s); tcg_gen_mov_i32(QREG_PC, dest); - s->is_jmp = DISAS_JUMP; + s->base.is_jmp = DISAS_JUMP; } static void gen_exception(DisasContext *s, uint32_t dest, int nr) @@ -300,12 +297,12 @@ static void gen_exception(DisasContext *s, uint32_t dest, int nr) gen_helper_raise_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); - s->is_jmp = DISAS_NORETURN; + s->base.is_jmp = DISAS_NORETURN; } static inline void gen_addr_fault(DisasContext *s) { - gen_exception(s, s->insn_pc, EXCP_ADDRESS); + gen_exception(s, s->base.pc_next, EXCP_ADDRESS); } /* Generate a load from the specified address. Narrow values are @@ -1003,7 +1000,7 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, break; case OS_EXTENDED: if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) { - gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); + gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); break; } tcg_gen_qemu_ld32u(tmp, addr, index); @@ -1017,7 +1014,7 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, /* unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ - gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); + gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); break; default: g_assert_not_reached(); @@ -1057,7 +1054,7 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, break; case OS_EXTENDED: if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) { - gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); + gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); break; } tcg_gen_ld16u_i32(tmp, fp, offsetof(FPReg, l.upper)); @@ -1071,7 +1068,7 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, /* unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ - gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); + gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); break; default: g_assert_not_reached(); @@ -1203,7 +1200,7 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, break; case OS_EXTENDED: if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) { - gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); + gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); break; } tmp = tcg_const_i32(read_im32(env, s) >> 16); @@ -1217,7 +1214,7 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, /* unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ - gen_exception(s, s->insn_pc, EXCP_FP_UNIMP); + gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); break; default: g_assert_not_reached(); @@ -1450,7 +1447,7 @@ static void gen_exit_tb(DisasContext *s) { update_cc_op(s); tcg_gen_movi_i32(QREG_PC, s->pc); - s->is_jmp = DISAS_EXIT; + s->base.is_jmp = DISAS_EXIT; } #define SRC_EA(env, result, opsize, op_sign, addrp) do { \ @@ -1474,8 +1471,8 @@ static void gen_exit_tb(DisasContext *s) static inline bool use_goto_tb(DisasContext *s, uint32_t dest) { #ifndef CONFIG_USER_ONLY - return (s->tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) || - (s->insn_pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK); + return (s->base.pc_first & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) + || (s->base.pc_next & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK); #else return true; #endif @@ -1484,17 +1481,17 @@ static inline bool use_goto_tb(DisasContext *s, uint32_t dest) /* Generate a jump to an immediate address. */ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) { - if (unlikely(s->singlestep_enabled)) { + if (unlikely(s->base.singlestep_enabled)) { gen_exception(s, dest, EXCP_DEBUG); } else if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(n); tcg_gen_movi_i32(QREG_PC, dest); - tcg_gen_exit_tb((uintptr_t)s->tb + n); + tcg_gen_exit_tb((uintptr_t)s->base.tb + n); } else { gen_jmp_im(s, dest); tcg_gen_exit_tb(0); } - s->is_jmp = DISAS_NORETURN; + s->base.is_jmp = DISAS_NORETURN; } DISAS_INSN(scc) @@ -1541,12 +1538,12 @@ DISAS_INSN(dbcc) DISAS_INSN(undef_mac) { - gen_exception(s, s->insn_pc, EXCP_LINEA); + gen_exception(s, s->base.pc_next, EXCP_LINEA); } DISAS_INSN(undef_fpu) { - gen_exception(s, s->insn_pc, EXCP_LINEF); + gen_exception(s, s->base.pc_next, EXCP_LINEF); } DISAS_INSN(undef) @@ -1555,8 +1552,8 @@ DISAS_INSN(undef) for the 680x0 series, as well as those that are implemented but actually illegal for CPU32 or pre-68020. */ qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x", - insn, s->insn_pc); - gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED); + insn, s->base.pc_next); + gen_exception(s, s->base.pc_next, EXCP_UNSUPPORTED); } DISAS_INSN(mulw) @@ -1616,7 +1613,7 @@ DISAS_INSN(divl) if (ext & 0x400) { if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) { - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); return; } @@ -2310,7 +2307,7 @@ DISAS_INSN(arith_im) break; case OS_WORD: if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } src1 = gen_get_sr(s); @@ -2479,7 +2476,7 @@ DISAS_INSN(cas2w) (REG(ext1, 6) << 3) | (REG(ext2, 0) << 6) | (REG(ext1, 0) << 9)); - if (tb_cflags(s->tb) & CF_PARALLEL) { + if (tb_cflags(s->base.tb) & CF_PARALLEL) { gen_helper_exit_atomic(cpu_env); } else { gen_helper_cas2w(cpu_env, regs, addr1, addr2); @@ -2529,7 +2526,7 @@ DISAS_INSN(cas2l) (REG(ext1, 6) << 3) | (REG(ext2, 0) << 6) | (REG(ext1, 0) << 9)); - if (tb_cflags(s->tb) & CF_PARALLEL) { + if (tb_cflags(s->base.tb) & CF_PARALLEL) { gen_helper_cas2l_parallel(cpu_env, regs, addr1, addr2); } else { gen_helper_cas2l(cpu_env, regs, addr1, addr2); @@ -2720,7 +2717,7 @@ DISAS_INSN(swap) DISAS_INSN(bkpt) { - gen_exception(s, s->insn_pc, EXCP_DEBUG); + gen_exception(s, s->base.pc_next, EXCP_DEBUG); } DISAS_INSN(pea) @@ -2773,7 +2770,7 @@ DISAS_INSN(pulse) DISAS_INSN(illegal) { - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); } /* ??? This should be atomic. */ @@ -2803,7 +2800,7 @@ DISAS_INSN(mull) if (ext & 0x400) { if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) { - gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED); + gen_exception(s, s->base.pc_next, EXCP_UNSUPPORTED); return; } @@ -2904,7 +2901,7 @@ DISAS_INSN(unlk) DISAS_INSN(reset) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4375,7 +4372,7 @@ DISAS_INSN(chk) } /* fallthru */ default: - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); return; } SRC_EA(env, src, opsize, 1, NULL); @@ -4402,13 +4399,13 @@ DISAS_INSN(chk2) opsize = OS_LONG; break; default: - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); return; } ext = read_im16(env, s); if ((ext & 0x0800) == 0) { - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); return; } @@ -4468,7 +4465,7 @@ DISAS_INSN(move16_reg) ext = read_im16(env, s); if ((ext & (1 << 15)) == 0) { - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); } m68k_copy_line(AREG(ext, 12), AREG(insn, 0), index); @@ -4530,7 +4527,7 @@ DISAS_INSN(move_from_sr) TCGv sr; if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68000)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } sr = gen_get_sr(s); @@ -4547,7 +4544,7 @@ DISAS_INSN(moves) int extend; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4600,7 +4597,7 @@ DISAS_INSN(moves) DISAS_INSN(move_to_sr) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } gen_move_to_sr(env, s, insn, false); @@ -4610,7 +4607,7 @@ DISAS_INSN(move_to_sr) DISAS_INSN(move_from_usp) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } tcg_gen_ld_i32(AREG(insn, 0), cpu_env, @@ -4620,7 +4617,7 @@ DISAS_INSN(move_from_usp) DISAS_INSN(move_to_usp) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } tcg_gen_st_i32(AREG(insn, 0), cpu_env, @@ -4630,7 +4627,7 @@ DISAS_INSN(move_to_usp) DISAS_INSN(halt) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4642,7 +4639,7 @@ DISAS_INSN(stop) uint16_t ext; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4656,10 +4653,10 @@ DISAS_INSN(stop) DISAS_INSN(rte) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } - gen_exception(s, s->insn_pc, EXCP_RTE); + gen_exception(s, s->base.pc_next, EXCP_RTE); } DISAS_INSN(cf_movec) @@ -4668,7 +4665,7 @@ DISAS_INSN(cf_movec) TCGv reg; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4689,7 +4686,7 @@ DISAS_INSN(m68k_movec) TCGv reg; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4711,7 +4708,7 @@ DISAS_INSN(m68k_movec) DISAS_INSN(intouch) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } /* ICache fetch. Implement as no-op. */ @@ -4720,7 +4717,7 @@ DISAS_INSN(intouch) DISAS_INSN(cpushl) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } /* Cache push/invalidate. Implement as no-op. */ @@ -4729,7 +4726,7 @@ DISAS_INSN(cpushl) DISAS_INSN(cpush) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } /* Cache push/invalidate. Implement as no-op. */ @@ -4738,7 +4735,7 @@ DISAS_INSN(cpush) DISAS_INSN(cinv) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } /* Invalidate cache line. Implement as no-op. */ @@ -4750,7 +4747,7 @@ DISAS_INSN(pflush) TCGv opmode; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -4764,7 +4761,7 @@ DISAS_INSN(ptest) TCGv is_read; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } is_read = tcg_const_i32((insn >> 5) & 1); @@ -4775,7 +4772,7 @@ DISAS_INSN(ptest) DISAS_INSN(wddata) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); } DISAS_INSN(wdebug) @@ -4783,7 +4780,7 @@ DISAS_INSN(wdebug) M68kCPU *cpu = m68k_env_get_cpu(env); if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } /* TODO: Implement wdebug. */ @@ -4793,7 +4790,7 @@ DISAS_INSN(wdebug) DISAS_INSN(trap) { - gen_exception(s, s->insn_pc, EXCP_TRAP0 + (insn & 0xf)); + gen_exception(s, s->base.pc_next, EXCP_TRAP0 + (insn & 0xf)); } static void gen_load_fcr(DisasContext *s, TCGv res, int reg) @@ -4860,7 +4857,7 @@ static void gen_op_fmove_fcr(CPUM68KState *env, DisasContext *s, switch (mode) { case 0: /* Dn */ if (mask != M68K_FPIAR && mask != M68K_FPSR && mask != M68K_FPCR) { - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); return; } if (is_write) { @@ -4871,7 +4868,7 @@ static void gen_op_fmove_fcr(CPUM68KState *env, DisasContext *s, return; case 1: /* An, only with FPIAR */ if (mask != M68K_FPIAR) { - gen_exception(s, s->insn_pc, EXCP_ILLEGAL); + gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); return; } if (is_write) { @@ -5429,7 +5426,7 @@ DISAS_INSN(frestore) TCGv addr; if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } if (m68k_feature(s->env, M68K_FEATURE_M68040)) { @@ -5443,7 +5440,7 @@ DISAS_INSN(frestore) DISAS_INSN(fsave) { if (IS_USER(s)) { - gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } @@ -6075,14 +6072,14 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) /* generate intermediate code */ pc_start = tb->pc; - dc->tb = tb; + dc->base.tb = tb; dc->env = env; - dc->is_jmp = DISAS_NEXT; + dc->base.is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->cc_op = CC_OP_DYNAMIC; dc->cc_op_synced = 1; - dc->singlestep_enabled = cs->singlestep_enabled; + dc->base.singlestep_enabled = cs->singlestep_enabled; dc->done_mac = 0; dc->writeback_mask = 0; num_insns = 0; @@ -6116,9 +6113,9 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) gen_io_start(); } - dc->insn_pc = dc->pc; + dc->base.pc_next = dc->pc; disas_m68k_insn(env, dc); - } while (!dc->is_jmp && !tcg_op_buf_full() && + } while (!dc->base.is_jmp && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && (pc_offset) < (TARGET_PAGE_SIZE - 32) && @@ -6128,13 +6125,13 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) gen_io_end(); if (unlikely(cs->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ - if (!dc->is_jmp) { + if (!dc->base.is_jmp) { update_cc_op(dc); tcg_gen_movi_i32(QREG_PC, dc->pc); } gen_helper_raise_exception(cpu_env, tcg_const_i32(EXCP_DEBUG)); } else { - switch(dc->is_jmp) { + switch(dc->base.is_jmp) { case DISAS_NEXT: update_cc_op(dc); gen_jmp_tb(dc, 0, dc->pc); From patchwork Sat May 12 05:02:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135634 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1756692lji; Fri, 11 May 2018 22:09:27 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqHJV8SSfrBTWv+eyYwqXtd4E0BalnZCGZZQZDBXpyvLc/4iFaV3T97Rc/czXaaKPjBufIb X-Received: by 2002:a0c:86ba:: with SMTP id 55-v6mr1125470qvf.234.1526101766977; Fri, 11 May 2018 22:09:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526101766; cv=none; d=google.com; s=arc-20160816; b=KpzLvTzBfeMsLa/t+uMYVKU4OtcxIl03+3uG9Usp3RPR/1R2r1JRy0R9Bf8T0zHYGc tX0TqB2oc2qW0GLZIvbmh7pAGwbW0xNvJyXxAHme0Q3/GS/NnhLHNev510g48Hk2B6rt euVsSwh4ELppVKURzG897J9EQtN/0gu29BH95GJhXt3C22P3efsD7riNlRJVYxNYnGPA o0RboGZDDp68p/ITVBgTvSnAh3gSHoe44D5rEKb3FKJN4XlL7BtwtXvOBSnoYgBYCpqW 76QBUr+hV9PVNOt4BKdS0DXAJOcLDcMgAiEeXPAeObrOWPJLl2PCQ5tXpkP7u6B9EOEp xy1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=oJwjsjbzZ8nnpGUKhg+8/csmYxbKT/f7eSwlxRP/Gd8=; b=CdLVRSuShFpw8KADhH6eeGt/grctz6cHwl5RDYBHFD4GBAt/FT3xchNgIBj0AwAkex C8uNtpZRFZDeXKVepubdnX+sfLYp+UKtmkBDjDgJ96TaXzv3S8lZvUuIhYoAxJ4JrzQL NeumWKlhPGiJfiWpUZ4KS2sgv6F/VrOtYTAspbTsnxDQ/+bByz4kc7iitmgMwkw60i4M RKPY0PuYy81mao8HPD3EyhD2hBuErfoyK35n6zSTsXy9uMrzVcEVME8iIdNvO8RseWqd 5/bpPkZwE/Iyvw3IAzLqEhY7j2tldjn0pNMUw0abBNZbeUx2aCdP424lI9Guy/iQLbY/ /Jfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=A9tGZm/k; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 12-v6si4679888qtc.338.2018.05.11.22.09.26 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:09:26 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=A9tGZm/k; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45588 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMmc-0006O4-DU for patch@linaro.org; Sat, 12 May 2018 01:09:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60561) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgS-00042D-0o for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgQ-0008Mx-OO for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:04 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:34437) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgQ-0008Mn-GX for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:02 -0400 Received: by mail-pf0-x242.google.com with SMTP id a14-v6so3619363pfi.1 for ; Fri, 11 May 2018 22:03:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oJwjsjbzZ8nnpGUKhg+8/csmYxbKT/f7eSwlxRP/Gd8=; b=A9tGZm/k3WIzylnSIKzaZeEnLUYGy/tltljFzPi5uqgRSdOfOa851jBoH0EKSADo4i h8XuyXV6leoYwD0626p5cyCRXI7rRxaSzruBwW7bcHI53c69S+G8A+lskYhtJIYWEr0y mZ0t/Zp7it/MxzOPfTX8ChaXEZccrLDW+uqXY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oJwjsjbzZ8nnpGUKhg+8/csmYxbKT/f7eSwlxRP/Gd8=; b=OxQXWPiLY+k/AU60J4+63+qQjDIpuXiTI0E6IY5bPFe/JzxltyrQizP+ICqcxsmVHa WM9DUSIdQq7vYrxmsSgCruzkFIIJoclCPWWnYCMec6FDRG6uwRurCtUrO3m/G9kZJ7No aPRJ0Qqys9qhvCwCNAZchr+f3kiBiPNBkRaNOpIrSmlQK1i5DN23Lpb6dFnQ4gcVxLYj rLuN7PtdP6bDPA2cELmKgZFNsLMG/r/6P6VWVFhYcjjxr9zgT5nAAd/ksj4nWTKt+cNZ G6tCzFw9Qf8/hXnONRIx5cLK3jo6f69xyz8CHTGy3R7Dn3gyZtXK+a20Oxl2NkV3JhwR upKQ== X-Gm-Message-State: ALKqPweIo+eWTgJpmp5kZpjjFAYRhxX4yuLIFOpOR8vnC9IAwOyd5GL8 eZnQJCl3hAC3bcTzvvROTHy/EWo+MZs= X-Received: by 2002:a62:6c87:: with SMTP id h129-v6mr1657623pfc.179.1526101381059; Fri, 11 May 2018 22:03:01 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.02.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:03:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:48 -0700 Message-Id: <20180512050250.12774-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH 7/9] target/m68k: Convert to TranslatorOps X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/m68k/translate.c | 176 ++++++++++++++++++++-------------------- 1 file changed, 86 insertions(+), 90 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 01d3265437..0ab9ab1148 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6059,113 +6059,109 @@ static void disas_m68k_insn(CPUM68KState * env, DisasContext *s) do_release(s); } -/* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) { - CPUM68KState *env = cs->env_ptr; - DisasContext dc1, *dc = &dc1; - target_ulong pc_start; - int pc_offset; - int num_insns; - int max_insns; - - /* generate intermediate code */ - pc_start = tb->pc; - - dc->base.tb = tb; + DisasContext *dc = container_of(dcbase, DisasContext, base); + CPUM68KState *env = cpu->env_ptr; dc->env = env; - dc->base.is_jmp = DISAS_NEXT; - dc->pc = pc_start; + dc->pc = dc->base.pc_first; dc->cc_op = CC_OP_DYNAMIC; dc->cc_op_synced = 1; - dc->base.singlestep_enabled = cs->singlestep_enabled; dc->done_mac = 0; dc->writeback_mask = 0; - num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } - init_release_array(dc); +} - gen_tb_start(tb); - do { - pc_offset = dc->pc - pc_start; - tcg_gen_insn_start(dc->pc, dc->cc_op); - num_insns++; +static void m68k_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) +{ +} - if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { - gen_exception(dc, dc->pc, EXCP_DEBUG); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->pc += 2; - break; - } +static void m68k_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); +} - if (num_insns == max_insns && (tb_cflags(tb) & CF_LAST_IO)) { - gen_io_start(); - } +static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, + const CPUBreakpoint *bp) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); - dc->base.pc_next = dc->pc; - disas_m68k_insn(env, dc); - } while (!dc->base.is_jmp && !tcg_op_buf_full() && - !cs->singlestep_enabled && - !singlestep && - (pc_offset) < (TARGET_PAGE_SIZE - 32) && - num_insns < max_insns); + gen_exception(dc, dc->base.pc_next, EXCP_DEBUG); + /* The address covered by the breakpoint must be included in + [tb->pc, tb->pc + tb->size) in order to for it to be + properly cleared -- thus we increment the PC here so that + the logic setting tb->size below does the right thing. */ + dc->base.pc_next += 2; - if (tb_cflags(tb) & CF_LAST_IO) - gen_io_end(); - if (unlikely(cs->singlestep_enabled)) { - /* Make sure the pc is updated, and raise a debug exception. */ - if (!dc->base.is_jmp) { - update_cc_op(dc); - tcg_gen_movi_i32(QREG_PC, dc->pc); - } + return true; +} + +static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + disas_m68k_insn(cpu->env_ptr, dc); + dc->base.pc_next = dc->pc; + + if (dc->base.is_jmp == DISAS_NEXT + && dc->pc - dc->base.pc_first >= TARGET_PAGE_SIZE - 32) { + dc->base.is_jmp = DISAS_TOO_MANY; + } +} + +static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + if (dc->base.is_jmp == DISAS_NORETURN) { + return; + } + if (dc->base.singlestep_enabled) { gen_helper_raise_exception(cpu_env, tcg_const_i32(EXCP_DEBUG)); - } else { - switch(dc->base.is_jmp) { - case DISAS_NEXT: - update_cc_op(dc); - gen_jmp_tb(dc, 0, dc->pc); - break; - case DISAS_JUMP: - /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ - tcg_gen_lookup_and_goto_ptr(); - break; - default: - case DISAS_EXIT: - /* We updated CC_OP and PC in gen_exit_tb, but also modified - other state that may require returning to the main loop. */ - tcg_gen_exit_tb(0); - break; - case DISAS_NORETURN: - /* nothing more to generate */ - break; - } + return; } - gen_tb_end(tb, num_insns); -#ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) - && qemu_log_in_addr_range(pc_start)) { - qemu_log_lock(); - qemu_log("----------------\n"); - qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc->pc - pc_start); - qemu_log("\n"); - qemu_log_unlock(); + switch (dc->base.is_jmp) { + case DISAS_TOO_MANY: + update_cc_op(dc); + gen_jmp_tb(dc, 0, dc->pc); + break; + case DISAS_JUMP: + /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ + tcg_gen_lookup_and_goto_ptr(); + break; + case DISAS_EXIT: + /* We updated CC_OP and PC in gen_exit_tb, but also modified + other state that may require returning to the main loop. */ + tcg_gen_exit_tb(0); + break; + default: + g_assert_not_reached(); } -#endif - tb->size = dc->pc - pc_start; - tb->icount = num_insns; +} + +static void m68k_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu) +{ + qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first)); + log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size); +} + +static const TranslatorOps m68k_tr_ops = { + .init_disas_context = m68k_tr_init_disas_context, + .tb_start = m68k_tr_tb_start, + .insn_start = m68k_tr_insn_start, + .breakpoint_check = m68k_tr_breakpoint_check, + .translate_insn = m68k_tr_translate_insn, + .tb_stop = m68k_tr_tb_stop, + .disas_log = m68k_tr_disas_log, +}; + +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +{ + DisasContext dc; + translator_loop(&m68k_tr_ops, &dc.base, cpu, tb); } static double floatx80_to_double(CPUM68KState *env, uint16_t high, uint64_t low) From patchwork Sat May 12 05:02:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135639 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1760414lji; Fri, 11 May 2018 22:14:17 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrb1IkRvrO8M0XaUa9VkQX84JBRNjGEvmRhoGFnKj/iAaUPKhA4bwTjy880P15YDOXA552t X-Received: by 2002:ac8:d1:: with SMTP id d17-v6mr822559qtg.356.1526102057033; Fri, 11 May 2018 22:14:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526102057; cv=none; d=google.com; s=arc-20160816; b=DHiPmKV8cBkirkEz2odAYg7bmSzrC3ZElcmwNjodHfhyH9LEEx7y8eMfbLuKRh5s7Y hO8rsWuMGcMgycGPab59voiHIWnkcsVbPG3+ExEfFAGEBXzKYept8/XFHM6//l9nEy8H +StD48Tlu7EbTfgFZHoLajBAb16cBo4nYzBuikCpGcsIlQsGYyZ3NTa+E966YVX3K8R+ F5AAFe4a9m1dScg9Yz510ooUzt7vIZOaSAKnrPzJNuQk5jjwDYQbxqHl8e3H6Iqp0HVv 14S0WgaWpRPWvfZY15yC81cGV2T954nVKFZsFH9HFN73Sdl35DjbUVepGkXKwcec6UNS GBiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=0mECzgDVo12qmCSM432Ob3SIFDVRUdbq2Ys26U/zmIE=; b=fMlU3rDsNahz/VinkNX7n+cDJl1VC7hb2Ct7pFR2uK6HFRSBZqwIHte3i4n8jhb/tC wQlvFNqtTQE2NyC7E4B53u7gNOQNUkUc8HWc+4biNSglAnIiSLMtSxzlCRpXxjwynLVb jKB752+zDxYeKjJ0JzNgO2Bh6seoTMmpdyKCO17d20IlDHscd050cifYXqB64jMHZTqj wM2eBqRXzORtKPt7Y8F3SJJA3NnIM2IR4iddn7JHWu3rfJiw6Y7xYD8ONIuQbyLueAQ9 M2a8d2O9fPOtWOUkJAMU6nf50wpJuOx26F2440m7bxeWatDGy2Yvgm+/scuI8UvqS8GT NYMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=UoiYZNKJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id h12-v6si1406826qte.291.2018.05.11.22.14.16 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:14:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=UoiYZNKJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45743 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMrI-0008Sz-BV for patch@linaro.org; Sat, 12 May 2018 01:14:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60569) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgS-00042c-HT for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgR-0008NF-Q2 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:04 -0400 Received: from mail-pl0-x241.google.com ([2607:f8b0:400e:c01::241]:38189) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgR-0008N5-LB for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:03 -0400 Received: by mail-pl0-x241.google.com with SMTP id c11-v6so4380232plr.5 for ; Fri, 11 May 2018 22:03:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0mECzgDVo12qmCSM432Ob3SIFDVRUdbq2Ys26U/zmIE=; b=UoiYZNKJXEhOeYi5bknN/SOO73/sVaiuhsla8R24GvCN0k89SA3w7/CTxSF26wXjcT PQv9QmldA8xD+bkWlosUm/j4ifVnHnFsokrfS/4c2X+xCPnahIigAUAhASMd0aI74w8y 0etSLBZvBVTCw13MKcz8Hu3OksFMcSdGaedac= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0mECzgDVo12qmCSM432Ob3SIFDVRUdbq2Ys26U/zmIE=; b=M9uaDpWqSm5LIn2Aomwbo398KWxFwj2AFWgJG9bq+esvj0hVmxnISuEq0UmrYPZjAn QSWUnZYeWjpiQXCO8zWHBb9UCxwgmCCcPnr2jczhg8IE74IU8JvFzrbBcZXLa8DkuVIE IP1aDEg5H79Q3Xk4xWQ34vYvMaO8V1BvjLeVcPBvK3hCy0Mn1Y6IMoUseYnY7RQCAGWE APQTc/ReHSt6aNvLHGKtyK59v3qrgnxCXaChPH1/lFDasv9ddPlaki8kX0lIFmVdZAGQ ri38P7niDQBO9Oc5GovbJcNOr7EEQ6LpQVyPU+O112i3kJdq+tVliA75KUUoN5s3Cbxd AigQ== X-Gm-Message-State: ALKqPwfCVYYpsgF61Mk03P9HQE1turfIwiRWkSeW/EE9JIlsLscbk0kE bMYja1wG/5+4aMQyVYAQzK/zB3ASIFk= X-Received: by 2002:a17:902:82c3:: with SMTP id u3-v6mr1002638plz.83.1526101382367; Fri, 11 May 2018 22:03:02 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.03.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:03:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:49 -0700 Message-Id: <20180512050250.12774-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::241 Subject: [Qemu-devel] [PATCH 8/9] target/m68k: Improve ending TB at page boundaries X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Rather than limit total TB size to PAGE-32 bytes, end the TB when near the end of a page. This should provide proper semantics of SIGSEGV when executing near the end of a page. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 0ab9ab1148..069558bc28 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6105,9 +6105,25 @@ static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) disas_m68k_insn(cpu->env_ptr, dc); dc->base.pc_next = dc->pc; - if (dc->base.is_jmp == DISAS_NEXT - && dc->pc - dc->base.pc_first >= TARGET_PAGE_SIZE - 32) { - dc->base.is_jmp = DISAS_TOO_MANY; + if (dc->base.is_jmp == DISAS_NEXT) { + /* Stop translation when the next insn might touch a new page. + * This ensures that prefetch aborts at the right place. + * + * We cannot determine the size of the next insn without + * completely decoding it. However, the maximum insn size + * is 32 bytes, so end if we do not have that much remaining. + * This may produce several small TBs at the end of each page, + * but they will all be linked with goto_tb. + * + * ??? ColdFire maximum is 4 bytes; MC68000's maximum is also + * smaller than MC68020's. + */ + target_ulong start_page_offset + = dc->pc - (dc->base.pc_first & TARGET_PAGE_MASK); + + if (start_page_offset >= TARGET_PAGE_SIZE - 32) { + dc->base.is_jmp = DISAS_TOO_MANY; + } } } From patchwork Sat May 12 05:02:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135640 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1762670lji; Fri, 11 May 2018 22:17:06 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpciefDR4cnmBOcMDl/zJgFYra+iXckEdj91+gHYWvfDKkg7sASMv4ZaOruQ+oTsuLgGHG/ X-Received: by 2002:aed:26c3:: with SMTP id q61-v6mr865459qtd.60.1526102226292; Fri, 11 May 2018 22:17:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526102226; cv=none; d=google.com; s=arc-20160816; b=EJ92lqWoOKrvn9d1qdqHizJUjHVId+08m6G1cH/jd8hoyg8ZNI2NCSMHablp3Q6zgC uvQIDPBWMPkJZisfdFIY5s3nQYburWn+3iE6LMSpKRRADKLVvVSzPSCmo+XeaPEaQ5E3 nKgrmCjw+C1Zgvy0vw+x3g6TFKF3zja1XUCVc6XTJ6Gti883p/4/sHxpVR4ERENsDl0P AmANzMG/1c2jAOLq6SC1AqEgpatUU4lib9r8411E7q7mWUQzlfTzhcXaMY1JrqInGRBw l5Jrt3FELAU/D1X41A9hNbAQB3Ey9IVQkMRbWKL1Ktis69FGHeRlGWfyhSltn8tyRDNA qNCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=U6nS46xM2ODxxohiUKnS5JtgCHRh8ZMrwU73D7F0Pls=; b=M5zwD5iBEP6nWuJ5tWk0gKwR1nE99GtbUAXpUPtlwMeo/3rv2CAC6e+eYOHmITYNIT Zqq1dHOOe6D45ef/YHb1od0jqHmj9mmkoCDR14sqZQNEge+LVc386DwwGJNiEkazEsjI wH54VXU2gSJa8LFKnRTreE+HrKu4a1Eb6LUZlWMy0RsJztt7KHoMTMPI8Sp2q4+zmUWX OTFt1mppZvFc8SekDyIUUXBStiYCPX1TVQjg3WpLa4LRUc/pPJQ6GzV8TK3MlsfUsFP7 t1HCa/kdJzwzx3bYSH6uppfoOCPeN1fSFNdoJofLV/iRBIaD8/sIcncpPD2Ia46YkkH7 x3lw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=C8NQSrij; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id s29-v6si4819464qth.44.2018.05.11.22.17.06 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 11 May 2018 22:17:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=C8NQSrij; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46166 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMu1-0002WU-R0 for patch@linaro.org; Sat, 12 May 2018 01:17:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60600) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHMgY-00046g-D1 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHMgT-0008Nu-Dr for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:10 -0400 Received: from mail-pl0-x241.google.com ([2607:f8b0:400e:c01::241]:35682) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHMgT-0008Nl-99 for qemu-devel@nongnu.org; Sat, 12 May 2018 01:03:05 -0400 Received: by mail-pl0-x241.google.com with SMTP id i5-v6so4373864plt.2 for ; Fri, 11 May 2018 22:03:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=U6nS46xM2ODxxohiUKnS5JtgCHRh8ZMrwU73D7F0Pls=; b=C8NQSrijXQpV5cjscDQk6/XxEBBvgPbfOl8Q/99R0rdkhI/ml7Aq534kBVr61UEc9t aN9YZkN4iEZVQfCb9Pj+CAaomooTnSVMetdJSl/1VXHGMklrcbNZgWyk3ryMStZJN+5y 6iNmaM6piDIIpyNtWSaJG9Tu55MkanHghFJdg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=U6nS46xM2ODxxohiUKnS5JtgCHRh8ZMrwU73D7F0Pls=; b=g/jXZSu3pND38yTEM05J821wfRgScQsDdRFBi/mVn6pPV3rWVK4MgkL+SMNNsMqRW7 fwMkvlUqB98b4zUqnvB59D5GN8mLLFnnxsQezC2Ciju9t0GY7byT/0DPRhqYBWCnE/4T wzNDb8lZX+hfUaLnAU2cB+iFQ1lAmpQEJgCvW8VyBzwNOZvhSNI5AKKF1jjbgmw/rZ0f 4D/MKKDwMvpNx3cbyljtDhpoAa/6M5e0PDxww9wm6hVAkhIPvKQYcqzQ9rLIrsfHV+BD IDGWm6Dj2HH8Bf91oAHqykGpydixJD4+QCxVre9vNABN3SufTPQB/2ay0jjH6k3R7kGk 6r8w== X-Gm-Message-State: ALKqPwfv0e6REZf9d2b5Ey2p2wNTYGT3B9h7nlV/zr+8eacaNaEQKFAH Dq7NGP02A8htqqfAPITx4gMHDcVt0TM= X-Received: by 2002:a17:902:6b44:: with SMTP id g4-v6mr1020962plt.390.1526101384026; Fri, 11 May 2018 22:03:04 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id x124-v6sm8999945pfx.72.2018.05.11.22.03.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 May 2018 22:03:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 11 May 2018 22:02:50 -0700 Message-Id: <20180512050250.12774-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180512050250.12774-1-richard.henderson@linaro.org> References: <20180512050250.12774-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::241 Subject: [Qemu-devel] [PATCH 9/9] target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/m68k/translate.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) -- 2.17.0 diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 069558bc28..21eeebf4df 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6049,16 +6049,6 @@ void register_m68k_insns (CPUM68KState *env) #undef INSN } -/* ??? Some of this implementation is not exception safe. We should always - write back the result to memory before setting the condition codes. */ -static void disas_m68k_insn(CPUM68KState * env, DisasContext *s) -{ - uint16_t insn = read_im16(env, s); - opcode_table[insn](env, s, insn); - do_writebacks(s); - do_release(s); -} - static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); @@ -6101,8 +6091,13 @@ static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); + CPUM68KState *env = cpu->env_ptr; + uint16_t insn = read_im16(env, dc); + + opcode_table[insn](env, dc, insn); + do_writebacks(dc); + do_release(dc); - disas_m68k_insn(cpu->env_ptr, dc); dc->base.pc_next = dc->pc; if (dc->base.is_jmp == DISAS_NEXT) {