From patchwork Mon Mar 22 04:47:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 406292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 291C5C433C1 for ; Mon, 22 Mar 2021 04:48:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ED70761969 for ; Mon, 22 Mar 2021 04:48:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229621AbhCVErn (ORCPT ); Mon, 22 Mar 2021 00:47:43 -0400 Received: from new2-smtp.messagingengine.com ([66.111.4.224]:51027 "EHLO new2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229865AbhCVErL (ORCPT ); Mon, 22 Mar 2021 00:47:11 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.nyi.internal (Postfix) with ESMTP id 0E4D1581B0C; Mon, 22 Mar 2021 00:47:11 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Mon, 22 Mar 2021 00:47:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm2; bh=kn90WelRryWGO vGeYwBhPQaYl+homL8f2WWhOA4xjB4=; b=TznZjqsBcm/AXUmrIs16RFjt4+w5z 7F5ita+tFD6T1gYA0IycFQVEfVt+px/OEAVYvmg83wX5c3C5nD86zbDzosn/XyBD xoaweNsMAg3Czqpp7hlWHa10QqQeXVqhpjYNWiXbwVv2egTopSXzOtzjg+tLLhLs fO3TsyfMl5SjrUA7aTBGQVcqduLrTVQo7vu6iJSd7wAMj7o6uL2hbGXy5/PY/MNY 6uhS18UeO3rwUkO4SbbMS+T4pRmv0mMGilzDoUV7Zf6/2UusMae66I1bEgVLu3RL SgTOoqKHv6DbKkKsklfwb7iXPHOneiwm8Fc8Jp2FBPULxcuuDjeNiwLrw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=kn90WelRryWGOvGeYwBhPQaYl+homL8f2WWhOA4xjB4=; b=LvauHsbo Zqh9roAzx9+3aNODpDu8QLi0qhIi995AFslpBcqFYIDyy4Ogc4PBRCYAfllGdVL8 VLqqmaw6pKPNTRN1341vB5PCQuuw/2sOwP6Rh464m1zHp/V1gILpWBRUJqpVV9ob pWf3GQxGMO/qzL5TDyum4rnGmm6MqtbpGALnWxcurtYKdjXZghXQPzY6+895CQ7O F/L1u6SzqwOLbr8K9ZDFJQsMkwEJo8TNDJ0N2ZlqHG/oSFgqVhtoGk0EQi0VUMm6 o37ys4IUaw4O68OLxwKN5L0eVmFC1Im1Q4Es6u7XrNywO9/xZGL1+T+ltBUNyfzZ bX3a4nvlgb7D5Q== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrudegfedgjeehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucggtf frrghtthgvrhhnpeduhfejfedvhffgfeehtefghfeiiefgfeehgfdvvdevfeegjeehjedv gfejheeuieenucfkphepjedtrddufeehrddugeekrdduhedunecuvehluhhsthgvrhfuih iivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepshgrmhhuvghlsehshhholhhlrghn ugdrohhrgh X-ME-Proxy: Received: from titanium.stl.sholland.net (70-135-148-151.lightspeed.stlsmo.sbcglobal.net [70.135.148.151]) by mail.messagingengine.com (Postfix) with ESMTPA id 03D64108005F; Mon, 22 Mar 2021 00:47:08 -0400 (EDT) From: Samuel Holland To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Catalin Marinas , Will Deacon Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Samuel Holland , Maxime Ripard Subject: [PATCH v2 1/5] dt-bindings: timer: Simplify conditional expressions Date: Sun, 21 Mar 2021 23:47:03 -0500 Message-Id: <20210322044707.19479-2-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210322044707.19479-1-samuel@sholland.org> References: <20210322044707.19479-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The sun4i timer IP block has a variable number of interrupts based on the compatible. Use enums to combine the two sections for the existing 3-interrupt variants, and to simplify adding new compatible strings. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland Reviewed-by: Rob Herring --- .../timer/allwinner,sun4i-a10-timer.yaml | 25 ++++++------------- 1 file changed, 7 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml index 1c7cf32e7ac2..3462598e609d 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml @@ -34,8 +34,8 @@ allOf: - if: properties: compatible: - items: - const: allwinner,sun4i-a10-timer + enum: + - allwinner,sun4i-a10-timer then: properties: @@ -46,8 +46,8 @@ allOf: - if: properties: compatible: - items: - const: allwinner,sun8i-a23-timer + enum: + - allwinner,sun8i-a23-timer then: properties: @@ -58,20 +58,9 @@ allOf: - if: properties: compatible: - items: - const: allwinner,sun8i-v3s-timer - - then: - properties: - interrupts: - minItems: 3 - maxItems: 3 - - - if: - properties: - compatible: - items: - const: allwinner,suniv-f1c100s-timer + enum: + - allwinner,sun8i-v3s-timer + - allwinner,suniv-f1c100s-timer then: properties: From patchwork Mon Mar 22 04:47:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 406291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69B87C433E2 for ; Mon, 22 Mar 2021 04:48:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3DCA861969 for ; Mon, 22 Mar 2021 04:48:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229897AbhCVEro (ORCPT ); Mon, 22 Mar 2021 00:47:44 -0400 Received: from new2-smtp.messagingengine.com ([66.111.4.224]:34899 "EHLO new2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229482AbhCVErL (ORCPT ); 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Mon, 22 Mar 2021 00:47:09 -0400 (EDT) From: Samuel Holland To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Catalin Marinas , Will Deacon Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Samuel Holland , Maxime Ripard Subject: [PATCH v2 2/5] dt-bindings: timer: Add compatibles for sun50i timers Date: Sun, 21 Mar 2021 23:47:04 -0500 Message-Id: <20210322044707.19479-3-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210322044707.19479-1-samuel@sholland.org> References: <20210322044707.19479-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The sun50i SoCs contain timer blocks which are useful as broadcast clockevent sources. They each have 2 interrupts, matching the A23 variant, so add the new compatible strings with the A23 compatible as a fallback. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland Reviewed-by: Rob Herring --- .../timer/allwinner,sun4i-a10-timer.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml index 3462598e609d..53fd24bdc34e 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml @@ -12,11 +12,18 @@ maintainers: properties: compatible: - enum: - - allwinner,sun4i-a10-timer - - allwinner,sun8i-a23-timer - - allwinner,sun8i-v3s-timer - - allwinner,suniv-f1c100s-timer + oneOf: + - enum: + - allwinner,sun4i-a10-timer + - allwinner,sun8i-a23-timer + - allwinner,sun8i-v3s-timer + - allwinner,suniv-f1c100s-timer + - items: + - enum: + - allwinner,sun50i-a64-timer + - allwinner,sun50i-h6-timer + - allwinner,sun50i-h616-timer + - const: allwinner,sun8i-a23-timer reg: maxItems: 1 From patchwork Mon Mar 22 04:47:06 2021 Content-Type: text/plain; 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Mon, 22 Mar 2021 00:47:10 -0400 (EDT) From: Samuel Holland To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Catalin Marinas , Will Deacon Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH v2 4/5] arm64: dts: allwinner: Add sun4i MMIO timer nodes Date: Sun, 21 Mar 2021 23:47:06 -0500 Message-Id: <20210322044707.19479-5-samuel@sholland.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210322044707.19479-1-samuel@sholland.org> References: <20210322044707.19479-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For a CPU to enter an idle state, some timer must be available to trigger an IRQ and wake it back up. The local ARM architectural timer is not sufficient, because that timer stops when the CPU is powered down. The ARM architectural timer from some other CPU can be used, but doing so prevents that other CPU from entering an idle state. For all CPUs to power down at the same time, Linux needs a timer which is not tied to any CPU. Hook up the "sun4i" timer so it can be used for this purpose. It runs at 24 MHz, which balances resolution and power consumption. Signed-off-by: Samuel Holland --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +++++++++ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 9cac88576975..c89032dfb316 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -798,6 +798,15 @@ uart4_rts_cts_pins: uart4-rts-cts-pins { }; }; + timer@1c20c00 { + compatible = "allwinner,sun50i-a64-timer", + "allwinner,sun8i-a23-timer"; + reg = <0x01c20c00 0xa0>; + interrupts = , + ; + clocks = <&osc24M>; + }; + wdt0: watchdog@1c20ca0 { compatible = "allwinner,sun50i-a64-wdt", "allwinner,sun6i-a31-wdt"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 49e979794094..01884b32390d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -271,6 +271,15 @@ cpu_speed_grade: cpu-speed-grade@1c { }; }; + timer@3009000 { + compatible = "allwinner,sun50i-h6-timer", + "allwinner,sun8i-a23-timer"; + reg = <0x03009000 0xa0>; + interrupts = , + ; + clocks = <&osc24M>; + }; + watchdog: watchdog@30090a0 { compatible = "allwinner,sun50i-h6-wdt", "allwinner,sun6i-a31-wdt";