From patchwork Sun Mar 21 12:42:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 405942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA7AAC433C1 for ; Sun, 21 Mar 2021 12:43:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A079961946 for ; Sun, 21 Mar 2021 12:43:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229912AbhCUMmu (ORCPT ); Sun, 21 Mar 2021 08:42:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229834AbhCUMmV (ORCPT ); Sun, 21 Mar 2021 08:42:21 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24F84C061574 for ; Sun, 21 Mar 2021 05:42:20 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id nh23-20020a17090b3657b02900c0d5e235a8so7143031pjb.0 for ; Sun, 21 Mar 2021 05:42:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XedR4D63zUvw1J+WKjbyJOOz+/A4gC1Wz66rLRAAKFM=; b=oj22IieoJ7hv+uAPIgxTaFRsEDoIse1V91LhPaGz2yCMBF6lDasshA25Lg3c0lIZcV HxXs7kKiaAhlTO7CLbhJRo8B1OSkRBtrPHYvYKMctN4YKva3i0TbkjDNP1bMG03bJOSt SqgzCWy+j4DR9huHcv1QXymACKvig+2IdjyPQ+mLj87l2V5cid2xYp9Lscy8FnZxtF1Q UbT4YqhU7yo8E0vacmw4F1KR6F8PlDmvEKG5UWOMSUJfK3rZcW0LGqAfrBP6qV3koOD+ hbQbtCGnCf1zjiuTbDRc2h6Taa1L7d7BVEZ/srLVjVD8zlLTJlBKg9Oz6DXN7iH5WXFN No8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XedR4D63zUvw1J+WKjbyJOOz+/A4gC1Wz66rLRAAKFM=; b=f2oYpmWNS2/HnvxZ5L0wOpNCtQmMRnkBXRL/UY3Ism/1Fmrut+8pFdDFZh674F0LPh TpGU7b6ElNtpo/KDaJgPGsZrY8bLExUuAJTNvcPze24H/QeUjJyNgrdfShhMfh6qIYn3 7xE2JK32G79UlzZBDj0copeBZyyvW50+Z+cpXGXl5bocLTZ3IJOElR8yuRw0BjeRNoxM wgJyksedO/0cUD+Tl1pPXLFYGE7sH0v9DZtF0iO+3/YFbSx3ODAljWVsf7NXkqOLMBOT g9uAPVGgKk/Ore5zcXOqvTKyukHk3s6onrK4vI5c/EUO1Uks2t2pUrlzwv4yxO7jqWBn y59Q== X-Gm-Message-State: AOAM530mYv1xKf++eMiFHMsg+Hk+dwZ/sTEvhAAbE4skxIeQBgBa31FA 0pIW/uTKYlcSVlKSB0b0HBp5lA== X-Google-Smtp-Source: ABdhPJz9tEOhms+sw51vndtnLuai0NKy9rh8QteyN7vews4P/+DdVN0S5k2zoHxwFvN7sREFEZKpcw== X-Received: by 2002:a17:902:b68b:b029:e6:cda9:39d with SMTP id c11-20020a170902b68bb02900e6cda9039dmr18588590pls.63.1616330539591; Sun, 21 Mar 2021 05:42:19 -0700 (PDT) Received: from localhost ([116.206.101.232]) by smtp.gmail.com with ESMTPSA id v13sm9973103pfu.54.2021.03.21.05.42.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Mar 2021 05:42:19 -0700 (PDT) From: Leo Yan To: Andy Gross , Bjorn Andersson , Rob Herring , Stephan Gerhold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Coresight ML Cc: Georgi Djakov , Leo Yan Subject: [PATCH v3] arm64: dts: msm8916: Enable CoreSight STM component Date: Sun, 21 Mar 2021 20:42:12 +0800 Message-Id: <20210321124212.4253-1-leo.yan@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Georgi Djakov Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916, which can benefit the CoreSight development on DB410c. Signed-off-by: Georgi Djakov Signed-off-by: Leo Yan Acked-by: Stephan Gerhold --- Changes from v2: * Correct for author name. Changes from v1: * alphabetically and address ordering for DT node; pad addresses with zeroes (Stephan Gerhold). arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 1 + arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 3a9538e1ec97..2165b7415add 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -410,6 +410,7 @@ &wcd_codec { &funnel0 { status = "okay"; }; &funnel1 { status = "okay"; }; &replicator { status = "okay"; }; +&stm { status = "okay"; }; &tpiu { status = "okay"; }; &smd_rpm_regulators { diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 402e891a84ab..f02b976480d5 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -489,6 +489,26 @@ snoc: interconnect@580000 { <&rpmcc RPM_SMD_SNOC_A_CLK>; }; + stm: stm@802000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0x00802000 0x1000>, + <0x09280000 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + status = "disabled"; + + out-ports { + port { + stm_out: endpoint { + remote-endpoint = <&funnel0_in7>; + }; + }; + }; + }; + /* System CTIs */ /* CTI 0 - TMC connections */ cti0: cti@810000 { @@ -562,6 +582,13 @@ funnel0_in4: endpoint { remote-endpoint = <&funnel1_out>; }; }; + + port@7 { + reg = <7>; + funnel0_in7: endpoint { + remote-endpoint = <&stm_out>; + }; + }; }; out-ports {