From patchwork Fri Mar 19 15:21:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanna Hawa X-Patchwork-Id: 405138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EED9BC433E5 for ; Fri, 19 Mar 2021 15:22:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C20726193A for ; Fri, 19 Mar 2021 15:22:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230354AbhCSPWQ (ORCPT ); Fri, 19 Mar 2021 11:22:16 -0400 Received: from smtp-fw-9103.amazon.com ([207.171.188.200]:36452 "EHLO smtp-fw-9103.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229967AbhCSPWM (ORCPT ); Fri, 19 Mar 2021 11:22:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1616167332; x=1647703332; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=3JSBlUFKcyKIVVyh2tD/o2Ia9bYRXCVww7vZxwWh5WE=; b=i+t+5v4lnBJcUEAHk1Nz1ALb1o3cUP8Bi7siHUg8GfBhkxOEBTjg7sN5 X5GDhpIWBzKrk7XzzvNTuVTXxt+GhHwmV5Oepwjs9YXS3s9oe071ShXpd 2FLsQ9GE3OL4mFPDpQy59rw0qHv603Ejg7iC5DfxGRZTEDbbNG2RdY5SO k=; X-IronPort-AV: E=Sophos;i="5.81,262,1610409600"; d="scan'208";a="920121226" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-2b-4e24fd92.us-west-2.amazon.com) ([10.43.8.6]) by smtp-border-fw-out-9103.sea19.amazon.com with ESMTP; 19 Mar 2021 15:22:03 +0000 Received: from EX13D19EUB003.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan2.pdx.amazon.com [10.236.137.194]) by email-inbound-relay-2b-4e24fd92.us-west-2.amazon.com (Postfix) with ESMTPS id 7C521A181C; Fri, 19 Mar 2021 15:22:02 +0000 (UTC) Received: from u8a88181e7b2355.ant.amazon.com (10.43.161.244) by EX13D19EUB003.ant.amazon.com (10.43.166.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 19 Mar 2021 15:21:55 +0000 From: Hanna Hawa To: , , , CC: , , , , , , , , , , , Subject: [PATCH v4 1/3] pinctrl: pinctrl-single: remove unused variable Date: Fri, 19 Mar 2021 17:21:31 +0200 Message-ID: <20210319152133.28705-2-hhhawa@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210319152133.28705-1-hhhawa@amazon.com> References: <20210319152133.28705-1-hhhawa@amazon.com> MIME-Version: 1.0 X-Originating-IP: [10.43.161.244] X-ClientProxiedBy: EX13D37UWA004.ant.amazon.com (10.43.160.23) To EX13D19EUB003.ant.amazon.com (10.43.166.69) Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Remove unused parameter 'num_pins_in_register' from pcs_allocate_pin_table(). Reported-by: kernel test robot Signed-off-by: Hanna Hawa Reviewed-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 7771316dfffa..91c638b85d2c 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -703,14 +703,12 @@ static int pcs_add_pin(struct pcs_device *pcs, unsigned offset, static int pcs_allocate_pin_table(struct pcs_device *pcs) { int mux_bytes, nr_pins, i; - int num_pins_in_register = 0; mux_bytes = pcs->width / BITS_PER_BYTE; if (pcs->bits_per_mux) { pcs->bits_per_pin = fls(pcs->fmask); nr_pins = (pcs->size * BITS_PER_BYTE) / pcs->bits_per_pin; - num_pins_in_register = pcs->width / pcs->bits_per_pin; } else { nr_pins = pcs->size / mux_bytes; } From patchwork Fri Mar 19 15:21:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanna Hawa X-Patchwork-Id: 405139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A55C3C433E2 for ; Fri, 19 Mar 2021 15:22:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 737D361930 for ; Fri, 19 Mar 2021 15:22:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230340AbhCSPWP (ORCPT ); Fri, 19 Mar 2021 11:22:15 -0400 Received: from smtp-fw-9102.amazon.com ([207.171.184.29]:13402 "EHLO smtp-fw-9102.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229736AbhCSPWL (ORCPT ); Fri, 19 Mar 2021 11:22:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1616167331; x=1647703331; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=7rHP/Il1MAYfTug9uW2SOeBpIjYBzsbh242X2Z+B5kw=; b=Ewv2sknAZPCbC/CeLCYAKgmi2jDuahOue22swx5w90Cr+WW3qwfvtoQg 8DefGTL7SxNbGQrfSH3mtJ4gzcPOYho07OsYdulofbeZSePSijbbJE8lj cCKgaY3bx+pigylsGHP7/8SaZQm11j3SvfTwmxxwLjjZ7uPjTWLemavP4 k=; X-IronPort-AV: E=Sophos;i="5.81,262,1610409600"; d="scan'208";a="121703771" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO email-inbound-relay-2c-76e0922c.us-west-2.amazon.com) ([10.43.8.2]) by smtp-border-fw-out-9102.sea19.amazon.com with ESMTP; 19 Mar 2021 15:22:10 +0000 Received: from EX13D19EUB003.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan2.pdx.amazon.com [10.236.137.194]) by email-inbound-relay-2c-76e0922c.us-west-2.amazon.com (Postfix) with ESMTPS id F09ECA65FE; Fri, 19 Mar 2021 15:22:08 +0000 (UTC) Received: from u8a88181e7b2355.ant.amazon.com (10.43.161.244) by EX13D19EUB003.ant.amazon.com (10.43.166.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 19 Mar 2021 15:22:02 +0000 From: Hanna Hawa To: , , , CC: , , , , , , , , , , , Subject: [PATCH v4 2/3] pinctrl: pinctrl-single: remove unused parameter Date: Fri, 19 Mar 2021 17:21:32 +0200 Message-ID: <20210319152133.28705-3-hhhawa@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210319152133.28705-1-hhhawa@amazon.com> References: <20210319152133.28705-1-hhhawa@amazon.com> MIME-Version: 1.0 X-Originating-IP: [10.43.161.244] X-ClientProxiedBy: EX13D37UWA004.ant.amazon.com (10.43.160.23) To EX13D19EUB003.ant.amazon.com (10.43.166.69) Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Remove unused parameter 'pin_pos' from pcs_add_pin(). Signed-off-by: Hanna Hawa Reviewed-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 91c638b85d2c..f3394517cb2e 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -656,10 +656,8 @@ static const struct pinconf_ops pcs_pinconf_ops = { * pcs_add_pin() - add a pin to the static per controller pin array * @pcs: pcs driver instance * @offset: register offset from base - * @pin_pos: unused */ -static int pcs_add_pin(struct pcs_device *pcs, unsigned offset, - unsigned pin_pos) +static int pcs_add_pin(struct pcs_device *pcs, unsigned int offset) { struct pcs_soc_data *pcs_soc = &pcs->socdata; struct pinctrl_pin_desc *pin; @@ -727,16 +725,14 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs) unsigned offset; int res; int byte_num; - int pin_pos = 0; if (pcs->bits_per_mux) { byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE; offset = (byte_num / mux_bytes) * mux_bytes; - pin_pos = i % num_pins_in_register; } else { offset = i * mux_bytes; } - res = pcs_add_pin(pcs, offset, pin_pos); + res = pcs_add_pin(pcs, offset); if (res < 0) { dev_err(pcs->dev, "error adding pins: %i\n", res); return res; From patchwork Fri Mar 19 15:21:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanna Hawa X-Patchwork-Id: 405691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E3E5C433DB for ; Fri, 19 Mar 2021 15:23:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4152C61928 for ; Fri, 19 Mar 2021 15:23:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230209AbhCSPWs (ORCPT ); Fri, 19 Mar 2021 11:22:48 -0400 Received: from smtp-fw-6002.amazon.com ([52.95.49.90]:52964 "EHLO smtp-fw-6002.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230226AbhCSPW1 (ORCPT ); Fri, 19 Mar 2021 11:22:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1616167347; x=1647703347; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=bZYCEYFK2BrFVJH8IcIPGqu6SV4/lJaOJHYFc3NgpgA=; b=QsVGMc1tAsfcYXOczEiM8zbuCDquo2PwBWWxfZUU/Qvg7VRoqcAJELfO 2lkNrqU4VM3ETegU1elvGxOKtAHYj7G6c4cJDNqjyv41mLwds9GO2Z33U aU+P8rUnsKddlZtUdCgrSaxUtuSfH1e1+Bw6/kY5c3w8hRF/XMZiOcJVq A=; X-IronPort-AV: E=Sophos;i="5.81,262,1610409600"; d="scan'208";a="98885188" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO email-inbound-relay-2a-538b0bfb.us-west-2.amazon.com) ([10.43.8.2]) by smtp-border-fw-out-6002.iad6.amazon.com with ESMTP; 19 Mar 2021 15:22:18 +0000 Received: from EX13D19EUB003.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan3.pdx.amazon.com [10.236.137.198]) by email-inbound-relay-2a-538b0bfb.us-west-2.amazon.com (Postfix) with ESMTPS id BC556A2351; Fri, 19 Mar 2021 15:22:15 +0000 (UTC) Received: from u8a88181e7b2355.ant.amazon.com (10.43.161.244) by EX13D19EUB003.ant.amazon.com (10.43.166.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 19 Mar 2021 15:22:08 +0000 From: Hanna Hawa To: , , , CC: , , , , , , , , , , , Subject: [PATCH v4 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero Date: Fri, 19 Mar 2021 17:21:33 +0200 Message-ID: <20210319152133.28705-4-hhhawa@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210319152133.28705-1-hhhawa@amazon.com> References: <20210319152133.28705-1-hhhawa@amazon.com> MIME-Version: 1.0 X-Originating-IP: [10.43.161.244] X-ClientProxiedBy: EX13D37UWA004.ant.amazon.com (10.43.160.23) To EX13D19EUB003.ant.amazon.com (10.43.166.69) Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org A System Error (SError, followed by kernel panic) was detected when trying to print the supported pins in a pinctrl device which supports multiple pins per register. This change fixes the pcs_pin_dbg_show() in pinctrl-single driver when bits_per_mux is not zero. In addition move offset calculation and pin offset in register to common function. Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules") Signed-off-by: Hanna Hawa Reviewed-by: Andy Shevchenko Reviewed-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 55 ++++++++++++++++++++------------ 1 file changed, 35 insertions(+), 20 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index f3394517cb2e..39aac32ed09c 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -270,20 +270,44 @@ static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg) writel(val, reg); } +static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs, + unsigned int pin) +{ + unsigned int mux_bytes = pcs->width / BITS_PER_BYTE; + + if (pcs->bits_per_mux) { + unsigned int pin_offset_bytes; + + pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; + return (pin_offset_bytes / mux_bytes) * mux_bytes; + } + + return pin * mux_bytes; +} + +static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs, + unsigned int pin) +{ + return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin; +} + static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned pin) { struct pcs_device *pcs; - unsigned val, mux_bytes; + unsigned int val; unsigned long offset; size_t pa; pcs = pinctrl_dev_get_drvdata(pctldev); - mux_bytes = pcs->width / BITS_PER_BYTE; - offset = pin * mux_bytes; + offset = pcs_pin_reg_offset_get(pcs, pin); val = pcs->read(pcs->base + offset); + + if (pcs->bits_per_mux) + val &= pcs->fmask << pcs_pin_shift_reg_get(pcs, pin); + pa = pcs->res->start + offset; seq_printf(s, "%zx %08x %s ", pa, val, DRIVER_NAME); @@ -384,7 +408,6 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); struct pcs_gpiofunc_range *frange = NULL; struct list_head *pos, *tmp; - int mux_bytes = 0; unsigned data; /* If function mask is null, return directly. */ @@ -392,29 +415,27 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, return -ENOTSUPP; list_for_each_safe(pos, tmp, &pcs->gpiofuncs) { + u32 offset; + frange = list_entry(pos, struct pcs_gpiofunc_range, node); if (pin >= frange->offset + frange->npins || pin < frange->offset) continue; - mux_bytes = pcs->width / BITS_PER_BYTE; - if (pcs->bits_per_mux) { - int byte_num, offset, pin_shift; + offset = pcs_pin_reg_offset_get(pcs, pin); - byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; - offset = (byte_num / mux_bytes) * mux_bytes; - pin_shift = pin % (pcs->width / pcs->bits_per_pin) * - pcs->bits_per_pin; + if (pcs->bits_per_mux) { + int pin_shift = pcs_pin_shift_reg_get(pcs, pin); data = pcs->read(pcs->base + offset); data &= ~(pcs->fmask << pin_shift); data |= frange->gpiofunc << pin_shift; pcs->write(data, pcs->base + offset); } else { - data = pcs->read(pcs->base + pin * mux_bytes); + data = pcs->read(pcs->base + offset); data &= ~pcs->fmask; data |= frange->gpiofunc; - pcs->write(data, pcs->base + pin * mux_bytes); + pcs->write(data, pcs->base + offset); } break; } @@ -724,14 +745,8 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs) for (i = 0; i < pcs->desc.npins; i++) { unsigned offset; int res; - int byte_num; - if (pcs->bits_per_mux) { - byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE; - offset = (byte_num / mux_bytes) * mux_bytes; - } else { - offset = i * mux_bytes; - } + offset = pcs_pin_reg_offset_get(pcs, i); res = pcs_add_pin(pcs, offset); if (res < 0) { dev_err(pcs->dev, "error adding pins: %i\n", res);