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[209.132.180.67]) by mx.google.com with ESMTP id m39-v6si24369503plg.570.2018.05.08.07.11.27; Tue, 08 May 2018 07:11:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aKH/9i5C; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755337AbeEHOLY (ORCPT + 29 others); Tue, 8 May 2018 10:11:24 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:58850 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752252AbeEHOLW (ORCPT ); Tue, 8 May 2018 10:11:22 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w48EB8tM023064; Tue, 8 May 2018 09:11:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1525788668; bh=0CvHLM2oMuVuFg1dqTBA/bizvpv3U/f2Wi+QqL8uW4I=; h=From:To:CC:Subject:Date; b=aKH/9i5CGWX062XKG+J8ilZxlqJD4FNpQjKHJg2sYGxWJTxdDE9OBztcAyHM9wgC3 P652LULRfAjTsqF36f934r8fHKSVrGZMxCVw3EpUl1jpaONDKQC7nyvv6Oi5o6tDOE oGalPsBzjlEsa8ntu/Sfe7QvrS1F8i74GMCQqlZA= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w48EB86P031185; Tue, 8 May 2018 09:11:08 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 8 May 2018 09:11:08 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 8 May 2018 09:11:08 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w48EB8Oi002364; Tue, 8 May 2018 09:11:08 -0500 Received: from localhost (a0272616local-lt.dhcp.ti.com [172.22.157.92]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id w48EB8x07646; Tue, 8 May 2018 09:11:08 -0500 (CDT) From: Dan Murphy To: , CC: , , Dan Murphy Subject: [PATCH] net: phy: DP83811: Add support for the phy Date: Tue, 8 May 2018 09:11:05 -0500 Message-ID: <20180508141105.23867-1-dmurphy@ti.com> X-Mailer: git-send-email 2.12.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the DP83811 phy by extending the DP83822 driver to recognize the PHY IDs. The DP83811 supports both rgmii and sgmii interfaces. There are 2 part numbers for this the DP83811R does not reliably support the SGMII interface but the DP83811S will. There is not a way to differentiate these parts from the hardware or register set. So this is controlled via the DT to indicate which phy mode is required. Or the part can be strapped to a certain interface. Data sheet can be found here: http://www.ti.com/product/DP83TC811S-Q1/description http://www.ti.com/product/DP83TC811R-Q1/description Signed-off-by: Dan Murphy --- drivers/net/phy/dp83822.c | 42 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 39 insertions(+), 3 deletions(-) -- 2.17.0.252.gfe0a9eaf3 diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c index 6e8a2a4f3a6e..5c379ff25dac 100644 --- a/drivers/net/phy/dp83822.c +++ b/drivers/net/phy/dp83822.c @@ -23,8 +23,10 @@ #include #define DP83822_PHY_ID 0x2000a240 +#define DP83811_PHY_ID 0x2000a253 #define DP83822_DEVADDR 0x1f +#define MII_DP83811_SGMII_CTRL 0x09 #define MII_DP83822_PHYSCR 0x11 #define MII_DP83822_MISR1 0x12 #define MII_DP83822_MISR2 0x13 @@ -79,6 +81,13 @@ #define DP83822_WOL_INDICATION_SEL BIT(8) #define DP83822_WOL_CLR_INDICATION BIT(11) +/* DP83811 SGMII CTRL bits */ +#define DP83811_TDR_AUTO BIT(8) +#define DP83811_SGMII_EN BIT(12) +#define DP83811_SGMII_AUTO_NEG_EN BIT(13) +#define DP83811_SGMII_TX_ERR_DIS BIT(14) +#define DP83811_SGMII_SOFT_RESET BIT(15) + static int dp83822_ack_interrupt(struct phy_device *phydev) { int err; @@ -267,6 +276,17 @@ static int dp83822_config_init(struct phy_device *phydev) if (err < 0) return err; + if ((phydev->interface == PHY_INTERFACE_MODE_SGMII && + phydev->phy_id == DP83811_PHY_ID)) { + value = phy_read(phydev, MII_DP83811_SGMII_CTRL); + if (!(value & DP83811_SGMII_EN)) { + err = phy_write(phydev, MII_DP83811_SGMII_CTRL, + (DP83811_SGMII_EN | value)); + if (err < 0) + return err; + } + } + value = DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON | DP83822_WOL_EN; return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, @@ -328,15 +348,31 @@ static struct phy_driver dp83822_driver[] = { .suspend = dp83822_suspend, .resume = dp83822_resume, }, + { + .phy_id = DP83811_PHY_ID, + .phy_id_mask = 0xfffffff0, + .name = "TI DP83811", + .features = PHY_BASIC_FEATURES, + .flags = PHY_HAS_INTERRUPT, + .config_init = genphy_config_init, + .soft_reset = dp83822_phy_reset, + .get_wol = dp83822_get_wol, + .set_wol = dp83822_set_wol, + .ack_interrupt = dp83822_ack_interrupt, + .config_intr = dp83822_config_intr, + .suspend = dp83822_suspend, + .resume = dp83822_resume, + }, }; module_phy_driver(dp83822_driver); static struct mdio_device_id __maybe_unused dp83822_tbl[] = { - { DP83822_PHY_ID, 0xfffffff0 }, - { }, + {DP83822_PHY_ID, 0xfffffff0}, + {DP83811_PHY_ID, 0xfffffff0}, + {} }; MODULE_DEVICE_TABLE(mdio, dp83822_tbl); -MODULE_DESCRIPTION("Texas Instruments DP83822 PHY driver"); +MODULE_DESCRIPTION("Texas Instruments DP83811/22 PHY driver"); MODULE_AUTHOR("Dan Murphy