From patchwork Tue Mar 16 10:41:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 402160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41B74C433E0 for ; Tue, 16 Mar 2021 10:43:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01B1B65026 for ; Tue, 16 Mar 2021 10:43:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236763AbhCPKmp (ORCPT ); Tue, 16 Mar 2021 06:42:45 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:13445 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236769AbhCPKmV (ORCPT ); Tue, 16 Mar 2021 06:42:21 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891340; x=1647427340; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=yTb4qoGUflJi8m7HSJa5+nLEjyRfrdKGIcYDXHbPmSw=; b=fm994LnllHYvuYiK40/RPo6bgB8heBAwQ0qmkJR5m81i3NihrUeAVSZX +eYuw2kqwbtnvJoQxG4x8QoBBVvLbQLJlRZ5LX7YXnD9f4it8QBFczNzk zHOguK68NIvbuw9Keb3QQLRmzp0zO9gNo+PkjrcgXufy4Vm4Q3X/6YxO3 yNSCIMdbZHEWBHFrP1K9yMWRYKS3oh2535bMorTMB5+2ZHYzPDTCEenIq 7tFt/4JJkLWqRakeGIx/QUyCuIJ6wu4JRQgBmndha+9jjZIeB7MCltiF5 QOdA4Rar8kIT2TPWXHfpGIcuqV1XpCCuNezLbAUm6WnbLxxqFoA+YbdwS g==; IronPort-SDR: /NFbKST4N0gn6c2KYbF/N2d0nQsN1yGU0tAt9YQ4a188C784xULLgbcTVvoSHSf1jqx0Dx/M9h DLwSiCMX/Z5JjVr0WcHYFlE8z/S57wopxJy2ic3XL6GRrLj47v5Ggz9VDCWF4MXqL/XAf5+DJ+ ZOVgE4pgiNc76ehY8Are06rpwUKf7FfhbdG4iadJX0O6Lw/QwNuqPreYWMRAzL8EjJOzNHQe2c MmZGXrKYKZopI1Gi1o4dOU4WuzqDCjYimexl0MaxkZORSV09dwyIILQy6e6j34w8tC4ST2Suv8 wEA= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="272971730" Received: from mail-dm6nam12lp2177.outbound.protection.outlook.com (HELO NAM12-DM6-obe.outbound.protection.outlook.com) ([104.47.59.177]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:17 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=D9Oqf/y82PyQ70ZTxAbkVOmHGGtzzuUxMKwO8RIt0t8wfF3neiwUUCLFzFBh8q0M0nd6DH0gKsapLEdoxKpdVK81nOiWH0ZVxK488E3/X2vmrlxl19jIKJ3pvEp3WyLkZLj3gNFZbCYHhZDDVSGXdBHUtw2bmWgSDvuoLdK+TS+VOlL2fyHZroi0Jw+fdGYl3iYqLVjdKwna1XLH5DlbxI1ByEqgshm4yPZN3GtN+WEx+FXbETjm0i/69d+3U7Mnif/lZ2Ux3gZsjlWprdJtf7poY3ehORAK7V0eoXyNJlGsVt9xAO0X4tQh5RounN6WctpwuiwxcESgOoLSO9qPkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KvODrHxjR9O17ndKUIDhzXHw4AWnkKpIZcsCTapVmys=; b=OAlNNpAW4+L7SMJxqZS1mhlmjMXY4lNhUzyTs5EpnUCVUUcv3q+8AqfBCl+BW7XjtVHdBsIBF+tqGl4muvQx/4xe33HqtF8gMi3f9udNbegpcsJnxTvdIYUc/9hg17ZVuMqOu56RyDAW8LfowYeIDu7eZiCJ/Vz9StK1b/CqMzUCLpAucWhynbJcBgoEb3ChYILLSJ/rkA3uiDRRq13uFPk+BEoBpx3Lymef0vOURjj3Fs0pS5WBMyYbwQBxgLlXNjO7yWBp7w0IuaAEcwTyWqnquzJHj0oJscflLQPFnIxpKspr4nA2/UaTN/XB813wC4h1SbOVxCaNnmemBJiV+w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KvODrHxjR9O17ndKUIDhzXHw4AWnkKpIZcsCTapVmys=; b=nxLHwjiNq4q95N67Gh4t4aGkebfZuV8KDsn0kRjT870EbnNpaNiwXi8jvRAOqpj1jXSogCKqMFbvD/RZzDwHTAiX/C72wvgHIs0F49SiMRVpUvoLa0FujEkGY+CTmJyb0lzFm0w4MlvwZUQRbqRIw+NmSqsJ096SaaWd/521/kk= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:16 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:16 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 1/8] RISC-V: Enable CPU_IDLE drivers Date: Tue, 16 Mar 2021 16:11:33 +0530 Message-Id: <20210316104140.878019-2-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:10 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: ce5575a4-7d08-4453-26ee-08d8e8682a4d X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:5236; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4f6HilFrua3AV9312PesQbsIM2jCsSejZRpy95fc/w75/9ix5yEuolLMXK950FsfgFVmiFW6rYKvx3C1u+XVI+L5gmH/56/ygnr2iW6aOkWT1eEyXmXptLHxfzUaPeQLy6r9h0O9l/KWT50ndh9o3FiW+VonKlcOXxqW7w5cXbn5HFph0y8y434LelV1h/eqR9YCtbA53CpfBIiEE1sFHdObgBSmmukcl/bUi5p0jCAwIscPV6C8lKpjYQa7qUnT5OU8so6ICYbUqkvTLOKdKctp89JtqbRWnqvMLq+jUO35s2qSxqNmIorbjFLpj6iklssdRk/a3k6Q2Rt1AN66YXqCrgGxpFQ1LtVjFA2NsQvzWA2sc3ZSBQNF09toJi1H0y7UkC0nVXC4HV8aG3hw3eIMtKmSnLH4u2TXoW1NkJeZ8aFMbGjkozt4Oo+/5HWux/tg3sLstG/pUOEAUSNh8ha5nvpCgEoW3fZuWqEPN24fzSAFOuqi2RpgqzXxKwbe5bof4dk7Y2500a64oI2G9sSGxRjWnEZNigEnIB9gDttCt/qGZ8tm+QgKavtv6YYS X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(16526019)(66476007)(26005)(956004)(2906002)(2616005)(4326008)(6666004)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: QrFnsxUkAcHaoBCR/hoZdDQX+1NmaBcRvHqc0RY9d0A/qMQyiCe/9FUOVc3GoLsRZ8eEQolJBlqZt5UPmaIXd2K+0JSRY03BpXx4ofonCsu1nVBfxF8S6rYbKCvxuPDCJ06XP0tIZyfRafRz1p6pSmzN6zUMWr21rO5DKiQgwzS659knbIzFSJev3k8NsopUA81O1x2DR0Ix91sj0TldojuHt/3okFJjiZntMyMUF2q7wKaih7gGVzosIXXBo9YNMygTbj0kVY7DF13JSxM3u8fsEqTYgpUiOmF5cG27tRvWrzjKMVKqZE94AOqVtTPcPF+6PIfrVgVDj4aPZbNU++Mn1aexJiAiHsXhP8XhXFJvXpRPR2jBAW3KjiP/3oiqKGpKI8u6fItfX4LJ9WUMtRd1aXtf+9DceSMWSIZC5+ttjSarb6vT3vc9bckvN4QTq1mgti3Qd5p5y1MYLvo8zcayg6aR0HeZbHd5AB+4VTHS4QNCgmHabOdBS6u+jwxsaKh44hVmCLxFSFgglwKMPT95H4F2lVDXhqLcAyaOm4voDxch0RgeKyWGNQQHUvGaBQSsHQqZbhmQxItO10JOxJiFXEmyNZ/UkrkVg+I8IhWRyxViP5r9u1O1OxkJKKUfTd6fTQJ04M/eTDyZlQlYmi0uFngPfzjsgtAbAIOWTl13mu43WQBM3Jrqd4kwx12lf/XGMdflgxpl24GdJkM/gnLLWIjV3gy4oFc+Xjc+nO/d0Zn5QAK9THT8NmDeClCwQj4l1+gJcnSTDdfIbpr5yVukH+FiA8mSIe14K3uO49W5TQd3UDi3bK05rc2nq9Mdqm13szL77jhU9B1+IF2gCv9S4CbSmg0sctWKJ3f3dH+iieTkhbBukuBrHhoa7stpmFLxx5ew5alGpSJnHSaotLEV8jn4s4mzTPzcSyy5I2EH96cu+mZd8bHUBTJIaI66cVQeqxw/NNmqNYxOyg4ct7Ecb+En2LUu6ek2EeBYZQP4u/tBbfJV3KTqaMC5C0hf2OL2+95JN5OpAfuLjXKqhU+Ay6/I9BNqJjzLXcMFUusCjvuz6kc4odpAFwYuEHiIS16dtS57JR4iFsXYGZRdHlKxO7kbCt1sRFTsWsg0OqvIdf/1u4kMxaGJwKd4mWzjNRCHzCRs1aw7im4y4zYMWQ5m5cDeFOgDd7xtgTz5b8Eeil0uiWXf0II4KaqE5l0KoaGmSqqaKtLbAjTWTQ+JnwIgkP6p+rNzcfrrJFFl1AN4zKSsoJx8DT7reNlIUhpO2m3sUTvjdyFoKAkQ9x3PuzgU8XybVfESn+cTgPJY+ywzqW4Rc2iGazR5OpvjAif0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: ce5575a4-7d08-4453-26ee-08d8e8682a4d X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:15.9215 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +gWcb3aQEFt3EIhbIfGfWuoo2Uw5UI+4SzYGoLtsFNatJ83gMu+c55TUIykL4SGGH5YmKTuho0OiC9nOj6TzCw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We force select CPU_PM and provide asm/cpuidle.h so that we can use CPU IDLE drivers for Linux RISC-V kernel. Signed-off-by: Anup Patel --- arch/riscv/Kconfig | 7 +++++++ arch/riscv/configs/defconfig | 7 +++---- arch/riscv/configs/rv32_defconfig | 4 ++-- arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++ arch/riscv/kernel/process.c | 3 ++- 5 files changed, 38 insertions(+), 7 deletions(-) create mode 100644 arch/riscv/include/asm/cpuidle.h diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 468642c4e92f..19c9ae909001 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -37,6 +37,7 @@ config RISCV select CLONE_BACKWARDS select CLINT_TIMER if !MMU select COMMON_CLK + select CPU_PM if CPU_IDLE select EDAC_SUPPORT select GENERIC_ARCH_TOPOLOGY if SMP select GENERIC_ATOMIC64 if !64BIT @@ -475,4 +476,10 @@ source "kernel/power/Kconfig" endmenu +menu "CPU Power Management" + +source "drivers/cpuidle/Kconfig" + +endmenu + source "drivers/firmware/Kconfig" diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 6c0625aa96c7..dc4927c0e44b 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -13,11 +13,13 @@ CONFIG_USER_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y +# CONFIG_SYSFS_SYSCALL is not set CONFIG_BPF_SYSCALL=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y +CONFIG_CPU_IDLE=y CONFIG_JUMP_LABEL=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y @@ -65,10 +67,9 @@ CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y CONFIG_SPI=y CONFIG_SPI_SIFIVE=y +# CONFIG_PTP_1588_CLOCK is not set CONFIG_GPIOLIB=y CONFIG_GPIO_SIFIVE=y -# CONFIG_PTP_1588_CLOCK is not set -CONFIG_POWER_RESET=y CONFIG_DRM=y CONFIG_DRM_RADEON=y CONFIG_DRM_VIRTIO_GPU=y @@ -132,5 +133,3 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y # CONFIG_FTRACE is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_MEMTEST=y -# CONFIG_SYSFS_SYSCALL is not set -CONFIG_EFI=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 8dd02b842fef..332e43a4a2c3 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -13,12 +13,14 @@ CONFIG_USER_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y +# CONFIG_SYSFS_SYSCALL is not set CONFIG_BPF_SYSCALL=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_ARCH_RV32I=y CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y +CONFIG_CPU_IDLE=y CONFIG_JUMP_LABEL=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y @@ -67,7 +69,6 @@ CONFIG_HW_RANDOM_VIRTIO=y CONFIG_SPI=y CONFIG_SPI_SIFIVE=y # CONFIG_PTP_1588_CLOCK is not set -CONFIG_POWER_RESET=y CONFIG_DRM=y CONFIG_DRM_RADEON=y CONFIG_DRM_VIRTIO_GPU=y @@ -131,4 +132,3 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y # CONFIG_FTRACE is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_MEMTEST=y -# CONFIG_SYSFS_SYSCALL is not set diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h new file mode 100644 index 000000000000..71fdc607d4bc --- /dev/null +++ b/arch/riscv/include/asm/cpuidle.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021 Allwinner Ltd + * Copyright (C) 2021 Western Digital Corporation or its affiliates. + */ + +#ifndef _ASM_RISCV_CPUIDLE_H +#define _ASM_RISCV_CPUIDLE_H + +#include +#include + +static inline void cpu_do_idle(void) +{ + /* + * Add mb() here to ensure that all + * IO/MEM accesses are completed prior + * to entering WFI. + */ + mb(); + wait_for_interrupt(); +} + +#endif diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 6f728e731bed..dd2ef18517f4 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -22,6 +22,7 @@ #include #include #include +#include register unsigned long gp_in_global __asm__("gp"); @@ -36,7 +37,7 @@ extern asmlinkage void ret_from_kernel_thread(void); void arch_cpu_idle(void) { - wait_for_interrupt(); + cpu_do_idle(); raw_local_irq_enable(); } From patchwork Tue Mar 16 10:41:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 403650 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E95F3C4332D for ; Tue, 16 Mar 2021 10:43:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7C70B64F7F for ; Tue, 16 Mar 2021 10:43:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236742AbhCPKmr (ORCPT ); Tue, 16 Mar 2021 06:42:47 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:13445 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236762AbhCPKmY (ORCPT ); Tue, 16 Mar 2021 06:42:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891344; x=1647427344; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=ralm8k/63WyazuoS7AFhe+3kISfc1r0wmN3oTjhdH00=; b=BSxjoPApf0O3Fxct8XQcTxh+/Pgi3WJWuBRhnrmVfH1PrNMy06kPptnq ezEa0j6KauSOYXh3J0wRiVIAnX6FfFzOgVp2Dzi3781mhSdqjfuL2sAq2 m1nOwZF1wpQOoTUB+mjnCKI+LbVkf6f1aEsLNLk5vAysSpE46tWIH/r/S WnxktZcC/pCegxkKOcveaniSLsBYZFI9S0oDxMQbO6qV1YCZ+xh98T4HE 2Z8Viqj5XWjCjKbkkGcHXJP+T6Hij2oq6hXP21CxgHjLIjlydSdf0WgQq jZiTnjdMunTXNXL8JWOFepy5WVWx4kZVbzRLeBM0PBtiwx5tKxaszJx/2 g==; IronPort-SDR: aJtyj2JWiG5p0bPLD61m0hyJ79uNfH4G/67sooyV5pywKLlqzU+tq/tzAF9rSEcjkmoZWP7Tni wYZqtUBKpsE4ZhSkpzlyKSGGgRcnbxGxMMIXOtUjhwaP/HLyvtlLP16p6T4PSUcFedhUzQ73CG xjY5a61c8AM3vMAqhpvOXkjvozS19lhJRKtA5+IZCrZSUnUq3RtQ3bjNvt+zmBfcrjmGrGm+sS k+OM5LXpIUmlZZoijNJDEWsOx+reM4gGljhnf2TDhhKYdkD/C+zpMhhzWPkP+GMoq1trrmS1xe y0s= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="272971741" Received: from mail-dm6nam12lp2171.outbound.protection.outlook.com (HELO NAM12-DM6-obe.outbound.protection.outlook.com) ([104.47.59.171]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:23 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=j/Wa8aoxe0bTDuMnNwrf6U8Hrk/hYnhOupwo6aVNPLHfrtDpXmEDDbwvvc6xZ5Xt2YN9xumCb2MmSd+NcxuHg9l/pzarAMSXl5tItvyXeUbzRLA2VNQ3Nl71ux/dkefi/n8xGXD4nJc0hyOuaKTf2JO9SYX498QKos7COUxefRQ090JL67TSg7wxqgg6N/HqUr+kBIqt5wxb+QA6jgkfmsrvbzLli4Gtk4xzkfGbYB4HC0/FNDkIQmwiJvz2xsRhPpH+S24UCuNvDfJ6Tn35GoNc1mM7UYGiYxYqPjK4tJef7RUEe7irJ8wT3sBwO7nGt060Bl8V7t6+Vj4DYMHa5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=n0wPjTixz4TiJoGCIyTd0KmxUTeO+KNL6ZCrnJLaXhQ=; b=MfHtJzZhEmwo9B7at7zb5QwOuC377iE7KdjI9QyscgIiGJgkiE/220idb0zBBaMTSD4Se0S3Y5P9OpRjZ17j3qUIUghazDMiQYQxzFgKaUCW4NVqgCkG9K03BUgRQ+dYTTEPIOPDtfmxTIwQpnpGdijO+/K6F/1O/fJU6ORYTVgZcStIj2KdwpIjlfaTkPLG9LafjYyLz39ZIAA790dX+/qmrYgaSX4ZNKYfhA7nNslxY6Fg0B0xo9OHyKcRqAH+WS4DdV3pZXKju5i3Srvbtzkl/yArIfOHapRfJ3IpI+QxWzZpSSDsdDQHdVD8BURAXSO971aBPPlLOpiov3yBRQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=n0wPjTixz4TiJoGCIyTd0KmxUTeO+KNL6ZCrnJLaXhQ=; b=CXlCzGdsj0boJhttmT6RL2fymLnGQkuVahiX++CYBeW3y9TZAqi7Gblyfl7zqyRCAQP9WzBic8bebjUit+jKuedNW+EFJDjBWzeKfbDBBwkHOnyv17yNMziVGLtwPCtXn3NAJuU6xIL8YGUnWRRIskfeZu56VxCL1okS7hR7ZIM= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:22 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:22 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 2/8] RISC-V: Rename relocate() and make it global Date: Tue, 16 Mar 2021 16:11:34 +0530 Message-Id: <20210316104140.878019-3-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:16 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: d43ed711-2149-4d60-a00e-08d8e8682dfa X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:3276; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JeULs70o4zk9xrup/fBFEW/FVqb/dR0ETV5mInQM08NiiDIMAb/7SauA9LSXPFoszu67rTsRfBBZQ6t9mbCh1eabB6lQ39iLVCAonsndZKcnmR8FaKTF8Zqh7saLUOrfPf0P2SLKesQM2cjvO6IUcIJQ+4BDbcvamSW/0mRSdI1knvCVxpcVFIVjulPdzJKYM1GpxmLVz4swMTBH5JS14Ngb/5Qdk4HiBJ0Z+dzJ0621XDVO2E/M0ixvAIzyIL/HBa+vtjVX0heu3nIYa2n8YyAxECd1VIY7VjSCs8IQlC0P84xhugh/TL1G4uTKLYlA7hoEi9XykgZQCB2yG010IggogVW5xS+1xsB8RkYEEEQ+5tGgj8OZKxvVzNcarPRmY9QOogOijYvepgYBNl0M8WPXFv2CCO/6SEW+4woR0oghonCM2VN8LDMnjvXqkLX6D9b30PhOOuitveDr0bjWLG2t4zLktDADafnaLkS5kp8b61iP+990TpA2itmxSLzf7CtitladtTjxssMyL1VLpVnSbDGIlEU3yZFQMkqYKJ7d7OS6UUIbCo4nbxwgZsbv X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(16526019)(66476007)(26005)(956004)(2906002)(2616005)(4326008)(6666004)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: poxuE+jsx0N0iwmSJwl8qbyrmuzEwkx8joonPNWb9Xkmo3/GuCT9puolsyOMGMDOJH9Ho1qgmySloVGSihs7nQPwIKKHRXgEScLzOdJzw2/utObIfF5nbwRrHgioD3/l1WpOzUz6aq2dV6UKJoN5M/VfM3CWFqGrRYjkalSazPU/QFKr/ecQZRs7FQ7NwshO3uIqUXOgeBwgCjU7ETr6TDUKhFg7/Xr5XtHewvCww9DyUd7NgxvR9FPE1wCrrRMbZ7mXb/Zyv/2zgg5KEfzL5ZDtId3g0EZUHcS+wFOsV0bHdXrUJyIMc1lzv1aQtNuuSAO31HCaX1ID4tTwLzZVkuryV8MD2+5Lx7RhHNE3vWBnfeZ3FGfSqT41B6y5OA/n5JHhYGHbP2AszykiPtn1cadqg8yDKi4q59PBmeOTSrodJUAe5j5Bd7leRdXUcpqdmYxuO/p/IfMu9H/OqVnObRDKSz+LtF2LOJmyxaWz/+TOYZY5xyB/j/yFHKKicyghm1ryHUxrAWbP7xUeCVW/e2i/Cj9++wOlho+99EBwZIWbIgjc9Z9GkALjPfzbQG4OqH9kxhFLhUBtJMD1LFqyMMAmkDJfRWdbH7PcsrK12HEqhluQNvgsRFtU01vBd1tYjVnFujbVOocIdbHNgpeHjGW8r7KNecw15dGBOYw0PEhxDJU4ItZOPXY9lcatwLLjfuTqvivw1qvjyaEvLE9zPaA2HeSu3z0DVbqrEX/keUtN2gP3zmiHH10eylsJhMztOxBVreJDyF+dDzJYqFvSRqfOFjFEv3gAN4U323wASvegFzPfYZz8wsY2P9+h+y+YFPILkqpPW9oHjJwL8mfRl8OEPqcbWGT5DWRBNj+WUvDEOa1Vf+xTWHGAF/+AQKK9O1hq/n+SKaUoqPxuOHuoDd+kjecCVsrMcELcFOCia3JRJJfevrulbnDQdaDIoTpTplt8zadMm0KAGjoAKIn6WE8u481Tb3yeZXOTv1klKIAycum448vQHN+Mf+E4i1jHc3nE0mikwAa1W6cRXgB7BucuJs00n9xgEANfVnbBcF0VXLnkTseRSxKa3CTd5AMXSyw1L+1ErKvlQW47G1TmSXgOegxehnLYUSgaVZd2X2M6EwH5t/2273XB6/xkzVvUUQ91IzjsTJTDZNNVykjV5c2pXeQwjcoRB5TOASmHx1PCVshsCu7xs545rUJ58aIRXy2OXL8iN8XcxKWVq1/o3iAdXIRU7jIOAUePMDTK1DYUoqUh1pBtvHOppCV9f+oYSsWZQDJepjWF/8SwymFo9HmtygIbM2ktKQq0Lt0xyG+QNjrzfIOsAwcSkU+305Ez X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: d43ed711-2149-4d60-a00e-08d8e8682dfa X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:22.2005 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: yCMid6aQGvxrewXkPHnRrJL7qfWeDyfDxfafHZMXR4aDHp8FaD6bPbaw5lV88zYdWCdWrtPHPO8hz5BHwnbOWw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The low-level relocate() function enables mmu and relocates execution to link-time addresses. We rename relocate() function to relocate_enable_mmu() function which is more informative. Also, the relocate_enable_mmu() function will be used in the resume path when a CPU wakes-up from a non-retentive suspend so we make it global symbol. Signed-off-by: Anup Patel --- arch/riscv/kernel/head.S | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index f5a9bad86e58..9d10f89e8ab7 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -67,7 +67,8 @@ pe_head_start: .align 2 #ifdef CONFIG_MMU -relocate: + .global relocate_enable_mmu +relocate_enable_mmu: /* Relocate return address */ li a1, PAGE_OFFSET la a2, _start @@ -156,7 +157,7 @@ secondary_start_common: #ifdef CONFIG_MMU /* Enable virtual memory and relocate to virtual address */ la a0, swapper_pg_dir - call relocate + call relocate_enable_mmu #endif call setup_trap_vector tail smp_callin @@ -268,7 +269,7 @@ clear_bss_done: call setup_vm #ifdef CONFIG_MMU la a0, early_pg_dir - call relocate + call relocate_enable_mmu #endif /* CONFIG_MMU */ call setup_trap_vector From patchwork Tue Mar 16 10:41:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 403649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6574DC432C3 for ; Tue, 16 Mar 2021 10:43:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3744965023 for ; Tue, 16 Mar 2021 10:43:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236794AbhCPKmu (ORCPT ); Tue, 16 Mar 2021 06:42:50 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:13445 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236750AbhCPKma (ORCPT ); Tue, 16 Mar 2021 06:42:30 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891350; x=1647427350; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=x4KgaKkTuSTDs7W+KwB0YDqVJn55pqqtz7HQEAs74SM=; b=QdlCQ9daOQTLjeK41HLDueVUubDCsZsUesK/flwrDBCfqX4lI6b9Y5vC m6jMea7YD0Rz/cZDYwSsfOe8f3Sb+qJeKOco5pjfxvj63BrDpm8/qaEEx pxBtEd18TOoZESRaXNioQpZj0XkNEoS21bb5SbVT9CL4fY/uJV+/MSAz0 a4jkBWZia3v+OILI+Xfp8OIRxMnEMeAyY2Sm4J3kNckKI3o7dnqAm2wJ3 kiqlFeOI7rB/y+andt7phnaIvnwHGhycxK+SbM5ZQOEZVcX0GvVAHdwzx MerLaE1vKvsDHcwfjauoD1LEb2KEa+IGhJcmNmpEZEHILv8kLsY6cb0U9 Q==; IronPort-SDR: ujmx74Kr5JBVqQFU8ZrxAThEHMddPP+9g/TgZ7UU6AGjlfVVN+o0KQ0/8bS9oGr7nRG0OiV715 fLD5CFVRa3G8Evhl6XjRGKXS9mORDVgxgi4bZV13NuQvt+aXP0X7kKkmIo3ua54T5YiWWb6F2b bT3HZh9pkddbWC69bYrsVQHuXqaZKXVB/RiDC5UpEp+uKborWkMWKa1dkFc+QbaCXCsSYkD85T H8nmudd0MOOLlGGkw5+zR3NDIsZJOGo9w90shxAgeSN9kGIh0wf837RRs9qudF7p0eWdfThpYS OQQ= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="272971754" Received: from mail-dm6nam12lp2177.outbound.protection.outlook.com (HELO NAM12-DM6-obe.outbound.protection.outlook.com) ([104.47.59.177]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:29 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZDexrY+3Ro9ZP3C+hiNg5715nTyvT08zFHoZQwC8kee1j5hugKwcBN9BIYvpYD+hFswkTnnKtlQ+rXSFuh2OBfDWg72ZqdZt2KcZe3yRT8GU+KYdb5Q0IZQOwg0e+zBgUGkNbiH4jjxa+JbfVLfCDNwDrGxqAjAZJRzWi17aOQlmzUO4hSx7KYcWK13mJIz3vP465GnlCKovnY6OEXid1YIaqhSgVGYEe0JgWVFHFKNVMa0Ak9SBSkUXNCptEXL78BS30+bY1IlWrA85OByQt+erRr237E6jSpwvREuKb7YDSUGTL+j+ZmVF0ac1JQS9r9KFe9wGovzsZ+q+3yIp5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LDcvlmi0tjBar+fQD5MnMHG7r/5NNePHjRo4ppQ2rj8=; b=XaDu6dHDILRIS3A+hNjKjqhkE+pINJjX1K12lOMTYNXfg4NpXUKNgd6qIovfU4SFdzf+p90CYLx20ru31bb0NYx+eHXmVgKLfsvLG3rY1iE80rCgGYPUb/TgXyvNH5feXeD5eapksT4LJoc49GxPwvvVNdnfOMSq+/KE62scyuOYM2WH2HU4q4PQ61ai0vfnErpoQNPNIwKC1wglo8jvKMeqFGMjcJaNDOc6koMZcI2UDKxnPSESix/PjWx/TeaIvOpHgdKyYzu7ZJ0/KfasX4rX79ZG2jI2yZPttIa+SDslWT2m/ZzTxjS0Sppcw0zTXD+dUKN8BMnzINVTk8Jq+A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LDcvlmi0tjBar+fQD5MnMHG7r/5NNePHjRo4ppQ2rj8=; b=KuohIEiPmBHISc80ceD6q6d2RP30vSInKZedHmhNNS27WNI6LVKtU5IXdG4MGrm05Rlp+j0NbMDCb/nFMca6rKI09p8AV/y06Uy6CLqKlRMaxbHnIzrkabezUdJLdJ2QxsC9LlrHAoFawNqKkxs7N1ib8WD5peeJ8f29XXIGNpg= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:28 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:28 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Date: Tue, 16 Mar 2021 16:11:35 +0530 Message-Id: <20210316104140.878019-4-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:22 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 7031f415-213d-45a1-4dad-08d8e86831a2 X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2cI61CDkfIWb4MgVTwgm9IlSWYVtFOA0ke9yKcJ7S7xOI0gtH6F4zmY5XqBdDxK7mNZa12BknqQmBQwPwkW8wRLp5DX5gghYVRSTfYN+nb16KrvNtEzBQ6iEDHIcz4EH7QXZ8OdLaIkzd7pRlW492VkKvnZr66yjcRYZTA78mM2xkkT3xwszmYABT4DE1P6FXfCMadLI4Rke4+vE3906wO8v2aU9GYwppsVUA8EKj+xrVQgWfCt+Qc2VGqFM0CfsTY9ObzBI2szIGpL/Y+xTJZWfmDYhM0QTnYv4msmcRGv6H/GM9Yn1EJY57axOFYeD8aAXhENTeOcnRRvlWVV1ogOw0tPDwqwGgj6YIib9Yaemsg0z2O0Ab802MjA2Ue4uCR+HlRcE3rj3pfHwdFV3bxyS0WL2OwbpeLBd2lVM1IQuNbHyeUWf1I3AEt2ObmQWB0v/o8wLEGaZY+dP9woh0g42qlamq//82aT/ZmfGh44AE+b7qZO64VHhMkFr3qqv01R8xSklbJcvkz18jeVEpJ5K8p8cANy47JuoRwzthL6ZmpYCE934Qb+bG9zoYZ4T X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(16526019)(66476007)(26005)(956004)(15650500001)(2906002)(2616005)(4326008)(6666004)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: BltdjKgx3YSNrowpBu1EeGg/1sQxS8h54BBVnOZDwIsqI56nV7FhvSSOfulmKGBGmF5X0umhjIqBHSVvx/O/X5Qd65RmSur9QLNGeZiynU68cyaIHhKRUzArF1l2QEaoQysAeGjfX2aOkNtdqGHCGRUaHW8/WP5n0If2aL8Rghx1qHM84CJp2Pwn9FgAeR+cZxJLutiD1XfR6c9G2RdgGlw6edZn7in1iI9oCGFCSrvoP3w+6km2ZasJX603cuUj40DdbRuVQaxh1L+DV8Mc7jPP6GPZWeQY6QoESFwsbkNuL6sIXsY4f6xbG1pKroxCPFxJFalgWLFjnChIvWuJfihdlmQch38tS6+pkEHiLGyxs1LwDmQ0kM7/Z29Tcz7WrnrpnDQW1FPH/hlLwkose3GC/HKnWAx5nJIADlCEq3s2QcCtRje3p3fmT7PBIQfc3vY/UzxGVwMadYz6U/E0xNqIbBQN82ipkmEwjcIaJBPX7VSJjhv7JRktqnALphIDSqrn6vH4x/WRibzHAg+OCuoKDHxMIFEgveyTCP/S3UQw/v73mbbrw6TBjS1rb0eHV+fMOVaazXGMqjD6b2mBLOclMZxe95MqSJw5d9uSWMJgNtvAo0FJpg4SV0Vz+JkOcPiMbm1mlv53XdPLbqXVtVS+yiSO5ehOHTmACPhBoAYHc74aEb8imZBON8On2HCqURJ9XWUVgLX+sL4jGMyTnVwe4d8DDdwcA815WKTZhq/H6S3krWVJpAMa5X1erNK88zWEoWXxJn9Dx0SAd3NNtK7sdWQ6XPEIeZJZaN58oZw3N1kRT7ivZQHru2aZW088oa5GxHe32k1FVDbiXvmGkjM16KdQt4PtSkup+Mzmu2zcm/Uct8Fl8f28J34VfUZ5phzldUdAs4OGMbqNnjODAvnbiTpCKO49mOO7BjVueqCO2chPVAguF+86j/ACFJFbDv6uKH3VRj3pqRHJ1jxR1ne2YGh6PLHLIXfc5J1OeMRkrcfW/gVUw/a5IYeiHjR/WDcw4rMtTJvQnxV79CCIe3hDVb/2/7P0Xge9l8NkvsyMU61sTKQ8+7DEHLIiTc1KbgOdmZ3gfLPZKZ5KwuKuJ4tLBaKtLMORBYVTcAPi/3c1rT2m2CiCD/yXH/5gdxWxk/zJRTP/FpCDhxsP+ZquOyPISHUJ7tFGwFW9KIizP/LZORAInwrhbRwux+0zQvom76+Iyjw8ToslWLN2cUIKFwrWZzGGkGZVROWNRxE1m6+zUYeTGCRTvCcHi9zdKOSkV8EjR4SlSoxCJi3/yVoUc0xClvB964RU9IB1d/PfO9tNW0TIBxDLxmqOeBVbSecn X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7031f415-213d-45a1-4dad-08d8e86831a2 X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:28.2236 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dCtGUeebLfgM6MZnVoCek4j0Su/rbMgY0zDiGnwBjCQ4TrsHEUSi0dSwgiz5EcKOhK+YbuNOSrwMM5N5gLHuow== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The hart registers and CSRs are not preserved in non-retentative suspend state so we provide arch specific helper functions which will save/restore hart context upon entry/exit to non-retentive suspend state. These helper functions can be used by cpuidle drivers for non-retentive suspend entry/exit. Signed-off-by: Anup Patel --- arch/riscv/include/asm/suspend.h | 35 +++++++++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/asm-offsets.c | 3 + arch/riscv/kernel/suspend.c | 86 ++++++++++++++++++++++ arch/riscv/kernel/suspend_entry.S | 116 ++++++++++++++++++++++++++++++ 5 files changed, 242 insertions(+) create mode 100644 arch/riscv/include/asm/suspend.h create mode 100644 arch/riscv/kernel/suspend.c create mode 100644 arch/riscv/kernel/suspend_entry.S diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h new file mode 100644 index 000000000000..63e9f434fb89 --- /dev/null +++ b/arch/riscv/include/asm/suspend.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2021 Western Digital Corporation or its affiliates. + */ + +#ifndef _ASM_RISCV_SUSPEND_H +#define _ASM_RISCV_SUSPEND_H + +#include + +struct suspend_context { + /* Saved and restored by low-level functions */ + struct pt_regs regs; + /* Saved and restored by high-level functions */ + unsigned long scratch; + unsigned long tvec; + unsigned long ie; +#ifdef CONFIG_MMU + unsigned long satp; +#endif +}; + +/* Low-level CPU suspend entry function */ +int __cpu_suspend_enter(struct suspend_context *context); + +/* High-level CPU suspend which will save context and call finish() */ +int cpu_suspend(unsigned long arg, + int (*finish)(unsigned long arg, + unsigned long entry, + unsigned long context)); + +/* Low-level CPU resume entry function */ +int __cpu_resume_enter(unsigned long hartid, unsigned long context); + +#endif diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 3dc0abde988a..b9b1b05ab860 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -42,6 +42,8 @@ obj-$(CONFIG_SMP) += cpu_ops_spinwait.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o +obj-$(CONFIG_CPU_PM) += suspend_entry.o suspend.o + obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index 9ef33346853c..2628dfd0f77d 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -10,6 +10,7 @@ #include #include #include +#include void asm_offsets(void); @@ -111,6 +112,8 @@ void asm_offsets(void) OFFSET(PT_BADADDR, pt_regs, badaddr); OFFSET(PT_CAUSE, pt_regs, cause); + OFFSET(SUSPEND_CONTEXT_REGS, suspend_context, regs); + /* * THREAD_{F,X}* might be larger than a S-type offset can handle, but * these are used in performance-sensitive assembly so we can't resort diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c new file mode 100644 index 000000000000..49dddec30e99 --- /dev/null +++ b/arch/riscv/kernel/suspend.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2021 Western Digital Corporation or its affiliates. + */ + +#include +#include +#include + +static void suspend_save_csrs(struct suspend_context *context) +{ + context->scratch = csr_read(CSR_SCRATCH); + context->tvec = csr_read(CSR_TVEC); + context->ie = csr_read(CSR_IE); + + /* + * No need to save/restore IP CSR (i.e. MIP or SIP) because: + * + * 1. For no-MMU (M-mode) kernel, the bits in MIP are set by + * external devices (such as interrupt controller, timer, etc). + * 2. For MMU (S-mode) kernel, the bits in SIP are set by + * M-mode firmware and external devices (such as interrupt + * controller, etc). + */ + +#ifdef CONFIG_MMU + context->satp = csr_read(CSR_SATP); +#endif +} + +static void suspend_restore_csrs(struct suspend_context *context) +{ + csr_write(CSR_SCRATCH, context->scratch); + csr_write(CSR_TVEC, context->tvec); + csr_write(CSR_IE, context->ie); + +#ifdef CONFIG_MMU + csr_write(CSR_SATP, context->satp); +#endif +} + +int cpu_suspend(unsigned long arg, + int (*finish)(unsigned long arg, + unsigned long entry, + unsigned long context)) +{ + int rc = 0; + struct suspend_context context = { 0 }; + + /* Finisher should be non-NULL */ + if (!finish) + return -EINVAL; + + /* Save additional CSRs*/ + suspend_save_csrs(&context); + + /* + * Function graph tracer state gets incosistent when the kernel + * calls functions that never return (aka finishers) hence disable + * graph tracing during their execution. + */ + pause_graph_tracing(); + + /* Save context on stack */ + if (__cpu_suspend_enter(&context)) { + /* Call the finisher */ + rc = finish(arg, __pa_symbol(__cpu_resume_enter), + (ulong)&context); + + /* + * Should never reach here, unless the suspend finisher + * fails. Successful cpu_suspend() should return from + * __cpu_resume_entry() + */ + if (!rc) + rc = -EOPNOTSUPP; + } + + /* Enable function graph tracer */ + unpause_graph_tracing(); + + /* Restore additional CSRs */ + suspend_restore_csrs(&context); + + return rc; +} diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S new file mode 100644 index 000000000000..dee85c86e177 --- /dev/null +++ b/arch/riscv/kernel/suspend_entry.S @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2021 Western Digital Corporation or its affiliates. + */ + +#include +#include +#include +#include + + .text + .altmacro + .option norelax + +ENTRY(__cpu_suspend_enter) + /* Save registers (except A0 and T0-T6) */ + REG_S ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) + REG_S sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) + REG_S gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) + REG_S tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) + REG_S s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) + REG_S s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) + REG_S a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0) + REG_S a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0) + REG_S a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0) + REG_S a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0) + REG_S a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0) + REG_S a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0) + REG_S a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0) + REG_S s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0) + REG_S s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0) + REG_S s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) + REG_S s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0) + REG_S s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0) + REG_S s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0) + REG_S s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0) + REG_S s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0) + REG_S s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0) + REG_S s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0) + + /* Save CSRs */ + csrr t0, CSR_EPC + REG_S t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) + csrr t0, CSR_STATUS + REG_S t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) + csrr t0, CSR_TVAL + REG_S t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) + csrr t0, CSR_CAUSE + REG_S t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) + + /* Return non-zero value */ + li a0, 1 + + /* Return to C code */ + ret +END(__cpu_suspend_enter) + +ENTRY(__cpu_resume_enter) +#ifdef CONFIG_MMU + /* Save A0 and A1 */ + add t0, a0, zero + add t1, a1, zero + + /* Enable MMU */ + la a0, swapper_pg_dir + call relocate_enable_mmu + + /* Restore A0 and A1 */ + add a0, t0, zero + add a1, t1, zero +#endif + + /* Make A0 point to suspend context */ + add a0, a1, zero + + /* Restore CSRs */ + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) + csrw CSR_EPC, t0 + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) + csrw CSR_STATUS, t0 + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) + csrw CSR_TVAL, t0 + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) + csrw CSR_CAUSE, t0 + + /* Restore registers (except A0 and T0-T6) */ + REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) + REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) + REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) + REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) + REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) + REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) + REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0) + REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0) + REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0) + REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0) + REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0) + REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0) + REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0) + REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0) + REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0) + REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) + REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0) + REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0) + REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0) + REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0) + REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0) + REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0) + REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0) + + /* Return zero value */ + add a0, zero, zero + + /* Return to C code */ + ret +END(__cpu_resume_enter) From patchwork Tue Mar 16 10:41:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 402159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F4DBC43619 for ; Tue, 16 Mar 2021 10:43:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 735C065032 for ; Tue, 16 Mar 2021 10:43:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236799AbhCPKmy (ORCPT ); Tue, 16 Mar 2021 06:42:54 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:13505 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236772AbhCPKmi (ORCPT ); Tue, 16 Mar 2021 06:42:38 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891357; x=1647427357; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=y4YFFMKVmlQM+NHGrCbRGUcVF0miD9tt6EelOHDf/Ls=; b=K794TNTR6S07tCX8wljzqec+f0Z0ehzDnWHj9xujPGgoG51BUQf56fuc C/QRuIkZLh0S9YINiJeFgmN56gKcwhsEMkKtK2rIcC8V4/GphdN77QKN2 CJp9JRnV8FO3qOJjvMaDsxa6YfPAlEybLt2+Eq2+GVZnvzsjjRbJY547O AyXoMDrYsG1ujmlBcW6yUEdsD5EY2htWY1LWXP+4Nqx+ryQz0Pb64vBQI xnCy72NYJ+c+4ulOW7wkaRL8JonIwg16e+MeJRSfNWBmBEUGSJssTGj5c jzCwlOHJiBhiAMfGkkqS3sJbCRhnq+it5C7tufVGMGsahupIRcPdegHMQ w==; IronPort-SDR: 0Ez/hWlxb7khH+kuCEeJYbN8U/UQ2fs5L2MAL4Pt4vQ/0e6Log0GfPeD7X/mK5ok5jLefElqTO dvMOk3TiLHZBOWGCzcvL7YZimnKaSeFY7dODydqc02/O5ZVVnDYRogr23gblamF27CSH5Q6Z5u LwXY/+rhF+B26+9TBTSx5JJW5yVbR3JenaBPPK8EYBpIEop07xQyXRYoEd/MiyX9U7LHn3sxIS KHE6qvExTuWcVcREdZ083Zqog8EFa61BLOkd8vfi8+NP9JYcgNc5mlyiXCDdTZ7Sv8+cysu7v2 gUY= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="272971764" Received: from mail-mw2nam12lp2045.outbound.protection.outlook.com (HELO NAM12-MW2-obe.outbound.protection.outlook.com) ([104.47.66.45]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:35 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AX8ir18r76dtuW8o1IiCd7Oe+KyARN0komICrXuqQDHoSUpvob8caTkVmttdkmoQVD2y5FRGfSw6ztEVY/fRLR1H4reGHwEr38A/h7qv6A+vkgb3rH2dml5GjrP0lBNRnMOadAANmNkRlnQFRHqJd2o271nOThUiamlRUtqGbLiqEZe0IlGqlfh+DxMafETQclDNwpbsTSCZ2bMqhdWfezPe4yTBDvKkurzL/ovfX1snwCiT+SMnzO6gAZZ4FaEMOyX6oXrEfnYgtnXu0WnVCalmtLFpT/2TkrYtmqxhvIC4k5OPD7zLjz8la2eI8cfx9ETdWM3TQZCJh+TWlOYffA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sRnYrrQBMmPOciDojSI7+oGNW+nIEqIdYgzr++abP9s=; b=SeHjYNfuolnKradBTYzJkdxRHAsvopSf9cFyKUcIhL22byebqKmd7Ha+pAQAQXcCCzdxjJ97YpURHdQes4Lytp1Uw8lEsHwSgI150DaQJXtJtxm6gEMP0HAUrNDxIQ5Gt38EDcOY3XSV+lRlpBRfSR81cIAjZD/fZEuazR0w5qpteYigmRXK2jzz3ATR5KPMb/nZT4ovOo6/NPpkTo4AmCroD1yv+C5QINoLfPEJgBo7R07EdrbHWlrBidEWJ7MF36+1gW8YVUT7R4TkOjHEjZ3Yj5tgjpovDevRqysAEyBeOvuMzUjC+pqDOZV2JXlkxCVBc1Hbhwn6gNU7MqZNWA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sRnYrrQBMmPOciDojSI7+oGNW+nIEqIdYgzr++abP9s=; b=H3AhJYekW9zZU1KcGKkI+5+sDseJMb/zxZkHxCjbsU884sO7HVstOqAQli6EauyGnlKj5VQuPeggAmOUzqG8Cet9WG3ovo1HJOxitiViYqmWhmLJ9N7B+w6tIIDJhTYE4dMmKpx2X2Ob1XTopD+E7nOHoXlZIeeYKyVNHBtqNx8= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:34 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:34 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 4/8] RISC-V: Add SBI HSM suspend related defines Date: Tue, 16 Mar 2021 16:11:36 +0530 Message-Id: <20210316104140.878019-5-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:28 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 56425630-a99b-4b16-a69a-08d8e8683532 X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:220; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ocVnnHsW8PchrNUl1IrrXrV3NBNhP9fESmMJt/8t6fDaP6/uwBzjM8z6bXjDwmcj1y04K2F1R8nRvfFyKosF0IR2lRsvMOW0EdwM5HU1tEkWc3s0sRmBB0M2LVjxsTExR5GloLb1e3zcou7/YyWtBGkadfqdgotcA0ZOs8DvVAuyhsldAgxaz6Gw0yJ5y4ZLgc54SGNv1HSSmjKIwwtSa3jdjoDj1RHkpxZn5qxQzvBA8JFcU+W9Y93rByzBw6TFxfFvc1cI0oejDYGRIBXlWbDaT4OKBczAE8DfxvyGYvi6FmLgGSsVHJIggZEXttKw38RgYR9hrVXqQaJlChBRJysG355kr7WkED9OtvrGIU/MYxO2lwBMvvnf+bjbqk/hgDGTJlv9Red0MGJZJJMPtk/sAm70YMv73FlmV0t4Nx0JAu/RtCFyIvJDBuJkJXIFPQrStSN/LctS48HFRL1m5oShFO41gXe6PsUWQtSeON7gnebFD2wy7+tyFR7LpvXVWGSPOu/84BNLxHyIEVCsq3pZ3EsCWajF6AFyJQ2i/kQBpBRkVv2Aze3GCGTdajf+ X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(16526019)(66476007)(26005)(956004)(15650500001)(2906002)(2616005)(4326008)(6666004)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: DF98/W7V8GqdiBbFnBqVTqHgEm5mR93YywFkweAJ/ralQV/1IGE5RuLNATJUWQrM+oLinwcfP+IKaKJ/8WhP9SAYPB52tc2rqDIeQA3sxOEuq2+z7yE6+YqajcvMNHqluXtLhH3JWgIBqiVsDGKNr8IpqCtiElXqYjG7JWkXdwMUWWS/RWw9hhY1r6Nrk5svWl9cnE5vPurNDG8DhSdb5hkNqOZCytor6/jfywN7Ayo+O430H0NQVF/DjrWpU5xUFkENm3T9rRFAzozYH2taeZtFxRxZwLIA9CUpEm5LT/BtCxOv14yxqiJZhHlnOUqPUzOUnErh+rMDQdlqoLhyNcoTmqWhv9C5ezNg0RRUchobkNf+W3bWIvcz7pUfp7IU4hsCk3z401mAdNFYYH7KyLvlA9bSGKtskzDk5V2YrdJ1y7UIreeIsdS1NFhw8Tyc0GebSWxTzLPsZYLo899bgQ3uGwTlr+1IQQmnCFZHVEh+C8Vi5eZ8tV0nw5FFiE/ADIR5HmWMPxdf+8onsD13yKWdqi9H3IhQFB0nqDQFCqrY2snamCBGN3BK5zpRD+fHU8lAsdrltVfRXiVxjFD5d+JT/OuWL1OX1XjP9E6Ge/eGDUoCQIc69XtRTf1d0GypmnpqR5ZyKS3fUUH7kSGQgicr3+ElilmzYjrAHwUsv6JfEhqhPkFF7SoV+NMOpsndjBXxeJdjctoU55R303cC9bwKTJo40EX4K1d02ZzWT3HEo1FVG+he16eXTbHUNbsXwkQHBwvEpoBOeyVDHu+Rl+UrZx9KjDhmYlrHHK+F1TyOcsQYlNUYSfj5TWmbHjNUGtavImDPBiPyl3LqiVpg5BX+7hnTQzZeJ0a1zYR8rWtm2MR2HWkNzBx37XVduTkkxMXOkt2AcRjpAOnqlynr+/W/L34rcvwMhJGroDNQqax8l0r6/jLEoOm/cqMh10qqzSPt/y5UYtuOYV77jfV5beQSqnZbl6UFcBl7fy8qg7YGYIn6m/nlLscokIiiGt1UnO1dIygYWqxf2RWJnMxGwpLeDYHB/4aJdYsH+UVB8c48h2vsDW7if0n4+YtCFhlwUrJLqnslx635NJH5o3kWgt3R9UzlqRKWLzn0N563tT1URfdbJ8FqHpEa39MOfQZ50YUU1OmE1qwLNqhUQqdv/jN4104bXw6ZhwZSUB+O5y0ADzdXa6pBoIkLfXnZN2Sba7LTc7eYDuOLrhGeLIVSbfI7QG9FetyMleOPvDOcej+KmDsljDW1RK+AI0clZWsv4PMnA0DkRWeVfpphq3ZmtYMum5lMYB/02gD28wPJ9sIz24ZY4nWRKSajeU11Rqrb X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 56425630-a99b-4b16-a69a-08d8e8683532 X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:34.0779 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: XFcoccNPFQjb1YGHAQ4Mma3fjUh39CnvWAUtjrc4nXkkQhIpz6BRAJbp9Vo1MCFJIhsARRFOw5Mjs2dlBKmOog== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We add defines related to SBI HSM suspend call and also update HSM states naming as-per latest SBI specification. Signed-off-by: Anup Patel --- arch/riscv/include/asm/sbi.h | 27 ++++++++++++++++++++++----- arch/riscv/kernel/cpu_ops_sbi.c | 2 +- 2 files changed, 23 insertions(+), 6 deletions(-) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 79fa9f28b786..4bdccec77a84 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -62,15 +62,32 @@ enum sbi_ext_hsm_fid { SBI_EXT_HSM_HART_START = 0, SBI_EXT_HSM_HART_STOP, SBI_EXT_HSM_HART_STATUS, + SBI_EXT_HSM_HART_SUSPEND, }; -enum sbi_hsm_hart_status { - SBI_HSM_HART_STATUS_STARTED = 0, - SBI_HSM_HART_STATUS_STOPPED, - SBI_HSM_HART_STATUS_START_PENDING, - SBI_HSM_HART_STATUS_STOP_PENDING, +enum sbi_hsm_hart_state { + SBI_HSM_STATE_STARTED = 0, + SBI_HSM_STATE_STOPPED, + SBI_HSM_STATE_START_PENDING, + SBI_HSM_STATE_STOP_PENDING, + SBI_HSM_STATE_SUSPENDED, + SBI_HSM_STATE_SUSPEND_PENDING, + SBI_HSM_STATE_RESUME_PENDING, }; +#define SBI_HSM_SUSP_BASE_MASK 0x7fffffff +#define SBI_HSM_SUSP_NON_RET_BIT 0x80000000 +#define SBI_HSM_SUSP_PLAT_BASE 0x10000000 + +#define SBI_HSM_SUSPEND_RET_DEFAULT 0x00000000 +#define SBI_HSM_SUSPEND_RET_PLATFORM SBI_HSM_SUSP_PLAT_BASE +#define SBI_HSM_SUSPEND_RET_LAST SBI_HSM_SUSP_BASE_MASK +#define SBI_HSM_SUSPEND_NON_RET_DEFAULT SBI_HSM_SUSP_NON_RET_BIT +#define SBI_HSM_SUSPEND_NON_RET_PLATFORM (SBI_HSM_SUSP_NON_RET_BIT | \ + SBI_HSM_SUSP_PLAT_BASE) +#define SBI_HSM_SUSPEND_NON_RET_LAST (SBI_HSM_SUSP_NON_RET_BIT | \ + SBI_HSM_SUSP_BASE_MASK) + enum sbi_ext_srst_fid { SBI_EXT_SRST_RESET = 0, }; diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c index 685fae72b7f5..5fd90f03a3e9 100644 --- a/arch/riscv/kernel/cpu_ops_sbi.c +++ b/arch/riscv/kernel/cpu_ops_sbi.c @@ -97,7 +97,7 @@ static int sbi_cpu_is_stopped(unsigned int cpuid) rc = sbi_hsm_hart_get_status(hartid); - if (rc == SBI_HSM_HART_STATUS_STOPPED) + if (rc == SBI_HSM_STATE_STOPPED) return 0; return rc; } From patchwork Tue Mar 16 10:41:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 402158 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06C91C433DB for ; Tue, 16 Mar 2021 10:43:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D0B2564F7F for ; Tue, 16 Mar 2021 10:43:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236827AbhCPKnP (ORCPT ); Tue, 16 Mar 2021 06:43:15 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:13505 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236777AbhCPKmm (ORCPT ); Tue, 16 Mar 2021 06:42:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891362; x=1647427362; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=h7XIRrb7qnCKO+6OJrZJvs+TZXOJkBQhu0RoEYGRKeM=; b=SmnlvkQLwoFRFopK6Dt3pIMRXBr2VtO1pSXpCZmFOyu/fP/+czkFb2Et 13/6SWR7evSnHzZDYbIxzG6SuUbOdTjmMxyI/O/OeLyDDDNLjRmbGWBM5 tfoS2xLygnVnQhJgIhiNFWvNquclRtQ4lqAV8iGxlLBzeAPVlRQCvN1Ei /UnTKmxEveSVuUMTNZswJisD/MoVVejrf+w4Wm8LMztE7QCibZj+nyOk0 fjjt5FayxP3ipdGDvfyF1IzP47eglv/H2Gx/RmylcoMneZHBDjoipf290 pgLBR3gKlj/7tHYuX8djWmRO4f873uIqand6RYz3wwoCmOCcdy1OWuOFx g==; IronPort-SDR: qH8ID56MTM5vYL/m2TF+2ir4G/0j0z94NxzlXw3atUYY62UwpgdCGO1Vl7EJCqK8ebR5qCxGRz 6tq1w6ibwa58IR6u9JxpxNqJ9FMigYB/+SmRdpXSDQeXdAgh7YxUNU9zZlZvexS63J0ujn5YF0 l7cVgTW0RnVdDlzI1Aq/6U0lp3MmTFvCojUmSlHIghkeKdgfWFLYc8Tx/fys+S0SGytTPuMTph MJv3aEKOlU8zBa5DeyflVMg8a3BUcvrbfJfCMA/0pzCc2f/UmZis1PebBTm1pGO9/uKK2m68hL u7w= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="272971773" Received: from mail-mw2nam12lp2041.outbound.protection.outlook.com (HELO NAM12-MW2-obe.outbound.protection.outlook.com) ([104.47.66.41]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:41 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ipYGQS6KXKrLkcEUJOhfClJt0w2RZrfHCB/HOPXIeTHReHblzzDVlbAPetT9LmbKBkbzysAOd49QveRgy+gMqKeg1BymJzc2pCFtQNbuQ5jYUYq4W095dW8Zq+8A9FZxhk/JSnSynzh9dpjBbr8z8vyE+YWTJuF+GM5KCDb3Tx9ovHzpYFF1BNgfY5JRMP19OfMjSo8DweeXiXEmk64Q6KRz2FtTU/vuvkZa+TqNWU9QuVovZho+z2nqRW/jQwsyLVmdWl+iA2kb3u7u7yM3KCfGPxJlzLSbBhJAw1XeuRb8drybwbGSxqRLTZ+lMgna9it/5lp/Gnk3zfuAn+04kA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pyxWnb7TFn0LIKLtqJo7m4RwwIbcKe4DHgZC40Yp3lk=; b=YdA7RKbYjuljnqRuAu3tojrSB3yV7bIJMvQs/nzy6U2i3fP7ZgBJrcSOs22DdHGIPvh3Ob3y1o28N9Bf3oQIPmq5o5+uK2VbiUa3YxNXAkEsMJYJVnuVRa0hrcimS4/o8rDc5mIKwHGM4uOnZpF2TY3o6OnGYB5p0JKG6QTcWej6LpvjnKXgqwZPIE9JVhwuKDi/FgxpGKK2l6rTxJgEifo2AX1KHXxid3BXZ/+MPrzkrAabix+OyxHHSKzSuZ/RzBj8sg3go49jm/XiUNhiDmTK4D6sehveJkGO6M2eLHiJHVfe9QY+s+ZZkQdfq3iKwbwVXjezb+AOW3j9wJ9TvQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pyxWnb7TFn0LIKLtqJo7m4RwwIbcKe4DHgZC40Yp3lk=; b=R1gggQxtsBZYT9tzQYRuS/8c/emX6LUh6K3RD1q3R53EyIW3Lrtsw+I7l7IpOhXpBChPGCr6+zGMEAYReUtsp3Lwxn6ET6WzVZgYOw94fpNeAMrUdOBMZ8vMqLErHxLhHnK/kltF347/y7h4I5er5ai26Co62zDFqSVT4vyhkCo= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:40 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:40 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Date: Tue, 16 Mar 2021 16:11:37 +0530 Message-Id: <20210316104140.878019-6-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:34 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 47517f90-6b15-4322-da14-08d8e86838b0 X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:359; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: I0aBDNJy75QBx3a+yitb6Bxs/+QiN7DcBxI9wjZoM6c4SubXeU4+W8Bsu64aJjB8wiIMK/7Uvi21xC+k7Dd0UfNHqUOHm0y3ma1BvyxCM1tGpB3ayizzWhLINutD9wLmkq0S44Yt2DXTSpAJv2PBuNAwZvqHRDvWZ9IZQaz+vwZkjnKJYnedx3dzzMcgHSRYddMPY93MWVJXtEqOyr8fDeuulAML3RUNSW07qN7WkyeVz2g+OpwdipaWnGwp255qL6vX6nJ5h03l8khaQKfP+DFQpCLGJJG3X6huCF2bZsJbYgRnq/HxO4s4cPnzfhjWSa/Nq1mEHW33Rghw3NpZ4mndpvYaTUlObkhpq6K8x4lDqddI3l3RJcJfTleae9qakWl2K3LzBwCiIIFLlaZ90s5ripwwG5+ESXMNiYlJKmGPRfLPWnIfDlwEJ5fgON2F7XF56F1IToiZDO1qgjaRq2V4K4WGON0e4QQPzj2lJoIG+wVSp3KeFk9gvqOoRVWjkLs6S7t/NdJr6OgpmuumIAKD4MAc1hMeUfDCQsx3HVxXPKuqBCp/DFyaKeWau/Re X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(30864003)(16526019)(66476007)(26005)(956004)(2906002)(2616005)(4326008)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: Li4nXAasR/0QfaWXL/rKPgaI69amXql1GMblwtnC0tUqJPOroqrPm5Z0B3eXvmY9JwxZKQE0EDGXYexmT2CBNzEQoWiwq5z+5ZWdF27M6+pEU6x2ssfL1iY+qQ03I5ik37AwS4dFIKrP5nSUrne4rjy+aKIYOKLzQ6yuYVw/rI4SRybVmheOvF6DZOI5Ss+ZGkXihA+1pqMZ2/OAMwalNUIm/b7GeO4uih/wdxQLdFDms3SyjZ1WMJqNHTzWA7rv0AsYCLIpqIgkF0J91yvPqYbFtA0lpJrXMn0+fsTxuALhS+Y6Lf9CpnpNthVZGTWRb+PPevjtr09IF9uFQy41kwe7LoU3Q9u6UBfZg0p3xD8Z3qbG8wnkC4X676uQO6C7v9bX0pMgqgxZVsc9D1TBirLvbm0/tC92YE4QcCIdMyQbvEeZTO8adEx0Bhg4VnIrtTzNtQTg/U1WpCkz/5xt3Wl0vSKuzdRqBqDF/relKkj0mBTtsHX9ibzAamJAafBF3ygbbBbl6S+STXguHA3KrfG7lujFcBm7CK8kVWLBfC2qbaZlgmVFV9FtxG9tIrsqBncSKXitRZSbp0hpmpnFHl8jY1ZA+8wob2g8X5cCtoFOPnBPqU452RTSLFuNjeSBfpUEmKxu47FlMzmJwaflO0zHoceB+pm89TfRWSCndxy7Ywzbl+OX2iVl9+gQmOUwfS7/cezvUz3LXUtp10UPusaFF+0VqeFmql8nV0Gbue8a+ckUhgo8H7kprVK/H2lT4uZ3jK9VWb+8eG+RklWI88hUhS7UXRZlhgdR05ak2vl6I3D0st0eYsuYqmyw8BytsugVNf0RqRIQNJWB/dvQiTVDM/kZPKjELCjwlJnx26ojdJZ+6DJlxXXq6RHgC7gcPlO+kjZImqq0MSiijU0bzIwVY2/62FcYCO0sRKtc8TuvoaVKLq6Lyiup3H9XF493w4hPgraIL89mpriNTqOC21GEGJ69HxyRY3Ydbr3f6EU4tRx+DTHjY2IPHCu8BBaFRJa1gbdDk5TBogRF0A2hk9WHbPZQfJqgecekwOZxKKXJj62lBo92wWdz6W/3vaRHDIzAH5BixgcEWNydJ9cJ3PVc/9sDx0rLPn2HpfMI6MIGrt6eHyfbYEEjfZcPbIfDzHYjO8keSDF3Ox46B32m38dP1Kf1qs3erVGlzgv5M6kHH3SPEoycr0JRw7WuG+0s6Vw8UuEbDbAA2GTMGoDr/6IzQMtDssRNI3U4e3mFdHg/PMbZWiL0vTSeimp8M2rLJre/JTQdo2oVG+EJulDUTxGupLlrDcS83FgfR2IAi7QRy63L4CP5IHz0w2XGCD28 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 47517f90-6b15-4322-da14-08d8e86838b0 X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:40.3758 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /sv4Safjaxuaxm0saOovZovGhqVO+zgrP3Re7oyB71Kdh8oyGOztvcify9ZxKHx4/5DlwdeuFhemi5N6EhxMmA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The generic power domain related code in PSCI domain driver is largely independent of PSCI and can be shared with RISC-V SBI domain driver hence we factor-out this code into dt_idle_genpd.c and dt_idle_genpd.h. Signed-off-by: Anup Patel --- drivers/cpuidle/Kconfig | 4 + drivers/cpuidle/Kconfig.arm | 1 + drivers/cpuidle/Makefile | 1 + drivers/cpuidle/cpuidle-psci-domain.c | 244 +----------------- drivers/cpuidle/cpuidle-psci.h | 15 +- ...{cpuidle-psci-domain.c => dt_idle_genpd.c} | 165 ++++-------- drivers/cpuidle/dt_idle_genpd.h | 42 +++ 7 files changed, 121 insertions(+), 351 deletions(-) copy drivers/cpuidle/{cpuidle-psci-domain.c => dt_idle_genpd.c} (52%) create mode 100644 drivers/cpuidle/dt_idle_genpd.h diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig index c0aeedd66f02..f1afe7ab6b54 100644 --- a/drivers/cpuidle/Kconfig +++ b/drivers/cpuidle/Kconfig @@ -47,6 +47,10 @@ config CPU_IDLE_GOV_HALTPOLL config DT_IDLE_STATES bool +config DT_IDLE_GENPD + depends on PM_GENERIC_DOMAINS_OF + bool + menu "ARM CPU Idle Drivers" depends on ARM || ARM64 source "drivers/cpuidle/Kconfig.arm" diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm index 0844fadc4be8..1007435ae298 100644 --- a/drivers/cpuidle/Kconfig.arm +++ b/drivers/cpuidle/Kconfig.arm @@ -27,6 +27,7 @@ config ARM_PSCI_CPUIDLE_DOMAIN bool "PSCI CPU idle Domain" depends on ARM_PSCI_CPUIDLE depends on PM_GENERIC_DOMAINS_OF + select DT_IDLE_GENPD default y help Select this to enable the PSCI based CPUidle driver to use PM domains, diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index 26bbc5e74123..11a26cef279f 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -6,6 +6,7 @@ obj-y += cpuidle.o driver.o governor.o sysfs.o governors/ obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED) += coupled.o obj-$(CONFIG_DT_IDLE_STATES) += dt_idle_states.o +obj-$(CONFIG_DT_IDLE_GENPD) += dt_idle_genpd.o obj-$(CONFIG_ARCH_HAS_CPU_RELAX) += poll_state.o obj-$(CONFIG_HALTPOLL_CPUIDLE) += cpuidle-haltpoll.o diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c index ff2c3f8e4668..b0621d890ab7 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -16,17 +16,9 @@ #include #include #include -#include -#include #include "cpuidle-psci.h" -struct psci_pd_provider { - struct list_head link; - struct device_node *node; -}; - -static LIST_HEAD(psci_pd_providers); static bool psci_pd_allow_domain_state; static int psci_pd_power_off(struct generic_pm_domain *pd) @@ -47,178 +39,6 @@ static int psci_pd_power_off(struct generic_pm_domain *pd) return 0; } -static int psci_pd_parse_state_nodes(struct genpd_power_state *states, - int state_count) -{ - int i, ret; - u32 psci_state, *psci_state_buf; - - for (i = 0; i < state_count; i++) { - ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), - &psci_state); - if (ret) - goto free_state; - - psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL); - if (!psci_state_buf) { - ret = -ENOMEM; - goto free_state; - } - *psci_state_buf = psci_state; - states[i].data = psci_state_buf; - } - - return 0; - -free_state: - i--; - for (; i >= 0; i--) - kfree(states[i].data); - return ret; -} - -static int psci_pd_parse_states(struct device_node *np, - struct genpd_power_state **states, int *state_count) -{ - int ret; - - /* Parse the domain idle states. */ - ret = of_genpd_parse_idle_states(np, states, state_count); - if (ret) - return ret; - - /* Fill out the PSCI specifics for each found state. */ - ret = psci_pd_parse_state_nodes(*states, *state_count); - if (ret) - kfree(*states); - - return ret; -} - -static void psci_pd_free_states(struct genpd_power_state *states, - unsigned int state_count) -{ - int i; - - for (i = 0; i < state_count; i++) - kfree(states[i].data); - kfree(states); -} - -static int psci_pd_init(struct device_node *np, bool use_osi) -{ - struct generic_pm_domain *pd; - struct psci_pd_provider *pd_provider; - struct dev_power_governor *pd_gov; - struct genpd_power_state *states = NULL; - int ret = -ENOMEM, state_count = 0; - - pd = kzalloc(sizeof(*pd), GFP_KERNEL); - if (!pd) - goto out; - - pd_provider = kzalloc(sizeof(*pd_provider), GFP_KERNEL); - if (!pd_provider) - goto free_pd; - - pd->name = kasprintf(GFP_KERNEL, "%pOF", np); - if (!pd->name) - goto free_pd_prov; - - /* - * Parse the domain idle states and let genpd manage the state selection - * for those being compatible with "domain-idle-state". - */ - ret = psci_pd_parse_states(np, &states, &state_count); - if (ret) - goto free_name; - - pd->free_states = psci_pd_free_states; - pd->name = kbasename(pd->name); - pd->states = states; - pd->state_count = state_count; - pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; - - /* Allow power off when OSI has been successfully enabled. */ - if (use_osi) - pd->power_off = psci_pd_power_off; - else - pd->flags |= GENPD_FLAG_ALWAYS_ON; - - /* Use governor for CPU PM domains if it has some states to manage. */ - pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL; - - ret = pm_genpd_init(pd, pd_gov, false); - if (ret) { - psci_pd_free_states(states, state_count); - goto free_name; - } - - ret = of_genpd_add_provider_simple(np, pd); - if (ret) - goto remove_pd; - - pd_provider->node = of_node_get(np); - list_add(&pd_provider->link, &psci_pd_providers); - - pr_debug("init PM domain %s\n", pd->name); - return 0; - -remove_pd: - pm_genpd_remove(pd); -free_name: - kfree(pd->name); -free_pd_prov: - kfree(pd_provider); -free_pd: - kfree(pd); -out: - pr_err("failed to init PM domain ret=%d %pOF\n", ret, np); - return ret; -} - -static void psci_pd_remove(void) -{ - struct psci_pd_provider *pd_provider, *it; - struct generic_pm_domain *genpd; - - list_for_each_entry_safe(pd_provider, it, &psci_pd_providers, link) { - of_genpd_del_provider(pd_provider->node); - - genpd = of_genpd_remove_last(pd_provider->node); - if (!IS_ERR(genpd)) - kfree(genpd); - - of_node_put(pd_provider->node); - list_del(&pd_provider->link); - kfree(pd_provider); - } -} - -static int psci_pd_init_topology(struct device_node *np) -{ - struct device_node *node; - struct of_phandle_args child, parent; - int ret; - - for_each_child_of_node(np, node) { - if (of_parse_phandle_with_args(node, "power-domains", - "#power-domain-cells", 0, &parent)) - continue; - - child.np = node; - child.args_count = 0; - ret = of_genpd_add_subdomain(&parent, &child); - of_node_put(parent.np); - if (ret) { - of_node_put(node); - return ret; - } - } - - return 0; -} - static bool psci_pd_try_set_osi_mode(void) { int ret; @@ -244,6 +64,10 @@ static void psci_cpuidle_domain_sync_state(struct device *dev) psci_pd_allow_domain_state = true; } +static struct dt_idle_genpd_ops psci_genpd_ops = { + .parse_state_node = psci_dt_parse_state_node, +}; + static const struct of_device_id psci_of_match[] = { { .compatible = "arm,psci-1.0" }, {} @@ -252,48 +76,25 @@ static const struct of_device_id psci_of_match[] = { static int psci_cpuidle_domain_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct device_node *node; bool use_osi; - int ret = 0, pd_count = 0; + int ret = 0; if (!np) return -ENODEV; /* If OSI mode is supported, let's try to enable it. */ use_osi = psci_pd_try_set_osi_mode(); + if (use_osi) + psci_genpd_ops.power_off = psci_pd_power_off; - /* - * Parse child nodes for the "#power-domain-cells" property and - * initialize a genpd/genpd-of-provider pair when it's found. - */ - for_each_child_of_node(np, node) { - if (!of_find_property(node, "#power-domain-cells", NULL)) - continue; - - ret = psci_pd_init(node, use_osi); - if (ret) - goto put_node; - - pd_count++; - } - - /* Bail out if not using the hierarchical CPU topology. */ - if (!pd_count) - goto no_pd; - - /* Link genpd masters/subdomains to model the CPU topology. */ - ret = psci_pd_init_topology(np); + /* Generic power domain probing based on DT node. */ + ret = dt_idle_genpd_probe(&psci_genpd_ops, np); if (ret) - goto remove_pd; + goto no_pd; pr_info("Initialized CPU PM domain topology\n"); return 0; -put_node: - of_node_put(node); -remove_pd: - psci_pd_remove(); - pr_err("failed to create CPU PM domains ret=%d\n", ret); no_pd: if (use_osi) psci_set_osi_mode(false); @@ -314,28 +115,3 @@ static int __init psci_idle_init_domains(void) return platform_driver_register(&psci_cpuidle_domain_driver); } subsys_initcall(psci_idle_init_domains); - -struct device *psci_dt_attach_cpu(int cpu) -{ - struct device *dev; - - dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); - if (IS_ERR_OR_NULL(dev)) - return dev; - - pm_runtime_irq_safe(dev); - if (cpu_online(cpu)) - pm_runtime_get_sync(dev); - - dev_pm_syscore_device(dev, true); - - return dev; -} - -void psci_dt_detach_cpu(struct device *dev) -{ - if (IS_ERR_OR_NULL(dev)) - return; - - dev_pm_domain_detach(dev, false); -} diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h index d8e925e84c27..70de1e3c00af 100644 --- a/drivers/cpuidle/cpuidle-psci.h +++ b/drivers/cpuidle/cpuidle-psci.h @@ -10,8 +10,19 @@ void psci_set_domain_state(u32 state); int psci_dt_parse_state_node(struct device_node *np, u32 *state); #ifdef CONFIG_ARM_PSCI_CPUIDLE_DOMAIN -struct device *psci_dt_attach_cpu(int cpu); -void psci_dt_detach_cpu(struct device *dev); + +#include "dt_idle_genpd.h" + +static inline struct device *psci_dt_attach_cpu(int cpu) +{ + return dt_idle_genpd_attach_cpu(cpu, "psci"); +} + +static inline void psci_dt_detach_cpu(struct device *dev) +{ + dt_idle_genpd_detach_cpu(dev); +} + #else static inline struct device *psci_dt_attach_cpu(int cpu) { return NULL; } static inline void psci_dt_detach_cpu(struct device *dev) { } diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/dt_idle_genpd.c similarity index 52% copy from drivers/cpuidle/cpuidle-psci-domain.c copy to drivers/cpuidle/dt_idle_genpd.c index ff2c3f8e4668..805c4c81d60f 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/dt_idle_genpd.c @@ -1,71 +1,52 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* - * PM domains for CPUs via genpd - managed by cpuidle-psci. + * PM domains for CPUs via genpd. * * Copyright (C) 2019 Linaro Ltd. * Author: Ulf Hansson * + * Copyright (c) 2021 Western Digital Corporation or its affiliates. */ -#define pr_fmt(fmt) "CPUidle PSCI: " fmt +#define pr_fmt(fmt) "dt-idle-genpd: " fmt #include #include #include -#include #include #include -#include #include #include -#include "cpuidle-psci.h" +#include "dt_idle_genpd.h" -struct psci_pd_provider { +struct dt_pd_provider { struct list_head link; struct device_node *node; }; -static LIST_HEAD(psci_pd_providers); -static bool psci_pd_allow_domain_state; +static LIST_HEAD(dt_pd_providers); -static int psci_pd_power_off(struct generic_pm_domain *pd) -{ - struct genpd_power_state *state = &pd->states[pd->state_idx]; - u32 *pd_state; - - if (!state->data) - return 0; - - if (!psci_pd_allow_domain_state) - return -EBUSY; - - /* OSI mode is enabled, set the corresponding domain state. */ - pd_state = state->data; - psci_set_domain_state(*pd_state); - - return 0; -} - -static int psci_pd_parse_state_nodes(struct genpd_power_state *states, - int state_count) +static int dt_pd_parse_state_nodes(const struct dt_idle_genpd_ops *ops, + struct genpd_power_state *states, + int state_count) { int i, ret; - u32 psci_state, *psci_state_buf; + u32 state, *state_buf; for (i = 0; i < state_count; i++) { - ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), - &psci_state); + ret = ops->parse_state_node(to_of_node(states[i].fwnode), + &state); if (ret) goto free_state; - psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL); - if (!psci_state_buf) { + state_buf = kmalloc(sizeof(u32), GFP_KERNEL); + if (!state_buf) { ret = -ENOMEM; goto free_state; } - *psci_state_buf = psci_state; - states[i].data = psci_state_buf; + *state_buf = state; + states[i].data = state_buf; } return 0; @@ -77,8 +58,10 @@ static int psci_pd_parse_state_nodes(struct genpd_power_state *states, return ret; } -static int psci_pd_parse_states(struct device_node *np, - struct genpd_power_state **states, int *state_count) +static int dt_pd_parse_states(const struct dt_idle_genpd_ops *ops, + struct device_node *np, + struct genpd_power_state **states, + int *state_count) { int ret; @@ -87,15 +70,15 @@ static int psci_pd_parse_states(struct device_node *np, if (ret) return ret; - /* Fill out the PSCI specifics for each found state. */ - ret = psci_pd_parse_state_nodes(*states, *state_count); + /* Fill out the dt specifics for each found state. */ + ret = dt_pd_parse_state_nodes(ops, *states, *state_count); if (ret) kfree(*states); return ret; } -static void psci_pd_free_states(struct genpd_power_state *states, +static void dt_pd_free_states(struct genpd_power_state *states, unsigned int state_count) { int i; @@ -105,10 +88,11 @@ static void psci_pd_free_states(struct genpd_power_state *states, kfree(states); } -static int psci_pd_init(struct device_node *np, bool use_osi) +static int dt_pd_init(const struct dt_idle_genpd_ops *ops, + struct device_node *np) { struct generic_pm_domain *pd; - struct psci_pd_provider *pd_provider; + struct dt_pd_provider *pd_provider; struct dev_power_governor *pd_gov; struct genpd_power_state *states = NULL; int ret = -ENOMEM, state_count = 0; @@ -129,19 +113,19 @@ static int psci_pd_init(struct device_node *np, bool use_osi) * Parse the domain idle states and let genpd manage the state selection * for those being compatible with "domain-idle-state". */ - ret = psci_pd_parse_states(np, &states, &state_count); + ret = dt_pd_parse_states(ops, np, &states, &state_count); if (ret) goto free_name; - pd->free_states = psci_pd_free_states; + pd->free_states = dt_pd_free_states; pd->name = kbasename(pd->name); pd->states = states; pd->state_count = state_count; pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; - /* Allow power off when OSI has been successfully enabled. */ - if (use_osi) - pd->power_off = psci_pd_power_off; + /* Allow power off when available. */ + if (ops->power_off) + pd->power_off = ops->power_off; else pd->flags |= GENPD_FLAG_ALWAYS_ON; @@ -150,7 +134,7 @@ static int psci_pd_init(struct device_node *np, bool use_osi) ret = pm_genpd_init(pd, pd_gov, false); if (ret) { - psci_pd_free_states(states, state_count); + dt_pd_free_states(states, state_count); goto free_name; } @@ -159,7 +143,7 @@ static int psci_pd_init(struct device_node *np, bool use_osi) goto remove_pd; pd_provider->node = of_node_get(np); - list_add(&pd_provider->link, &psci_pd_providers); + list_add(&pd_provider->link, &dt_pd_providers); pr_debug("init PM domain %s\n", pd->name); return 0; @@ -177,12 +161,12 @@ static int psci_pd_init(struct device_node *np, bool use_osi) return ret; } -static void psci_pd_remove(void) +static void dt_pd_remove(void) { - struct psci_pd_provider *pd_provider, *it; + struct dt_pd_provider *pd_provider, *it; struct generic_pm_domain *genpd; - list_for_each_entry_safe(pd_provider, it, &psci_pd_providers, link) { + list_for_each_entry_safe(pd_provider, it, &dt_pd_providers, link) { of_genpd_del_provider(pd_provider->node); genpd = of_genpd_remove_last(pd_provider->node); @@ -195,7 +179,7 @@ static void psci_pd_remove(void) } } -static int psci_pd_init_topology(struct device_node *np) +static int dt_pd_init_topology(struct device_node *np) { struct device_node *node; struct of_phandle_args child, parent; @@ -219,49 +203,15 @@ static int psci_pd_init_topology(struct device_node *np) return 0; } -static bool psci_pd_try_set_osi_mode(void) -{ - int ret; - - if (!psci_has_osi_support()) - return false; - - ret = psci_set_osi_mode(true); - if (ret) { - pr_warn("failed to enable OSI mode: %d\n", ret); - return false; - } - - return true; -} - -static void psci_cpuidle_domain_sync_state(struct device *dev) +int dt_idle_genpd_probe(const struct dt_idle_genpd_ops *ops, + struct device_node *np) { - /* - * All devices have now been attached/probed to the PM domain topology, - * hence it's fine to allow domain states to be picked. - */ - psci_pd_allow_domain_state = true; -} - -static const struct of_device_id psci_of_match[] = { - { .compatible = "arm,psci-1.0" }, - {} -}; - -static int psci_cpuidle_domain_probe(struct platform_device *pdev) -{ - struct device_node *np = pdev->dev.of_node; struct device_node *node; - bool use_osi; int ret = 0, pd_count = 0; - if (!np) + if (!np || !ops || !ops->parse_state_node) return -ENODEV; - /* If OSI mode is supported, let's try to enable it. */ - use_osi = psci_pd_try_set_osi_mode(); - /* * Parse child nodes for the "#power-domain-cells" property and * initialize a genpd/genpd-of-provider pair when it's found. @@ -270,7 +220,7 @@ static int psci_cpuidle_domain_probe(struct platform_device *pdev) if (!of_find_property(node, "#power-domain-cells", NULL)) continue; - ret = psci_pd_init(node, use_osi); + ret = dt_pd_init(ops, node); if (ret) goto put_node; @@ -282,44 +232,27 @@ static int psci_cpuidle_domain_probe(struct platform_device *pdev) goto no_pd; /* Link genpd masters/subdomains to model the CPU topology. */ - ret = psci_pd_init_topology(np); + ret = dt_pd_init_topology(np); if (ret) goto remove_pd; - pr_info("Initialized CPU PM domain topology\n"); return 0; put_node: of_node_put(node); remove_pd: - psci_pd_remove(); + dt_pd_remove(); pr_err("failed to create CPU PM domains ret=%d\n", ret); no_pd: - if (use_osi) - psci_set_osi_mode(false); return ret; } +EXPORT_SYMBOL_GPL(dt_idle_genpd_probe); -static struct platform_driver psci_cpuidle_domain_driver = { - .probe = psci_cpuidle_domain_probe, - .driver = { - .name = "psci-cpuidle-domain", - .of_match_table = psci_of_match, - .sync_state = psci_cpuidle_domain_sync_state, - }, -}; - -static int __init psci_idle_init_domains(void) -{ - return platform_driver_register(&psci_cpuidle_domain_driver); -} -subsys_initcall(psci_idle_init_domains); - -struct device *psci_dt_attach_cpu(int cpu) +struct device *dt_idle_genpd_attach_cpu(int cpu, const char *name) { struct device *dev; - dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); + dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), name); if (IS_ERR_OR_NULL(dev)) return dev; @@ -331,11 +264,13 @@ struct device *psci_dt_attach_cpu(int cpu) return dev; } +EXPORT_SYMBOL_GPL(dt_idle_genpd_attach_cpu); -void psci_dt_detach_cpu(struct device *dev) +void dt_idle_genpd_detach_cpu(struct device *dev) { if (IS_ERR_OR_NULL(dev)) return; dev_pm_domain_detach(dev, false); } +EXPORT_SYMBOL_GPL(dt_idle_genpd_detach_cpu); diff --git a/drivers/cpuidle/dt_idle_genpd.h b/drivers/cpuidle/dt_idle_genpd.h new file mode 100644 index 000000000000..a3d3d2e85871 --- /dev/null +++ b/drivers/cpuidle/dt_idle_genpd.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_IDLE_GENPD +#define __DT_IDLE_GENPD + +struct device_node; +struct generic_pm_domain; + +struct dt_idle_genpd_ops { + int (*parse_state_node)(struct device_node *np, u32 *state); + int (*power_off)(struct generic_pm_domain *pd); +}; + +#ifdef CONFIG_DT_IDLE_GENPD + +int dt_idle_genpd_probe(const struct dt_idle_genpd_ops *ops, + struct device_node *np); + +struct device *dt_idle_genpd_attach_cpu(int cpu, const char *name); + +void dt_idle_genpd_detach_cpu(struct device *dev); + +#else + +int dt_idle_genpd_probe(const struct dt_idle_genpd_ops *ops, + struct device_node *np) +{ + return 0; +} + +static inline struct device *dt_idle_genpd_attach_cpu(int cpu, + const char *name) +{ + return NULL; +} + +static inline void dt_idle_genpd_detach_cpu(struct device *dev) +{ +} + +#endif + +#endif From patchwork Tue Mar 16 10:41:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 402157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16E88C433E6 for ; Tue, 16 Mar 2021 10:43:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E681D64FA7 for ; Tue, 16 Mar 2021 10:43:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236776AbhCPKnQ (ORCPT ); Tue, 16 Mar 2021 06:43:16 -0400 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:13532 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236791AbhCPKms (ORCPT ); Tue, 16 Mar 2021 06:42:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891368; x=1647427368; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=xRjkSngl6JrbFhQW624YAadKdBN5mGoNhLFzY2zwGK8=; b=JCNTyYlfDosQ6ST8Xz2qev926nFj2fV0oRDoB1WXTd8qv1jl1tB3ToU8 3cdprlgHEWd2wmtwHUvmuNbimAvKxNpOTTX0oaxQZA8gJxmv0EnwdNURd uJuvgN5Ln/vMqEoMlwLvotoXh3/F7cwZkGLIfyN5Yq5esa8ldtt9FxxCE UlMmqBIO+HSMH7KiGF5SQrFCLxoLpG/vJzkIij1HlyBtjQABkJb5F7Rhz jHzR2LUfaESsAKMKfXTr2pwbAjxLa5MaqWqXYe+v2nmRGUcNax2CYvHaU j4FApew6cZ7/JBmMsqr5S7f4Prq2ttj0V1RwmWZcPkKDJ8/afXK+mvYoe A==; IronPort-SDR: Va/wFGFkERzGZdvWODnWBQ4QAsGKcBiryhfYIsLXl4vxS2H0eJlnQbXtJhwHEOfC/I2+mbMvTB xpdOLOSX+kmnG+0l6fH9pi/QdcRJ1R5BDDCkHqinlWFG1MVffNMkYBDO6owcl4NhLcRhVwri84 bM9QwhWqRukuzqPWtZpYwEhRrMizFRPf6Qfsvg6ykZweqwcRe+0S2d9NUdlMy189mVfHgOW+7R ZwTFc3EuuINhC2JUsQ5anFiei9fDu3ueFf/FdljJeRht6ZxgJPC0HBcSgssR/KMsDANIBs4sS5 +wk= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="272971786" Received: from mail-mw2nam12lp2043.outbound.protection.outlook.com (HELO NAM12-MW2-obe.outbound.protection.outlook.com) ([104.47.66.43]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:47 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mvIAHodhxB4swNfpbgQ5aYwL7CLENY/KbZxf16vgQV1CaphyD8uGlW/7q/NUAm2utedNWcSNLHDDMX65JB1bDaythdiGgv5ySHQKSHxbip24NfVjg87bV0Xe3uJB0jwuzchz9VJH35cwHoSwF3uOG0OEQWzKZYUIZVVGqQsadRrmD7F3pjh/zzBU3+uPjVZAcv2kMJBcQhyM6dyyTK1nFbpxG5FODATIs2O8epO0Gma3h9dEyoU2DdxbfIkapIXi4P1fSExGY14l25xvZDQO0JCi6GUhQXke1y3jifJ8X68I5dETJUyDHgi6/CCnCM99DyEEZHOAH5ixfsrVZPIlmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=czXf1ICfMmkfzxSxs5d9LOjTxH0S62mIndNT9t7IroQ=; b=JItuKNHP/kOiZYzVDaH7fU6pZtGK7dGw5byyO68CuiEVTX2VU0BB6E0PvJ95Pa9FR2hDY8YXuuqkeVlZ0L6SkrTZHMbk6VtkEuamJ49ZsWBV9tzQOFag/VI1NtfxByPnvMkReEkMW59sc0SfodW7ZDnsfaKlbZ7J8zs6clH6nK1jrirmRYIaACS7GOcELNjrBS9fHJ7MOC4F7gUwURz09GzHawdIKpvPaXpxh1vgOw/xlpfF4aecwc4eXc3rP5AMs91JZ6nY1QePl7fO8xDtRQLzS/wTfxP7dEmXz6oNlo6boqQ5oyD4PwdnWB8LMacDSzQLmwE06Lqi1dXOiz22aA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=czXf1ICfMmkfzxSxs5d9LOjTxH0S62mIndNT9t7IroQ=; b=g4wybbHD70jH1qZGR0XdOjz4nr4NbYGppUx5nnScAX/5H2GLYJuK5n60NgDU199bO2v+Clo+bRpnvLQq52pt7A9m5zvAto0J6T0BBrHdCiGvWa8tEWRA3ewWkqbuhy0kfHOTT0jA5zkfNRgJm2YfHobFm/6z1wi8Kaxs4V6kmPk= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:46 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:46 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 6/8] cpuidle: Add RISC-V SBI CPU idle driver Date: Tue, 16 Mar 2021 16:11:38 +0530 Message-Id: <20210316104140.878019-7-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:40 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 30851394-373f-4294-78a2-08d8e8683c70 X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sHnkesql2Hjvd5lcxaYlDcX4zAE8HPUEwHQyIruqbac5p9GdDphuiNGmOq5GVEzauEdm/AZQGNt+imvJgH0j6Dj4ZUSxPQjGuNOqaG/gUvO3knzJ1mPrNVE9ilUZtZBHT+uX3y6CM/6fLevEGlkUd4hXRk8j0O+EUwlTjo4RQ5yJdTnVJf2YnLOVD5HYJgmoUHGmjhMEjgTw6J53Jyemfq2qBBSjDwTAVt40p78+CS2oUgGhUvtGYWbiesU2tOolRuMI9sY+QxpoNqG2l9kXd3YXWQyJ3yhuWBBQ7CZ/wtcHAqSv6w9CUjOHo7Kh2D6TgUi4fEM73yDbLNdoeH2MVzUpnuyhOEVL7Hsz3s5S/+bSHkmEvx4kR+jHEzwmm9zUiZ4d3tkMk6PNiZAUxGedKek9atEzmkqcUXtyK3uattFp+Fst9BObMijVWqzWeejh8PETWJ9VSipvtGf3/2I8W76XamdSk7cmhsb3Oj6t9gIpCZtYqF/GSUdmaWzt6Q27fUIlw/Oh2o609wkLT+9JtWGzIusnpPJCSzYOqHKVZYnzNvFmPULY+pFf6szHaiAC X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(30864003)(16526019)(66476007)(26005)(956004)(2906002)(2616005)(4326008)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: 6bAOCGK8o8SVxYoKz/6WWQVJCQkrKSloqAxPJjm7jdrrk8jOQo4Q4TVuIaZ/NQ/0F+3nvOMOap4GGe9cJDzNal4RZp+Q2al3oXwsiDdHT/iL2s+nNXtqKPCoYTBOy+8DDMHXN0b9WAfZSuCmCh6yhgoPLrvJYdfFL2wTZVWlwBIDZuC4XxCdd1k/lziCoUGiY6bkE2nKNm4CtbXVpDDqJgbTS5ggWAXW7pfL0fY4dXaBB2kq8sMATRdyqqtNqPRU0inMqDqo+ToradJVtW5K715YihLvnkwY/ZvW9HV6kXzMxx2MQ96zySr5HcVHQEJBcJ1ZnptDlOm6Kyiak2rwcb1QPfZtK2cKU8to5r9+H63vp7RB7OBRsYU2bkbeldqZzcWk6TgHS36zYR5yfr26LVM6hG8aExIZr+NvYtzDKQEboKGt7KvEX+mLInZWutaLTqnjHkwOeQGkQoTbz104dSWgLqjjnnKbKgA6Llx08somRifkvT/Gghx9TOv8mJ5vscIP0mWmjzgiRdBHyFgZ8ctpqMoZb6y9y7L1X+fL6p0iNV5eljXc5XNgBhmw/4g00bJIS4xaET1nHnpKRTkQGhqVxcl99F1jVsC8oorHPiY+HGW6j/FwgFPJxy4RKgkJ/yDoyHoyrjGzpo5GZfzY8eGYK7V7ug1t3CRKfBs97/UdxeoCv0bKue8W6jjdi+kaCbJXAM5Oj5HVZ8yLgv7vLFxrnxdS7PgStVlMRSs9xNOHwEXQvXCLS+TT2e7C5AtnClba18mB1tMqJqCACF8lgHLvDKoarOspoU0gQshq7gz3SOLTqPLi2Xogr0GSr0sQhToTSaxQ+efPMi2cGwWT4oc8Vi23uvQ3DE4lSnblsL7Pt9YCDkZRDnfmp+5kqSTatt+yZAZ3Cl15HPDVJwQxkOmZ/c/+Tck7EGwubl4NcU2/yYzbPcFnFHwI1tAOXYIQG4FkcCZaUeLlePyoXIq/yFfcUi2LlulLR7vC1XhEsRcbbibZGbFSLuGDk5B8vOiamwa9oUaG+j1A0Wvi0GI0YPMlTYi3O+onbbzVCLTu5dvO64fmCAm7czvHfaqc03GXRnIXZukNhnhHHzfuz26JYFjIRfureJGsy6MFSHwotBvlmFymEtHtR9ZRF9rV7PVDmARMdLJdSm6KrnE1ZWaYuwU21OTS3/lWF0k951Spc4oLSaRdyPyj5XgwXB9gkJyMIxN+WfZfBDMuEHDy7B+iy0MKKP0llVQXPfh3A7WGP+G17SIj6TxynAxwH8g/G9/ecGW4KYjcM3lq3ZvU2XhBKNk5CZkU+sB4fpgpPteby2uwH6tjqTlNf8TRIRH6ayV/ X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 30851394-373f-4294-78a2-08d8e8683c70 X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:46.3330 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: sCaB+bqRXxDZ3MEUC65Hy/8RCXgCapyOIEvPfb+WHJdRcgGKWGKETXT2Avc84/0EzfzGQbS4K/ddM5UcpVuE7A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The RISC-V SBI HSM extension provides HSM suspend call which can be used by Linux RISC-V to enter platform specific low-power state. This patch adds a CPU idle driver based on RISC-V SBI calls which will populate idle states from device tree and use SBI calls to entry these idle states. Signed-off-by: Anup Patel --- MAINTAINERS | 8 + drivers/cpuidle/Kconfig | 5 + drivers/cpuidle/Kconfig.riscv | 15 + drivers/cpuidle/Makefile | 4 + drivers/cpuidle/cpuidle-sbi.c | 502 ++++++++++++++++++++++++++++++++++ 5 files changed, 534 insertions(+) create mode 100644 drivers/cpuidle/Kconfig.riscv create mode 100644 drivers/cpuidle/cpuidle-sbi.c diff --git a/MAINTAINERS b/MAINTAINERS index aa84121c5611..4954112efdb4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4679,6 +4679,14 @@ S: Supported F: drivers/cpuidle/cpuidle-psci.h F: drivers/cpuidle/cpuidle-psci-domain.c +CPUIDLE DRIVER - RISC-V SBI +M: Anup Patel +R: Sandeep Tripathy +L: linux-pm@vger.kernel.org +L: linux-riscv@lists.infradead.org +S: Supported +F: drivers/cpuidle/cpuidle-sbi.c + CRAMFS FILESYSTEM M: Nicolas Pitre S: Maintained diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig index f1afe7ab6b54..ff71dd662880 100644 --- a/drivers/cpuidle/Kconfig +++ b/drivers/cpuidle/Kconfig @@ -66,6 +66,11 @@ depends on PPC source "drivers/cpuidle/Kconfig.powerpc" endmenu +menu "RISC-V CPU Idle Drivers" +depends on RISCV +source "drivers/cpuidle/Kconfig.riscv" +endmenu + config HALTPOLL_CPUIDLE tristate "Halt poll cpuidle driver" depends on X86 && KVM_GUEST diff --git a/drivers/cpuidle/Kconfig.riscv b/drivers/cpuidle/Kconfig.riscv new file mode 100644 index 000000000000..78518c26af74 --- /dev/null +++ b/drivers/cpuidle/Kconfig.riscv @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# RISC-V CPU Idle drivers +# + +config RISCV_SBI_CPUIDLE + bool "RISC-V SBI CPU idle Driver" + depends on RISCV_SBI + select DT_IDLE_STATES + select CPU_IDLE_MULTIPLE_DRIVERS + select DT_IDLE_GENPD if PM_GENERIC_DOMAINS_OF + help + Select this option to enable RISC-V SBI firmware based CPU idle + driver for RISC-V systems. This drivers also supports hierarchical + DT based layout of the idle state. diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index 11a26cef279f..a36922c18510 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -35,3 +35,7 @@ obj-$(CONFIG_MIPS_CPS_CPUIDLE) += cpuidle-cps.o # POWERPC drivers obj-$(CONFIG_PSERIES_CPUIDLE) += cpuidle-pseries.o obj-$(CONFIG_POWERNV_CPUIDLE) += cpuidle-powernv.o + +############################################################################### +# RISC-V drivers +obj-$(CONFIG_RISCV_SBI_CPUIDLE) += cpuidle-sbi.o diff --git a/drivers/cpuidle/cpuidle-sbi.c b/drivers/cpuidle/cpuidle-sbi.c new file mode 100644 index 000000000000..47938fff61e1 --- /dev/null +++ b/drivers/cpuidle/cpuidle-sbi.c @@ -0,0 +1,502 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * RISC-V SBI CPU idle driver. + * + * Copyright (c) 2021 Western Digital Corporation or its affiliates. + */ + +#define pr_fmt(fmt) "cpuidle-sbi: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "dt_idle_states.h" +#include "dt_idle_genpd.h" + +struct sbi_cpuidle_data { + u32 *states; + struct device *dev; +}; + +struct sbi_domain_state { + bool available; + u32 state; +}; + +static DEFINE_PER_CPU_READ_MOSTLY(struct sbi_cpuidle_data, sbi_cpuidle_data); +static DEFINE_PER_CPU(struct sbi_domain_state, domain_state); +static bool sbi_cpuidle_use_osi; +static bool sbi_cpuidle_use_cpuhp; +static bool sbi_cpuidle_pd_allow_domain_state; + +static inline void sbi_set_domain_state(u32 state) +{ + struct sbi_domain_state *data = this_cpu_ptr(&domain_state); + + data->available = true; + data->state = state; +} + +static inline u32 sbi_get_domain_state(void) +{ + struct sbi_domain_state *data = this_cpu_ptr(&domain_state); + + return data->state; +} + +static inline void sbi_clear_domain_state(void) +{ + struct sbi_domain_state *data = this_cpu_ptr(&domain_state); + + data->available = false; +} + +static inline bool sbi_is_domain_state_available(void) +{ + struct sbi_domain_state *data = this_cpu_ptr(&domain_state); + + return data->available; +} + +static int sbi_suspend_finisher(unsigned long suspend_type, + unsigned long resume_addr, + unsigned long opaque) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND, + suspend_type, resume_addr, opaque, 0, 0, 0); + + return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0; +} + +static int sbi_suspend(u32 state) +{ + if (state & SBI_HSM_SUSP_NON_RET_BIT) + return cpu_suspend(state, sbi_suspend_finisher); + else + return sbi_suspend_finisher(state, 0, 0); +} + +static int sbi_cpuidle_enter_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + u32 *states = __this_cpu_read(sbi_cpuidle_data.states); + + return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, idx, states[idx]); +} + +static int __sbi_enter_domain_idle_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx, + bool s2idle) +{ + struct sbi_cpuidle_data *data = this_cpu_ptr(&sbi_cpuidle_data); + u32 *states = data->states; + struct device *pd_dev = data->dev; + u32 state; + int ret; + + ret = cpu_pm_enter(); + if (ret) + return -1; + + /* Do runtime PM to manage a hierarchical CPU toplogy. */ + rcu_irq_enter_irqson(); + if (s2idle) + dev_pm_genpd_suspend(pd_dev); + else + pm_runtime_put_sync_suspend(pd_dev); + rcu_irq_exit_irqson(); + + if (sbi_is_domain_state_available()) + state = sbi_get_domain_state(); + else + state = states[idx]; + + ret = sbi_suspend(state) ? -1 : idx; + + rcu_irq_enter_irqson(); + if (s2idle) + dev_pm_genpd_resume(pd_dev); + else + pm_runtime_get_sync(pd_dev); + rcu_irq_exit_irqson(); + + cpu_pm_exit(); + + /* Clear the domain state to start fresh when back from idle. */ + sbi_clear_domain_state(); + return ret; +} + +static int sbi_enter_domain_idle_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + return __sbi_enter_domain_idle_state(dev, drv, idx, false); +} + +static int sbi_enter_s2idle_domain_idle_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int idx) +{ + return __sbi_enter_domain_idle_state(dev, drv, idx, true); +} + +static int sbi_cpuidle_cpuhp_up(unsigned int cpu) +{ + struct device *pd_dev = __this_cpu_read(sbi_cpuidle_data.dev); + + if (pd_dev) + pm_runtime_get_sync(pd_dev); + + return 0; +} + +static int sbi_cpuidle_cpuhp_down(unsigned int cpu) +{ + struct device *pd_dev = __this_cpu_read(sbi_cpuidle_data.dev); + + if (pd_dev) { + pm_runtime_put_sync(pd_dev); + /* Clear domain state to start fresh at next online. */ + sbi_clear_domain_state(); + } + + return 0; +} + +static void sbi_idle_init_cpuhp(void) +{ + int err; + + if (!sbi_cpuidle_use_cpuhp) + return; + + err = cpuhp_setup_state_nocalls(CPUHP_AP_CPU_PM_STARTING, + "cpuidle/sbi:online", + sbi_cpuidle_cpuhp_up, + sbi_cpuidle_cpuhp_down); + if (err) + pr_warn("Failed %d while setup cpuhp state\n", err); +} + +static const struct of_device_id sbi_cpuidle_state_match[] = { + { .compatible = "riscv,idle-state", + .data = sbi_cpuidle_enter_state }, + { }, +}; + +static bool sbi_suspend_state_is_valid(u32 state) +{ + if (state > SBI_HSM_SUSPEND_RET_DEFAULT && + state < SBI_HSM_SUSPEND_RET_PLATFORM) + return false; + if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT && + state < SBI_HSM_SUSPEND_NON_RET_PLATFORM) + return false; + return true; +} + +static int sbi_dt_parse_state_node(struct device_node *np, u32 *state) +{ + int err = of_property_read_u32(np, "riscv,sbi-suspend-param", state); + + if (err) { + pr_warn("%pOF missing riscv,sbi-suspend-param property\n", np); + return err; + } + + if (!sbi_suspend_state_is_valid(*state)) { + pr_warn("Invalid SBI suspend state %#x\n", *state); + return -EINVAL; + } + + return 0; +} + +static int sbi_dt_cpu_init_topology(struct cpuidle_driver *drv, + struct sbi_cpuidle_data *data, + unsigned int state_count, int cpu) +{ + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!sbi_cpuidle_use_osi) + return 0; + + data->dev = dt_idle_genpd_attach_cpu(cpu, "sbi"); + if (IS_ERR_OR_NULL(data->dev)) + return PTR_ERR_OR_ZERO(data->dev); + + /* + * Using the deepest state for the CPU to trigger a potential selection + * of a shared state for the domain, assumes the domain states are all + * deeper states. + */ + drv->states[state_count - 1].enter = sbi_enter_domain_idle_state; + drv->states[state_count - 1].enter_s2idle = sbi_enter_s2idle_domain_idle_state; + sbi_cpuidle_use_cpuhp = true; + + return 0; +} + +static int sbi_cpuidle_dt_init_states(struct device *dev, + struct cpuidle_driver *drv, + unsigned int cpu, + unsigned int state_count) +{ + struct sbi_cpuidle_data *data = per_cpu_ptr(&sbi_cpuidle_data, cpu); + struct device_node *state_node; + struct device_node *cpu_node; + u32 *states; + int i, ret; + + cpu_node = of_cpu_device_node_get(cpu); + if (!cpu_node) + return -ENODEV; + + states = devm_kcalloc(dev, state_count, sizeof(*states), GFP_KERNEL); + if (!states) { + ret = -ENOMEM; + goto fail; + } + + /* Parse SBI specific details from state DT nodes */ + for (i = 1; i < state_count; i++) { + state_node = of_get_cpu_state_node(cpu_node, i - 1); + if (!state_node) + break; + + ret = sbi_dt_parse_state_node(state_node, &states[i]); + of_node_put(state_node); + + if (ret) + return ret; + + pr_debug("sbi-state %#x index %d\n", states[i], i); + } + if (i != state_count) { + ret = -ENODEV; + goto fail; + } + + /* Initialize optional data, used for the hierarchical topology. */ + ret = sbi_dt_cpu_init_topology(drv, data, state_count, cpu); + if (ret < 0) + return ret; + + /* Store states in the per-cpu struct. */ + data->states = states; + +fail: + of_node_put(cpu_node); + + return ret; +} + +static void sbi_cpuidle_deinit_cpu(int cpu) +{ + struct sbi_cpuidle_data *data = per_cpu_ptr(&sbi_cpuidle_data, cpu); + + dt_idle_genpd_detach_cpu(data->dev); + sbi_cpuidle_use_cpuhp = false; +} + +static int sbi_cpuidle_init_cpu(struct device *dev, int cpu) +{ + struct cpuidle_driver *drv; + unsigned int state_count = 0; + int ret = 0; + + drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); + if (!drv) + return -ENOMEM; + + drv->name = "sbi_cpuidle"; + drv->owner = THIS_MODULE; + drv->cpumask = (struct cpumask *)cpumask_of(cpu); + + /* RISC-V architectural WFI to be represented as state index 0. */ + drv->states[0].enter = sbi_cpuidle_enter_state; + drv->states[0].exit_latency = 1; + drv->states[0].target_residency = 1; + drv->states[0].power_usage = UINT_MAX; + strcpy(drv->states[0].name, "WFI"); + strcpy(drv->states[0].desc, "RISC-V WFI"); + + /* + * If no DT idle states are detected (ret == 0) let the driver + * initialization fail accordingly since there is no reason to + * initialize the idle driver if only wfi is supported, the + * default archictectural back-end already executes wfi + * on idle entry. + */ + ret = dt_init_idle_driver(drv, sbi_cpuidle_state_match, 1); + if (ret <= 0) { + pr_debug("HART%ld: failed to parse DT idle states\n", + cpuid_to_hartid_map(cpu)); + return ret ? : -ENODEV; + } + state_count = ret + 1; /* Include WFI state as well */ + + /* Initialize idle states from DT. */ + ret = sbi_cpuidle_dt_init_states(dev, drv, cpu, state_count); + if (ret) { + pr_err("HART%ld: failed to init idle states\n", + cpuid_to_hartid_map(cpu)); + return ret; + } + + ret = cpuidle_register(drv, NULL); + if (ret) + goto deinit; + + cpuidle_cooling_register(drv); + + return 0; +deinit: + sbi_cpuidle_deinit_cpu(cpu); + return ret; +} + +static int sbi_cpuidle_pd_power_off(struct generic_pm_domain *pd) +{ + struct genpd_power_state *state = &pd->states[pd->state_idx]; + u32 *pd_state; + + if (!state->data) + return 0; + + if (!sbi_cpuidle_pd_allow_domain_state) + return -EBUSY; + + /* OSI mode is enabled, set the corresponding domain state. */ + pd_state = state->data; + sbi_set_domain_state(*pd_state); + + return 0; +} + +static void sbi_cpuidle_domain_sync_state(struct device *dev) +{ + /* + * All devices have now been attached/probed to the PM domain + * topology, hence it's fine to allow domain states to be picked. + */ + sbi_cpuidle_pd_allow_domain_state = true; +} + +static struct dt_idle_genpd_ops sbi_genpd_ops = { + .parse_state_node = sbi_dt_parse_state_node, +}; + +static int sbi_cpuidle_probe(struct platform_device *pdev) +{ + int cpu, ret; + struct cpuidle_driver *drv; + struct cpuidle_device *dev; + struct device_node *np, *pds_node; + + /* Detect OSI support based on CPU DT nodes */ + sbi_cpuidle_use_osi = true; + for_each_possible_cpu(cpu) { + np = of_cpu_device_node_get(cpu); + if (np && + of_find_property(np, "power-domains", NULL) && + of_find_property(np, "power-domain-names", NULL)) { + continue; + } else { + sbi_cpuidle_use_osi = false; + break; + } + } + + if (sbi_cpuidle_use_osi) + sbi_genpd_ops.power_off = sbi_cpuidle_pd_power_off; + + /* Populate generic power domains from DT nodes */ + pds_node = of_find_node_by_path("/cpus/power-domains"); + if (pds_node) { + ret = dt_idle_genpd_probe(&sbi_genpd_ops, pds_node); + of_node_put(pds_node); + if (ret) + return ret; + } + + /* Initialize CPU idle driver for each CPU */ + for_each_possible_cpu(cpu) { + ret = sbi_cpuidle_init_cpu(&pdev->dev, cpu); + if (ret) { + pr_debug("HART%ld: idle driver init failed\n", + cpuid_to_hartid_map(cpu)); + goto out_fail; + } + } + + /* Setup CPU hotplut notifiers */ + sbi_idle_init_cpuhp(); + + pr_info("idle driver registered for all CPUs\n"); + + return 0; + +out_fail: + while (--cpu >= 0) { + dev = per_cpu(cpuidle_devices, cpu); + drv = cpuidle_get_cpu_driver(dev); + cpuidle_unregister(drv); + sbi_cpuidle_deinit_cpu(cpu); + } + + return ret; +} + +static struct platform_driver sbi_cpuidle_driver = { + .probe = sbi_cpuidle_probe, + .driver = { + .name = "sbi-cpuidle", + .sync_state = sbi_cpuidle_domain_sync_state, + }, +}; + +static int __init sbi_cpuidle_init(void) +{ + int ret; + struct platform_device *pdev; + + /* + * The SBI HSM suspend function is only available when: + * 1) SBI version is 0.3 or higher + * 2) SBI HSM extension is available + */ + if ((sbi_spec_version < sbi_mk_version(0, 3)) || + sbi_probe_extension(SBI_EXT_HSM) <= 0) { + pr_info("HSM suspend not available\n"); + return 0; + } + + ret = platform_driver_register(&sbi_cpuidle_driver); + if (ret) + return ret; + + pdev = platform_device_register_simple("sbi-cpuidle", + -1, NULL, 0); + if (IS_ERR(pdev)) { + platform_driver_unregister(&sbi_cpuidle_driver); + return PTR_ERR(pdev); + } + + return 0; +} +device_initcall(sbi_cpuidle_init); From patchwork Tue Mar 16 10:41:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 403648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA0F7C43381 for ; Tue, 16 Mar 2021 10:43:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 93DFE64FA7 for ; Tue, 16 Mar 2021 10:43:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236756AbhCPKnR (ORCPT ); Tue, 16 Mar 2021 06:43:17 -0400 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:45292 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236801AbhCPKm5 (ORCPT ); Tue, 16 Mar 2021 06:42:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891378; x=1647427378; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=LMcvDgautBnUmp3mNjganpJagzLJYOQgPMmgvPU65iI=; b=RbE2GQOTYUoK0ODg5hehZtgIUvbiy1zO48KYWneP4NTPOuJ0khrC4IsQ VnK7OUlzXEkSj7pgj+u6Vzo7QlBg1kL7nd/fJLLuCipAoLCIXLg5ddR+3 +kssZQC+iOCQaum4ahjJe2hg3yQ8eMowNr51NsKUIXUK+l/tuGBpuPwp8 pYIpG/jrgVj5tI3Nm3Joo5ZqXi72f3JEdZtKDY/6k+44nhSE3aR7D1G9R Sra6ZMUNwPiMvLYVSMtonQaMFaaNvpo8zYarfOKBu13P2SQBvg8xZckvK sc2I8uuke2oktVkRMdvwWmzRnB0tPrMPq000iPsSdrqIJ5AvXSzrIokLB g==; IronPort-SDR: 1VDWUXRQolIvRU4Jrf/r8ao0Du07BPHemK2fpBERDUnRzYR7Ze99ajvI+yZkeGqTGLHk/qjm9d X9XSKShk+P96s3CBMMZlboczW3qDlppl+Epf7gOUmkqOVrj5FOTeLp/xsJ2StNZsHCjFWxUMCy eHd7xse8L0kcWtsqjLszi8m9H4KwI9bWLvVG6jCfjGKZedCCxs/CG/52wVirJ2GHeSriHttMeL MQ2mri4vNwaUUFnL9pLcg2BoangAjmHClPu9NF4/OmoRIPS/xkzdh7SbnAMq5Y704NWgMShvRC kkg= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="163398522" Received: from mail-dm6nam12lp2168.outbound.protection.outlook.com (HELO NAM12-DM6-obe.outbound.protection.outlook.com) ([104.47.59.168]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:42:54 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=b1w5CuHtiamMdrhLhUW7Wyxnv5deTymZsSDMVm8ZC67uiGUTQuwhvdeWouTXxDvTcQO1uu26NE/zX0nWWFHPU9NsPFUeh/xyugPXtwctGPhT4MCLbXeQsjo9EKYDXqtyZHGuuKhAASsmatp0eU4ts5z1gNsVxChoIm4Ku8g2Mj1HpszBkvXmE1gn4IdrQk1a91oUmUYt4eYqk2fP/QrJbIWmXYXzotF8yreOkqps8nuDdqZOCLjsPRwjg47Bl/o4NDT6xw+1b31DiI6w/Yu1q6zpEgeYSVFqmgrFlhqgBuwOx2nldnPKvCSi5xLxU/ohkAA6FtbtACoGWn0UNtfN6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jdOxqImNgiTaVYstfdyhXg8wAtLrcTlUWjS1snhcC+Q=; b=S/5pws5vQoRU5SFTNf9twRASNKHXGZdW4mJibUp1yqWMkyNgatZutmLR4OojE24FYIwpMmVi+ulRJkqccej+y3/8AhyeOPIcHd7aXLCa4HU0pQu/7NhJd6hdzG4M3tq7KKk94THeRoCt/PhX9V+ZZ98QT6MuWh4pbSyL2uQ/cYPavWtRyaJivGkfRuYOLV1nnih1SUhu1t4iUiC+VycYrBuIxa1eDshbrZJbzBbGcRMNHWGfeQFqkE6p1dVjWpb+E8DaHcBsEHiwEbWrYyhyTnQVbNcuvRKVFC5udRrNMRkLId88QyGu1+GnOXP4scnHihJHaFpSOTNkQrGso77mAA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jdOxqImNgiTaVYstfdyhXg8wAtLrcTlUWjS1snhcC+Q=; b=YR14lMkwCJmKv3uXSTKVqOpahWXEDHIRcuSJU9rmCQ88cxZS5ZHxzk5YuD9t2Lb3/zmqKwUCYvu2Jyrqkoa/GfYFXWWXQ89AsAxb2HJVefU2v1JK0ic8aNNNIAIKAsvjuQEXMYpHV0OPI+ND2It+tPAIM4hTIkNoLH51Gqa9VRE= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:52 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:52 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 7/8] dt-bindings: Add bindings documentation for RISC-V idle states Date: Tue, 16 Mar 2021 16:11:39 +0530 Message-Id: <20210316104140.878019-8-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:46 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 25073143-51f7-4a1e-f4da-08d8e8683ff9 X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +T0uxNnC9MHg00NfaQVrqFjNN209/7hXHgsATa09FixoKI+ZS4wHGAJDtPHRs12gqW7kTetw/nVUBXxPBTvMsPEfO65WmL8cJ0SNB2anw51zCpeYR8KvEFM6K6u1itOhrSHfogtOH9jcSKcNGHjEZxTtDIVQEelBf9E0BkaCArxWGnJxf1ncv+m6RIC2EE5yO35xdXiX3J8zbAaTlLaD2sUslfdbSma+NABtV5fPDt6u1/rslCyFOIsdqDqMwS3VjPVPx6DaKjN79KEwyCcVtxTqM/ABIoif+JAA8REvyF3Q7lNVG8+YMpkXNN61wk5O2YUT6Z9Uavsq7NJBX1y6cmOyGs8N5QVcPPRWl+4UmbfWmgaXUvHEdl+iUeJxVpvqupDcSzXJeocRoWGmfIu+WWoFTuYjhSRoL5dzJgs/RMzZbvl4IVlUmTPkLsFK5Vqkg1kTg2tc5pRGCzAIj0R0TxIvS80fPEAOkx9ItQxJEZrcBbrrHxt6sbwaP7z2qjCraZeSe+qd04xQtsPFW0xSmrZzleMI+wM2dBHEHbbGsF0oCMAK1tUND3b8wQxHZDzZtecU7rtJk4hepoLU5Qakl6FiioqMz7kNrrmD7gza7vjcnoZ76cXVAAgrsmemTZvu X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(83380400001)(110136005)(7696005)(966005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(16526019)(66476007)(26005)(956004)(2906002)(2616005)(4326008)(6666004)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: qj9Z9ZkDBxxiRarAijunu62UHsc+Rx578Ei72MZ50QC0UxBtx2KFZcGG9om3o4/WsRBJWccvNTVq9Ks9di722DIB+BYrrXnSW+hGiNExTFpsGOTqRVjJnxrAaaJDsDiAA7yQX1C7lfz+8WuokmsIFDZIj6fCPDCXD51VH2cLBp5INjf1Ro2UI/7Zbg5UcZWMQTCI18v+dLd88rnh0tu8rpJZ8rYCMlHLQtQwS4166MiYH41mJnPwRTk7s8BtVa4L90A8xjF1iD8mCXa2aguFRKztuOcllx6Rqt/AxMTLHuRXVW6EdBIkP1ZyngwY+N90+fcbTnbOj5n/mW+fJ+QvdWiKR/vRnlMI76JfxGKCAoNYdnTuVxnseAuoSmpNQehNVHX48I7MLUxdZuypE3Y0cxWW7DI2NFpLy8OI0l/saOEw13gyRe4TV+GgkIJX16NDWRh430ebdRrLeh73rIba5K1itQ3fciw6pPnyZvAGjHbe84ygZpz5ueB8kp9ry+xRv8M+PTB8fBfQ20HlUaPe0+62r5L1rfgrcLSqE0sViETKQSQ9Om51Ds8fNAtgE/vxQbt+4AZJK1apyZUN6AXovrNg/Drgk68SiQ1AAg8bcuqH3371tlCHt7swxse4iX7rtUvVwIguiplmRtz/o6mrCr1w6vAgqcvu5yHL9yW37iKyWUCC2WQnwMtCH58+PKn84OCfNWXvOQJOCf15t2mxLkEJVap7/SoOme15ZTOPA9wpPOM+hbJH00onlLAz5Z+U3P1ludbsvvkWn65ZvHHo6LSAa2ar8FY6y/Q+/HtYNcXxaenKb2FBXdwSKdPxbPFc/B4E/rIruEeHNIZJMwqwwJCUx21ZspeYuUkkbmZIZ1pNGGP82uycLismy+2sqHe4YyaibB3zR2X9cDC/64lGeQSkUuJ/ePSGUZXk6mBqWXm8KQpKSW+OBykg2AffOib5Q5MOEmgT/z2Mdj7gUVx1BiY1bVE4mRAEExhjVQ3NXCnx52U8SggQ8KkjWuV+6Yp7nIukPejK9zdiRGkYTjnJbCCArtQlbxSvvA0c8DMQ0uVWALMFDYAAP4/veyqYwxp7NEiLZzGOVVSTWyW2DoIYsO+bIuwV9mkYdmWn6Pb4NFWMjVFPtHt0P8iAIa7azQqig2pDb6kWS7Br+1CxeECySgtlfUjLj2v1M/rtHG0kSVZA+NNckxNuqQI7RZO+dI7PbZ3jJSn5voPrBFwYkC94FmV6QnatBO0ysJ6cASx5NHbUDWyrl7Lfla6zlsPmvWeoU474meqmLrK+S77Swd4oSHrJ+mizh3FPzg6b/r3TbCvXtFr/6F3DnWgCK5IyTpOo X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 25073143-51f7-4a1e-f4da-08d8e8683ff9 X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:52.4611 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 07Xffs327Ba7kgBI4riPHkR9U/LadCSPN4MM+Jp+JH3UHSVpNHXaxeiVpzUi7re8bGIfjgWmo1vrTJ1JFE+nAg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The RISC-V CPU idle states will be described in DT under the /cpus/idle-states DT node. This patch adds the bindings documentation for riscv-idle-states DT nodes and idle state DT nodes under it. Signed-off-by: Anup Patel --- .../devicetree/bindings/riscv/cpus.yaml | 6 + .../bindings/riscv/idle-states.yaml | 256 ++++++++++++++++++ 2 files changed, 262 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/idle-states.yaml diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index e534f6a7cfa1..482936630525 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -95,6 +95,12 @@ properties: - compatible - interrupt-controller + cpu-idle-states: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: | + List of phandles to idle state nodes supported + by this hart (see ./idle-states.yaml). + required: - riscv,isa - interrupt-controller diff --git a/Documentation/devicetree/bindings/riscv/idle-states.yaml b/Documentation/devicetree/bindings/riscv/idle-states.yaml new file mode 100644 index 000000000000..1dbf98905c8e --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/idle-states.yaml @@ -0,0 +1,256 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/idle-states.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V idle states binding description + +maintainers: + - Anup Patel + +description: |+ + RISC-V systems can manage power consumption dynamically, where HARTs + (or CPUs) [1] can be put in different platform specific suspend (or + idle) states (ranging from simple WFI, power gating, etc). The RISC-V + SBI [2] hart state management extension provides a standard mechanism + for OSes to request HART state transitions. + + The platform specific suspend (or idle) states of a hart can be either + retentive or non-rententive in nature. A retentive suspend state will + preserve hart register and CSR values for all privilege modes whereas + a non-retentive suspend state will not preserve hart register and CSR + values. The suspend (or idle) state entered by executing the WFI + instruction is considered standard on all RISC-V systems and therefore + must not be listed in device tree. + + The device tree binding definition for RISC-V idle states described + in this document is quite similar to the ARM idle states [3]. + + References + + [1] RISC-V Linux Kernel documentation - CPUs bindings + Documentation/devicetree/bindings/riscv/cpus.yaml + + [2] RISC-V Supervisor Binary Interface (SBI) + http://github.com/riscv/riscv-sbi-doc/riscv-sbi.adoc + + [3] ARM idle states binding description - Idle states bindings + Documentation/devicetree/bindings/arm/idle-states.yaml + +properties: + $nodename: + const: idle-states + +patternProperties: + "^(cpu|cluster)-": + type: object + description: | + Each state node represents an idle state description and must be + defined as follows. + + properties: + compatible: + const: riscv,idle-state + + riscv,sbi-suspend-param: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + suspend_type parameter to pass to the SBI HSM suspend call. For + more details on this parameter SBI specifiation v0.3 (or higher). + + local-timer-stop: + description: + If present the CPU local timer control logic is lost on state + entry, otherwise it is retained. + type: boolean + + entry-latency-us: + description: + Worst case latency in microseconds required to enter the idle state. + + exit-latency-us: + description: + Worst case latency in microseconds required to exit the idle state. + The exit-latency-us duration may be guaranteed only after + entry-latency-us has passed. + + min-residency-us: + description: + Minimum residency duration in microseconds, inclusive of preparation + and entry, for this idle state to be considered worthwhile energy + wise (refer to section 2 of this document for a complete description). + + wakeup-latency-us: + description: | + Maximum delay between the signaling of a wake-up event and the CPU + being able to execute normal code again. If omitted, this is assumed + to be equal to: + + entry-latency-us + exit-latency-us + + It is important to supply this value on systems where the duration + of PREP phase (see diagram 1, section 2) is non-neglibigle. In such + systems entry-latency-us + exit-latency-us will exceed + wakeup-latency-us by this duration. + + idle-state-name: + $ref: /schemas/types.yaml#/definitions/string + description: + A string used as a descriptive name for the idle state. + + required: + - compatible + - entry-latency-us + - exit-latency-us + - min-residency-us + +additionalProperties: false + +examples: + - | + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x0>; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv48"; + cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0 + &CLUSTER_RET_0 &CLUSTER_NONRET_0>; + + cpu_intc0: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x1>; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv48"; + cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0 + &CLUSTER_RET_0 &CLUSTER_NONRET_0>; + + cpu_intc1: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + + cpu@10 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x10>; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv48"; + cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0 + &CLUSTER_RET_1 &CLUSTER_NONRET_1>; + + cpu_intc10: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + + cpu@11 { + device_type = "cpu"; + compatible = "riscv"; + reg = <0x11>; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv48"; + cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0 + &CLUSTER_RET_1 &CLUSTER_NONRET_1>; + + cpu_intc11: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + + idle-states { + CPU_RET_0_0: cpu-retentive-0-0 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x10000000>; + entry-latency-us = <20>; + exit-latency-us = <40>; + min-residency-us = <80>; + }; + + CPU_NONRET_0_0: cpu-nonretentive-0-0 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x90000000>; + entry-latency-us = <250>; + exit-latency-us = <500>; + min-residency-us = <950>; + }; + + CLUSTER_RET_0: cluster-retentive-0 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x11000000>; + local-timer-stop; + entry-latency-us = <50>; + exit-latency-us = <100>; + min-residency-us = <250>; + wakeup-latency-us = <130>; + }; + + CLUSTER_NONRET_0: cluster-nonretentive-0 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x91000000>; + local-timer-stop; + entry-latency-us = <600>; + exit-latency-us = <1100>; + min-residency-us = <2700>; + wakeup-latency-us = <1500>; + }; + + CPU_RET_1_0: cpu-retentive-1-0 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x10000010>; + entry-latency-us = <20>; + exit-latency-us = <40>; + min-residency-us = <80>; + }; + + CPU_NONRET_1_0: cpu-nonretentive-1-0 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x90000010>; + entry-latency-us = <250>; + exit-latency-us = <500>; + min-residency-us = <950>; + }; + + CLUSTER_RET_1: cluster-retentive-1 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x11000010>; + local-timer-stop; + entry-latency-us = <50>; + exit-latency-us = <100>; + min-residency-us = <250>; + wakeup-latency-us = <130>; + }; + + CLUSTER_NONRET_1: cluster-nonretentive-1 { + compatible = "riscv,idle-state"; + riscv,sbi-suspend-param = <0x91000010>; + local-timer-stop; + entry-latency-us = <600>; + exit-latency-us = <1100>; + min-residency-us = <2700>; + wakeup-latency-us = <1500>; + }; + }; + }; + +... From patchwork Tue Mar 16 10:41:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 403647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 142E0C4332E for ; Tue, 16 Mar 2021 10:43:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DC6AF6502B for ; Tue, 16 Mar 2021 10:43:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236796AbhCPKnV (ORCPT ); Tue, 16 Mar 2021 06:43:21 -0400 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:12450 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236813AbhCPKnB (ORCPT ); Tue, 16 Mar 2021 06:43:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1615891381; x=1647427381; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=4ds/DRIrv63enKd4gbTtluhlQ9Tr4y2t6F0kVQdmG3A=; b=h2Hf2hxRdUKV8PjtlEWkQ+uHQjLQiZJcvS/ZhouoRheTX8Sn5JFNxamX eRMtzo3yhd8YHWrqsNr4+wpOfovN3kJHPULGcc2WulcRsQcfjBw9jkshD /wTyRLJzl7teeNnSzxGj/zb6AZCY24jTA0rAkEMMHlGHDQBkZIrSuj1dh cqxZ88e3SzV120qDB0Vp9xKM7VtCdrnMB/ZwKKG6tvT3Jqeer0xOtAx4s Kb48L3e9AcxXtEvCRvMCKXV74qdfd4JPGYhjPs5jNXCL6owDWSt1/V5nM /06DPS/yFW3SgUk75uq641m9icGX1Yst9RXl+lw3Vm5KFjkfyy8m1XpOa A==; IronPort-SDR: xex13+JMiAlVTQBwBRbU7H5rpT9pN6pLAfhDx0GQJpet3u+z2yaoory0JLL72quhBDcvIyojJY RWasXL76Pmahs6y9cZfN4tOT/7rXL5hjRALj0hVGnyt6672829p2vqPrnoYW83wBEcg9/Es5J3 xVphFSsOzNj3XwoAs+JO2AtnlfrjfhObudsBOKVHV4nwzdVcyDMkU8Pefn65SW5b9CZlnMN3+D qSHTeuLqx3niOns8GWdnIjoGQalLCm0/ExJ0JrIt7LNB5WjjmGK3ePRIXj9zeR6AL0YpPEDKo7 qyw= X-IronPort-AV: E=Sophos;i="5.81,251,1610380800"; d="scan'208";a="163398527" Received: from mail-dm6nam12lp2168.outbound.protection.outlook.com (HELO NAM12-DM6-obe.outbound.protection.outlook.com) ([104.47.59.168]) by ob1.hgst.iphmx.com with ESMTP; 16 Mar 2021 18:43:00 +0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=QXOfO4JnTRWvRADi2BY9RG4dwr8bxjZWTrVG6fhDZxdXUJ2uXbcnkdL41KBmDVTL1AX0GTtGQcsSBlUgk/GGv8+znks3Mm6T3/NxozKpcsskSAcsZ0h/8TOKdyiodU5EfiJe/aGIAk1eU8fnqROlBvov0M9mNSN8n7T86HDTYrUHKQM3AhCow86eXZoQ7EvF3I7i6u4mz4uVzaZncvxZHIe167uUHHIhljZjW+aqbgrDb7SDXyRhVhjCcRmr9oEOxDH2WIqFzHE0AT08DKFtCd2BBJv/I3zrwqB3lbAIEbhn6WkXMjoN5rXrMr6V/Ss/FnyYRcZvuu9no5DVYcTAow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4YRKAcytJ/VRtOkvDqrJ5/QVgSgs1BgggwvCEHOH5WQ=; b=bAzE9h5EFpCytlVDFAal4m13bRZpduG/C3908QtNq/UXP21AK/KyZCAn8k8wcpWXepNkJW9Be0ZqE3f0OpZPXTDAj17tRzpy77bXnakDw5yJVEjhB0m32dPzp3jF0JJNzaR/fBGIQyCOAiX7WhP4+c0ORdr69SESCgfODay6wjWVUR04OrZRriFT666RdN5mfIjVX+uObB1HNcYTfVqZHzRdQbVezFooo6Emtm6hQgzwrzWV5JQFQZA2Ba10pr7dSjEQ1L9zSRR582wBlV7B0S+as5zgTAKEPZjCAvcDUbHCCXdeuIXWFL4kexYXYzmTRdWN84YgU8yMsmmoaQY7Gw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=wdc.com; dmarc=pass action=none header.from=wdc.com; dkim=pass header.d=wdc.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sharedspace.onmicrosoft.com; s=selector2-sharedspace-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4YRKAcytJ/VRtOkvDqrJ5/QVgSgs1BgggwvCEHOH5WQ=; b=Gsd5sX6D6ARDg/So51rHMo1PQHsKstd4V93S16ZadyoW9QrN9aT3xjCKnq/ye2R694YR5WYZsGTEXpSepy6W6Z/OB4//IzIcgzICirx57sTb7ZVTKf5PRdhlqpI/54Vj06j7hbpI2Cd0MEaMBu04QoPN0/wmB1MD/BEXRPwa6BU= Authentication-Results: dabbelt.com; dkim=none (message not signed) header.d=none; dabbelt.com; dmarc=none action=none header.from=wdc.com; Received: from DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) by DM6PR04MB6377.namprd04.prod.outlook.com (2603:10b6:5:1e6::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31; Tue, 16 Mar 2021 10:42:58 +0000 Received: from DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868]) by DM6PR04MB6201.namprd04.prod.outlook.com ([fe80::38c0:cc46:192b:1868%7]) with mapi id 15.20.3933.032; Tue, 16 Mar 2021 10:42:58 +0000 From: Anup Patel To: Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v2 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine Date: Tue, 16 Mar 2021 16:11:40 +0530 Message-Id: <20210316104140.878019-9-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210316104140.878019-1-anup.patel@wdc.com> References: <20210316104140.878019-1-anup.patel@wdc.com> X-Originating-IP: [122.167.218.45] X-ClientProxiedBy: MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.167.218.45) by MA1PR01CA0136.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:35::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.31 via Frontend Transport; Tue, 16 Mar 2021 10:42:52 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: a7c4d238-d950-41dc-2d66-08d8e86843a1 X-MS-TrafficTypeDiagnostic: DM6PR04MB6377: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:849; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Iohx4AFwIQ3nDq0mbZtCDxrfz7ZRCzCbtsVqbWteyk9moGoSxUDFLVUvhFVQt8S12Ey+4D+vfQEWoE0e2k7rVbN5u+rl7DyqlBuwvjN4dgNz/UTBrCQ/bjC7/Nxl87qWUhHmSC3N1gylRSGzZm0f0413bSOdKTPlXFeS0II2cVp7JQ7M7s7OQITNITR8EDnHlLBLI5YLDdCp7tWwbO5oR2yt1PqEfZ+fFMcmoRlgpRNVuNFfLFAA6KJCu6vG7AxEFwD7asKXd5jTUXt0pvJH0xHSzoKGSaH4vH+tjD5kytM2GYSER3FHxoxI4c+Ra6kXWm+EssF4E9hPg+i3KAzaMk+shJTGgbnMQNyHqICOC/6aOypSfoOF4WZO9qZxy6XBcSqQLQBQpusl6RGH6eFU3vuUYfQoxBD6Svcgbf5ZjNitE9AOeafwiASL336KTS91g2VHEmj4d09qVWJscbFySRFSRqCL/4GyzZim3JaUsBlEzE+Hp7qLIUHo8MvLGliGyVgMK8JlvnKpeIsaI6s8IJDylZAgu+OOabb6scMkKachYG+3+InD99HegoPQmGxd X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR04MB6201.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(8676002)(36756003)(44832011)(52116002)(86362001)(110136005)(7696005)(8936002)(66946007)(8886007)(55016002)(7416002)(186003)(66556008)(16526019)(66476007)(26005)(956004)(2906002)(2616005)(4326008)(6666004)(5660300002)(498600001)(1076003)(54906003); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: 8AMEs3ElL6cTKI/75vqo4eyfNprOYpqp0DXUbIixV5h/zRE250/g4v6V7aUTaTI+ELyDojUFlWFd6TPHtQeMTGCmngSE66B00Z4OnjXCPWuH34R4iz/yxcm1kcAM53eKfiWHm2ALMveiYYiXyO+nhnjIk0u3D9a9l+upGDiyIZZr9twLZdo0PmCP618pXcx3AOSp9l66bgV2R1zpOLqnLykw7t0abzX/5/Rozbx5oQa6pW9nl6hhrKdfZDFrG6cjyjRqUbREaiOQupkx8L63ZWq7B33h4bcsyo6mMVFtJvDL7HdPXxynHHk/1+1/YjqC2C40OvcrX3cDEDyu5yr0CxTz+Bt3Fypo0AwrGIkNkM7XBok79Mmpb4Cyv4Oycsg4cnWuA09qQJPv4am7+jim1wU/V7KUqvOAXmbDKxzF77wchDVgWLIrt8HckxrvZRU7kRI3LUSvyo8epUD4s20UDbTRlijQInIuKiNxVuOxTq7dWv+a4zkCdLUsa0pqYaZmEBgv5QklD09akZKcxI2fC6L9HBGxKo7z5/XNGVkaF62LiL9FbsAuyrDasnkTD1tpzg3X/Qm/TMJkseflnA8X6G5q7QC7qFUra/TQeb4yK4eSfwakCcoXmXzjeOGYjIWEs7xpGXv0YTr2gDFWZLHAVEtPzdu7q2PDDv8i6ouDMljLog9UNs3TNRMnxWigw6sYRZ50aUaTTjj4mtCsyq7SIC5cR6ifnsT284t50x7Qu2YxEWb41X5V5BVxR1X2EUgDyDiUQWjmQkspQY9hTIBFRl9pyyNTN2Al97H9mfQ6CaR1WKrgYGHCmZVcRJkeFLxhOiQSETfoL3zNL6/ZUgc1uXjuFLiUaRFHEOMQ7LgWUUzMBxSOKTfxxuCkMnu2A0CWBPLr05bbJoHvQtQWTS1Lv+qLRv5Kl4MEyTK2yZHqZ+9Bz52h92cM8AiM2DCe+oArcCJs1arBTO6y5VSbwedT6OL6/wSM1tB1fD4cKQpoQW2lF9aJfRi+K4uOrOwTeKQnXuWihCzzvT8c3L4EPzkwSCBrV2J4fymJoleD29lUrlR7+KVXWRry5i0sZd9/YrWGjHivS/yJCr3XcqBwvN+qDa3/nyGBdedM4ZmgSs764FqHaV9aiBuZLOlA4XXWsA0pwCrmtWjoLfY+APpkdMEGqE7O66XGGa16pHhmO3F50Lbzkm6wAlzVSMykWMr4r/SCAZHnZwGAGq3FvTwV1b3f93JcxdNKIgNaYJQUTEVgWH725dhC261bvxukGBObmTqZ8VV+G3RQ4/Rd3oP+BIBBYVlDmtLVDE3ohOlr2qhI5fTtpKcfM1otDaMs+wkLqDux X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: a7c4d238-d950-41dc-2d66-08d8e86843a1 X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2021 10:42:58.2853 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Q1TNaH+bIuLQ5U/BEGVCx2Ht3d30kJtdn46zScPzztS+e4dLAkh2S1hd96koUKXrAGJ/qdpI8t6VRrmY0yJIFw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB6377 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test SBI HSM Supend on QEMU. Signed-off-by: Anup Patel --- arch/riscv/Kconfig.socs | 3 +++ arch/riscv/configs/defconfig | 1 + arch/riscv/configs/rv32_defconfig | 1 + 3 files changed, 5 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 7efcece8896c..efdf6fbe18dd 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -19,6 +19,9 @@ config SOC_VIRT select GOLDFISH select RTC_DRV_GOLDFISH if RTC_CLASS select SIFIVE_PLIC + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF + select RISCV_SBI_CPUIDLE if CPU_IDLE help This enables support for QEMU Virt Machine. diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index dc4927c0e44b..aac26c20bbf5 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -19,6 +19,7 @@ CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y +CONFIG_PM=y CONFIG_CPU_IDLE=y CONFIG_JUMP_LABEL=y CONFIG_MODULES=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 332e43a4a2c3..2285c95e34b3 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y CONFIG_ARCH_RV32I=y CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y +CONFIG_PM=y CONFIG_CPU_IDLE=y CONFIG_JUMP_LABEL=y CONFIG_MODULES=y