From patchwork Wed Apr 25 23:31:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134386 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1532683lji; Wed, 25 Apr 2018 17:26:24 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpkRmfcDAuZiwoAaxA23f2kk4vHq0hjf0d2MijwYHS+mWzKgBMk7NhjlIbZx20bywXoqNPX X-Received: by 10.98.62.194 with SMTP id y63mr6264678pfj.102.1524702384830; Wed, 25 Apr 2018 17:26:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702384; cv=none; d=google.com; s=arc-20160816; b=nr4nwrTnNgD63Urub0fw1wbpBZ/qgRlO/FkbWcHN4E3znY7RegF1Sc7MUWffubnh+4 6sdxzh0cWXPpsMHVKLwD2g3IwTlEzuWt5ZGC7OeD4vFMLnyQmF5h/zSWuOr/6caXPozK IsGF+wh+bA0SHJwE01OP6Jd1BuZ7wmB9uVLrv3Vf0b+srX13QBpgcsjQjDJ3KZjHw2pn FcXNZnOlOW5XzeFPQib6OM5FeoRBeReXFPyzOMTpyL2+IaZbCs8QI2mHJ7cyzNvd/ywv 2Lx/7erpTYlSTb7f5d6VBLnJw1FS5rMzY4iqj3cjcB6sOTBj/9bu3i6j4AByohbcfw2O 4ORA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Ffyu3dxJi3Ofe4pvMrIAV+UdTchCL3z0BsrO55t1wsk=; b=FgApIjyINc6l0IoRa2tLBRC3k4yrTBbaFYbpUFgVUxCj1Ns7efPBQvj2NPK0CApKQx GoPOqu2r6rB29+y1WWDmavynpBHv2KTt29QwkagFOr8DUOC2XKtZ0ZDOkRG70fOgURSY 0jHkgmPtfte0+MKGjEYMXRo+5UBUkaNf72VOMeBrABrqT/lFvzY8ASW05Txt7a87uyRE Y2/+LSCLhzp0LUq24h/h2AfG/BQT2W6YhV6Olsp9ncZqWN27GlgYrG/YvGMkaQiZmwrG JG+g5FRuA/SU8TCMgW1LFHH1YUXBpx5jEzQWPEpxHSjvFsb4EHYKi2vEBI+4yVIbOGV8 X5RQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x9-v6si17403928plv.159.2018.04.25.17.26.24; Wed, 25 Apr 2018 17:26:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752056AbeDZA0W (ORCPT + 29 others); Wed, 25 Apr 2018 20:26:22 -0400 Received: from foss.arm.com ([217.140.101.70]:45630 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751638AbeDZA0L (ORCPT ); Wed, 25 Apr 2018 20:26:11 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 787F51688; Wed, 25 Apr 2018 17:26:11 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 663123F590; Wed, 25 Apr 2018 17:26:10 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 03/13] cacheinfo: rename of_node to fw_token Date: Wed, 25 Apr 2018 18:31:11 -0500 Message-Id: <20180425233121.13270-4-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename and change the type of of_node to indicate it is a generic pointer which is generally only used for comparison purposes. In a later patch we will put an ACPI/PPTT token pointer in fw_token so that the code which builds the shared cpu masks can be reused. Signed-off-by: Jeremy Linton Acked-by: Sudeep Holla --- drivers/base/cacheinfo.c | 16 +++++++++------- include/linux/cacheinfo.h | 8 +++----- 2 files changed, 12 insertions(+), 12 deletions(-) -- 2.13.6 diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index a872523e8951..597aacb233fc 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -35,7 +35,7 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu) static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) { - return sib_leaf->of_node == this_leaf->of_node; + return sib_leaf->fw_token == this_leaf->fw_token; } /* OF properties to query for a given cache type */ @@ -167,9 +167,10 @@ static int cache_setup_of_node(unsigned int cpu) struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); unsigned int index = 0; - /* skip if of_node is already populated */ - if (this_cpu_ci->info_list->of_node) + /* skip if fw_token is already populated */ + if (this_cpu_ci->info_list->fw_token) { return 0; + } if (!cpu_dev) { pr_err("No cpu device for CPU %d\n", cpu); @@ -190,7 +191,7 @@ static int cache_setup_of_node(unsigned int cpu) if (!np) break; cache_of_set_props(this_leaf, np); - this_leaf->of_node = np; + this_leaf->fw_token = np; index++; } @@ -278,7 +279,7 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); } - of_node_put(this_leaf->of_node); + of_node_put(this_leaf->fw_token); } } @@ -323,8 +324,9 @@ static int detect_cache_attributes(unsigned int cpu) if (ret) goto free_ci; /* - * For systems using DT for cache hierarchy, of_node and shared_cpu_map - * will be set up here only if they are not populated already + * For systems using DT for cache hierarchy, fw_token + * and shared_cpu_map will be set up here only if they are + * not populated already */ ret = cache_shared_cpu_map_setup(cpu); if (ret) { diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 3d9805297cda..0c6f658054d2 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -34,9 +34,8 @@ enum cache_type { * @shared_cpu_map: logical cpumask representing all the cpus sharing * this cache node * @attributes: bitfield representing various cache attributes - * @of_node: if devicetree is used, this represents either the cpu node in - * case there's no explicit cache node or the cache node itself in the - * device tree + * @fw_token: Unique value used to determine if different cacheinfo + * structures represent a single hardware cache instance. * @disable_sysfs: indicates whether this node is visible to the user via * sysfs or not * @priv: pointer to any private data structure specific to particular @@ -65,8 +64,7 @@ struct cacheinfo { #define CACHE_ALLOCATE_POLICY_MASK \ (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE) #define CACHE_ID BIT(4) - - struct device_node *of_node; + void *fw_token; bool disable_sysfs; void *priv; }; From patchwork Wed Apr 25 23:31:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134396 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1534462lji; Wed, 25 Apr 2018 17:28:39 -0700 (PDT) X-Google-Smtp-Source: AB8JxZreHC4WDu9Imgv/HgfDaugaDkQK883rLbzVU7fOQObbvdOlNQUyNHz+sv44Rtg7uCTOOgiP X-Received: by 2002:a17:902:b60a:: with SMTP id b10-v6mr3520790pls.221.1524702519118; Wed, 25 Apr 2018 17:28:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702519; cv=none; d=google.com; s=arc-20160816; b=UQrFyR1MueE9/Dflz0zdJAwSv9b+5C4EU5ZZEU39jde1veWw2dFgTzLqXjsV/Zsudx iDD+TWOp0pF4kXT/uGsYiQd9IxGuF9hg4d172VbEcLe9gT1BPT4UIo6sJ2NrlL68l7Dy +HRi8HuQCAoy+eIPrlFXdskw/08fHKxiNfZIv9Ak3MceQtZmi+ecC7dVYDgxRzZkfFZX 3GTchv1d5OYwrzcJqlfNaeiU8YWbmOSeswcZKUsxlTa/rMJXU/o23ffHdCxoSxCw0QIo 67JxzsyF3vzroZ1F6jUjJZtB+lZ53hnC3dfLLjU1Ny340c5RZc2jB0EwEZ/m3ygOQX6U woRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=X8oIGhkK37WMHWcgEZvYNTfwfcW2tjL2fvwAWo6swsY=; b=BjnhhTWWzgYFKeu7mRxL4jictwADReGmrbEoz0pVndT/dbf5625dhVNYYvVBJ71EI4 8xh71NGhdorgxvxh1F2cH4Mg8AXn8geiSZkyfRZmYCX9IhVaNZvdKsei8JiYpNJwIzxq UzD2WyH5mRtCfYmbV8CbiqN7hYDB0SAD2nn6nYU511fADnZ9p265s6oPHRfvfbWd78tO BGNTCEw3Z4rs03t1fdOeMCASu0U9Ms6HFbwzZ8sro5ThiXc26UOMqxJYanOBDF70b5fO lQsrWe+SLTvHLaGGSS6aG7Mf1Ybw7UEWCAQ7ymK0iLKjmA24yZUu5SAXbofyh1nI08Zn Mo+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s1-v6si16759555plr.458.2018.04.25.17.28.38; Wed, 25 Apr 2018 17:28:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753786AbeDZA2f (ORCPT + 29 others); Wed, 25 Apr 2018 20:28:35 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:45654 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751649AbeDZA0N (ORCPT ); Wed, 25 Apr 2018 20:26:13 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 22E76168F; Wed, 25 Apr 2018 17:26:13 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 074443F590; Wed, 25 Apr 2018 17:26:11 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 04/13] arm64/acpi: Create arch specific cpu to acpi id helper Date: Wed, 25 Apr 2018 18:31:12 -0500 Message-Id: <20180425233121.13270-5-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Its helpful to be able to lookup the acpi_processor_id associated with a logical cpu. Provide an arm64 helper to do this. Signed-off-by: Jeremy Linton --- arch/arm64/include/asm/acpi.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.13.6 diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 32f465a80e4e..0db62a4cbce2 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -86,6 +86,10 @@ static inline bool acpi_has_cpu_in_madt(void) } struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu); +static inline u32 get_acpi_id_for_cpu(unsigned int cpu) +{ + return acpi_cpu_get_madt_gicc(cpu)->uid; +} static inline void arch_fix_phys_package_id(int num, u32 slot) { } void __init acpi_init_cpus(void); From patchwork Wed Apr 25 23:31:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134395 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1534441lji; Wed, 25 Apr 2018 17:28:37 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/x6++07sNJHSDQHbmVBBU4cf4inq7c1/vtLWyAr1oO9YVd/YyEiowFspBcMc0rE9LGqWaJ X-Received: by 10.98.129.5 with SMTP id t5mr17691541pfd.215.1524702517566; Wed, 25 Apr 2018 17:28:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702517; cv=none; d=google.com; s=arc-20160816; b=ycT14pHdLSmn0w6Alp4fA4SyOKfmNBYAeCvKy8Uh5FYp4Lir4vSgI/S3rOrzwCYdtL tokyhRzQs28Skkr0/FXpZRZ+me/Z9j6/CHIMMowwn6rP7KeYzjKoDfM/bBQX3bT5uvYX qWaXTV7fy3b/6+oKcjkt3ehJU+SE8UpLHWgyMituJDfVuXxWmHy1cVH0ELZ6WdVSI3A8 E318DrOG9KLj6PwzLLAuAMcWO+0P5EVyzX4YCS91aiiOP+zSW1t1nXnuWKrPmgLjTPVo 6YmHaVSL3VhjLMYvtMDes0r+8ndUjEyziV1/gHAWt4W2Z9Dk2UVajHUbX8hT1K1zp54a YRig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=xrsfQ0BWSCycXEFadHb8xkRsRzihprvs7q3Zrn2cckM=; b=eNqvFBcr6GiPfqNaTyiKZFUpuXHUc/mAsyNRl0ycDC2+B0d6a04LPrr1/rBNvDDRsi jbHJDJKG9fmhdWomAJgaU2aHzwJqMYyxPnyTApBHHCpVpzfDRagyQ8/zddhHQchl6JND nLmIlqYCDf1tBmmvYHCsC3kj+Dm2JemzlJRIBn4k7GoOxhB+Ks9Hjs4uJksmQKDujKxx /4swnHwoZ6ej1dMvsWVk7Cu25J8plzqQRAn+yKbqPU8tsvCRIGp+FSCny26DpPmvQeNw N5+aN530n3VyyI5N+xdkPLrz3JTIbD+lWJMhTpmFTHCF8T81ZiWzZvXK8VIF9rK1cSgV OANw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a87si12175134pfl.165.2018.04.25.17.28.37; Wed, 25 Apr 2018 17:28:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753733AbeDZA2e (ORCPT + 29 others); Wed, 25 Apr 2018 20:28:34 -0400 Received: from foss.arm.com ([217.140.101.70]:45690 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751678AbeDZA0P (ORCPT ); Wed, 25 Apr 2018 20:26:15 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C17B4169F; Wed, 25 Apr 2018 17:26:14 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AE2B93F590; Wed, 25 Apr 2018 17:26:13 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 05/13] ACPI/PPTT: Add Processor Properties Topology Table parsing Date: Wed, 25 Apr 2018 18:31:13 -0500 Message-Id: <20180425233121.13270-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ACPI 6.2 adds a new table, which describes how processing units are related to each other in tree like fashion. Caches are also sprinkled throughout the tree and describe the properties of the caches in relation to other caches and processing units. Add the code to parse the cache hierarchy and report the total number of levels of cache for a given core using acpi_find_last_cache_level() as well as fill out the individual cores cache information with cache_setup_acpi() once the cpu_cacheinfo structure has been populated by the arch specific code. An additional patch later in the set adds the ability to report peers in the topology using find_acpi_cpu_topology() to report a unique ID for each processing unit at a given level in the tree. These unique id's can then be used to match related processing units which exist as threads, within a given package, etc. Signed-off-by: Jeremy Linton Acked-by: Sudeep Holla --- drivers/acpi/pptt.c | 518 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 518 insertions(+) create mode 100644 drivers/acpi/pptt.c -- 2.13.6 diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c new file mode 100644 index 000000000000..cced71ef851a --- /dev/null +++ b/drivers/acpi/pptt.c @@ -0,0 +1,518 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * pptt.c - parsing of Processor Properties Topology Table + * + * Copyright (C) 2018, ARM + * + * This file implements parsing of Processor Properties Topology Table (PPTT) + * which is optionally used to describe the processor and cache topology. + * Due to the relative pointers used throughout the table, this doesn't + * leverage the existing subtable parsing in the kernel. + * + * The PPTT structure is an inverted tree, with each node potentially + * holding one or two inverted tree data structures describing + * the caches available at that level. Each cache structure optionally + * contains properties describing the cache at a given level which can be + * used to override hardware probed values. + */ +#define pr_fmt(fmt) "ACPI PPTT: " fmt + +#include +#include +#include + +/** + * fetch_pptt_subtable() - Find/Verify that the PPTT ref is a valid subtable + * + * Given the PPTT table, find and verify that the subtable entry + * is located within the table + * + * Return: acpi_subtable_header* or NULL + */ +static struct acpi_subtable_header *fetch_pptt_subtable(struct acpi_table_header *table_hdr, + u32 pptt_ref) +{ + struct acpi_subtable_header *entry; + + /* there isn't a subtable at reference 0 */ + if (pptt_ref < sizeof(struct acpi_subtable_header)) + return NULL; + + if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length) + return NULL; + + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, pptt_ref); + + if (entry->length == 0) + return NULL; + + if (pptt_ref + entry->length > table_hdr->length) + return NULL; + + return entry; +} + +static struct acpi_pptt_processor *fetch_pptt_node(struct acpi_table_header *table_hdr, + u32 pptt_ref) +{ + return (struct acpi_pptt_processor *)fetch_pptt_subtable(table_hdr, pptt_ref); +} + +static struct acpi_pptt_cache *fetch_pptt_cache(struct acpi_table_header *table_hdr, + u32 pptt_ref) +{ + return (struct acpi_pptt_cache *)fetch_pptt_subtable(table_hdr, pptt_ref); +} + +static struct acpi_subtable_header *acpi_get_pptt_resource(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *node, + int resource) +{ + u32 *ref; + + if (resource >= node->number_of_priv_resources) + return NULL; + + ref = ACPI_ADD_PTR(u32, node, sizeof(struct acpi_pptt_processor)); + ref += resource; + + return fetch_pptt_subtable(table_hdr, *ref); +} + +/** + * acpi_pptt_match_type() - Return true if the PPTT type matches the request + * + * Match the type passed and special case the TYPE_UNIFIED so that + * it match both ACPI_PPTT_CACHE_TYPE_UNIFIED(_ALT) types. + * + * Return: true for match, false otherwise + */ +static inline bool acpi_pptt_match_type(int table_type, int type) +{ + return ((table_type & ACPI_PPTT_MASK_CACHE_TYPE) == type || + table_type & ACPI_PPTT_CACHE_TYPE_UNIFIED & type); +} + +/** + * acpi_pptt_walk_cache() - Attempt to find the requested acpi_pptt_cache + * + * Attempt to find a given cache level, while counting the max number + * of cache levels for the cache node. + * + * Given a pptt resource, verify that it is a cache node, then walk + * down each level of caches, counting how many levels are found + * as well as checking the cache type (icache, dcache, unified). If a + * level & type match, then we set found, and continue the search. + * Once the entire cache branch has been walked return its max + * depth. + * + * Return: The cache structure and the level we terminated with. + */ +static int acpi_pptt_walk_cache(struct acpi_table_header *table_hdr, + int local_level, + struct acpi_subtable_header *res, + struct acpi_pptt_cache **found, + int level, int type) +{ + struct acpi_pptt_cache *cache; + + if (res->type != ACPI_PPTT_TYPE_CACHE) + return 0; + + cache = (struct acpi_pptt_cache *) res; + while (cache) { + local_level++; + + if (local_level == level && + cache->flags & ACPI_PPTT_CACHE_TYPE_VALID && + acpi_pptt_match_type(cache->attributes, type)) { + if (*found != NULL && cache != *found) + pr_warn("Found duplicate cache level/type unable to determine uniqueness\n"); + + pr_debug("Found cache @ level %d\n", level); + *found = cache; + /* + * continue looking at this node's resource list + * to verify that we don't find a duplicate + * cache node. + */ + } + cache = fetch_pptt_cache(table_hdr, cache->next_level_of_cache); + } + return local_level; +} + +/** + * acpi_find_cache_level() - Given the cpu find a given cache node + * + * Given a CPU node look for cache levels that exist at this level, and then + * for each cache node, count how many levels exist below (logically above) it. + * If a level and type are specified, and we find that level/type, abort + * processing and return the acpi_pptt_cache structure. + * + * Return: NULL or the cache node requested. + */ +static struct acpi_pptt_cache *acpi_find_cache_level(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu_node, + int *starting_level, int level, + int type) +{ + struct acpi_subtable_header *res; + int number_of_levels = *starting_level; + int resource = 0; + struct acpi_pptt_cache *ret = NULL; + int local_level; + + /* walk down from processor node */ + while ((res = acpi_get_pptt_resource(table_hdr, cpu_node, resource))) { + resource++; + + local_level = acpi_pptt_walk_cache(table_hdr, *starting_level, + res, &ret, level, type); + /* + * we are looking for the max depth. Since its potentially + * possible for a given node to have resources with differing + * depths verify that the depth we have found is the largest. + */ + if (number_of_levels < local_level) + number_of_levels = local_level; + } + if (number_of_levels > *starting_level) + *starting_level = number_of_levels; + + return ret; +} + +/** + * acpi_process_node() - Given a PPTT table, and a cpu node, count the caches + * + * Given a processor node containing a processing unit, walk into it and count + * how many levels exist solely for it, and then walk up each level until we hit + * the root node (ignore the package level because it may be possible to have + * caches that exist across packages). Count the number of cache levels that + * exist at each level on the way up. + * + * Return: Total number of levels found. + */ +static int acpi_process_node(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu_node) +{ + int total_levels = 0; + + do { + acpi_find_cache_level(table_hdr, cpu_node, &total_levels, 0, 0); + cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent); + } while (cpu_node); + + return total_levels; +} + +/** + * acpi_pptt_leaf_node() - Given a processor node, determine if its a leaf + * + * Determine if the *node parameter is a leaf node by iterating the + * PPTT table, looking for nodes which reference it. + * + * Return: 0 if we find a node referencing the passed node (or table error), + * or 1 if we don't. + */ +static int acpi_pptt_leaf_node(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *node) +{ + struct acpi_subtable_header *entry; + unsigned long table_end; + u32 node_entry; + struct acpi_pptt_processor *cpu_node; + u32 proc_sz; + + table_end = (unsigned long)table_hdr + table_hdr->length; + node_entry = ACPI_PTR_DIFF(node, table_hdr); + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, + sizeof(struct acpi_table_pptt)); + proc_sz = sizeof(struct acpi_pptt_processor *); + + while ((unsigned long)entry + proc_sz < table_end) { + cpu_node = (struct acpi_pptt_processor *)entry; + if (entry->type == ACPI_PPTT_TYPE_PROCESSOR && + cpu_node->parent == node_entry) + return 0; + if (entry->length == 0) + return 0; + entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry, + entry->length); + + } + return 1; +} + +/** + * acpi_find_processor_node() - Given a PPTT table find the requested processor + * + * Find the subtable entry describing the provided processor. + * This is done by iterating the PPTT table looking for processor nodes + * which have an acpi_processor_id that matches the acpi_cpu_id parameter + * passed into the function. If we find a node that matches this criteria + * we verify that its a leaf node in the topology rather than depending + * on the valid flag, which doesn't need to be set for leaf nodes. + * + * Return: NULL, or the processors acpi_pptt_processor* + */ +static struct acpi_pptt_processor *acpi_find_processor_node(struct acpi_table_header *table_hdr, + u32 acpi_cpu_id) +{ + struct acpi_subtable_header *entry; + unsigned long table_end; + struct acpi_pptt_processor *cpu_node; + u32 proc_sz; + + table_end = (unsigned long)table_hdr + table_hdr->length; + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, + sizeof(struct acpi_table_pptt)); + proc_sz = sizeof(struct acpi_pptt_processor *); + + /* find the processor structure associated with this cpuid */ + while ((unsigned long)entry + proc_sz < table_end) { + cpu_node = (struct acpi_pptt_processor *)entry; + + if (entry->length == 0) { + pr_warn("Invalid zero length subtable\n"); + break; + } + if (entry->type == ACPI_PPTT_TYPE_PROCESSOR && + acpi_cpu_id == cpu_node->acpi_processor_id && + acpi_pptt_leaf_node(table_hdr, cpu_node)) { + return (struct acpi_pptt_processor *)entry; + } + + entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry, + entry->length); + } + + return NULL; +} + +static int acpi_find_cache_levels(struct acpi_table_header *table_hdr, + u32 acpi_cpu_id) +{ + int number_of_levels = 0; + struct acpi_pptt_processor *cpu; + + cpu = acpi_find_processor_node(table_hdr, acpi_cpu_id); + if (cpu) + number_of_levels = acpi_process_node(table_hdr, cpu); + + return number_of_levels; +} + +/* Convert the linux cache_type to a ACPI PPTT cache type value */ +static u8 acpi_cache_type(enum cache_type type) +{ + switch (type) { + case CACHE_TYPE_DATA: + pr_debug("Looking for data cache\n"); + return ACPI_PPTT_CACHE_TYPE_DATA; + case CACHE_TYPE_INST: + pr_debug("Looking for instruction cache\n"); + return ACPI_PPTT_CACHE_TYPE_INSTR; + default: + case CACHE_TYPE_UNIFIED: + pr_debug("Looking for unified cache\n"); + /* + * It is important that ACPI_PPTT_CACHE_TYPE_UNIFIED + * contains the bit pattern that will match both + * ACPI unified bit patterns because we use it later + * to match both cases. + */ + return ACPI_PPTT_CACHE_TYPE_UNIFIED; + } +} + +/* find the ACPI node describing the cache type/level for the given CPU */ +static struct acpi_pptt_cache *acpi_find_cache_node(struct acpi_table_header *table_hdr, + u32 acpi_cpu_id, + enum cache_type type, + unsigned int level, + struct acpi_pptt_processor **node) +{ + int total_levels = 0; + struct acpi_pptt_cache *found = NULL; + struct acpi_pptt_processor *cpu_node; + u8 acpi_type = acpi_cache_type(type); + + pr_debug("Looking for CPU %d's level %d cache type %d\n", + acpi_cpu_id, level, acpi_type); + + cpu_node = acpi_find_processor_node(table_hdr, acpi_cpu_id); + + while (cpu_node && !found) { + found = acpi_find_cache_level(table_hdr, cpu_node, + &total_levels, level, acpi_type); + *node = cpu_node; + cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent); + } + + return found; +} + +/* total number of attributes checked by the properties code */ +#define PPTT_CHECKED_ATTRIBUTES 4 + +/** + * update_cache_properties() - Update cacheinfo for the given processor + * + * The ACPI spec implies that the fields in the cache structures are used to + * extend and correct the information probed from the hardware. Lets only + * set fields that we determine are VALID. + * + * Return: nothing. Side effect of updating the global cacheinfo + */ +static void update_cache_properties(struct cacheinfo *this_leaf, + struct acpi_pptt_cache *found_cache, + struct acpi_pptt_processor *cpu_node) +{ + int valid_flags = 0; + + this_leaf->fw_token = cpu_node; + if (found_cache->flags & ACPI_PPTT_SIZE_PROPERTY_VALID) { + this_leaf->size = found_cache->size; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_LINE_SIZE_VALID) { + this_leaf->coherency_line_size = found_cache->line_size; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_NUMBER_OF_SETS_VALID) { + this_leaf->number_of_sets = found_cache->number_of_sets; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_ASSOCIATIVITY_VALID) { + this_leaf->ways_of_associativity = found_cache->associativity; + valid_flags++; + } + if (found_cache->flags & ACPI_PPTT_WRITE_POLICY_VALID) { + switch (found_cache->attributes & ACPI_PPTT_MASK_WRITE_POLICY) { + case ACPI_PPTT_CACHE_POLICY_WT: + this_leaf->attributes = CACHE_WRITE_THROUGH; + break; + case ACPI_PPTT_CACHE_POLICY_WB: + this_leaf->attributes = CACHE_WRITE_BACK; + break; + } + } + if (found_cache->flags & ACPI_PPTT_ALLOCATION_TYPE_VALID) { + switch (found_cache->attributes & ACPI_PPTT_MASK_ALLOCATION_TYPE) { + case ACPI_PPTT_CACHE_READ_ALLOCATE: + this_leaf->attributes |= CACHE_READ_ALLOCATE; + break; + case ACPI_PPTT_CACHE_WRITE_ALLOCATE: + this_leaf->attributes |= CACHE_WRITE_ALLOCATE; + break; + case ACPI_PPTT_CACHE_RW_ALLOCATE: + case ACPI_PPTT_CACHE_RW_ALLOCATE_ALT: + this_leaf->attributes |= + CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE; + break; + } + } + /* + * If the above flags are valid, and the cache type is NOCACHE + * update the cache type as well. + */ + if (this_leaf->type == CACHE_TYPE_NOCACHE && + valid_flags == PPTT_CHECKED_ATTRIBUTES) + this_leaf->type = CACHE_TYPE_UNIFIED; +} + +/* + * Update the kernel cache information for each level of cache + * associated with the given acpi cpu. + */ +static void cache_setup_acpi_cpu(struct acpi_table_header *table, + unsigned int cpu) +{ + struct acpi_pptt_cache *found_cache; + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu); + struct cacheinfo *this_leaf; + unsigned int index = 0; + struct acpi_pptt_processor *cpu_node = NULL; + + while (index < get_cpu_cacheinfo(cpu)->num_leaves) { + this_leaf = this_cpu_ci->info_list + index; + found_cache = acpi_find_cache_node(table, acpi_cpu_id, + this_leaf->type, + this_leaf->level, + &cpu_node); + pr_debug("found = %p %p\n", found_cache, cpu_node); + if (found_cache) + update_cache_properties(this_leaf, + found_cache, + cpu_node); + + index++; + } +} + +/** + * acpi_find_last_cache_level() - Determines the number of cache levels for a PE + * @cpu: Kernel logical cpu number + * + * Given a logical cpu number, returns the number of levels of cache represented + * in the PPTT. Errors caused by lack of a PPTT table, or otherwise, return 0 + * indicating we didn't find any cache levels. + * + * Return: Cache levels visible to this core. + */ +int acpi_find_last_cache_level(unsigned int cpu) +{ + u32 acpi_cpu_id; + struct acpi_table_header *table; + int number_of_levels = 0; + acpi_status status; + + pr_debug("Cache Setup find last level cpu=%d\n", cpu); + + acpi_cpu_id = get_acpi_id_for_cpu(cpu); + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_warn_once("No PPTT table found, cache topology may be inaccurate\n"); + } else { + number_of_levels = acpi_find_cache_levels(table, acpi_cpu_id); + acpi_put_table(table); + } + pr_debug("Cache Setup find last level level=%d\n", number_of_levels); + + return number_of_levels; +} + +/** + * cache_setup_acpi() - Override CPU cache topology with data from the PPTT + * @cpu: Kernel logical cpu number + * + * Updates the global cache info provided by cpu_get_cacheinfo() + * when there are valid properties in the acpi_pptt_cache nodes. A + * successful parse may not result in any updates if none of the + * cache levels have any valid flags set. Futher, a unique value is + * associated with each known CPU cache entry. This unique value + * can be used to determine whether caches are shared between cpus. + * + * Return: -ENOENT on failure to find table, or 0 on success + */ +int cache_setup_acpi(unsigned int cpu) +{ + struct acpi_table_header *table; + acpi_status status; + + pr_debug("Cache Setup ACPI cpu %d\n", cpu); + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_warn_once("No PPTT table found, cache topology may be inaccurate\n"); + return -ENOENT; + } + + cache_setup_acpi_cpu(table, cpu); + acpi_put_table(table); + + return status; +} From patchwork Wed Apr 25 23:31:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134394 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1534181lji; Wed, 25 Apr 2018 17:28:18 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqAmRBkKRweh5bs2tX57PBUkiXObEfQyNGaGgAB8yy8JB7VZPbGZPM943ckgE1B+1d3miOw X-Received: by 10.167.133.71 with SMTP id y7mr9340025pfn.210.1524702497972; Wed, 25 Apr 2018 17:28:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702497; cv=none; d=google.com; s=arc-20160816; b=ARp8qKq+K4WDTPerktDxBZxYh+VpOXV9qIhDuLNYYYpR7Bt636OuELGGR0NwGIZvN/ SaJW39QRpExDJJVk1kH1QKU2QF46GcewxRxZRvj+jgF/2r+LgT0iU9RXGbe7QhdwCI0a miMUq4mqkeKV1CHLwuDIHSdwVa/WnT3RGSTsiJofBRDV/XleTwnnuYLLLiHMGSfF6wlb vYVKABnYh2BgQEc/w7aiJ7DfdlezOg+q2KjyoA5q1svRVhcJq4VH14ElwaLlCFyOS9TW aAaULdtKNDzOWF7Fm2ntz+RNmlq/UAnA+8cfn3oHkkL4Rs/QxAt4JsaYELB5dc5bFy5n 2NEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=iPZKjSeNcnhcG2wFRWM3tqfYzqKCEuP7rtJqHUpKyCs=; b=qz10mHGTwwtO1lafKI16Rl7l3xb6C10y6Al+ub/2C1bmnVtCvA8JF1v2Ic7hYUfG4J KMEELSZR84zHHnxelt8a+PFfSubkyjuCvusYTr/UEpUKx3k7CnUaH+bB18TXSZF0sg4L z6aot8OTCexuZSd9mckNl3uNbzIcelJfyvTnoZuGePk5pYcynRjgclPhGKjdeR4sg1DJ UXkNlmjKwe0HSh0yKgh2ZYfbFJM1miYz6m4C5YsRuzQKbCmCw7xlgRYn3esy88vUvybK Hqc9P2MhSCzKl2+VyTrzuh1HKUZuea2Z8he+LjfrExkhQPjks7SP3fiAduivpgDNZjhc Nd4w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c25si14165909pgf.237.2018.04.25.17.28.17; Wed, 25 Apr 2018 17:28:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753040AbeDZA2P (ORCPT + 29 others); Wed, 25 Apr 2018 20:28:15 -0400 Received: from foss.arm.com ([217.140.101.70]:45698 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751723AbeDZA0Q (ORCPT ); Wed, 25 Apr 2018 20:26:16 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6606316A3; Wed, 25 Apr 2018 17:26:16 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 53C7B3F590; Wed, 25 Apr 2018 17:26:15 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 06/13] ACPI: Enable PPTT support on ARM64 Date: Wed, 25 Apr 2018 18:31:14 -0500 Message-Id: <20180425233121.13270-7-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we have a PPTT parser, in preparation for its use on arm64, lets build it. Signed-off-by: Jeremy Linton Reviewed-by: Sudeep Holla --- arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 3 +++ drivers/acpi/Makefile | 1 + 3 files changed, 5 insertions(+) -- 2.13.6 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index eb2cf4938f6d..cff33d9eff0c 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -7,6 +7,7 @@ config ARM64 select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ACPI_MCFG if ACPI select ACPI_SPCR_TABLE if ACPI + select ACPI_PPTT if ACPI select ARCH_CLOCKSOURCE_DATA select ARCH_HAS_DEBUG_VIRTUAL select ARCH_HAS_DEVMEM_IS_ALLOWED diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index 516d7b36d6fb..b533eeb6139d 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -547,6 +547,9 @@ config ACPI_CONFIGFS if ARM64 source "drivers/acpi/arm64/Kconfig" + +config ACPI_PPTT + bool endif config TPS68470_PMIC_OPREGION diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 48e202752754..6d59aa109a91 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -88,6 +88,7 @@ obj-$(CONFIG_ACPI_BGRT) += bgrt.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc_acpi.o obj-$(CONFIG_ACPI_SPCR_TABLE) += spcr.o obj-$(CONFIG_ACPI_DEBUGGER_USER) += acpi_dbg.o +obj-$(CONFIG_ACPI_PPTT) += pptt.o # processor has its own "processor." module_param namespace processor-y := processor_driver.o From patchwork Wed Apr 25 23:31:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134393 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1533807lji; Wed, 25 Apr 2018 17:27:48 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+8N9w7VCVgnpL6Yi5LIRPpmkptW+x+KyhhMSf8teAvT7K0Mis2YQv4DLEnMI5dY9gbJ65E X-Received: by 2002:a17:902:8b84:: with SMTP id ay4-v6mr31104179plb.57.1524702468684; Wed, 25 Apr 2018 17:27:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702468; cv=none; d=google.com; s=arc-20160816; b=l7Yj/OG8+cD6+TmUle+slmu4x0vW98d9Ea+dmqeyWk4D2CPyIzErM8XnoypYRf6XCv WMcmgSG9VgTScAsawG49JiIdhORGD3e1B0Kme+lc0SNSjgsB3aKS+LnslkSO0oA3rChy CEB3q6dJ/Fp8ZynorPni2dVE0nXiynMCeDSjr7b8l6rRf17F1UY0Lt0rNPKeJgMswTp5 OSyqQkR3zGq5FqJMks2581pH96sOWMssdlzFCDI9/jUkQUBZ5ZKLe9SodbW5Qx5pT9ZQ XMslvmSEPTLe0xT2tAJP10E7iYZHja5YPUjheWTcx5htgv7lO48YbXEjzxvJlmv2Eca+ tYPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=PTPvWz+szEH3kdCZzEjVMTEpBS0YbWS5logb5GbXD/c=; b=VlfW5DJj+sO/n1BNHdPw8pS5U6RMDTuxaiVDa5gKWhHmkpIf+UW7cnsViaJNw5kRiM BTZ9lmP+EpxvE8iW8kIJ96hkYl7YxfdNHj6hi4exNHvVxygQB1Pa8EMUPOlhdjvEqP9d 04SngB6FYS+3MwBqed2IqFmnEmawobB8+YKjqWZcL4wqJ+NRZoRvwe0Xi0QE0QPqd/Xy WyhpYthuSjku5wbs6pXQwydag0TTi8NgXPYzceDb7AU1XmOJ1KCL0MFtbl610gcyjx8g bRr8pbMm3QGXpw0vH6VZYOEVxdYIaKHvpNkdkqsBVqFuki5/puj8IcjuUlwL7/nR4jRN HPWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o24si9765348pgn.36.2018.04.25.17.27.48; Wed, 25 Apr 2018 17:27:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753599AbeDZA1q (ORCPT + 29 others); Wed, 25 Apr 2018 20:27:46 -0400 Received: from foss.arm.com ([217.140.101.70]:45726 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751867AbeDZA0S (ORCPT ); Wed, 25 Apr 2018 20:26:18 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0B6CD16BA; Wed, 25 Apr 2018 17:26:18 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id ED98C3F590; Wed, 25 Apr 2018 17:26:16 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 07/13] drivers: base cacheinfo: Add support for ACPI based firmware tables Date: Wed, 25 Apr 2018 18:31:15 -0500 Message-Id: <20180425233121.13270-8-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Call ACPI cache parsing routines from base cacheinfo code if ACPI is enable. Also stub out cache_setup_acpi() so that individual architectures can enable ACPI topology parsing. Signed-off-by: Jeremy Linton --- drivers/base/cacheinfo.c | 14 ++++++++++---- include/linux/cacheinfo.h | 10 ++++++++++ 2 files changed, 20 insertions(+), 4 deletions(-) -- 2.13.6 diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 597aacb233fc..2880e2ab01f5 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -206,7 +206,7 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, struct cacheinfo *sib_leaf) { /* - * For non-DT systems, assume unique level 1 cache, system-wide + * For non-DT/ACPI systems, assume unique level 1 caches, system-wide * shared caches for all other levels. This will be used only if * arch specific code has not populated shared_cpu_map */ @@ -214,6 +214,11 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, } #endif +int __weak cache_setup_acpi(unsigned int cpu) +{ + return -ENOTSUPP; +} + static int cache_shared_cpu_map_setup(unsigned int cpu) { struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); @@ -227,8 +232,8 @@ static int cache_shared_cpu_map_setup(unsigned int cpu) if (of_have_populated_dt()) ret = cache_setup_of_node(cpu); else if (!acpi_disabled) - /* No cache property/hierarchy support yet in ACPI */ - ret = -ENOTSUPP; + ret = cache_setup_acpi(cpu); + if (ret) return ret; @@ -279,7 +284,8 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); } - of_node_put(this_leaf->fw_token); + if (of_have_populated_dt()) + of_node_put(this_leaf->fw_token); } } diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 0c6f658054d2..70ef44669fa3 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -97,6 +97,16 @@ int func(unsigned int cpu) \ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); int init_cache_level(unsigned int cpu); int populate_cache_leaves(unsigned int cpu); +int cache_setup_acpi(unsigned int cpu); +#ifndef CONFIG_ACPI +static inline int acpi_find_last_cache_level(unsigned int cpu) +{ + /* ACPI kernels should be built with PPTT support */ + return 0; +} +#else +int acpi_find_last_cache_level(unsigned int cpu); +#endif const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf); From patchwork Wed Apr 25 23:31:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134389 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1532897lji; Wed, 25 Apr 2018 17:26:40 -0700 (PDT) X-Google-Smtp-Source: AIpwx48UBT/sZXC8HHIbBJCxDiB/vzKAOX+tz0RlFNOxF9/a+nV58P1sntrjs08aKprXAYejan5p X-Received: by 2002:a17:902:1c7:: with SMTP id b65-v6mr29009091plb.298.1524702400730; Wed, 25 Apr 2018 17:26:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702400; cv=none; d=google.com; s=arc-20160816; b=P5Fi61ku0lO1eDHrySQkt/OdU1yjSHGLRQIeWCMbx4ZTLfgPTaMrQxb/DHywWDtEOG R4oHg2wyyHfwRRjH3UOw8OzrXYzJwCNBQFkmWLZHeldKPlkoCzSGpGW/+OmpxXNcBzOr ZecUfZYLE4z3BZdmj+wuanukzjBGWXxqRKKMu1z5uapde66ZSKmUgq7qWY9ZcxYqG8bZ s2BAwOoHsFhC02R0+qLxB+7BZnSLXk6Kvuv2W9CU145N7qqQQ6yMRKIOzLQ5O6MqzRm2 o8F8rJeWfiTAaruDNtK09UVsn+JtemQeIQ8x8CDIanPxSiwMc/jC0l7yHkXsBSeobe3L Ximw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=6KLKCt+oirq/8z1GYBPkUZ2ZCADEADEsnaq8KoBVY4k=; b=WDCgw0hs5L2XgCfTFjCYz8HCSqq6MVBe6rSvE/5SaeigWB2cXWUKQ1CPfUnl1nb2kQ GE7Iea2C3WNdro1DiXBNE3dnZaKEh71cPOO1JiwnZSOo2ikM8QD95+f/TyOcrGXpXf74 i3SP4W5pN8b9NHup/rB2n59BAdqZMEKyeSa5ktiDzzKoGxixlLiiW2eyIfFcAro5WFcb D1Hh9EcNH5tkjUwewBm2s1LNzg89Flivc+FmiOCMu9yuDIhoRURZi+jSjGkGjrtlvv2z joowipdzE4OLPcsVdytEcwD49wcw5Kg77+BzQfWVd7/IQ4TPWG9iID6COImiS+7z+ls8 BaWQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 87si13169293pfo.137.2018.04.25.17.26.40; Wed, 25 Apr 2018 17:26:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752882AbeDZA0h (ORCPT + 29 others); Wed, 25 Apr 2018 20:26:37 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:45770 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751956AbeDZA0V (ORCPT ); Wed, 25 Apr 2018 20:26:21 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 410171713; Wed, 25 Apr 2018 17:26:21 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2EB443F590; Wed, 25 Apr 2018 17:26:20 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 09/13] ACPI/PPTT: Add topology parsing code Date: Wed, 25 Apr 2018 18:31:17 -0500 Message-Id: <20180425233121.13270-10-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PPTT can be used to determine the groupings of CPU's at given levels in the system. Lets add a few routines to the PPTT parsing code to return a unique id for each unique level in the processor hierarchy. This can then be matched to build thread/core/cluster/die/package/etc mappings for each processing element in the system. Signed-off-by: Jeremy Linton --- drivers/acpi/pptt.c | 160 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 4 ++ 2 files changed, 164 insertions(+) -- 2.13.6 diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index cced71ef851a..0fc4b2654665 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -453,6 +453,86 @@ static void cache_setup_acpi_cpu(struct acpi_table_header *table, } } +/* Passing level values greater than this will result in search termination */ +#define PPTT_ABORT_PACKAGE 0xFF + +/** + * acpi_find_processor_package_id() - Locate the processor structure for a cpu + * + * Given an acpi_pptt_processor node, walk up until we identify the + * package that the node is associated with, or we run out of levels + * to request or the search is terminated with a flag match + * The level parameter also serves to limit possible loops within the tree. + * + * Return: acpi_pptt_processor* describing the passed core or NULL + */ +static struct acpi_pptt_processor *acpi_find_processor_package_id(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu, + int level, int flag) +{ + struct acpi_pptt_processor *prev_node; + + while (cpu && level) { + if (cpu->flags & flag) + break; + pr_debug("level %d\n", level); + prev_node = fetch_pptt_node(table_hdr, cpu->parent); + if (prev_node == NULL) + break; + cpu = prev_node; + level--; + } + return cpu; +} + +/** + * topology_get_acpi_cpu_tag() - Find a unique topology value for a feature + * + * Get a unique value given a cpu, and a topology level, that can be + * matched to determine which cpus share common topological features + * at that level. + * + * Return: Unique value, or -ENOENT if unable to locate cpu + */ +static int topology_get_acpi_cpu_tag(struct acpi_table_header *table, + unsigned int cpu, int level, int flag) +{ + struct acpi_pptt_processor *cpu_node; + u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu); + + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); + if (cpu_node) { + cpu_node = acpi_find_processor_package_id(table, cpu_node, + level, flag); + /* Only the first level has a guaranteed id */ + if (level == 0) + return cpu_node->acpi_processor_id; + return ACPI_PTR_DIFF(cpu_node, table); + } + pr_warn_once("PPTT table found, but unable to locate core %d (%d)\n", + cpu, acpi_cpu_id); + return -ENOENT; +} + +static int find_acpi_cpu_topology_tag(unsigned int cpu, int level, int flag) +{ + struct acpi_table_header *table; + acpi_status status; + int retval; + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_warn_once("No PPTT table found, cpu topology may be inaccurate\n"); + return -ENOENT; + } + retval = topology_get_acpi_cpu_tag(table, cpu, level, flag); + pr_debug("Topology Setup ACPI cpu %d, level %d ret = %d\n", + cpu, level, retval); + acpi_put_table(table); + + return retval; +} + /** * acpi_find_last_cache_level() - Determines the number of cache levels for a PE * @cpu: Kernel logical cpu number @@ -516,3 +596,83 @@ int cache_setup_acpi(unsigned int cpu) return status; } + +/** + * find_acpi_cpu_topology() - Determine a unique topology value for a given cpu + * @cpu: Kernel logical cpu number + * @level: The topological level for which we would like a unique ID + * + * Determine a topology unique ID for each thread/core/cluster/mc_grouping + * /socket/etc. This ID can then be used to group peers, which will have + * matching ids. + * + * The search terminates when either the requested level is found or + * we reach a root node. Levels beyond the termination point will return the + * same unique ID. The unique id for level 0 is the acpi processor id. All + * other levels beyond this use a generated value to uniquely identify + * a topological feature. + * + * Return: -ENOENT if the PPTT doesn't exist, or the cpu cannot be found. + * Otherwise returns a value which represents a unique topological feature. + */ +int find_acpi_cpu_topology(unsigned int cpu, int level) +{ + return find_acpi_cpu_topology_tag(cpu, level, 0); +} + +/** + * find_acpi_cpu_cache_topology() - Determine a unique cache topology value + * @cpu: Kernel logical cpu number + * @level: The cache level for which we would like a unique ID + * + * Determine a unique ID for each unified cache in the system + * + * Return: -ENOENT if the PPTT doesn't exist, or the cpu cannot be found. + * Otherwise returns a value which represents a unique topological feature. + */ +int find_acpi_cpu_cache_topology(unsigned int cpu, int level) +{ + struct acpi_table_header *table; + struct acpi_pptt_cache *found_cache; + acpi_status status; + u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu); + struct acpi_pptt_processor *cpu_node = NULL; + int ret = -1; + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + pr_warn_once("No PPTT table found, topology may be inaccurate\n"); + return -ENOENT; + } + + found_cache = acpi_find_cache_node(table, acpi_cpu_id, + CACHE_TYPE_UNIFIED, + level, + &cpu_node); + if (found_cache) + ret = ACPI_PTR_DIFF(cpu_node, table); + + acpi_put_table(table); + + return ret; +} + + +/** + * find_acpi_cpu_topology_package() - Determine a unique cpu package value + * @cpu: Kernel logical cpu number + * + * Determine a topology unique package ID for the given cpu. + * This ID can then be used to group peers, which will have matching ids. + * + * The search terminates when either a level is found with the PHYSICAL_PACKAGE + * flag set or we reach a root node. + * + * Return: -ENOENT if the PPTT doesn't exist, or the cpu cannot be found. + * Otherwise returns a value which represents the package for this cpu. + */ +int find_acpi_cpu_topology_package(unsigned int cpu) +{ + return find_acpi_cpu_topology_tag(cpu, PPTT_ABORT_PACKAGE, + ACPI_PPTT_PHYSICAL_PACKAGE); +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 15bfb15c2fa5..032e12a2fdc2 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1297,4 +1297,8 @@ static inline int lpit_read_residency_count_address(u64 *address) } #endif +int find_acpi_cpu_topology(unsigned int cpu, int level); +int find_acpi_cpu_topology_package(unsigned int cpu); +int find_acpi_cpu_cache_topology(unsigned int cpu, int level); + #endif /*_LINUX_ACPI_H*/ From patchwork Wed Apr 25 23:31:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134388 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1532862lji; Wed, 25 Apr 2018 17:26:36 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqH6Skix9WAQAdD6UE3Q13+UfcNg01hkHv8o0FzQMU91TtZpviApC/NGjnEWwwEgf4uAQj7 X-Received: by 10.99.112.70 with SMTP id a6mr1773885pgn.358.1524702396546; Wed, 25 Apr 2018 17:26:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702396; cv=none; d=google.com; s=arc-20160816; b=GbxXtNJp3f1K/caXcSjSSIloYABJE8HIEjr7vrI8w8m356hNmRM3glMSVKmlbzlxao D1cwAaMqqMnBctjzNB/6wjcdL5cslDPVKMlgIzgKCYPJxPJpOakFKEa65ub74q1jxR4m NA80riyD8mEIiaszpuA3P19ycDHNQZiUjULc4tkUULj5nrnCYsMc33/aU09KEQIOKfk+ ulrTMUV0eI1AoFqpP3xEoSwNZmTTFS5c2oLi4PmOf0ySYb7+MR4UzV6Twel3G+Nl4j8L +821jGWu/72tkXYvmN9O92PzMhujSPjARd5d5LczMPvxQUJNO6R9PCL7e5FmJbFS3C6R s4xg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=rPUi0LT3mxRy7rs8cVc7X4T5aAX2XWfQDXmDyIBHd/A=; b=Twgo5FHQbE/Xcxz/+IpjZOnbhBG5d6ZM02Nw9Oytir7zi779OZKvnJdxNRjTnpw6Vr 2U5JWPkOZpvNGRX2psqFLeBbx0AvWaQfsNQ/xP1SSJ5eaTLjXcmgVMgyRc2v8Hn/pb4j m4GgRT9+tGg9V8X/U3nUhtM0OmBs8pYjLuELqxu3TN060DTmwgIr2C8HchpwXeQEqvye +aZDcsyIWv8uB7L9E4MDnrvMtBNjjte3x3xN+yKtv+ugySHHZ91AGRb0fAVEivovJwZz DSlnRd40w7EmTt0eveOTtuoP3m94HIrnKS8m01dnIkQdFmA38kvFNp9OI9XhGNaUzadk v1vw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 87si13169293pfo.137.2018.04.25.17.26.36; Wed, 25 Apr 2018 17:26:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752750AbeDZA0d (ORCPT + 29 others); Wed, 25 Apr 2018 20:26:33 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:45816 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751722AbeDZA0Y (ORCPT ); Wed, 25 Apr 2018 20:26:24 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D4687168F; Wed, 25 Apr 2018 17:26:22 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C14673F590; Wed, 25 Apr 2018 17:26:21 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 10/13] arm64: topology: rename cluster_id Date: Wed, 25 Apr 2018 18:31:18 -0500 Message-Id: <20180425233121.13270-11-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Lets match the name of the arm64 topology field to the kernel macro that uses it. Signed-off-by: Jeremy Linton --- arch/arm64/include/asm/topology.h | 4 ++-- arch/arm64/kernel/topology.c | 26 +++++++++++++------------- 2 files changed, 15 insertions(+), 15 deletions(-) -- 2.13.6 Acked-by: Morten Rasmussen diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h index c4f2d50491eb..6b10459e6905 100644 --- a/arch/arm64/include/asm/topology.h +++ b/arch/arm64/include/asm/topology.h @@ -7,14 +7,14 @@ struct cpu_topology { int thread_id; int core_id; - int cluster_id; + int package_id; cpumask_t thread_sibling; cpumask_t core_sibling; }; extern struct cpu_topology cpu_topology[NR_CPUS]; -#define topology_physical_package_id(cpu) (cpu_topology[cpu].cluster_id) +#define topology_physical_package_id(cpu) (cpu_topology[cpu].package_id) #define topology_core_id(cpu) (cpu_topology[cpu].core_id) #define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) #define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 21868530018e..dc18b1e53194 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -47,7 +47,7 @@ static int __init get_cpu_for_node(struct device_node *node) return cpu; } -static int __init parse_core(struct device_node *core, int cluster_id, +static int __init parse_core(struct device_node *core, int package_id, int core_id) { char name[10]; @@ -63,7 +63,7 @@ static int __init parse_core(struct device_node *core, int cluster_id, leaf = false; cpu = get_cpu_for_node(t); if (cpu >= 0) { - cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].package_id = package_id; cpu_topology[cpu].core_id = core_id; cpu_topology[cpu].thread_id = i; } else { @@ -85,7 +85,7 @@ static int __init parse_core(struct device_node *core, int cluster_id, return -EINVAL; } - cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].package_id = package_id; cpu_topology[cpu].core_id = core_id; } else if (leaf) { pr_err("%pOF: Can't get CPU for leaf core\n", core); @@ -101,7 +101,7 @@ static int __init parse_cluster(struct device_node *cluster, int depth) bool leaf = true; bool has_cores = false; struct device_node *c; - static int cluster_id __initdata; + static int package_id __initdata; int core_id = 0; int i, ret; @@ -140,7 +140,7 @@ static int __init parse_cluster(struct device_node *cluster, int depth) } if (leaf) { - ret = parse_core(c, cluster_id, core_id++); + ret = parse_core(c, package_id, core_id++); } else { pr_err("%pOF: Non-leaf cluster with core %s\n", cluster, name); @@ -158,7 +158,7 @@ static int __init parse_cluster(struct device_node *cluster, int depth) pr_warn("%pOF: empty cluster\n", cluster); if (leaf) - cluster_id++; + package_id++; return 0; } @@ -194,7 +194,7 @@ static int __init parse_dt_topology(void) * only mark cores described in the DT as possible. */ for_each_possible_cpu(cpu) - if (cpu_topology[cpu].cluster_id == -1) + if (cpu_topology[cpu].package_id == -1) ret = -EINVAL; out_map: @@ -224,7 +224,7 @@ static void update_siblings_masks(unsigned int cpuid) for_each_possible_cpu(cpu) { cpu_topo = &cpu_topology[cpu]; - if (cpuid_topo->cluster_id != cpu_topo->cluster_id) + if (cpuid_topo->package_id != cpu_topo->package_id) continue; cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); @@ -245,7 +245,7 @@ void store_cpu_topology(unsigned int cpuid) struct cpu_topology *cpuid_topo = &cpu_topology[cpuid]; u64 mpidr; - if (cpuid_topo->cluster_id != -1) + if (cpuid_topo->package_id != -1) goto topology_populated; mpidr = read_cpuid_mpidr(); @@ -259,19 +259,19 @@ void store_cpu_topology(unsigned int cpuid) /* Multiprocessor system : Multi-threads per core */ cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); - cpuid_topo->cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 2) | + cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2) | MPIDR_AFFINITY_LEVEL(mpidr, 3) << 8; } else { /* Multiprocessor system : Single-thread per core */ cpuid_topo->thread_id = -1; cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); - cpuid_topo->cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 1) | + cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1) | MPIDR_AFFINITY_LEVEL(mpidr, 2) << 8 | MPIDR_AFFINITY_LEVEL(mpidr, 3) << 16; } pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n", - cpuid, cpuid_topo->cluster_id, cpuid_topo->core_id, + cpuid, cpuid_topo->package_id, cpuid_topo->core_id, cpuid_topo->thread_id, mpidr); topology_populated: @@ -287,7 +287,7 @@ static void __init reset_cpu_topology(void) cpu_topo->thread_id = -1; cpu_topo->core_id = 0; - cpu_topo->cluster_id = -1; + cpu_topo->package_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_set_cpu(cpu, &cpu_topo->core_sibling); From patchwork Wed Apr 25 23:31:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 134390 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1532933lji; Wed, 25 Apr 2018 17:26:44 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+0rwPQ23QmrwyN/1dICScV/JiCEic34b7jHstdy5k1grhDI/wRyr9JwFINN9jRgpOYYpxG X-Received: by 10.98.2.72 with SMTP id 69mr29900805pfc.12.1524702404316; Wed, 25 Apr 2018 17:26:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524702404; cv=none; d=google.com; s=arc-20160816; b=yh4so1Imm4BqhdMoJwBtsE6muRD5bRH5ri8/OUtLdhGFa/upY4Uc9Ej/dAjdgbRw22 N/EMt/QapIGHhrvnthaapfXjExNsKGvmRkiD3atMQkgG1Xvr+fH7HIJrulikeViXQK9N 32yFfY7ZQTJP7b0HtxqK6RPhzPWo1maJe0RcoDeBP699VnDSLPzY9Qyy2GSwmMNe0Coi S6UvKuvq+HnJgWi/tYVUea0s7FlKmmEoiVnF53k+BIn7g6UcwLDQJQ8kTbvtFJ6Oi/kT oLheZgGwnd1BYoAowyL50xt2Y7tzLKDjhbt23r7wwGTH7n7WrxV1JtDthfHWXrU9LV1d Ejbg== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id bb4-v6si12911680plb.169.2018.04.25.17.26.43; Wed, 25 Apr 2018 17:26:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752972AbeDZA0l (ORCPT + 29 others); Wed, 25 Apr 2018 20:26:41 -0400 Received: from foss.arm.com ([217.140.101.70]:45886 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752129AbeDZA02 (ORCPT ); Wed, 25 Apr 2018 20:26:28 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B7AF7165D; Wed, 25 Apr 2018 17:26:27 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A5BE93F590; Wed, 25 Apr 2018 17:26:26 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: Sudeep.Holla@arm.com, linux-arm-kernel@lists.infradead.org, Lorenzo.Pieralisi@arm.com, hanjun.guo@linaro.org, rjw@rjwysocki.net, Will.Deacon@arm.com, Catalin.Marinas@arm.com, gregkh@linuxfoundation.org, Mark.Rutland@arm.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com, vkilari@codeaurora.org, ahs3@redhat.com, Dietmar.Eggemann@arm.com, Morten.Rasmussen@arm.com, palmer@sifive.com, lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org, tnowicki@caviumnetworks.com, jhugo@qti.qualcomm.com, timur@qti.qualcomm.com, ard.biesheuvel@linaro.org, Jeremy Linton Subject: [PATCH v8 13/13] arm64: topology: divorce MC scheduling domain from core_siblings Date: Wed, 25 Apr 2018 18:31:21 -0500 Message-Id: <20180425233121.13270-14-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180425233121.13270-1-jeremy.linton@arm.com> References: <20180425233121.13270-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we have an accurate view of the physical topology we need to represent it correctly to the scheduler. Generally MC should equal the LLC in the system, but there are a number of special cases that need to be dealt with. In the case of NUMA in socket, we need to assure that the sched domain we build for the MC layer isn't larger than the DIE above it. Similarly for LLC's that might exist in cross socket interconnect or directory hardware we need to assure that MC is shrunk to the socket or NUMA node. This patch builds a sibling mask for the LLC, and then picks the smallest of LLC, socket siblings, or NUMA node siblings, which gives us the behavior described above. This is ever so slightly different than the similar alternative where we look for a cache layer less than or equal to the socket/NUMA siblings. The logic to pick the MC layer affects all arm64 machines, but only changes the behavior for DT/MPIDR systems if the NUMA domain is smaller than the core siblings (generally set to the cluster). Potentially this fixes a possible bug in DT systems, but really it only affects ACPI systems where the core siblings is correctly set to the socket siblings. Thus all currently available ACPI systems should have MC equal to LLC, including the NUMA in socket machines where the LLC is partitioned between the NUMA nodes. Signed-off-by: Jeremy Linton --- arch/arm64/include/asm/topology.h | 2 ++ arch/arm64/kernel/topology.c | 32 +++++++++++++++++++++++++++++++- 2 files changed, 33 insertions(+), 1 deletion(-) -- 2.13.6 diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h index 6b10459e6905..df48212f767b 100644 --- a/arch/arm64/include/asm/topology.h +++ b/arch/arm64/include/asm/topology.h @@ -8,8 +8,10 @@ struct cpu_topology { int thread_id; int core_id; int package_id; + int llc_id; cpumask_t thread_sibling; cpumask_t core_sibling; + cpumask_t llc_siblings; }; extern struct cpu_topology cpu_topology[NR_CPUS]; diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index bd1aae438a31..20b4341dc527 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -13,6 +13,7 @@ #include #include +#include #include #include #include @@ -214,7 +215,19 @@ EXPORT_SYMBOL_GPL(cpu_topology); const struct cpumask *cpu_coregroup_mask(int cpu) { - return &cpu_topology[cpu].core_sibling; + const cpumask_t *core_mask = cpumask_of_node(cpu_to_node(cpu)); + + /* Find the smaller of NUMA, core or LLC siblings */ + if (cpumask_subset(&cpu_topology[cpu].core_sibling, core_mask)) { + /* not numa in package, lets use the package siblings */ + core_mask = &cpu_topology[cpu].core_sibling; + } + if (cpu_topology[cpu].llc_id != -1) { + if (cpumask_subset(&cpu_topology[cpu].llc_siblings, core_mask)) + core_mask = &cpu_topology[cpu].llc_siblings; + } + + return core_mask; } static void update_siblings_masks(unsigned int cpuid) @@ -226,6 +239,9 @@ static void update_siblings_masks(unsigned int cpuid) for_each_possible_cpu(cpu) { cpu_topo = &cpu_topology[cpu]; + if (cpuid_topo->llc_id == cpu_topo->llc_id) + cpumask_set_cpu(cpu, &cpuid_topo->llc_siblings); + if (cpuid_topo->package_id != cpu_topo->package_id) continue; @@ -291,6 +307,10 @@ static void __init reset_cpu_topology(void) cpu_topo->core_id = 0; cpu_topo->package_id = -1; + cpu_topo->llc_id = -1; + cpumask_clear(&cpu_topo->llc_siblings); + cpumask_set_cpu(cpu, &cpu_topo->llc_siblings); + cpumask_clear(&cpu_topo->core_sibling); cpumask_set_cpu(cpu, &cpu_topo->core_sibling); cpumask_clear(&cpu_topo->thread_sibling); @@ -311,6 +331,8 @@ static int __init parse_acpi_topology(void) is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK; for_each_possible_cpu(cpu) { + int i; + topology_id = find_acpi_cpu_topology(cpu, 0); if (topology_id < 0) return topology_id; @@ -325,6 +347,14 @@ static int __init parse_acpi_topology(void) } topology_id = find_acpi_cpu_topology_package(cpu); cpu_topology[cpu].package_id = topology_id; + + i = acpi_find_last_cache_level(cpu); + + if (i > 0) { + topology_id = find_acpi_cpu_cache_topology(cpu, i); + if (topology_id > 0) + cpu_topology[cpu].llc_id = topology_id; + } } return 0;